基于UCC27321高速MOSFET驱动芯片的功能与应用
ucc27321
Inverting NonInverting
UCC37322P † D (SOIC−8) and DGN (PowerPAD−MSOP) packages are available taped and reeled. Add R suffix to device type (e.g. UCC37321DR, UCC37322DGNR) to order quantities of 2,500 devices per reel.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2004, Texas Instruments Incorporated
1
UCC27321, UCC27322 UCC37321, UCC37322
SLUS504C − SEPTEMBER 2002 − REVISED NOVEMBER 2004
description (continued)
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal.
ucc37322
UDG--01112OUTVDDINENBLVDDPGNDOU TAGNDINPUT/OUTPUT TABLEUCC27321,UCC27322UCC37321,UCC37322 SLUS504G–SEPTEMBER2002–REVISED MAY2013 SINGLE9-A HIGH SPEED LOW-SIDE MOSFET DRIVER WITH ENABLECheck for Samples:UCC27321,UCC27322,UCC37321,UCC37322FEATURES APPLICATIONS•Industry-Standard Pin-Out With Addition of•Switch Mode Power Supplies Enable Funtion•DC/DC Converters•High-Peak Current Drive Capability of±9A at•Motor Controllersthe Miller Plateau Region Using TrueDrive•Class-D Switching Amplifiers•Efficient Constant Current Sourcing Using a•Line DriversUnique BiPolar&CMOS Output Stage•Pulse Transformer Driver•TTL/CMOS Compatible Inputs Independentof Supply Voltage DESCRIPTION•20-ns Typical Rise and Fall Times with10-nF The UCC37321/2family of high-speed drivers deliver Load9A of peak drive current in an industry standardpinout.These drivers can drive the largest of •Typical Propagation Delay Times of25nsMOSFETs for systems requiring extreme Miller With Input Falling and35ns with Inputcurrent due to high dV/dt transitions.This eliminates Risingadditional external circuits and can replace multiple •4-V to15-V Supply Voltage components to reduce space,design complexity and•Available in Thermally Enhanced MSOP assembly cost.Two standard logic options are PowerPAD™Package With4.7°C/Wθjc offered,inverting(UCC37321)and noninverting(UCC37322).•Rated From–40°C to105°C•Pb-Free Finish(NiPdAu)on SOIC-8andPDIP-8PackagesPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments,Incorporated.PRODUCTION DATA information is current as of publication date.Copyright©2002–2013,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasUCC27321,UCC27322UCC37321,UCC37322SLUS504G–SEPTEMBER2002–REVISED DESCRIPTION(CONTINUED)Using a design that inherently minimizes shoot-through current,the outputs of these can provide high gate drive current where it is most needed at the Miller plateau region during the MOSFET switching transition.A unique hybrid output stage paralleling bipolar and MOSFET transistors(TrueDrive)allows efficient current delivery at low supply voltages.With this drive architecture,UCC37321/2/3can be used in industry standard6-A,9-A and many 12-A driver tch up and ESD protection circuitries are also included.Finally,the UCC37321/2 provides an enable(ENBL)function to have better control of the operation of the driver applications.ENBL is implemented on pin3which was previously left unused in the industry standard pin-out.It is internally pulled up to Vdd for active high logic and can be left open for standard operation.In addition to SOIC-8(D)and PDIP-8(P)package offerings,the UCC37321/2also comes in the thermally enhanced but tiny8-pin MSOP PowerPAD™(DGN)package.The PowerPAD™package drastically lowers the thermal resistance to extend the temperature operation range and improve the long-term reliability.ABSOLUTE MAXIMUM RATINGSover operating free-air temperature range(unless otherwise noted)(1)(2)UCCx732x UNIT Supply voltage,V DD-–0.3to16V Output current(OUT)DC,I OUT_DC0.6A–0.3V to6V or V DD+0.3Input voltage(IN),V IN(whichever is larger)V–0.3V to6V or V DD+0.3Enable voltage(ENBL)(whichever is larger)D package650mW Power dissipation at T A=25°C DGN package3WP package350mW Junction operating temperature,T J–55to150°C Storage temperature,T stg–65to150°C Lead temperature(soldering,10sec.)300°C (1)Stresses beyond those listed under“absolute maximum ratings”may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under“recommended operating conditions”is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)All voltages are with respect to GND.Currents are positive into,negative out of the specified terminal.ORDERING INFORMATIONPACKAGED DEVICESOUTPUT TEMPERATUREMSOP-8PowerPADCONFIGURATION RANGE T A=T J SOIC-8(D)(1)PDIP-8(P)(DGN)(1)–40°C to+105°C UCC27321D UCC27321DGN UCC27321P Inverting0°C to+70°C UCC37321D UCC37321DGN UCC37321P–40°C to+105°C UCC27322D UCC27322DGN UCC27322P NonInverting0°C to+70°C UCC37322D UCC37322DGN UCC37322P(1)D(SOIC–8)and DGN(PowerPAD–MSOP)packages are available taped and reeled.Add R suffix to device type(e.g.UCC37321DR,UCC37322DGNR)to order quantities of2,500devices per reel.2Submit Documentation Feedback Copyright©2002–2013,Texas Instruments IncorporatedUCC27321,UCC27322UCC37321,UCC37322 SLUS504G–SEPTEMBER2002–REVISED MAY2013 ELECTRICAL CHARACTERISTICSV DD=4.5V to15V,T A=–40°C to105°C for UCC2732x,T A=0°C to70°C for UCC3732x,T A=T J,(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNITInput(IN)V IN_H,logic1input threshold2VV IN_H,logic1input threshold1VInput current0V≤V IN≤V DD–10010µAOutput(OUT)Peak output current(1)(2)V DD=14V,9AV OH,output high level V OH=V DD–V OUT,I OUT=–10mA150300mVV OL,output high level I OUT=10mA1125mVOutput resistance high(3)I OUT=–10mA,V DD=14V1525ΩOutput resistance low(3)I OUT=10mA,V V DD=14 1.1 2.2ΩLatch--up protection(1)500mAOverallIN=LO,EN=LO,V DD=15V150225IN=HI,EN=LO,V DD=15V440650UCC37321UCC27321IN=LO,EN=HI,V=15V370550DDIN=HI,EN=HI,V DD=15V370550I DD,static operating currentµAIN=LO,EN=LO,V DD=15V150225IN=HI,EN=LO,V DD=15V450650UCC37322UCC27322IN=LO,EN=HI,V=15V75125DDIN=HI,EN=HI,V DD=15V6751000Enable(ENBL)V IN_H,high-level input voltage LO to HI transition 1.7 2.2 2.7VV IN_L,low-level input voltage HI to LO transition 1.1 1.6 2.0V Hysteresis0.250.550.90R ENBL,enable impedance V DD=14V,ENBL=GND75100135kΩt D3,propagation delay time(4)C LOAD=10nF6090nst D4,propagation delay time(4)C LOAD=10nF6090Switching Time(5)t R,rise time(OUT)C LOAD=10nF2070t F,fall time(OUT)C LOAD=10nF2030nst D1,propagation delay,IN rising(IN to OUT)C LOAD=10nF2570t D2,propagation delay,IN falling(IN to OUT)C LOAD=10nF3570(1)Ensured by design.Not tested in production.(2)The pullup/pulldown circuits of the driver are bipolar and MOSFET transistors in parallel.The peak output current rating is thecombined current from the bipolar and MOSFET transistors.(3)The pullup/pulldown circuits of the driver are bipolar and MOSFET transistors in parallel.The output resistance is the R DS(ON)of theMOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor.(4)See Figure2.(5)See Figure1for switching waveforms.Copyright©2002–2013,Texas Instruments Incorporated Submit Documentation Feedback30V5V 0VOUTV DD0V5V 0VIN OUTV DDUCC27321,UCC27322UCC37321,UCC37322SLUS504G –SEPTEMBER 2002–REVISED MAY 2013A.The 20%and 80%thresholds depict the dynamics of the BiPolar output devices that dominate the power MOSFET transition through the Miller regions of operation.Figure 1.Switching Waveforms for (a)Inverting Input to (b)Output TimesA.The 20%and 80%thresholds depict the dynamics of the BiPolar output devices that dominate the power MOSFET transition through the Miller regions of operation.Figure 2.Switching Waveform for Enable to Output4Submit Documentation Feedback Copyright ©2002–2013,Texas Instruments Incorporated1 2 3 48 7 6 5VDDIN ENBL AGND VDD OUT OUT PGNDPDIP(P) PACKAGE (TOP VIEW)SOIC(D) OR MSOP(DGN)PACKAGE(TOPVIEW)VDDOUTOUTPGNDVDDINENBLAGNDUCC27321,UCC27322UCC37321,UCC37322 SLUS504G–SEPTEMBER2002–REVISED MAY2013 PIN CONFIGURATIONSPOWER DISSIPATION RATING TABLEPower Rating Derating Factor PACKAGE SUFFIXθjc(°C/W)θja(°C/W)(mW)AboveT A=70°C(1)70°C(mW/°C)(1) SOIC-8D4284–160(2)344–655(2) 6.25–11.9(2)PDIP-8P491105009MSOP PowerPAD-8DGN 4.750–59137017.1(1)125°C operating junction temperature is used for power rating calculations(2)The range of values indicates the effect of pc-board.These values are intended to give the system designer an indication of the bestand worst case conditions.In general,the system designer should attempt to use larger traces on the pc-board where possible in order to spread the heat away form the device more effectively.For additional information on device temperature management,please refer to Packaging Information section of the Power Supply Control Products Data Book,(Ti Literature Number SLUD003).TERMINAL FUNCTIONSTERMINALI/O DESCRIPTIONNAME NO.The AGND and the PGND should be connected by a single thick trace directly under the device.There should be a low ESR,low ESL capacitor of0.1µF between VDD(pin8)and PGND and aseperate0.1-µF capacitor between VDD(pin1)and AGND.The power MOSFETs should be located AGND4–on the PGND side of the device while the control circuit should be on the AGND side of the device.The control circuit ground should be common with the AGND while the PGND should be commonwith the source of the power FETs.Enable input for the driver with logic compatible threshold and hysteresis.The driver output can be ENBL3I enabled and disabled with this pin.It is internally pulled up to V DD with100-kΩresistor for active highoperation.The output state when the device is disabled will be low regardless of the input state.IN2I Input signal of the driver which has logic compatible threshold and hysteresis.Driver outputs that must be connected together externally.The output stage is capable of providing OUT6,7O9-A peak drive current to the gate of a power MOSFET.Common ground for output stage.This ground should be connected very closely to the source of the PGND5–power MOSFET which the driver is driving.Grounds are separated to minimize ringing affects due tooutput switching di/dt which can affect the input threshold.Supply voltage and the power input connections for this device.Three pins must be connectedVDD1,8Itogether externally.Copyright©2002–2013,Texas Instruments Incorporated Submit Documentation Feedback5UCC27321,UCC27322UCC37321,UCC37322SLUS504G–SEPTEMBER2002–REVISED APPLICATION INFORMATIONGeneral InformationThe UCC37321and UCC37322drivers serve as an interface between low-power controllers and power MOSFETs.They can also be used as an interface between DSPs and power MOSFETs.High-frequency power supplies often require high-speed,high-current drivers such as the UCC37321/2family.A leading application is the need to provide a high power buffer stage between the PWM output of the control device and the gates of the primary power MOSFET or IGBT switching devices.In other cases,the device drives the power device gates through a drive transformer.Synchronous rectification supplies also have the need to simultaneously drive multiple devices which can present an extremely large load to the control circuitry.The inverting driver(UCC37321)is useful for generating inverted gate drive signals from controllers that have only outputs of the opposite polarity.For example,this driver can provide a gate signal for ground referenced, N-channel synchronous rectifier MOSFETs in buck derived converters.This driver can also be used for generating a gate drive signal for a P-channel MOSFET from a controller that is designed for N-channel applications.MOSFET gate drivers are generally used when it is not feasible to have the primary PWM regulator device directly drive the switching devices for one or more reasons.The PWM device may not have the brute drive capability required for the intended switching MOSFET,limiting the switching performance in the application.In other cases theremay be a desire to minimize the effect of high frequency switching noise by placing the high current driver physically close to the load.Also,newer devices that target the highest operating frequencies may not incorporate onboard gate drivers at all.Their PWM outputs are only intended to drive the high impedance input to a driver such as the UCC37321/2.Finally,the control device may be under thermal stress due to power dissipation,and an external driver can help by moving the heat from the controller to an external package.Input StageThe IN threshold has a3.3-V logic sensitivity over the full range of VDD voltages;yet,it is equally compatible with0V toVDD signals.The inputs of UCC37321/2family of drivers are designed to withstand500-mA reverse current without either damage to the device or logic upset.In addition,the input threshold turn-off of the UCC37321/2has been slightly raised for improved noise immunity.The input stage of each driver should be driven by a signal with a short rise or fall time.This condition is satisfied in typical power supply applications, where the input signals are provided by a PWM controller or logic gates with fast transition times(<200ns).The IN input of the driver functions as a digital gate,and it is not intended for applications where a slow changing input voltage is used to generate a switching output when the logic threshold of the input section is reached. While this may not be harmful to the driver,the output of the driver may switch repeatedly at a high frequency. Users should not attempt to shape the input signals to the driver in an attempt to slow down(or delay)the signal at the output.If limiting the rise or fall times to the power device is desired,then an external resistance can be added between the output of the driver and the load device,which is generally a power MOSFET gate.The external resistor may also help remove power dissipation from the device package,as discussed in the section on Thermal Considerations.6Submit Documentation Feedback Copyright©2002–2013,Texas Instruments IncorporatedUDG--01113V SUPPLY 5.5VUCC27321,UCC27322UCC37321,UCC37322SLUS504G –SEPTEMBER 2002–REVISED MAY 2013Output StageThe TrueDrive output stage is capable of supplying ±9-A peak current pulses and swings to both VDD and GND and can encourage even themost stubborn MOSFETs to switch.The pull-up/pull-down circuits of the driver are constructed of bipolar and MOSFET transistors in parallel.The peak output current rating is the combined current from the bipolar and MOSFET transistors.The output resistance is the R DS(ON)of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor.Each output stage also provides a very low impedance to overshoot and undershoot due to the body diode of the internal MOSFET.This means that in many cases,external-schottky-clamp diodes are not required.This unique BiPolar and MOSFET hybrid output architecture (TrueDrive)allows efficient current sourcing at low supply voltages.The UCC37321/2family delivers 9A of gate drive where it is most needed during the MOSFET switching transition –at the Miller plateau region –providing improved efficiency gains.Source/Sink Capabilities during Miller PlateauLarge power MOSFETs present a significant load to the control circuitry.Proper drive is required for efficient,reliable operation.The UCC37321/2drivers have been optimized to provide maximum drive to a power MOSFET during the Miller Plateau Region of the switching transition.This interval occurs while the drain voltage is swinging between the voltage levels dictated by the power topology,requiring the charging/discharging of the drain-gate capacitance with current supplied or removed by the driver device.[1]Two circuits are used to test the current capabilities of the UCC37321/2driver.In each case external circuitry is added to clamp the output near 5V while the device is sinking or sourcing current.An input pulse of 250ns is applied at a frequency of 1kHz in the proper polarity for the respective test.In each test there is a transient period where the current peaked up and then settled down to a steady-state value.The noted current measurements are made at a time of 200ns after the input pulse is applied,after the initial transient.The circuit in Figure 3is used to verify the current sink capability when the output of the driver is clamped around 5V,a typical value of gate-source voltage during the Miller Plateau Region.The UCC37321is found to sink 9A at V DD =15V.Figure 3.Sink Current Test CircuitCopyright ©2002–2013,Texas Instruments Incorporated Submit Documentation Feedback 7UDG--011144.5V D ADJUCC27321,UCC27322UCC37321,UCC37322SLUS504G –SEPTEMBER 2002–REVISED MAY 2013The circuit in Figure 4is utilized to test the current source capability with the output clamped to around 5V with a string of Zener diodes.The UCC37321is found to source 9A at V DD =15V.Figure 4.Source Current Test CircuitIt should be noted that the current sink capability is slightly stronger than the current source capability at lower VDD.This is due to the differences in the structure of the bipolar-MOSFET power output section,where the current source is a P-channel MOSFET and the current sink has an N-channel MOSFET.In a large majority of applications it is advantageous that the turn-off capability of a driver is stronger than the turn-on capability.This helps to ensure that the MOSFET is held OFF during common power supply transients which may turn the device back ON.Operational Circuit LayoutIt can be a significant challenge to avoid the overshoot/undershoot and ringing issues that can arise from circuit layout.The low impedance of these drivers and their high di/dt can induce ringing between parasitic inductances and capacitances in the circuit.Utmost care must be used in the circuit layout.In general,position the driver physically as close to its load as possible.Place a 1-µF bypass capacitor as close to the output side of the driver as possible,connecting it to pins 1and 8.Connect a single trace between the two VDD pins (pin 1and pin 8);connect a single trace between PGND and AGND (pin 5and pin 4).If a ground plane is used,it may be connected to AGND;do not extend the plane beneath the output side of the package (pins 5–8).Connect the load to both OUT pins (pins 7and 6)with a single trace on the adjacent layer to the component layer;route the return current path for the output on the component side,directly over the output path.Extreme conditions may require decoupling the input power and ground connections from the output power and ground connections.The UCCx7321/2has a feature that allows the user to take these extreme measures,if necessary.There is a small amount of internal impedance of about 15Ωbetween the AGND and PGND pins;there is also a small amount of impedance (∼30Ω)between the two VDD pins.In order to take advantage of this feature,connect a 1-µF bypass capacitor between VDD and PGND (pins 5and 8)and connect a 0.1-µF bypass capacitor between VDD and AGND (pins 1and 4).Further decoupling can be achieved by connecting between the two VDD pins with a jumper that passes through a 40-MHz ferrite bead and connect bias power only to pin 8.Even more decoupling can be achieved by connecting between AGND and PGND with a pair of anti-parallel diodes (anode connected to cathode and cathode connected to anode).8Submit Documentation Feedback Copyright ©2002–2013,Texas Instruments IncorporatedP 0.432W I ===0.036AV 12V21P =2CV f2´21E =CV 2UCC27321,UCC27322UCC37321,UCC37322SLUS504G –SEPTEMBER 2002–REVISED MAY 2013VDDAlthough quiescent VDD current is very low,total supply current will be higher,depending on OUTA and OUTB current and the operating frequency.Total VDD current is the sum of quiescent VDD current and the average OUT current.Knowing the operating frequency and the MOSFET gate charge (Qg),average OUT current can be calculated from:I OUT =Qg x f,where f is frequency For the best high-speed circuit performance,two V DD bypass capacitors are recommended to prevent noise problems.The use of surface mount components is highly recommended.A 0.1-µF ceramic capacitor should be located closest to the VDD to ground connection.In addition,a larger capacitor (such as 1-µF)with relatively low ESR should be connected in parallel,to help deliver the high current peaks to the load.The parallel combination of capacitors should present a low impedance characteristic for the expected current levels in the driver application.Drive Current and Power RequirementsThe UCC37321/2family of drivers are capable of delivering 9-A of current to a MOSFET gate for a period of several hundred nanoseconds.High peak current is required to turn an N-channel device ON quickly.Then,to turn the device OFF,the driver is required to sink a similar amount of current to ground.This repeats at the operating frequency of the power device.An N-channel MOSFET is used in this discussion because it is the most common type of switching device used in high frequency power conversion equipment.References 1and 2contain detailed discussions of the drive current required to drive a power MOSFET and other capacitive-input switching devices.Much information is provided in tabular form to give a range of the current required for various devices at various frequencies.The information pertinent to calculating gate drive current requirements will be summarized here;the original document is available from the TI website.When a driver device is tested with a discrete,capacitive load it is a fairly simple matter to calculate the power that is required from the bias supply.The energy that must be transferred from the bias supply to charge the capacitor is given by:,where C is the load capacitor and V is the bias voltage feeding the driver.There is an equal amount of energy transferred to ground when the capacitor is discharged.This leads to apower loss given by the following:,where f is the switching frequency.This power is dissipated in the resistive elements of the circuit.Thus,with no external resistor between the driverand gate,this power is dissipated inside the driver.Half of the total power is dissipated when the capacitor is charged,and the other half is dissipated when the capacitor is discharged.An actual example using the conditions of the previous gate drive waveform should help clarify this.With V DD =12V,C LOAD =10nF,and f =300kHz,the power loss can be calculated as:P =10nF ×(12)2×(300kHz)=0.432W With a 12-V supply,this would equate to a current of:Copyright ©2002–2013,Texas Instruments Incorporated Submit Documentation Feedback 9UCC27321,UCC27322UCC37321,UCC37322SLUS504G–SEPTEMBER2002–REVISED The switching load presented by a power MOSFETcan be converted to an equivalent capacitance by examining the gate charge required to switch the device.This gate charge includes the effects of the input capacitance plus the added charge needed to swing the drain of the device between the ON and OFF states.Most manufacturers provide specifications that provide the typical and maximum gate charge,in nC,to switch the device under specified ing the gate charge Qg,one can determine the power that must be dissipated when charging a capacitor.This is done by using the equivalence Qg=CeffV to provide the following equation for power:P=C×V2×f=Qg×V×fThis equation allows a power designer to calculate the bias power required to drive a specific MOSFET gate at a specific bias voltage.EnableUCC37321/2provides an Enable input for improved control of the driver operation.This input also incorporates logic compatible thresholds with hysteresis.It is internally pulled up to VDD with100-kΩresistor for active high operation.When ENBL is high,the device is enabled and when ENBL is low,the device is disabled.The default state of the ENBL pin is to enable the device and therefore can be left open for standard operation.The output state when the device is disabled is low regardless of the input state.See the truth table below for the operation using enable logic.ENBL input is compatible with both logic signals and slow changing analog signals.It can be directly driven or a power-up delay can be programmed with a capacitor between ENBL and AGND.Table1.Input/Output TableENBL IN OUT000010INVERTINGUCC37321101110000NON--010INVERTING100UCC3732211110Submit Documentation Feedback Copyright©2002–2013,Texas Instruments IncorporatedUCC27321,UCC27322UCC37321,UCC37322 SLUS504G–SEPTEMBER2002–REVISED MAY2013THERMAL INFORMATIONThe useful range of a driver is greatly affected by the drive power requirements of the load and the thermal characteristics of the device package.In order for a power driver to be useful over a particular temperature range the package must allow for the efficient removal of the heat produced while keeping the junction temperature within rated limits.The UCC37321/2family of drivers is available in three different packages to cover a range of application requirements.As shown in the power dissipation rating table,the SOIC-8(D)and PDIP-8(P)packages each have a power rating of around0.5W with T A=70°C.This limit is imposed in conjunction with the power derating factor also given in the table.Note that the power dissipation in our earlier example is0.432W with a10-nF load,12VDD, switched at300kHz.Thus,only one load of this size could be driven using the D or P package.The difficulties with heat removal limit the drive available in the D or P packages.The MSOP PowerPAD-8(DGN)package significantly relieves this concern by offering an effective means of removing the heat from the semiconductor junction.As illustrated in Reference3,the PowerPAD packages offer a leadframe die pad that is exposed at the base of the package.This pad is soldered to the copper on the PC board directly underneath the device package,reducing theθjc down to4.7°C/W.Data is presented in Reference 3to show that the power dissipation can be quadrupled in the PowerPAD configuration when compared to the standard packages.The PC board must be designed with thermal lands and thermal vias to complete the heat removal subsystem,as summarized in Reference4.This allows a significant improvement in heatsinking over that available in theDor P packages,and is shown to more than double the power capability of the D and P packages.Note that the PowerPAD™is not directly connected to any leads of the package.However,it is electrically and thermally connected to the substrate which is the ground of the device.References.1.SEM-1400,Topic2,A Design and Application Guide for High Speed Power MOSFET Gate Drive Circuits,TILiterature No.SLUP1332.U-137,Practical Considerations in High PerformanceMOSFET,IGBT andMCTGateDrive Circuits,by BillAndreycak,TI Literature No.SLUA1053.Technical Brief,PowerPad Thermally Enhanced Package,TI Literature No.SLMA0024.Application Brief,PowerPAD Made Easy,TI Literature No.SLMA004Related ProductsPRODUCT DESCRIPTION PACKAGESUCC37323/4/5Dual4-A Low-Side Drivers MSOP–8PowerPAD,SOIC–8,PDIP–8 UCC27423/4/5Dual4-A Low-Side Drivers with Enable MSOP–8PowerPAD,SOIC–8,PDIP–8 TPS2811/12/13Dual2-A Low-Side Drivers with Internal Regulator TSSOP–8,SOIC–8,PDIP–8TPS2814/15Dual2-A Low-Side Drivers with Two Inputs per Channel TSSOP–8,SOIC–8,PDIP–8TPS2816/17/18/19Single2-A Low-Side Driver with Internal Regulator5-Pin SOT–23TPS2828/29Single2-A Low-Side Driver5-Pin SOT–23Copyright©2002–2013,Texas Instruments Incorporated Submit Documentation Feedback11。
基于UCC28019的310V_500W高功率因数开关电源设计_刘金华
（１）
Ｉ ＝ ＩＮ＿ｐｅａｋ（ｍａｘ） 姨 ２ ＩＩＮ＿ＲＭＳ（ｍａｘ）＝９．６２８Ａ
（２）
ＩＩＮ＿ＡＶＧ（ｍａｘ）＝２ＩＮ＿ｐｅａｋ（ｍａｘ）／π＝６．１３Ａ
（３）
其中， ＩＩＮ＿ＲＭＳ（ｍａｘ）、ＩＩＮ＿ｐｅａｋ（ｍａｘ）、ＩＩＮ＿ＡＶＧ（ｍａｘ）分别为输入电流最大有
效值、输入电流峰值、输入平均电流最大值。
图 １ ３３０Ｖ／５００Ｗ 高功率因数开关电源原理图
图 ２ 高功率因数开关电源原理框图
ＥＭＩ 滤波器接于电源输入端与整流器之间， 它包括共模电感
Ｌ２、共模滤波电容 Ｃ４ 和 Ｃ５、差模电感 Ｌ１、差模电容 Ｃ３ 和 Ｃ６，主要
用来滤除共模、差模干扰。单相桥式整流电路由二极管桥式整流电
路 ＧＢＪ２５１０ 组成，Ｃ８ 为高频旁路电容，滤波高次谐波。Ｂｏｏｓｔ ＰＦＣ 主
３．１ 主开关管的选择
由计算可得开关管承受电压 ３１０Ｖ，漏极电流尖峰值
为 １０．７１Ａ，考虑电压电流裕量，选择 ９Ｒ１２０Ｃ３ 作为主开关
管，ＶＤＳ＝９００Ｖ，ＲＤ（Ｓ ｏｎ）＝０．１２Ω，Ｉ（Ｄ ２５℃）＝３６Ａ。 ３．２ 续流二极管的选择
由计算可知，续流二极管 Ｄ３ 额定平均电流为 ６．１３Ａ，
８０／０．７＝１１５ 匝。
３）重新计算直流偏置
增 加 匝 数 后 ， 直 流 偏 置 磁 场 强 度 Ｈ＝ＮＩ／ｌｅ＝６２．６５Ａ．Ｔ／ｃｍ＝４．
９８６ＫＡ／ｍ，根据铁硅铝磁导率 － 直流偏置曲线，随着直流偏置磁场
强度增大为 ６２．６５ Ａ．Ｔ／ｃｍ ，增量磁导率减小为起始磁导率 （６０）的
５６％。
（７）
可以通过增大匝数来增加电感量的值。调整后的匝数为 １１０／０．６３
应用SG2731专用芯片实现的直流电动机调速系统
直流 电动机 由于有优 良的启动 ， 速和制动性 能 ， 调
Ｕ 。 一Ｕ ； ＝ 因此 电动机 Ｍ 两端 电压
所示 。
．
的波形 如图 ２
因此在许 多调速性能 要求 较高 的场 合 ， 在工 业领域 如 和家用 电器中仍 占有一席之地 。尤其 是采用脉宽 调制 （ ＷＭ） Ｐ 技术 的降压调速 ， 在相 当多的直 Ｇ７ １
Ｓ ２ ３ 是 ＳＬＣ Ｎ Ｇ Ｎ Ｒ Ｌ公 司生产 的直流电 Ｇ７１ ＩＩＯ Ｅ Ｅ Ａ
保持截 止 ， 电流 ｉ 沿 回路 ２流通 ， 电动机 Ｍ 两 端 电压
一
５ 一 ６
应用 ・ 交流 — — 应 用 Ｓ ２３ Ｇ ７ １专 用 芯 片 实 现 的直 流 电动 机 调 速 系 统
第 １阶 段 ， ０ ≤ ｔ 。 间 ， 在 ≤ｔ 期
． ｂ 正， 、ｕ 为
电枢两端 的瞬时 电压和 瞬时 电流却 都不 是零 ， 而是 交 变 的。它 的好处 是使 电机 带有 高频 的微 振 ， 着所 谓 起 “ 动力润滑 ” 的作用 ， 消除正 、 向时 的静摩擦死 区 。 反
Ｖ Ｖ Ｔ 、 Ｔ 导通 ， ，、 ， 为负 ， Ｔ 、 ｒ 截止 ， Ｖ Ｖｒ ３ 电流 ｉ 沿 回路 １流通 ， 电动机 Ｍ 两端 电压 Ｕ ＝＋Ｕ ；
第 ２阶 段 ， ￡ 在 ≤ｔ Ｔ期 间 ，ｕ ｂ 为 负 ， ≤ ｂ 、ｕ Ｉ ４
Ｖ Ｖ ４ 止 ， Ｄ 、 Ｄ 续 流 ，并钳位 使 Ｖ Ｖｒ Ｔ、 Ｔ 截 Ｖ Ｖ ３ Ｔ 、 ｜ ３
摘 要 ： 文在 简单 介 绍 Ｐ 本 ＷＭ 调 速 原 理 和 专 用 芯 片 Ｓ ２３ Ｇ ７ １的基 础 上 ， 计 了应 用 Ｓ ２ ３ 专 用 芯 片 实 现 的直 流 电 设 Ｇ７ １
ucc27211(MOSFET驱动器)
UCC27210UCC27211 SLUSAT7E–NOVEMBER2011–REVISED AUGUST2013 120-V Boot,4-A Peak,High Frequency High-Side and Low-Side DriverCheck for Samples:UCC27210,UCC27211FEATURES APPLICATIONS•Drives Two N-Channel MOSFETs in High-Side•Power Supplies for Telecom,Datacom,and and Low-Side Configuration with Independent MerchantInputs•Half-Bridge and Full-Bridge Converters •Maximum Boot Voltage120-V DC•Push-Pull Converters•4-A Sink,4-A Source Output Currents•High Voltage Synchronous-Buck Converters •0.9-ΩPull-Up and Pull-Down Resistance•Two-Switch Forward Converters•Input Pins can Tolerate-10V to20V and are•Active-Clamp Forward Converters Independent of Supply Voltage Range•Class-D Audio Amplifiers•TTL or Pseudo-CMOS Compatible InputVersions DESCRIPTION•8-V to17-V VDD Operating Range,(20-V ABS The UCC27210and UCC27211Drivers are based on MAX)the popular UCC27200and UCC27201MOSFETdrivers,but offer several significant performance •7.2-ns Rise and5.5-ns Fall Time with1000-pFimprovements.Peak output pull-up and pull-down Loadcurrent has been increased to4-A source and4-A •Fast Propagation Delay Times(18ns typical)sink,and pull-up and pull-down resistance have been •2-ns Delay Matching reduced to0.9Ω,thereby allowing for driving largepower MOSFETs with minimized switching losses •Symmetrical Under Voltage Lockout for High-during the transition through the MOSFET’s Miller Side and Low-Side DriverPlateau.The input structure is now able to directly •All Industry Standard Packages Available handle-10VDC,which increases robustness and (SOIC-8,PowerPAD™SOIC-8,4-mm x4-mm also allows direct interface to gate-drive transformers SON-8and4-mm x4-mm SON-10)without using rectification diodes.The inputs are alsoindependent of supply voltage and have a20-V •Specified from-40to140°Cmaximum rating.Typical Application DiagramsPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2011–2013,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasUCC27210UCC27211SLUSAT7E–NOVEMBER2011–REVISED DESCRIPTION(CONT.)The UCC27210/1’s switching node(HS pin)is able to handle-18V maximum which allows the high-side channel to be protected from inherent negative voltages caused parasitic inductance and stray capacitance.The UCC27210(Pseudo-CMOS inputs)and UCC27211(TTL inputs)have increased hysteresis allowing for interface to analog or digital PWM controllers with enhanced noise immunity.The low-side and high-side gate drivers are independently controlled and matched to2ns between the turn on and turn off of each other.An on-chip120-V rated bootstrap diode eliminates the external discrete diodes.Under-voltage lockout is provided for both the high-side and the low-side drivers providing symmetric turn-on/turn-off behavior and forcing the outputs low if the drive voltage is below the specified threshold.Both devices are offered in8-pin SOIC(D),PowerPAD™SOIC-8(DDA),4-mm x4-mm SON-8(DRM)and SON-10(DPR)packages.These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.ORDERING INFORMATION(1)PACKAGED DEVICES(1)INPUTTEMPERATURE RANGE T A=T J PowerPAD™COMPATIBILITY SOIC-8(D)(2)SON-8(DRM)(3)SON-10(DPR)(4)SOIC-8(DDA)(2)Pseudo CMOS UCC27210D UCC27210DDA UCC27210DRM UCC27210DPR -40°C to140°CTTL UCC27211D UCC27211DDA UCC27211DRM UCC27211DPR (1)These products are packaged in Lead(Pb)-Free and green lead finish of PdNiAu which is compatible with MSL level1at255°C to260°C peak reflow temperature to be compatible with either lead free or Sn/Pb soldering operations.(2)D(SOIC-8)and DDA(Power Pad™SOIC-8)packages are available taped and reeled.Add R suffix to device type(e.g.UCC27210ADR/UCC27211ADR)to order quantities of2,500devices per reel.(3)DRM(SON-8)package comes either in a small reel of250pieces as part number UCC27210ADRMT/UCC27211ADRMT,or larger reelsof3000pieces as part number UCC27210ADRMR/UCC27211ADRMR.(4)DPR(SON-10)package comes either in a small reel of250pieces as part number UCC27210ADPRT/UCC27211ADPRT,or large reelsof3000pieces as part number UCC27210ADPRR/UCC27211ADPRR.2Submit Documentation Feedback Copyright©2011–2013,Texas Instruments IncorporatedUCC27210UCC27211 SLUSAT7E–NOVEMBER2011–REVISED AUGUST2013 ABSOLUTE MAXIMUM RATINGSover operating free-air temperature range(unless otherwise noted)MIN MAX UNIT Supply voltage range,V DD(1),V HB-V HS-0.320Input voltages on LI and HI,V LI,V HI-1020DC-0.3V DD+0.3Output voltage on LO,V LORepetitive pulse<100ns(2)-2V DD+0.3DC V HS–0.3V HB+0.3V Output voltage on HO,V HORepetitive pulse<100ns(2)V HS-2V HB+0.3DC-1115Voltage on HS,V HSRepetitive pulse<100ns(2)-(24V-VDD)115Voltage on HB,V HB-0.3120Human Body Model(HBM)2ESD kVField Induced Charged Device Model1(FICDM)Operating virtual junction temperature range,T J-40150Storage temperature,T STG-65150°CLead temperature(soldering,10sec.)300(1)All voltages are with respect to VSS unless otherwise noted.Currents are positive into,negative out of the specified terminal.(2)Verified at bench characterization.VDD is the value used in an application design.RECOMMENDED OPERATING CONDITIONSall voltages are with respect to V SS;currents are positive into and negative out of the specified terminal.–40°C<T J=T A< 140°C(unless otherwise noted)PARAMETER MIN TYP MAX UNIT Supply voltage range,V DD,V HB-V HS81217Voltage on HS,V HS-1105V Voltage on HS,V HS(repetitive pulse<100ns)-(24V-VDD)110V HS+8,V HS+17,Voltage on HB,V HBV DD–1115Voltage slew rate on HS50V/ns Operating junction temperature range-40140°CCopyright©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback3UCC27210UCC27211SLUSAT7E–NOVEMBER2011–REVISED THERMAL INFORMATIONUCC27210/11(1)THERMAL METRIC D DDA UNITS8PINS8PINSθJA Junction-to-ambient thermal resistance(2)111.837.7θJCtop Junction-to-case(top)thermal resistance(3)56.947.2θJB Junction-to-board thermal resistance(4)53.09.6°C/WψJT Junction-to-top characterization parameter(5)7.8 2.8ψJB Junction-to-board characterization parameter(6)52.39.4θJCbot Junction-to-case(bottom)thermal resistance(7)n/a 3.6(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report,SPRA953.(2)The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard,high-K board,asspecified in JESD51-7,in an environment described in JESD51-2a.(3)The junction-to-case(top)thermal resistance is obtained by simulating a cold plate test on the package top.No specific JEDEC-standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.(4)The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCBtemperature,as described in JESD51-8.(5)The junction-to-top characterization parameter,ψJT,estimates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtainingθJA,using a procedure described in JESD51-2a(sections6and7).(6)The junction-to-board characterization parameter,ψJB,estimates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtainingθJA,using a procedure described in JESD51-2a(sections6and7).(7)The junction-to-case(bottom)thermal resistance is obtained by simulating a cold plate test on the exposed(power)pad.No specificJEDEC standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.THERMAL INFORMATIONUCC27210/11(1)THERMAL METRIC DRM DPR UNITS8PINS10PINSθJA Junction-to-ambient thermal resistance(2)33.936.8θJCtop Junction-to-case(top)thermal resistance(3)33.236.0θJB Junction-to-board thermal resistance(4)11.414.0°C/WψJT Junction-to-top characterization parameter(5)0.40.3ψJB Junction-to-board characterization parameter(6)11.714.2θJCbot Junction-to-case(bottom)thermal resistance(7) 2.3 3.4(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report,SPRA953.(2)The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard,high-K board,asspecified in JESD51-7,in an environment described in JESD51-2a.(3)The junction-to-case(top)thermal resistance is obtained by simulating a cold plate test on the package top.No specific JEDEC-standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.(4)The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCBtemperature,as described in JESD51-8.(5)The junction-to-top characterization parameter,ψJT,estimates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtainingθJA,using a procedure described in JESD51-2a(sections6and7).(6)The junction-to-board characterization parameter,ψJB,estimates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtainingθJA,using a procedure described in JESD51-2a(sections6and7).(7)The junction-to-case(bottom)thermal resistance is obtained by simulating a cold plate test on the exposed(power)pad.No specificJEDEC standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.4Submit Documentation Feedback Copyright©2011–2013,Texas Instruments IncorporatedUCC27210UCC27211 SLUSAT7E–NOVEMBER2011–REVISED AUGUST2013 ELECTRICAL CHARACTERISTICSV DD=V HB=12V,V HS=V SS=0V,no load on LO or HO,T A=T J=-40°C to140°C,(unless otherwise noted)PARAMETER TEST CONDITION MIN TYP MAX UNITSSupply CurrentsI DD V DD quiescent current V(LI)=V(HI)=0V0.050.0850.17I DDO UCC27210 2.6 5.2V DD operating current f=500kHz,C LOAD=0UCC27211 2.5 5.2mAI HB Boot voltage quiescent current V(LI)=V(HI)=0V0.0150.0650.1I HBO Boot voltage operating current f=500kHz,C LOAD=0 2.5 5.0I HBS HB to V SS quiescent current V(HS)=V(HB)=115V0.0005 1.0µAI HBSO HB to V SS operating current f=500kHz,C LOAD=00.07 1.2mAInputV HIT Input voltage threshold UCC27210 4.2 5.0 5.8UCC27210(DDA only) 4.2 5.0 5.9V LIT Input voltage threshold UCC27210 2.4 3.2 4.0VUCC27210(DDA only) 2.4 3.2 4.0V IHYS Input voltage hysteresis 1.8UCC27210R IN Input pulldown resistance102kΩV HIT Input voltage threshold UCC27211 1.9 2.3 2.7UCC27211(DDA only) 1.9 2.3 2.8VV LIT Input voltage threshold UCC27211 1.3 1.6 1.9UCC27211(DDA only) 1.3 1.6 2.1V IHYS Input voltage hysteresis700mVUCC27211R IN Input pulldown resistance68kΩUnder-Voltage Lockout(UVLO)V DDR V DD turn-on threshold 6.27.07.8DDA only 5.87.08.1V DDHYS Hysteresis0.5VV HBR V HB turn-on threshold 5.6 6.77.9DDA only 5.3 6.78.0V HBHYS Hysteresis 1.1Bootstrap DiodeV F Low-current forward voltage I VDD-HB=100µA0.650.8VV FI High-current forward voltage I VDD-HB=100mA0.850.95R D Dynamic resistance,ΔVF/ΔI I VDD-HB=100mA and80mA0.30.50.85ΩLO Gate DriverV LOL Low-level output voltage I LO=100mA0.050.090.19VV LOH High level output voltage I LO=-100mA,V LOH=V DD-V LO0.10.160.29Peak pull-up current(1)V LO=0V 3.7A Peak pull-down current(1)V LO=12V 4.5HO GATE DriverV HOL Low-level output voltage I HO=100mA0.050.090.19VV HOH High-level output voltage I HO=-100mA,V HOH=V HB-V HO0.10.160.29Peak pull-up current(1)V HO=0V 3.7A Peak pull-down current(1)V HO=12V 4.5(1)Ensured by design.Copyright©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback5UCC27210UCC27211SLUSAT7E–NOVEMBER2011–REVISED ELECTRICAL CHARACTERISTICS(continued)V DD=V HB=12V,V HS=V SS=0V,no load on LO or HO,T A=T J=-40°C to140°C,(unless otherwise noted)PARAMETER TEST CONDITION MIN TYP MAX UNITSSwitching Parameters:Propagation DelaysT DLFF V LI falling to V LO falling152137T DHFF V HI falling to V HO falling152137UCC27210,C LOAD=0T DLRR V LI rising to V LO rising152446T DHRR V HI rising to V HO rising152446nsT DLFF V LI falling to V LO falling101730T DHFF V HI falling to V HO falling101730UCC27211,C LOAD=0T DLRR V LI rising to V LO rising101840T DHRR V HI rising to V HO rising101840Switching Parameters:Delay MatchingT J=25°C311T MON From HO OFF to LO ON nsT J=–40°C to140°C314UCC27210T J=25°C311T MOFF From LO OFF to HO ON nsT J=–40°C to140°C314T J=25°C29.5T MON From HO OFF to LO ON nsT J=–40°C to140°C214UCC27211T J=25°C29.5T MOFF From LO OFF to HO ON nsT J=–40°C to140°C214Switching Parameters:Output Rise and Fall Timet R LO rise time7.2C LOAD=1000pF,from10%to90%t R HO rise time7.2nst F LO fall time 5.5C LOAD=1000pF,from90%to10%t F HO fall time 5.5t R LO,HO C LOAD=0.1µF,(3V to9V)0.360.6µst F LO,HO C LOAD=0.1µF,(9V to3V)0.150.4Switching Parameters:MiscellaneousMinimum input pulse width that changes the50 output nsBootstrap diode turn-off time(2)(3)I F=20mA,I REV=0.5A(4)20(2)Ensured by design.(3)I F:Forward current applied to bootstrap diode,I REV:Reverse current applied to bootstrap diode.(4)Typical values for T A=25°C.6Submit Documentation Feedback Copyright©2011–2013,Texas Instruments IncorporatedInput (HI,LI)Output (HO,MON MOFFLIHILOUCC27210UCC27211 SLUSAT7E–NOVEMBER2011–REVISED AUGUST2013Timing DiagramsCopyright©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback7VDD HBHOHSNC LO VSS LI HI NC10912345876SON-10 (DPR)TOPVIEWVDDHBHOHSVSSPower Pad TM SOIC-8(DDA)TOP VIEWLOLIHIVDDHBHOHSLO VSS LIHI SOIC-8(D)TOP VIEWVDD HB HO HS VSSSON-8(DRM)TOP VIEWLOLIHIHILIV DDHBHO HSLO V SSUCC27210UCC27211SLUSAT7E –NOVEMBER 2011–REVISED AUGUST 2013DEVICE INFORMATIONFunctional Block Diagram8Submit Documentation Feedback Copyright ©2011–2013,Texas Instruments IncorporatedUCC27210UCC27211 SLUSAT7E–NOVEMBER2011–REVISED AUGUST2013TERMINAL FUNCTIONSPINPIN NAME DESCRIPTIOND/DDA/DRM DPRPositive supply to the lower-gate driver.De-couple this pin to V SS(GND).Typical VDD11decoupling capacitor range is0.22µF to4.7µF(See(1)).High-side bootstrap supply.The bootstrap diode is on-chip but the external bootstrapcapacitor is required.Connect positive side of the bootstrap capacitor to this pin.HB22Typical range of HB bypass capacitor is0.022µF to0.1µF.The capacitor value isdependant on the gate charge of the high-side MOSFET and should also be selectedbased on speed and ripple criteriaHO33High-side output.Connect to the gate of the high-side power MOSFET.High-side source connection.Connect to source of high-side power MOSFET.HS44Connect the negative side of bootstrap capacitor to this pin.HI57High-side input.(2)LI68Low-side input.(2)VSS79Negative supply terminal for the device which is generally grounded.LO810Low-side output.Connect to the gate of the low-side power MOSFET.N/C-5/6Not Connected.Utilized on the DDA,DRM and DPR packages only.Electrically referenced to V SS PowerPAD™(3)Pad Pad(GND).Connect to a large thermal mass trace or GND plane to dramatically improvethermal performance.(1)For cold temperature applications we recommend the upper capacitance range.Attention should also be made to PCB layout-seeLayout Recommendations.(2)HI or LI input is assumed to connect to a low impedance source signal.The source output impedance is assumed less than100Ω.If thesource impedance is greater than100Ω,add a bypassing capacitor,each,between HI and VSS and between LI and VSS.The added capacitor value depends on the noise levels presented on the pins,typically from1nF to10nF should be effective to eliminate the possible noise effect.When noise is present on two pins,HI or LI,the effect is to cause HO and LO malfunctions to have wrong logic outputs.(3)The PowerPAD™is not directly connected to any leads of the package.However it is electrically and thermally connected to thesubstrate which is the ground of the device.Copyright©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback9−10123456V DD − Supply Voltage (V)H I , L I − I n p u t T h r e s h o l d V o l t a g e (V )G005−10123456Temperature (°C)H I , L I − I n p u t T h r e s h o l d V o l t a g e (V )G0060.010.1110100101001000Frequency (kHz)I D D O − O p e r a t i n g C u r r e n t (m A )G0030.010.1110100101001000Frequency (kHz)I H B O − O p e r a t i n g C u r r e n t (m A )G00402040608010002468101214161820V DD = V HB − Supply Voltage (V)I D D , I H B − Q u i e s c e n t C u r r e n t (µA )G0010.010.1110100101001000Frequency (kHz)I D D O − O p e r a t i n g C u r r e n t (m A )G002UCC27210UCC27211SLUSAT7E –NOVEMBER 2011–REVISED AUGUST 2013TYPICAL CHARACTERISTICSQUIESCENT CURRENTUCC27210IDD OPERATING CURRENTvsvsFigure 1.Figure 2.UCC27211IDD OPERATING CURRENTBOOT VOLTAGE OPERATING CURRENTvsvsFREQUENCYFREQUENCY (HB to HS)Figure 3.Figure 4.UCC27210/11INPUT THRESHOLDUCC27210/11INPUT THRESHOLDSvsvsSUPPLY VOLTAGETEMPERATUREFigure 5.Figure 6.10Submit Documentation Feedback Copyright ©2011–2013,Texas Instruments Incorporated0481216202428323640Temperature (°C)P r o p a g a t i o n D e l a y (n s )G01108162432Temperature (°C)P r o p a g a t i o n D e l a y (n s )G0125.25.666.46.87.27.68Temperature (°C)T h r e s h o l d (V )G00900.30.60.91.21.5Temperature (°C)H y s t e r e s i s (V )G01000.040.080.120.160.20.240.280.32Temperature (°C)V O H − L O /H O O u t p u t V o l t a g e (V )G00700.040.080.120.160.2Temperature (°C)V O L − L O /H O O u t p u t V o l t a g e (V )G008UCC27210UCC27211SLUSAT7E –NOVEMBER 2011–REVISED AUGUST 2013TYPICAL CHARACTERISTICS (continued)LO AND HO HIGH LEVEL OUTPUT VOLTAGELO AND HO LOW LEVEL OUTPUT VOLTAGEvsvsTEMPERATURETEMPERATUREFigure 7.Figure 8.UNDERVOLTAGE LOCKOUT THRESHOLDUNDERVOLTAGE LOCKOUT THRESHOLD HYSTERESISvsvsTEMPERATURETEMPERATUREFigure 9.Figure 10.UCC27210PROPAGATION DELAYSUCC27211PROPAGATION DELAYSvsvsTEMPERATURETEMPERATUREFigure 11.Figure 12.Copyright ©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback 110.0010.010.1110100500550600650700750800850Diode Voltage (mV)D i o d e C u r r e n t (m A )G017−20246810Temperature (°C)D e l a y M a t c h i n g (n s )G01512345V LO , V HO − Output Voltage (V)I L O , I H O − O u t p u t C u r r e n t (A )G016048121620242832V DD =V HB − Supply Voltage (V)P r o p a g a t i o n D e l a y (n s )G012048121620242832V DD =V HB − Supply Voltage (V)P r o p a g a t i o n D e l a y (n s )G014UCC27210UCC27211SLUSAT7E –NOVEMBER 2011–REVISED AUGUST 2013TYPICAL CHARACTERISTICS (continued)UCC27210PROPAGATION DELAYSUCC27211PROPAGATION DELAYSvsvsSUPPLY VOLTAGESUPPLY VOLTAGEFigure 13.Figure 14.DELAY MATCHINGOUTPUT CURRENTvsvsTEMPERATUREOUTPUT VOLTAGEFigure 15.Figure 16.DIODE CURRENTvsDIODE VOLTAGENEGATIVE 10-V INPUTFigure 17.Figure 18.12Submit Documentation Feedback Copyright ©2011–2013,Texas Instruments IncorporatedUCC27210UCC27211SLUSAT7E –NOVEMBER 2011–REVISED AUGUST 2013TYPICAL CHARACTERISTICS (continued)STEP INPUTSYMMETRICAL UVLOFigure 19.Figure 20.Copyright ©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback 13UCC27210UCC27211SLUSAT7E–NOVEMBER2011–REVISED APPLICATION INFORMATIONFunctional DescriptionThe UCC27210/11represent Texas Instruments’latest generation of high voltage gate drivers which are designed to drive both the high-side and low-side of N-Channel MOSFETs in a half-/full-bridge or synchronous buck configuration.The floating high-side driver is capable of operating with supply voltages of up to120V.This allows for N-Channel MOSFET control in half-bridge,full-bridge,push pull,two-switch forward and active clamp forward converters.The UCC27210/11feature4-A source/sink capability,industry best-in-class switching characteristics and a host of other features listed in the table below.These features combine to ensure efficient,robust and reliable operation in high-frequency switching power circuits.Table1.UCC27210/11HighlightsFEATURE BENEFITHigh peak current ideal for driving large power MOSFETs with4-A source and sink current with0.9-Ωoutput resistanceminimal power loss(fast-drive capability at Miller plateau)Increased robustness and ability to handle under/overshoot.Can Input pins(HI and LI)can directly handle-10VDC up to20VDC interface directly to gate-drive transformers without having to userectification diodes120-V internal boot diode Provides voltage margin to meet telecom100-V surge requirementsAllows the high-side channel to have extra protection from inherent Switch node(HS pin)able to handle-18V maximum for100ns negative voltages caused parasitic inductance and straycapacitance.Robust ESD circuitry to handle voltage spikes Excellent immunity to large dV/dT conditionsBest-in-class switching characteristics and extremely low-pulse18-ns propagation delay with7.2-ns/5.5-ns rise/fall Timestransmission distortion2-ns(typ)delay matching between channels Avoids transformer volt-second offset in bridgeSymmetrical UVLO circuit Ensures high-side and low-side shut down at the same timeCMOS optimized threshold or TTL optimized thresholds with Complementary to analog or digital PWM controllers.Increased increased hysteresis hysteresis offers added noise immunityIn UCC27210/11,the high side and low side each have independent inputs which allow maximum flexibility of input control signals in the application.The boot diode for the high-side driver bias supply is internal to the UCC27210and UCC27211.The UCC27210is the Pseudo-CMOS compatible input version and the UCC27211 is the TTL or logic compatible version.The high-side driver is referenced to the switch node(HS)which is typically the source pin of the high-side MOSFET and drain pin of the low-side MOSFET.The low-side driver is referenced to V SS which is typically ground.The functions contained are the input stages,UVLO protection,level shift,boot diode,and output driver stages.14Submit Documentation Feedback Copyright©2011–2013,Texas Instruments IncorporatedUCC27210UCC27211 SLUSAT7E–NOVEMBER2011–REVISED AUGUST2013 Input StagesThe input stages provide the interface to the PWM output signals.The input impedance of the UCC27210is100 kΩnominal and input capacitance is approximately2pF.The100kΩis a pull-down resistance to V SS(ground). The UCC27210Pseudo-CMOS input structure has been designed to provide large hysteresis and at the same time to allows interfacing to a multitude of analog or digital PWM controllers.In some CMOS designs,the input thresholds are determined as a percentage of VDD.By doing so,the high-level input threshold can become unreasonably high and unusable.The UCC27210recognizes the fact that VDD levels are trending downward and it therefore provides a rising threshold with5.0V(typ)and falling threshold with3.2V(typ).The input hysteresis of the UCC27210is1.8V(typ).The input stages of the UCC27211have impedance of70kΩnominal and input capacitance is approximately2 pF.Pull-down resistance to V SS(ground)is70kΩ.The logic level compatible input provides a rising threshold of 2.3V and a falling threshold of1.6V.Under Voltage Lockout(UVLO)The bias supplies for the high-side and low-side drivers have UVLO protection.V DD as well as V HB to V HS differential voltages are monitored.The V DD UVLO disables both drivers when V DD is below the specified threshold.The rising V DD threshold is7.0V with0.5-V hysteresis.The VHB UVLO disables only the high-side driver when the V HB to V HS differential voltage is below the specified threshold.The V HB UVLO rising threshold is 6.7V with1.1-V hysteresis.Level ShiftThe level shift circuit is the interface from the high-side input to the high-side driver stage which is referenced to the switch node(HS).The level shift allows control of the HO output referenced to the HS pin and provides excellent delay matching with the low-side driver.Boot DiodeThe boot diode necessary to generate the high-side bias is included in the UCC27210/11family of drivers.The diode anode is connected to V DD and cathode connected to V HB.With the V HB capacitor connected to HB and the HS pins,the V HB capacitor charge is refreshed every switching cycle when HS transitions to ground.The boot diode provides fast recovery times,low diode resistance,and voltage rating margin to allow for efficient and reliable operation.Output StagesThe output stages are the interface to the power MOSFETs in the power train.High slew rate,low resistance and high peak current capability of both output drivers allow for efficient switching of the power MOSFETs.The low-side output stage is referenced from V DD to V SS and the high side is referenced from V HB to V HS.Copyright©2011–2013,Texas Instruments Incorporated Submit Documentation Feedback15UCC27210UCC27211SLUSAT7E–NOVEMBER2011–REVISED Layout RecommendationsTo improve the switching characteristics and efficiency of a design,the following layout rules should be followed.•Locate the driver as close as possible to the MOSFETs.•Locate the V DD-V SS and V HB-V HS(bootstrap)capacitors as close as possible to the device(see example layout below).•Pay close attention to the GND e the thermal pad of the DDA and DRM package as GND by connecting it to the VSS pin(GND).The GND trace from the driver goes directly to the source of the MOSFET but should not be in the high current path of the MOSFET(S)drain or source current.•Use similar rules for the HS node as for GND for the high-side driver.•For systems using multiple UCC27210and UCC27211devices we recommend that dedicated decoupling capacitors be located at V DD-V SS for each device.•Care should be taken to avoid VDD traces being close to LO,HS,and HO signals.•Use wide traces for LO and HO closely following the associated GND or HS traces.60to100-mils width is preferable where possible.•Use as least two or more vias if the driver outputs or SW node needs to be routed from one layer to another.For GND the number of vias needs to be a consideration of the thermal pad requirements as well as parasitic inductance.•Avoid LI and HI(driver input)going close to the HS node or any other high dV/dT traces that can induce significant noise into the relatively high impedance leads.Keep in mind that a poor layout can cause a significant drop in efficiency or system malfunction versus a good PCB layout and can even lead to decreased reliability of the whole system.ExampleAdditional ReferencesThese references and links to additional information may be found at •Additional layout guidelines for PCB land patterns may be found in,QFN/SON PCB Attachment,Application Brief(Texas Instrument's Literature Number SLUA271)•Additional thermal performance guidelines may be found in,PowerPAD™Thermally Enhanced Package Application Report,Application Report(Texas Instrument's Literature Number SLMA002A)•Additional thermal performance guidelines may be found in,PowerPAD™Made Easy,Application Report (Texas Instrument's Literature Number SLMA004)16Submit Documentation Feedback Copyright©2011–2013,Texas Instruments Incorporated。
TPMS方案介绍
合格的汽车应用 每个驱动程序都有使能开关 高± 4 A电流驱动能力 独特的双极型和CMOS驱动输出级
提供最大的电流阈值 TTL / CMOS兼容输入电压的电源独立 4 - V至15 V电源电压 双输出可以并联以满足更高的驱动电流 在-40 ° C至125 ° C额定
主要应用
开关电源 直流/直流转换器 电机控制器 线路驱动器 D类开关放大器
功能板：
TPMS DEMO开发套件
目标板： 提供测试软件
TPMS 方案介绍
市场部：范顺旭（Andy） 2010.5.10
TPMS 整体框图构架
TMS3705
TPIC82000的基本资源：
基于8051的核 Code Memory : 16KB RAM: 128Byte Ext RAM: 128Byte EEPROM: 7bit x 40
集成模块功能：
Pressure Sensor（压力传感器） G Sensor（加速度传感器） Temp. Sensor （温度传感器） Voltage Sensor（电压检测） LF Receiver （低频接收） RF Tx Contorl （高频发射控制）
TPIC82000 基本参数
TPIC82000是一颗低频唤醒，高频传输数据的芯片，集成度非常高
低功耗Stand by mode：0.2 uA (typ)
UCC21750 适用于 SiC IGBT 的隔离式单通道栅极驱动器说明书
UCC21750 适用于 SiC/IGBT 并具有主动保护、隔离式模拟感应和高 CMTI 的 10A 拉电流/灌电流增强型隔离式单通道栅极驱动器1 特性• 5.7kV RMS单通道隔离式栅极驱动器•高达 2121V pk的 SiC MOSFET 和 IGBT•33V 最大输出驱动电压 (VDD – VEE)•±10A 驱动强度和分离输出•150V/ns 最小 CMTI•具有 200ns 快速响应时间的 DESAT 保护•4A 内部有源米勒钳位•发生故障时的 400mA 软关断•具有 PWM 输出的隔离式模拟传感器–采用 NTC、PTC 或热敏二极管的温度感应–高电压直流链路或相电压•过流警报 FLT 和通过 RST/EN 重置•针对 RST/EN 的快速启用和禁用响应•抑制输入引脚上的 <40ns 噪声瞬态和脉冲•RDY 上的 12V VDD UVLO（具有电源正常指示功能）•具有高达 5V 过冲/欠冲瞬态电压抗扰度的输入/输出•130 ns（最大）传播延迟和 30 ns（最大）脉冲/器件间偏移•SOIC-16 DW 封装，爬电距离和间隙 > 8mm•工作结温范围：-40°C 至 +150°C•安全相关认证：–符合 DIN EN IEC 60747-17 (VDE 0884-17) 标准的增强型绝缘–UL 1577 组件认证计划2 应用•工业电机驱动•服务器、电信和工业电源•不间断电源 (UPS)•光伏逆变器3 说明UCC21750 是一款电隔离单通道栅极驱动器，设计用于直流工作电压高达2121V 的SiC MOSFET 和 IGBT，具有先进的保护功能、出色的动态性能和稳健性。
UCC21750 具有高达 ±10A 的峰值拉电流和灌电流。
输入侧通过 SiO2电容隔离技术与输出侧相隔离，支持高达 1.5kV RMS的工作电压、12.8kV PK的浪涌抗扰度，隔离层寿命超过40 年，并提供较低的器件间偏移，共模噪声抗扰度 (CMTI) 大于 150V/ns。
TDSW-1型机车用电动刮雨器控制盒故障原因分析及改进方案
V〇1.24，N〇.6,2017TDSW-1型机车用电动刮雨器控制盒故障原因分析及改进方案郭志杰(中车株洲电力机车有限公司，湖南株洲41201)摘要:针对HXD1C型电力机车所装备的TDSW-1型电动刮雨器控制盒故障问题进行系统地分析，研究在设计、工艺 和质量上的不足和缺陷，提出设计改进方案，并通过改进实验和运用考核验证改进方案的可行性和正确性，为电动刮雨 器设计提供参考。
关键词：机车；电动刮雨器；故障；设计改进doi：10. 3969/j.issn.1006 - 8554.2017. 06. 017创新与实践TECHNOLOGYANDMARKET1概述刮雨器系统是清除在机车运行过程中挡风玻璃上的雨水 及其他遮挡物（如昆虫、泥浆等），是保证机车运行安全的重要 设备。
目前机车上运用的刮雨器主要分为气动和电动两种。
电动刮雨器由于其结构简单、成本低、效率高、易维护等特点，在机车上使用十分广泛。
笔者所讨论的TDSW-1型电动刮雨 器是为满足HXD1C型大功率交流传动电力机车需求所新开发 的一款电动刮雨器。
由于是新开发产品，在运用过程中出现了 各种质量问题，根据2011年1月至2012年5月的在段反馈的 统计数据分析，刮雨器在运用过程中的故障分布情况见图1。
□1马达总成■2刮臂■3控制盒□4喷淋电机□5其他□6无法判断图1HXD1C机车电动刮雨器故障分布统计分析从图1可以看出，刮雨器故障主要分为6类，其中控制盒 故障率占30%、刮臂故障率占28%、马达总成故障率占23%、喷淋电机故障率占9%，其他部件故障率占7%，由于信息不全 无法判断的占3%。
下面主要针对控制盒、刮臂和马达故障的分析和设计改进 进行说明。
2控制盒的故障分析和改进方案控制盒作为电动刮雨器的控制系统，在段反映的主要现象 为控制盒失效，造成的主要原因为:继电器式控制盒的继电器 触点烧损、PWM脉宽调速控制盒失效、保险管烧损。
下面分别对以上故障项点进行分析和改进方案说明。
TI 德州仪器AC DC 和 DC DC 电源产品选型
TI 德州仪器AC-DC 和DC-DC 电源产品选型Sub Family Pin/Package Description 驱动器 8PDIP, 8SO, 8SOIC 双路 MOSFET 驱动器 驱动器16PDIP, 16SOIC四路 MOSFET 驱动器 驱动器 8PDIP, 8SOIC, 8TSSOP 具有内部稳压器的反向双路高速 MOSFET 驱动器 驱动器 8PDIP, 8SOIC, 8TSSOP 具有内部稳压器的同向双路高速 MOSFET 驱动器 驱动器 8PDIP, 8SOIC, 8TSSOP 具有内部稳压器的补偿双路高速 MOSFET 驱动器 驱动器 8PDIP, 8SOIC, 8TSSOP 1 反向 1 同向与双路高速MOSFET 驱动器 驱动器 8PDIP, 8SOIC, 8TSSOP 2 输入与非门，二路高速MOSFET 驱动器 驱动器 5SOT-23 具有源上拉和内部稳压器的反向高速 MOSFET 驱动器 驱动器 5SOT-23 具有源上拉和内部稳压器的同向高速 MOSFET 驱动器 驱动器 5SOT-23 具有内部稳压器的反向高速MOSFET 驱动器 驱动器 5SOT-23 具有内部稳压器的同向高速MOSFET 驱动器 驱动器 8SOIC, 8SON 8 引脚高频 4A 吸入电流同步MOSFET 驱动器 驱动器 8SOIC, 8SON 8 引脚高频 4A 吸入电流同步MOSFET 驱动器 驱动器 5SOT-23 反向高速 MOSFET 驱动器 驱动器5SOT-23 同向高速 MOSFET 驱动器 驱动器 5SOT-23 汽车类单通道高速 MOSFET驱动器 驱动器 14HTSSOP, 14SOIC 具有使能端的非反向快速同步降压 MOSFET 驱动器 驱动器 14HTSSOP, 14SOIC具有使能端的反向快速同步降压 MOSFET 驱动器 驱动器 8SOIC 同向快速同步降压 MOSFET驱动器 驱动器 8SOIC 反向快速同步降压 MOSFET驱动器和使能端 驱动器14HTSSOP, 14SOIC具有 TTL 输入和使能端的同向快速同步降压 MOSFET 驱动器驱动器14HTSSOP, 14SOIC 具有TTL 输入和启用的反向快速同步降压MOSFET 驱动器驱动器8SOIC 具有TTL 输入的同向快速同步降压MOSFET 驱动器驱动器8SOIC 具有TTL 输入的反向快速同步降压MOSFET 驱动器驱动器16HTSSOP 具有内部可调节稳压器的同向快速同步降压MOSFET 驱动器驱动器16HTSSOP 具有内部可调节稳压器的反向快速同步降压MOSFET 驱动器驱动器14HTSSOP 具有8V 驱动稳压器的快速同步降压MOSFET 驱动器驱动器14HTSSOP 具有8V 驱动稳压器的快速同步降压MOSFET 驱动器驱动器8PDIP, 8SOIC 辅助高速功率驱动器驱动器5TO-220, 8PDIP 辅助大电流MOSFET 驱动器驱动器8PDIP, 8SOIC 辅助开关FET 驱动器驱动器16SOIC, 8PDIP, 8SOIC 具有辅助输出的辅助开关FET驱动器驱动器5TO-220半桥双极性开关驱动器5TO-220, 8PDIP, 8SOIC 辅助高速功率驱动器驱动器16SOIC, 5TO-220, 8PDIP 辅助大电流MOSFET 驱动器驱动器16SOIC, 8PDIP, 8SOIC 辅助开关FET 驱动器驱动器16SOIC, 8PDIP, 8SOIC 具有辅助输出的辅助开关FET驱动器驱动器8SO PowerPAD, 8SOIC,8VSON120-V Boot, 3-A Peak, HighFrequency, High-Side/Low-SideDriver驱动器8SO PowerPAD 汽车类120V 升压3A 峰值电流的高频高端/低端驱动器驱动器8SO PowerPAD, 8SOIC,8VSON120-V Boot, 3-A Peak, HighFrequency, High-Side/Low-SideDriver驱动器8SO PowerPAD 汽车类120V 升压3A 峰值电流的高频高端/低端驱动器驱动器14HTSSOP高效预测同步降压驱动器驱动器14HTSSOP高效预测同步降压驱动器驱动器14HTSSOP高效预测同步降压驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC具有使能端的单9A 高速低侧MOSFET 驱动器驱动器8SOIC 具有使能端的汽车类单路9A 高速低侧MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC具有使能端的单路9A 高速低侧MOSFET 驱动器驱动器8SOIC 具有使能端的汽车类单路9A 高速低侧MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双4A 峰值高速低侧电源MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双4A 峰值高速低侧电源MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双4A 峰值高速低侧电源MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC具有启动的双路4A MOSFET驱动器驱动器8SOIC 具有使能端的汽车类双路4A 高速低侧MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双路4A MOSFET 驱动器驱动器8SOIC 具有使能端的汽车类双路4A 高速低侧MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC具有使能端的双路4AMOSFET 驱动器驱动器8SOIC 具有使能端的汽车类双路4A MOSFET 驱动器驱动器8SOIC 具有死区时间控制的初级侧推挽振荡器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC具有使能端的单9A 高速低侧MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC启用型单9A 高速低侧MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双4A 峰值高速低侧电源MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双4A 峰值高速低侧电源MOSFET 驱动器驱动器8MSOP-PowerPAD, 8PDIP,8SOIC双4A 峰值高速低侧电源MOSFET 驱动器PMOS 开关8SOIC, 8TSSOP 单路P 通道增强-模式MOSFETPMOS 开关16TSSOP, 8SOIC 单路P 信道增强-模式MOSFETPMOS 开关8SOIC 双路P 通道增强模式MOSFETPWM 电源控制器16PDIP, 16SOIC 稳压脉宽调制器PWM 电源控制器16PDIP, 16SO, 16SOIC 稳压脉宽调制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xB PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC TL284xB, TL384xBPWM 电源控制器16PDIP, 16SO, 16SOIC, 16SSOP, 16TSSOP脉冲宽度调制(Pwm) 控制电路PWM 电源控制器16PDIP, 16SO, 16SOIC, 16TSSOP脉宽调制(PWM) 控制电路PWM 电源控制器16PDIP, 16SOIC 脉宽调制(Pwm) 控制电路PWM 电源控制器8MSOP, 8SOIC具有10V 启动阈值的通用LED 照明PWM 控制器PWM 电源控制器8MSOP, 8SOIC具有15V 启动阈值的通用LED 照明PWM 控制器PWM 电源控制器8SOIC高效率离线式LED 照明驱动器控制器PWM 电源控制器8SOIC自然交错PFC LED 照明驱动器控制器PWM 电源控制器16CDIP, 20LCCC 电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高级稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC 高级稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC 稳压脉宽调制器PWM 电源控制器16SOIC稳压脉宽调制器PWM 电源控制器18PDIP稳压脉宽调制器PWM 电源控制器18PDIP, 18SOIC, 20PLCC 稳压脉宽调制器PWM 电源控制器16PDIP稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC 经济型高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 经济型高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制16PDIP, 16SOIC, 20PLCC 高速PWM 控制器器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 高速PWM 控制器PWM 电源控制器16SOIC汽车类高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制器24PDIP, 24SOIC降电流/电压馈送推挽PWM控制器PWM 电源控制器24SOIC降电流/电压馈送推挽PWM控制器PWM 电源控制器18PDIP, 18SOIC 可编程脱机PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 16SOIC, 8PDIP, 8SOIC电流模式PWM 控制器PWM 电源控制器14SOIC, 8SOIC 汽车类电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 20PLCC, 8PDIP, 8SOIC电流模式PWM 控制器PWM 电源控制器8SOIC汽车类电流模式PWM 控制器PWM 电源控制器14SOIC, 8SOIC 汽车类电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 16SOIC, 8PDIP, 8SOIC电流模式PWM 控制器PWM 电源控制器14SOIC, 8SOIC 汽车类电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC 电流模式PWM 控制器PWM 电源控制器16SOIC平均电流模式PWM 控制器PWM 电源控制器24PDIP, 24SOIC 二次侧平均电流模式控制器PWM 电源控制器18PDIP, 18SOIC 可编程脱机PWM 控制器PWM 电源控制器16PDIP, 16SOIC 改进的电流模式PWM 控制器PWM 电源控制器16SOIC汽车类改进的电流模式PWM控制器PWM 电源控制器16SOIC改进的电流模式PWM 控制器PWM 电源控制器16SOIC, 20PLCC 谐振模式电源控制器PWM 电源控制器16PDIP, 16SOIC 谐振模式电源控制器PWM 电源控制器16SOIC谐振模式电源控制器PWM 电源控制器16PDIP谐振模式电源控制器PWM 电源控制器16PDIP谐振模式电源控制器PWM 电源控制器16SOIC平均电流模式PWM 控制器ICPWM 电源控制器16PDIP, 16SOIC 高级稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC 高级稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC 稳压脉宽调制器PWM 电源控制器18PDIP, 18SOIC 稳压脉宽调制器PWM 电源控制器18PDIP, 18SOIC, 20PLCC 稳压脉宽调制器PWM 电源控制器16PDIP稳压脉宽调制器PWM 电源控制器16PDIP稳压脉宽调制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 高速PWM 控制器PWM 电源控制器16PDIP, 16SOIC 高速PWM 控制器PWM 电源控制器24PDIP, 24SOIC降电流/电压馈送推挽PWM控制器PWM 电源控制器24PDIP, 24SOIC降电流/电压馈送推拉PWM控制器PWM 电源控制器18PDIP, 18SOIC 可编程脱机PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 16SOIC, 8PDIP, 8SOIC电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器14SOIC, 8PDIP, 8SOIC 电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC 电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC 平均电流模式PWM 控制器PWM 电源控制器24SOIC二次侧平均电流模式控制器PWM 电源控制器18PDIP, 18SOIC 可编程脱机PWM 控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 改进的电流模式PWM 控制器PWM 电源控制器16PDIP, 16SOIC 谐振模式电源控制器PWM 电源控制器16PDIP谐振模式电源控制器PWM 电源控制器16PDIP, 16SOIC 谐振模式电源控制器PWM 电源控制器16PDIP谐振模式电源控制器PWM 电源控制器16PDIP, 16SOIC, 20PLCC 谐振模式电源控制器PWM 电源控制器16PDIP, 16SOIC 谐振模式电源控制器PWM 电源控制器16PDIP谐振模式电源控制器PWM 电源控制器20PDIP相移谐振控制器PWM 电源控制器16PDIP, 16SOIC平均电流模式PWM 控制器ICPWM 电源控制器8SOIC8 引脚高性能谐振模式控制器PWM 电源控制器14PDIP, 14SOIC, 14TSSOP 高级电压模式脉宽调制器PWM 电源控制器14PDIP, 14SOIC, 14TSSOP 高级电压模式脉宽调制器PWM 电源控制器8MSOP, 8PDIP, 8SOIC 高速电压模式脉宽调制器PWM 电源控制器8MSOP, 8PDIP, 8SOIC 高速电压模式脉宽调制器PWM 电源控制器14SOIC微功耗电压模式PWM PWM 电源控制器14PDIP, 14SOIC, 20PLCC 开关模式二次侧后稳压器PWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功耗BiCMOS 电流模式PWMPWM 电源控制器16PDIP, 16SOIC, 16SSOP/QSOP, 16TSSOP, 20PLCC低功耗、双路输出、电流模式PWM 控制器PWM 电源控制器8PDIP, 8SOIC可编程最大占空比PWM 控制器PWM 电源控制器8PDIP, 8SOIC可编程最大占空比PWM 控制器PWM 电源控制器8SOIC可编程最大占空比PWM 控制器PWM 电源控制器8PDIP, 8SOIC 低功耗电流模式推拉PWM PWM 电源控制器8PDIP, 8SOIC 低功耗电流模式推拉PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP 低功耗电流模式推挽PWMPWM 电源控制器8SOIC汽车类低功率电流模式推拉PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP 低功耗电流模式推挽PWMPWM 电源控制器8SOIC汽车类低功耗电流模式推挽PWMPWM 电源控制器8MSOP, 8SOIC, 8TSSOP 经济型初级侧控制器PWM 电源控制器8MSOP, 8SOIC, 8TSSOP 经济型初级侧控制器PWM 电源控制器16PDIP, 16SOIC 双路通道同步电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8SOIC, 8TSSOP汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8SOIC汽车类低功率BiCMOS 电流模式PWMPWM 电源控制器16SOIC, 16TSSOP具有可编程最大占空比的双路交错PWM 控制器PWM 电源控制器16SOIC, 16TSSOP具有可编程的最大占空比的汽车类双路交错PWM 控制器PWM 电源控制器16SOIC, 20TSSOP具有可编程最大占空比的双路交错PWM 控制器PWM 电源控制器12USON, 14TSSOP适用于总线转换器的高级PWM 控制器，具有5V 精密电压基准PWM 电源控制器12USON, 14TSSOP适用于总线转换器的高级PWM 控制器，具有3.3V 精密电压基准PWM 电源控制器20QFN, 20TSSOP具有预偏置操作的高级PWM控制器PWM 电源控制器8SOIC UCC28600 准谐振反向控制器PWM 电源控制器8PDIP, 8SOIC25-90W Cascoded FlybackPower Supply ControllerPWM 电源控制器8SOIC LED 照明电源控制器PWM 电源控制器8SOIC LED 照明电源控制器PWM 电源控制器8SOIC脱机电源控制器PWM 电源控制器8PDIP, 8SOIC 脱机电源控制器PWM 电源控制器16SOIC, 16TSSOP电流模式有源钳位PWM 控制器PWM 电源控制器16SOIC, 16TSSOPUCC289x 电流模式有源钳位PWM 控制器PWM 电源控制器16SOIC, 16TSSOP电流模式有源钳位PWM 控制器PWM 电源控制器16SOIC, 16TSSOP电流模式有源钳位PWM 控制器PWM 电源控制器20PDIP, 20PLCC, 20SOIC,20TSSOPBiCMOS 高级相移谐振控制器PWM 电源控制器20SOIC汽车类BiCMOS 高级相移PWM 控制器PWM 电源控制器24TSSOP具有同步整流的绿色环保相移全桥控制器PWM 电源控制器20QFN, 20TSSOP高级电流模式有源钳位PWM控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8SOIC汽车类BiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低电流8 引脚PWM 电流模式控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功率电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8PDIP, 8SOIC 初级侧启动控制器PWM 电源控制器14SOIC高级初级侧启动控制器PWM 电源控制器14TSSOP完整周期控制器PWM 电源控制器14PDIP, 14SOIC, 14TSSOP 高级电压模式脉宽调制器PWM 电源控制器14PDIP, 14SOIC, 14TSSOP 高级电压模式脉宽调制器PWM 电源控制器8MSOP, 8PDIP, 8SOIC 高速电压模式脉宽调制器PWM 电源控制器8MSOP, 8PDIP, 8SOIC 高速电压模式脉宽调制器PWM 电源控制器14PDIP, 14SOIC 微功耗电压模式PWM PWM 电源控制器14PDIP, 14SOIC 开关模式二次侧后稳压器PWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗BiCMOS 电流模式PWMPWM 电源控制器16PDIP, 16SOIC, 16TSSOP, 20PLCC低功耗、双路输出、电流模式PWM 控制器PWM 电源控制器8PDIP, 8SOIC可编程最大占空比PWM 控制器PWM 电源控制器8PDIP, 8SOIC可编程最大占空比PWM 控制器PWM 电源控制器8PDIP, 8SOIC可编程最大占空比PWM 控制器PWM 电源控制器8PDIP, 8SOIC 低功耗电流模式推拉PWM PWM 电源控制器8PDIP, 8SOIC 低功耗电流模式推拉PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP具有可编程斜率补偿的电流模式推挽PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP 低功耗电流模式推挽PWM PWM 电源控制器8PDIP, 8SOIC, 8TSSOP 低功耗电流模式推挽PWMPWM 电源控制器8MSOP, 8PDIP, 8SOIC, 8TSSOP经济型初级侧控制器PWM 电源控制器8MSOP, 8PDIP, 8SOIC, 8TSSOP经济型初级侧控制器PWM 电源控制器16PDIP, 16SOIC 双通道同步电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器8PDIP, 8SOIC, 8TSSOP低功耗经济型BiCMOS 电流模式PWMPWM 电源控制器16PDIP, 16SOIC频率折回电流模式PWM 控制器PWM 电源控制器8PDIP, 8SOIC 脱机电源控制器PWM 电源控制器8PDIP, 8SOIC 脱机电源控制器PWM 电源控制器20PDIP, 20PLCC, 20SOIC,20TSSOPBiCMOS 高级相移PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制8MSOP, 8PDIP, 8SOIC BiCMOS 低功耗电流模式器PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8MSOP, 8PDIP, 8SOICBiCMOS 低功耗电流模式PWM 控制器PWM 电源控制器8PDIP, 8SOIC 初级侧启动控制器PWM 电源控制器14PDIP, 14SOIC 高级初级侧启动控制器IC 8PDIP, 8SOIC 高功率因数前置稳压器IC 8PDIP, 8SOIC 高功率因数前置稳压器IC 8PDIP, 8SOIC 高功率因数前置稳压器IC 16PDIP, 16SOIC 高功率因素前置稳压器IC 16PDIP, 16SOIC 增强型高功率因子前置稳压器IC 16PDIP, 16SOIC, 20PLCC 增强型高功率因子前置稳压器IC 20PDIP, 20SOIC 高性能功率因素前置稳压器IC 20PDIP, 20SOIC 高性能功率因子前置稳压器IC 8PDIP, 8SOIC 高功率因数前置稳压器IC 8PDIP, 8SOIC 高功率因数前置稳压器IC 16PDIP, 16SOIC, 20PLCC 高功率因子前置稳压器IC 16PDIP, 16SOIC 增强型高功率因数前置稳压器IC 16PDIP, 16SOIC 增强型高功率因子前置稳压器IC 20PDIP, 20SOIC 高性能功率因子前置稳压器IC 20PDIP, 20SOIC 高性能功率因子前置稳压器IC 8PDIP, 8SOIC 8 引脚持续传导模式(CCM)PFC 控制器IC 8PDIP, 8SOIC 8 引脚持续传导模式(CCM)PFC 控制器IC 8PDIP, 8SOIC 转换模式PFC 控制器IC 8PDIP, 8SOICPFC 控制器，用于要求符合IEC 1000-3-2 的低至中功率应用领域IC 16SOIC 双相自然交错转换模式PFC控制器IC 16SOIC具有改善的抗噪性能的Natural Interleaving(TM) 转换模式PFC 控制器IC 20SOIC, 20TSSOP 二相交错CCM PFC 控制器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16SOIC 汽车类BiCMOS 功率因数前置稳压器IC 16PDIP, 16SOIC BiCMOS 功率因素前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 20PDIP, 20SOIC BiCMOS PFC/PWM 组合控制器IC 20SOIC BiCMOS PFC/PWM 组合控制器IC 20SOIC BiCMOS PFC/PWM 组合控制器IC 20SOIC BiCMOS PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20PDIP, 20SOIC 高级PFC/PWM 组合控制器IC 20SOIC 具有TEM/TEM 调制的高级PWM/PFC 组合控制器IC 20SOIC 具有TEM/TEM 调制的高级PWM/PFC 组合控制器IC 8PDIP, 8SOIC 转换模式PFC 控制器IC 8PDIP, 8SOICPFC 控制器，用于要求符合IEC 1000-3-2 的低至中功率应用领域IC 16PDIP, 16SOIC BiCMOS 功率因子前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 16PDIP BiCMOS 功率因素前置稳压器IC 16PDIP, 16SOIC, 16TSSOP BiCMOS 功率因子前置稳压器IC 20PDIP, 20SOIC BiCMOS PFC/PWM 组合控制器IC 20PDIP, 20SOIC BiCMOS PFC/PWM 组合控制器IC 20PDIP, 20SOIC BiCMOS PFC/PWM 组合控制器IC 20PDIP, 20SOIC BiCMOS PFC/PWM 组合控制器反馈信号发生器14CDIP, 14PDIP, 14SOIC,20PLCC隔离反馈生成器反馈信号发生器8SOIC精度可调节的并联稳压器反馈信号发生器8PDIP, 8SOIC 精密模拟控制器反馈信号发生器14PDIP, 14SOIC, 16SOIC,20PLCC隔离反馈生成器反馈信号发生器8PDIP, 8SOIC 精确可调节的并联稳压器反馈信号发生器8PDIP, 8SOIC 精密模拟控制器反馈信号发生器8SOIC精度可调节的并联稳压器负载共享16PDIP, 16SOIC 负载均分控制器负载共享16PDIP, 16SOIC 负载均分控制器负载共享8MSOP, 8PDIP, 8SOIC 高级8 引脚负载共享控制器负载共享8MSOP, 8PDIP, 8SOIC 高级8 引脚负载共享控制器。
基于UCC27321高速MOSFET驱动芯片的功能与应用
1引言随着电力电子技术的发展，各种新型的驱动芯片层出不穷，为驱动电路的设计提供了更多的选择和设计思路，外围电路大大减少，使得MOSFET的驱动电路愈来愈简洁，.性能也获得到了很大地提高。
其中UCC27321就是一种外围电路简单，高效，快速的驱动芯片。
2UCC27321的功能和特点TI公司推出的新的MOSFET驱动芯片能输出9A的峰值电流，能够快速地驱动MOSFET 开关管，在10nF的负载下，其上升时间和下降时间的典型值仅为20ns。
工作电源为4—15V。
工作温度范围为-40℃—105℃。
图1给出了芯片的内部原理图，表1为输入、输出逻辑表。
表2为各个引脚的功能介绍。
UCC27321的ENBL是给设计者预留的引脚端，为高电平有效（见表1）。
在标准工业应用中，ENBL端经100K的上拉电阻接至高电平。
一般正常工作时可以悬空。
为求可靠，也可将其接至输入电源高电平，低电平时芯片不工作。
通过对ENBL的精心设置可以设计出可靠的保护电路。
UCC27321的输出端采用了独特的双极性晶体管图腾柱和双MOSFET图腾柱的并联结构，能在几百纳秒的时间内提供高达9A的峰值电流并使得有效电流源能在低电压下正常工作。
当输出电压小于双极性晶体管的饱和压降时，其输出阻抗为MOSFET的Ron。
当驱动电压过低或过冲时，输出级MOSFET的体二极管提供了一个小的阻抗。
这就使得在绝大多数情况下，无须在输出脚6、7与地之间额外地增加一个肖特基二极管。
UCC27321在MOSFET的弥勒高原效应转换期间能获得9A的峰值电流。
UCC27321内部独特的输出结构使得放电能力比充电能力要强的多。
充电时电流流经P沟道MOS，放电时电流流经N沟道MOS，这就使得这种芯片的驱动关断能力要比其导通能力强，对防止MOSFET的误导通是很有利的。
3功率MOSFET驱动电路的一般要求和最佳驱动特性：A、MOSFET管工作在高频时，必须注意以下两点[1]：①尽可能减少MOSFET各端点的连接线长度，特别是栅极引线。
常用栅极驱动芯片
常用栅极驱动芯片常用栅极驱动芯片是一种用于驱动功率MOSFET（金属氧化物半导体场效应晶体管）的集成电路。
它们在各种应用中起着关键的作用，例如交流电源、电机驱动、电力电子等领域。
本文将介绍几种常见的栅极驱动芯片，并讨论它们的特点和应用。
1. IR2110IR2110是一种高性能MOSFET和IGBT驱动芯片。
它具有低功耗、高速驱动和可靠性高的特点。
IR2110的输出极性可调，并且具有低反馈电流特性，以提高系统的效率。
该芯片适用于高频应用，如电力电子和电机驱动。
2. IRS21844IRS21844是一种高电压、高速栅极驱动芯片。
它具有高达600V的驱动电压和2A的驱动能力，适用于高压应用。
IRS21844采用了高速低功耗的逻辑输入，能够实现快速的开关操作，适用于高频电源和电机控制系统。
3. TC4420TC4420是一种高性能MOSFET和IGBT驱动芯片。
它具有低功耗、高速驱动和高电流驱动能力。
TC4420的输入电压范围广，适用于各种逻辑电平驱动。
该芯片具有短路保护和过温保护功能，可以提高系统的可靠性。
TC4420广泛应用于电力电子、电机驱动和变频器等领域。
4. MAX4420MAX4420是一种高性能MOSFET和IGBT驱动芯片。
它具有低功耗、高速驱动和低电压逻辑输入的特点。
MAX4420的输出极性可调，适用于各种应用。
该芯片具有短路保护和过温保护功能，可以提高系统的可靠性。
MAX4420适用于低电压应用，如电池供电系统和便携式设备。
5. HIP4081AHIP4081A是一种高性能MOSFET和IGBT驱动芯片。
它具有低功耗、高速驱动和大电流驱动能力。
HIP4081A的输入电压范围广，适用于各种逻辑电平驱动。
该芯片具有过温保护和短路保护功能，可以提高系统的可靠性。
HIP4081A广泛应用于电力电子、电机驱动和电源管理等领域。
总结起来，常用栅极驱动芯片是一类关键的集成电路，用于驱动功率MOSFET和IGBT。
UCC37321资料
Copyright 2004, Texas Instruments Incorporated
1
UCC27321, UCC27322 UCC37321, UCC37322
SLUS504C − SEPTEMBER 2002 − REVISED NOVEMBER 2004
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal.
The UCC37321/2 family of high-speed drivers deliver 9 A of peak drive current in an industry standard pinout. These drivers can drive the largest of MOSFETs for systems requiring extreme Miller current due to high dV/dt transitions. This eliminates additional external circuits and can replace multiple components to reduce space, design complexity and assembly cost. Two standard logic options are offered, inverting (UCC37321) and noninverting (UCC37322).
27621场效应管参数
27621场效应管参数场效应管，也称为MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor)，是一种重要的半导体器件。
它在电子领域有着广泛的应用，如功率放大器、开关、模拟和数字电路等。
本文将详细介绍场效应管的参数，包括其基本结构、工作原理、主要参数和应用。
一、基本结构和工作原理场效应管通常由源极、栅极和漏极三部分构成。
其中栅极与源极之间通过氧化层（类似于魏尔成摩尔），形成绝缘介质，称为栅介质。
漏极和源极之间的区域是导电的，被称为沟道。
通过在栅极上施加电压，可以控制栅电极和源极之间的电导性，从而改变从漏极到源极的电流。
增强型场效应管具有较高的输入阻抗和较低的漏极电流。
其栅电极施加的电压越高，漏极与源极之间的电导性就越大。
耗尽型场效应管的栅电极施加的电压越高，漏极与源极之间的电导性就越小。
在耗尽型场效应管中，沟道中的载流子不需要外加电压就能形成。
复合型场效应管是增强型和耗尽型的结合。
栅电极施加的电压决定了场效应管的导通特性。
二、主要参数场效应管的主要参数包括栅源截止电压（VGS(off)）、漏源电流（IDSS）、符号传导电阻（rds(on)）、增益（Gain）等。
栅源截止电压是指在漏极电流较小的情况下，栅电极与源极之间的电压。
它决定了场效应管的开关特性。
漏源电流是指在栅源截止电压下，漏极与源极之间的电流。
它直接影响到场效应管的放大能力。
符号传导电阻是指在栅源电压恒定时，漏极与源极之间的电阻。
它决定了场效应管在导通状态下的损耗。
增益是指场效应管输出电流与输入电流之间的比值。
它通常用于描述场效应管的放大能力。
三、应用场效应管具有很多应用范围，例如：1.功率放大器：场效应管可以用于功率放大器电路中，能够实现高增益和低失真的放大效果。
2.开关：场效应管可以用作电子开关，用于控制开关电路的导通和截止。
3.模拟电路：场效应管可以用于构建模拟电路，如运算放大器、滤波器等。
UCC27518 19单通道高速低侧栅极驱动器说明书
UCC27518UCC27519ZHCS907–MAY 2012单通道高速、低侧栅极驱动器（带有4A 峰值源电流和4A 峰值吸收电流的基于CMOS 的输入阀值）查询样品:UCC27518,UCC27519特性应用范围•低成本、栅极驱动器器件提供NPN 和PNP 离散解•开关模式电源决方案的高品质替代产品•直流(DC)到DC 转换器•与TI 的TPS2828和TPS2928引脚兼容•用于数字电源控制器的伴随栅极驱动器器件•4A 峰值源电流和4A 峰值吸收电流对称驱动•太阳能电源、电机控制、不间断电源(UPS)•快速传播延迟（典型值17ns ）•用于新上市的宽带隙电源器件（例如GaN ）的栅极•快速上升和下降时间（典型值8ns 和7ns ）驱动器• 4.5V 至18V 单一电源范围说明•在VDD 欠压闭锁(UVLO)期间，输出保持低电UCC27518和UCC27519单通道、高速、低侧栅极驱平（以保证加电和断电时的无毛刺脉冲运行）动器器件能够有效地驱动金属氧化物半导体场效应晶体•CMOS 输入逻辑阀值（带有滞后功能的电源电压）管(MOSFET)和绝缘栅双极型晶体管(IGBT)电源开•用于高抗噪性的滞后逻辑阀值关。
通过使用固有的大大减少击穿电流的设•针对使能功能的使能(EN)引脚（可不连接）计，UCC27518和UCC27519能够灌、拉高、峰值电•当输入引脚悬空时输出保持在低电平流脉冲进入到电容负载，此电容负载提供了轨到轨驱动•输入引脚绝对最大电压电平不受VDD 引脚偏置电能力以及极小传播延迟（典型值为17ns ）。
源电压的限制•运行温度范围-40°C 至140°CUCC27518和UCC27519在VDD =12V 时提供4A •5引脚DBV 封装（小外形尺寸晶体管封装(SOT)-源电流、4A 拉电流（对称驱动）的峰值电流功能。
23）UCC27518和UCC27519设计在4.5V 至18V 的宽VDD 范围以及-40°C 到140°C 的宽温度范围内运行。
mos全桥预驱芯片高边欠压输出关断波形-概述说明以及解释
mos全桥预驱芯片高边欠压输出关断波形-概述说明以及解释1.引言1.1 概述概述部分应该简要介绍文章的主题和背景，为读者提供一个全面的理解。
在本文中，我们将重点介绍MOS全桥预驱芯片的高边欠压输出关断波形。
MOS全桥预驱芯片是控制MOS管导通和关断的关键元件，在电路中扮演着重要的角色。
本文将对该芯片的高边欠压输出关断波形进行分析，并探讨影响因素，旨在揭示其工作原理和性能特点。
通过本文的研究，读者可以更深入地了解MOS全桥预驱芯片在电路中的应用及其重要性。
1.2 文章结构本文主要包括三个部分，分别是引言、正文和结论。
在引言部分，将对MOS全桥预驱芯片高边欠压输出关断波形的问题进行概述，介绍文章的结构和目的。
在正文部分，首先会介绍MOS全桥预驱芯片的基本情况，包括其原理和特点。
然后，详细分析高边欠压输出关断波形的形成机制，并探讨影响因素。
最后，在结论部分，将对全文进行总结与回顾，提出结论，并展望未来的研究方向。
1.3 目的本文的主要目的是探讨mos全桥预驱芯片在高边欠压输出关断波形的特性及影响因素。
通过对该问题的详细分析和实验研究，旨在揭示在此工作环境下预驱芯片的工作原理和性能表现。
同时，通过深入分析和讨论，为相关领域的研究和应用提供有效参考，促进相关领域技术的进步和创新。
通过本文的研究，希望能够为mos全桥预驱芯片在实际工程中的应用提供可靠性和稳定性的支撑。
2.正文2.1 MOS全桥预驱芯片介绍MOS全桥预驱芯片是一种集成了MOSFET驱动器和电源管理功能的集成电路模块，广泛应用于电机驱动和底盘控制等领域。
该芯片在传统的全桥驱动器基础上，加入了预驱功能，能够提高MOS管的驱动速度和稳定性。
同时，该芯片还具有过流保护、短路保护和过温保护等功能，保障系统的安全可靠运行。
MOS全桥预驱芯片通常由输入部分、逻辑控制部分和输出驱动部分组成。
输入部分接收来自控制器的信号，逻辑控制部分根据信号控制输出驱动部分的工作状态，从而驱动MOS管进行开关操作。
MOSFET驱动芯片UCC27211中文资料
UCC27210UCC27211ZHCS501E –NOVEMBER 2011–REVISED AUGUST 2013120V 升压，4A 峰值电流，高频高侧和低侧驱动器查询样片:UCC27210,UCC27211特性应用范围•用独立输入驱动高侧和低侧配置中的两个N 通道金•针对电信，数据通信和商用的电源属氧化物半导体场效应晶体管(MOSFET)•半桥和全桥转换器•最大引导电压120V 直流•推挽转换器•4A 吸收，4A 源输出电流•高电压同步降压型转换器•0.9Ω上拉和下拉电阻•两开关正激式转换器•输入引脚能够耐受-10V 至20V 的电压，并且与电•有源箝位正激式转换器源电压范围无关•D 类音频放大器•晶体管-晶体管逻辑电路(TTL)或伪CMOS 兼容输入版本说明•8V 至17V VDD 运行范围，（绝对最大值20V ）UCC27210和UCC27211驱动器基于常见的•7.2ns 上升和5.5ns 下降时间（采用1000pF 负载UCC27200和UCC27201MOSFET 驱动器，但是对时）性能进行了几项重大改进。
峰值输出上拉和下拉电流•快速传播延迟时间（典型值18ns)已经被增加至4A 拉电流和4A 灌电流，并且上拉和下•2ns 延迟匹配拉电阻已经被减少至0.9Ω，因此可以在MOSFET 的•用于高侧和低侧驱动器的对称欠压闭锁功能米勒效应平台转换期间用尽可能小的开关损耗来驱动大•可提供全部行业标准封装（小外形尺寸集成电路功率MOSFET 。
现在，输入结构能够直接处理-10(SOIC)-8封装，PowerPAD™SOIC-8，4mm x VDC ，这增加了稳健耐用性，并且可实现与栅极驱动4mm 小外形尺寸无引线(SON)-8封装和4mm x 变压器的直接对接，而无需使用整流二极管。
此输入4mm SON-10）与电源电压无关，并且具有一个20V 的最大额定值。
•-40℃至140℃的额定温度范围典型应用图Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.UCC27210UCC27211ZHCS501E–NOVEMBER2011–REVISED 说明（续）UCC27210/1的开关节点（HS引脚）能够处理-18V最大电压，这可保护高侧通道不受固有负电压所导致的寄生电感和离散电容的损坏。
定稿基于UCC28019的开关电源设计
基于UCC28019的开关电源设计Design of Switching Power Supply Based on UCC28019专业：电子信息工程学号：05128025姓名：段闪指导老师：胡晗基于UCC28019的开关电源设计摘要：电气设备的功率因数过低，会加重电网的负载，造成电网容量的浪费。
功率因数的优劣是开关电源性能好坏的一个重要评价指标。
为了便于研制和生产有源功率因数校正器，现在功率因数校正PFC（Power Factor Correction）的控制电路已集成化，有多种PFC集成控制电路芯片可供选择。
本文采用TI公司生产的功率因数校正芯片UCC28019设计出一种高功率因数、高效率、低谐波的单相整流PFC开关电源。
用两片高速串行AD转换器ADS7818对输出电压和电流采样,采样数据送单片机STC89C52处理并由液晶显示器SN1602实时显示当前输出电压、电流。
系统具有2.5A过流保护。
测试结果表明功率因数大于0.95，效率达到92%，输入电流波形谐波失真小于5%。
关键词：开关电源；STC89C52；功率因数校正；UCC28019；过流保护Design of Switching Power Supply Based on UCC28019 Abstract: The power factor of the electrical equipment is too low, which will increase the load of the power grid and result in wasting of power grid capacity. The advantage or disadvantage of the power factors is an important evaluation indicator for switching power supply performance . In order to develop and produce the Active Power Factor Correction, the control circuit of PFC (Power Factor Correction) has been integrated now, so there are a variety of integrated PFC control circuit chips to choose from. In this paper, UCC28019 PFC chip which is produced by TI Company is used to design a kind of Single-phase PFC rectifier switching power supply with a high power factor, high efficiency, low harmonic. With two high-speed serial AD converter ADS7818 of output voltage and current sampling, sample processing data is sent to the STC89C52 single-chip and LCD SN1602 real-time displays the current output voltage and current. The system has 2.5A overcurrent protection. The test results show that the power factor is much greater than 0.95, the efficiency reaches to 92%,Harmonic distortion of input current waveform is less than 5%.Keywords: switching power supply; STC89C52; power factor correction; UCC28019; over-current protection目录1绪论 (1)1.1 引言 (1)1.2 开关电源的发展历史 (1)1.3 开关电源的基本结构 (2)1.4谐波电流对电网的危害 (3)2开关电源的功率因数 (4)2.1 功率因数的定义 (4)2.2 功率因数校正技术 (4)2.2.1 功率因数校正的由来 (4)2.2.2 功率因数校正的基本原理 (6)3 基于UCC28019的开关电源设计及主要元器件参数计算 (7)3.1系统方案设计与论证 (7)3.1.1 EMI滤波模块 (7)3.1.2整流模块 (8)3.1.3 DC/DC变换模块 (8)3.1.4 A/D采样模块 (8)3.1.5单片机模块 (9)3.1.6功率因数较正模块 (9)3.1.7显示模块 (9)3.1.8辅助电源模块 (10)3.2 系统的硬件设计总体方案 (10)3.2.1 Boost变换器 (11)3.2.2 UCC28109芯片介绍 (12)3.2.3 系统主要设计电路 (15)3.2.4 单片机系统及外围电路 (19)3.2.5采样电路 (20)3.2.6 辅助电源 (21)3.2.7系统完整原理图 (21)3.3 系统软件设计方案 (21)3.3.1程序设计步骤 (21)3.3.2程序设计流程图 (22)3.3.3程序清单 (22)3.4 系统调试 (23)3.4.1测试仪器及方法 (23)3.4.2 测试数据及分析 (23)结束语 (24)参考文献 (25)附录1 (26)附录2 (27)致谢 (33)1绪论1.1 引言电源是各种电子设备必不可缺的组成部分，其性能优劣直接关系到电子设备的技术指标及能否安全可靠地工作。
电磁超声脉冲激励电路的设计
电磁超声脉冲激励电路的设计胡力;严仍春【摘要】为了解决电磁超声能量转化效率较低、信号微弱的问题,设计了一种电磁超声脉冲激励电路.过零检测电路和单片机实现磁场强度与涡流激发的同步以及脉冲个数的控制；UCC3895芯片产生全桥电路的驱动信号,控制脉冲的频率和占空比；MOSFET管IRFP450构成全桥电路实现信号的功率放大.试验结果表明:该系统的稳定性好,可调节磁场强度,能有效地提高电磁超声能量转化效率.%A method of exciting electrical pulse for electromagnetic ultrasonic has been proposed which was to solve the key problems exist in electromagnetic ultrasonic test, such as low transduction efficiency and weak signal. Synchronizationof magnetic field strength and eddy current excitation and the number of pulses were controlled by zero crossing detection circuit and MCU. A drive signal of the full bridge circuit was generated by UCC3895 chip to control the frequency and duty radio of the signal. Power amplification was realized by the full bridge constitute of IRFP450. The experimental results showed that the system had good stability, the magnetic field strengthwas adjustabled, and the electromagnetic ultrasonic energy conversion efficiency could be effectively improved.【期刊名称】《理化检验-物理分册》【年(卷),期】2013(049)003【总页数】3页(P174-176)【关键词】电磁超声;脉冲激励电路;功率放大;UCC3895【作者】胡力;严仍春【作者单位】上海材料研究所,上海200437【正文语种】中文【中图分类】TG115.28+5工业在线超声无损检测中，由于传统的压电超声需要使用耦合剂，严重影响其应用范围，同时也阻碍了工业生产线自动化效率的提高。
单模多模多模高频PWM控制器UCC39421-2及其应用
单模多模多模高频PWM控制器UCC39421-2及其应用1UCC__/2的功能特点UCC__/2是一种高效低功率DC/DC转换器。
它在很宽的工作电源下具有很高的效率，并可提供编程上电复位功能，该芯片带有独立的低压检测比较器，同时具有脉冲调制、限流和低电流关断（5μA）功能，可广泛应用于蜂窝电话、录呼机、PDAs以及其它手持设备中。
UCC__/2具有以下特点：*采用高效升压单端初级电感控制，SEPIC或回扫（反向升压）拓扑结构，输入电压既可高于也可低于输出电压；*输入电压低（最小为1.8V）；*能驱动外部FETs以获得较大电流；*具有高达2MHz的振荡频率；*可同步操作；*具有可编程变频模式，可优化功率和效率；*具有脉冲调制限流功能；*功耗极低，睡眠模式下的供电电流为150μA，关断模式下1/ 4的供电电流仅为5μA。
图1UCC__/2结构方框图2构成原理及引脚功能2.1构成原理UCC__/2内部由电荷泵电路、PWM振荡器、导通控制电路、PWM电路、限流控制电路、低功率模式控制电路、斜率补偿电路、PFM模式控制电路、误差放大器、电池低电压比较器、复位电路、1.24V基准源电路以及比较器和逻辑电路等构成，其内部结构如图1所示。
2.2封装及引脚功能UCC__/2采用双列20/16引脚封装，其引脚排列如图2所示。
各引脚功能如下：COMP：误差放大器输出端。
应用时此端与地之间应连接一阻容串联补偿网络；CHRG：N沟道MOSFET栅极驱动输出。
应用时此端可直接与MOSFET栅极相连；CP：电荷泵输入端。
当使用电荷泵时，CP与泵电容相连；不使用电荷泵电路时，CP接GND；FB：误差放大器反馈信号输入端。
应用时此端通常连在VOUT与GND之间的电阻分压器上；2/ 4GND：控制器信号地；ISENSE：电流检测放大器输入；LOWBAT：比较器输入。
当VDET引脚电压高于1.25V时，此端输出为低电平；PFM：PFM（脉冲频率调制）模式门限编程引脚。
TOP264-271电源芯片的特点及引脚功能
TOP264-271电源芯片的特点及引脚功能
TOP264-271电源芯片的特点及引脚功能
TOP264-271是一款集成式开关模式电源芯片，将一个电流控制输入到占空比的高电压的漏极开路输出功率MOSFET 。
在正常操作期间的占空比功率MOSFET，具有越来越强的控制线性下降引脚电流。
TOP264-271集成了许多附加功能降低系统成本，提高电源性能和设计的灵活性。
获得专利的高压CMOS技术同时允许高电压功率MOSFET和所有低电压控制电路，以高效集成到一个单芯片。
TOP264-271提供了许多功能而做不需要任何外部元件：
1.完全集成的17ms软启动显着降低或消除了在大多数应用中通过扫描输出过冲无论是从低到高的电流限制和次数限制在启动过程中的峰值电流和电压。
2.最大占空比（DC最大）的78 ％，允许使用更小的输入存储电容，较低的输入电压要求和/或更高的功率容量。
3.采用多模式工作，可以优化和改善功率在整个负载范围内，同时保持供给效率良好的交叉稳压多输出电源。
4.采用132 kHz开关频率减小了变压器尺寸对EMI没有显着影响。
5.频率调制降低EMI在全频模式高负载状态下。
6.迟滞过热关断功能确保热故障保护。
7.封装引脚省略和铅形成提供大漏极爬电距离。
8.降低自动重启占空比和频率的时提高电源和负载的保护开环故障，短路或监管损失。
引脚功能描述
漏极（D）引脚：
高压功率MOSFET漏极引脚。
通过内部的开关高压电流源提供启动偏置电流。
漏极电流的内部流限检测点。
漏极电流的内部流限检测点。
控制（C）引脚：。
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1引言
随着电力电子技术的发展，各种新型的驱动芯片层出不穷，为驱动电路的设计提供了更多的选择和设计思路，外围电路大大减少，使得MOSFET的驱动电路愈来愈简洁，.性能也获得到了很大地提高。
其中UCC27321就是一种外围电路简单，高效，快速的驱动芯片。
2UCC27321的功能和特点
TI公司推出的新的MOSFET驱动芯片能输出9A的峰值电流，能够快速地驱动MOSFET 开关管，在10nF的负载下，其上升时间和下降时间的典型值仅为20ns。
工作电源为4—15V。
工作温度范围为-40℃—105℃。
图1给出了芯片的内部原理图，表1为输入、输出逻辑表。
表2为各个引脚的功能介绍。
UCC27321的ENBL是给设计者预留的引脚端，为高电平有效（见表1）。
在标准工业应用中，ENBL端经100K的上拉电阻接至高电平。
一般正常工作时可以悬空。
为求可靠，也可将其接至输入电源高电平，低电平时芯片不工作。
通过对ENBL的精心设置可以设计出可靠的保护电路。
UCC27321的输出端采用了独特的双极性晶体管图腾柱和双MOSFET图腾柱的并联结构，能在几百纳秒的时间内提供高达9A的峰值电流并使得有效电流源能在低电压下正常工作。
当输出电压小于双极性晶体管的饱和压降时，其输出阻抗为MOSFET的Ron。
当驱动电压过低或过冲时，输出级MOSFET的体二极管提供了一个小的阻抗。
这就使得在绝大多数情况下，无须在输出脚6、7与地之间额外地增加一个肖特基二极管。
UCC27321在MOSFET的弥勒高原效应转换期间能获得9A的峰值电流。
UCC27321内部独特的输出结构使得放电能力比充电能力要强的多。
充电时电流流经P沟道MOS，放电时电流流经N沟道MOS，这就使得这种芯片的驱动关断能力要比其导通能力强，对防止MOSFET的误导通是很有利的。
3功率MOSFET驱动电路的一般要求和最佳驱动特性：
A、MOSFET管工作在高频时，必须注意以下两点[1]：
①尽可能减少MOSFET各端点的连接线长度，特别是栅极引线。
若不行，可在靠近栅极处串联一小电阻以便抑制寄生振荡。
（如图2）
②由于MOSFET的输入阻抗高，驱动电源的输出阻抗必须比较低，以避免正反馈引起的振荡。
特别是MOSFET的直流输入阻抗非常高，而它的交流输入阻抗是随频率而改变的，因此MOSFET的驱动波形的上升和下降时间与驱动脉冲发生器的阻抗有关。
图2工作在共源极的电路图
B、MOSFET的最佳驱动特性应具有：
①功率管开通时，驱动电路提供的栅极电压应有快速的上升沿，并一开始有一定的过冲，以加速开通过程。
②功率管导通期间，应能在任何负载情况下都能保证功率管处于导通状态，且使功率管Vds在管子导通的前提下压降较低，以保证低的导通损耗。
③关断瞬时，驱动电路应提供足够的反压，使漏极电流迅速下降，加速关断过程。
（图3为最佳栅极驱动电压波形）
图3 最佳栅极驱动电压波形
4UCC27321使用注意事项
⑴电路布局上的考虑[2，3]：
UCC27321的最大输入电流为500mA，输入信号可以由PWM控制芯片或逻辑门产生。
我们不需要对输入信号进行整形而刻意减小驱动速度。
若想限制其驱动速度，可在其输出端与负载间串一个电阻，有助于吸收驱动芯片的损耗。
驱动芯品的低阻抗和高di/dt,都会带来寄生电感和寄生电容产生的振铃。
为尽可能消除这些不良影响，我们在电路布局上应加以注意：
总的来说，驱动电路应尽可能的靠近负载。
在UCC27321的输出侧VDD和地之间跨接一个1uF的低ESR电容以滤除电源高频分量。
将PIN1和PIN8、PIN4和PIN5相连；输出端PIN6和PIN7相连后接至负载。
PGND、AGND之间，两个VDD引脚之间都存在一个较小的阻抗。
为了使输入、输出电源和地之间进行解耦，同时利用上述特征，可在5脚和8脚之间跨接一个1uF的低ESR
电容（有助于获得大的驱动电流），在1脚和4脚之间跨接一个0.1uF的陶瓷电容以降低输出阻抗。
若想获得进一步的解耦，可在PIN1和PIN8之间串一小磁环以消除电流振荡；在PIN4和PIN5之间加一对反并联二极管，实现PGND和AGND之间的解耦。
由于在MOSFET开通时UCC27321能提供很大的充电电流，根据公式,可知驱动电压在开通时有很高的电压尖峰。
为防止栅源电压过高，MOSFET被击穿，可在输出端与地之间并一个18V的稳压管。
⑵驱动电流和功率要求[4，5]
在MOSFET开通时UCC27321能提供几百纳秒的9A峰值电流，使其迅速开通；为求迅速关断，驱动芯片应能对地提供同样高的放电电流。
由于功率MOSFET为容性负载，开
通时MOSFET栅极电压偏置为Vg，则给电容的充电能量可简单地看作为：
Ciss为MOSFET输入电容，Vg为栅极偏置电压。
当电容放电时，对地传输的能量也为E。
这样芯片提供的功率损耗为：
其中：为开关管的工作频率
如果驱动芯片与栅极之间没有串接额外的电阻，则电路回路的阻抗会消耗这一部分能量即所有的能量会损耗在驱动芯片内部：电容充电和放电时各消耗一半能量。
以下举例说明这一情况：
根据以上方程式可以确定功率MOSFET的所需栅极电压。
5应用实例
图4给出了应用于推挽正激的驱动电路：
（a）为运用UCC27321的光耦隔离驱动。
由于上管和下管不共地，为了实现电气上的隔离，在UC3525的输出与UCC27321的输入之间增加了快速光耦隔离芯片HCPL4504。
采用光耦隔离，使得外围电路简单，设计较容易，但需两路激励电源。
（b）为传统推挽变压器隔离驱动,由于采用变压器实现电气隔离，进行电流、电压变换，应用范围较广。
但缺点是体积重量较大，驱动变压器容易激磁饱和，设计相对困难。
实验中所采用的MOSFET为IRFP460，其典型参数为：Ciss=4.1nF；Qg=120nC;VDS=500V;ID=20A;VGS=±20V。
测试电路为图4所示电路，开关频率为50kHz。
从导通和关断时间来看：采用推挽式驱动电路时，开关管的导通时间和关断时间将近为180ns；而采用UCC27321驱动芯片后，导通时间仅为80ns，关断时间则为70ns。
从波形（见图5）来看：采用UCC27321驱动芯片后，功率管开通时，驱动电路提供的栅极电压具有快速的上升沿，并一开始有一定的过冲；关断瞬时，提供了较大的反压，使管子可靠关断，开关管的导通特性和关断特性明显改善。
所以采用UCC27321驱动芯片构成的驱动电路，开关管的开通和关断损耗都将会大大减小。
6结论
通过实验验证UCC27321驱动芯片具有良好的驱动特性，能快速驱动MOSFET，从而减小了开通和关断损耗。
同时，通过设置使能端能设计出性能优异的保护电路，具有外围电路简洁，实现电源，输入、输出地之间的解耦，可靠性高等优点。
能很好地应用于高速MOSFET的驱动电路设计。