Discretization of Timed Automata in Timed μCRL à la Regions and Zones
英语
The Neutral Grounding Resistor Sizing Using an Analytical Method Based on Nonlinear Transformer Model for Inrush Current MitigationGholamabas M.H.Hajivar Shahid Chamran University,Ahvaz, Iranhajivar@S.S.MortazaviShahid Chamran University,Ahvaz, IranMortazavi_s@scu.ac.irMohsen SanieiShahid Chamran University,Ahvaz, IranMohsen.saniei@Abstract-It was found that a neutral resistor together with 'simultaneous' switching didn't have any effect on either the magnitudes or the time constant of inrush currents. The pre-insertion resistors were recommended as the most effective means of controlling inrush currents. Through simulations, it was found that the neutral resistor had little effect on reducing the inrush current peak or even the rate of decay as compared to the cases without a neutral resistor. The use of neutral impedances was concluded to be ineffective compared to the use of pre-insertion resistors. This finding was explained by the low neutral current value as compared to that of high phase currents during inrush. The inrush currents could be mitigated by using a neutral resistor when sequential switching is implemented. From the sequential energizing scheme performance, the neutral resistor size plays the significant role in the scheme effectiveness. Through simulation, it was found that a few ohms neutral grounding resistor can effectively achieve inrush currents reduction. If the neutral resistor is directly selected to minimize the peak of the actual inrush current, a much lower resistor value could be found.This paper presents an analytical method to select optimal neutral grounding resistor for mitigation of inrush current. In this method nonlinearity and core loss of the transformer has been modeled and derived analytical equations.Index Terms--Inrush current, neutral grounding resistor, transformerI.I NTRODUCTIONThe energizing of transformers produces high inrush currents. The nature of inrush currents have rich in harmonics coupled with relatively a long duration, leads to adverse effects on the residual life of the transformer, malfunction of the protection system [1] and power quality [2]. In the power-system industry, two different strategies have been implemented to tackle the problem of transformer inrush currents. The first strategy focuses on adapting to the effects of inrush currents by desensitizing the protection elements. Other approaches go further by 'over-sizing' the magnetic core to achieve higher saturation flux levels. These partial countermeasures impose downgrades on the system's operational reliability, considerable increases unit cost, high mechanical stresses on the transformer and lead to a lower power quality. The second strategy focuses on reducing the inrush current magnitude itself during the energizing process. Minimizing the inrush current will extend the transformer's lifetime and increase the reliability of operation and lower maintenance and down-time costs. Meanwhile, the problem of protection-system malfunction is eliminated during transformer energizing. The available inrush current mitigation consist "closing resistor"[3], "control closing of circuit breaker"[4],[5], "reduction of residual flux"[6], "neutral resistor with sequential switching"[7],[8],[9].The sequential energizing technique presents inrush-reduction scheme due to transformer energizing. This scheme involves the sequential energizing of the three phases transformer together with the insertion of a properly sized resistor at the neutral point of the transformer energizing side [7] ,[8],[9] (Fig. 1).The neutral resistor based scheme acts to minimize the induced voltage across the energized windings during sequential switching of each phase and, hence, minimizes the integral of the applied voltage across the windings.The scheme has the main advantage of being a simpler, more reliable and more cost effective than the synchronous switching and pre-insertion resistor schemes. The scheme has no requirements for the speed of the circuit breaker or the determination of the residual flux. Sequential switching of the three phases can be implemented through either introducing a mechanical delay between each pole in the case of three phase breakers or simply through adjusting the breaker trip-coil time delay for single pole breakers.A further study of the scheme revealed that a much lower resistor size is equally effective. The steady-state theory developed for neutral resistor sizing [8] is unable to explain this phenomenon. This phenomenon must be understood using transient analysis.Fig. 1. The sequential phase energizing schemeUPEC201031st Aug - 3rd Sept 2010The rise of neutral voltage is the main limitation of the scheme. Two methods present to control the neutral voltage rise: the use of surge arrestors and saturated reactors connected to the neutral point. The use of surge arresters was found to be more effective in overcoming the neutral voltage rise limitation [9].The main objective of this paper is to derive an analytical relationship between the peak of the inrush current and the size of the resistor. This paper presents a robust analytical study of the transformer energizing phenomenon. The results reveal a good deal of information on inrush currents and the characteristics of the sequential energizing scheme.II. SCHEME PERFORMANCESince the scheme adopts sequential switching, each switching stage can be investigated separately. For first-phase switching, the scheme's performance is straightforward. The neutral resistor is in series with the energized phase and this resistor's effect is similar to a pre-insertion resistor.The second- phase energizing is one of the most difficult to analyze. Fortunately, from simulation studies, it was found that the inrush current due to second-phase energizing is lower than that due to first-phase energizing for the same value of n R [9]. This result is true for the region where the inrush current of the first-phase is decreasing rapidly as n R increases. As a result, when developing a neutral-resistor-sizing criterion, the focus should be directed towards the analysis of the first-phase energizing.III. A NALYSIS OF F IRST -P HASE E NERGIZING The following analysis focuses on deriving an inrush current waveform expression covering both the unsaturatedand saturated modes of operation respectively. The presented analysis is based on a single saturated core element, but is suitable for analytical modelling of the single-phase transformers and for the single-phase switching of three-phase transformers. As shown in Fig. 2, the transformer's energized phase was modeled as a two segmented saturated magnetizing inductance in series with the transformer's winding resistance, leakage inductance and neutral resistance. The iron core non-l inear inductance as function of the operating flux linkages is represented as a linear inductor inunsaturated ‘‘m l ’’ and saturated ‘‘s l ’’ modes of operation respectively. (a)(b)Fig. 2. (a) Transformer electrical equivalent circuit (per-phase) referred to the primary side. (b) Simplified, two slope saturation curve.For the first-phase switching stage, the equivalent circuit represented in Fig. 2(a) can accurately represent behaviour of the transformer for any connection or core type by using only the positive sequence Flux-Current characteristics. Based on the transformer connection and core structure type, the phases are coupled either through the electrical circuit (3 single phase units in Yg-D connection) or through the Magnetic circuit (Core type transformers with Yg-Y connection) or through both, (the condition of Yg-D connection in an E-Core or a multi limb transformer). The coupling introduced between the windings will result in flux flowing through the limbs or magnetic circuits of un-energized phases. For the sequential switching application, the magnetic coupling will result in an increased reluctance (decreased reactance) for zero sequence flux path if present. The approach presented here is based on deriving an analytical expression relating the amount of inrush current reduction directly to the neutral resistor size. Investigation in this field has been done and some formulas were given to predict the general wave shape or the maximum peak current.A. Expression for magnitude of inrush currentIn Fig. 2(a), p r and p l present the total primary side resistance and leakage reactance. c R shows the total transformer core loss. Secondary side resistance sp r and leakage reactance sp l as referred to primary side are also shown. P V and s V represent the primary and secondary phase to ground terminal voltages, respectively.During first phase energizing, the differential equation describing behaviour of the transformer with saturated ironcore can be written as follows:()())sin((2) (1)φω+⋅⋅=⋅+⋅+⋅+=+⋅+⋅+=t V (t)V dtdi di d λdt di l (t)i R r (t)V dt d λdt di l (t)i R r (t)V m P ll p pp n p P p p p n p PAs the rate of change of the flux linkages with magnetizing current dt d /λcan be represented as an inductance equal to the slope of the i −λcurve, (2) can be re-written as follows;()(3) )()()(dtdi L dt di l t i R r t V lcore p p P n p P ⋅+⋅+⋅+=λ (4) )()(L core l p c l i i R dtdi−⋅=⋅λ⎩⎨⎧==sml core L L di d L λλ)(s s λλλλ>≤The general solution of the differential equations (3),(4) has the following form;⎪⎩⎪⎨⎧>−⋅⋅+−⋅+−−⋅+≤−⋅⋅+−⋅+−⋅=(5) )sin(//)()( )sin(//)(s s 22222221211112121111λλψωττλλψωττt B t e A t t e i A t B t e A t e A t i s s pSubscripts 11,12 and 21,22 denote un-saturated and saturated operation respectively. The parameters given in the equation (5) are given by;() )(/12221σ⋅++⎟⎟⎠⎞⎜⎜⎝⎛⋅−++⋅=m p c p m n p c m m x x R x x R r R x V B()2222)(/1σ⋅++⎟⎟⎠⎞⎜⎜⎝⎛⋅−++⋅=s p c p s n p c s m x x R x x R r R x V B⎟⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎜⎝⎛⋅−+++=⋅−−⎟⎟⎟⎠⎞⎜⎜⎜⎝⎛−c p m n p m p c m R x x R r x x R x σφψ111tan tan ⎟⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎜⎝⎛⋅−+++=⋅−−⎟⎟⎟⎠⎞⎜⎜⎜⎝⎛−c p s n p s p c m R R r x x R x σφψ112tan tan )sin(111211ψ⋅=+B A A )sin(222221s t B A A ⋅−⋅=+ωψ mp n p m p m p m p c xx R r x x x x x x R ⋅⋅+⋅−⋅+−⋅+⋅⋅⋅=)(4)()(21211σστm p n p m p m p m p c xx R r x x x x x x R ⋅⋅+⋅−⋅++⋅+⋅⋅⋅=)(4)()(21212σστ s p n p s p s p s p xx R r x x x x x x c R ⋅⋅+⋅−⋅+−⋅+⋅⋅⋅=)(4)()(21221σστ sp n p s p s p sp c xx R r x x x x x x R ⋅⋅+⋅−⋅++⋅+⋅⋅⋅=)(4)()(21222σστ ⎟⎟⎠⎞⎜⎜⎝⎛−⋅==s rs s ri i λλλ10 cnp R R r ++=1σ21221112 , ττττ>>>>⇒>>c R , 012≈A , 022≈A According to equation (5), the required inrush waveform assuming two-part segmented i −λcurve can be calculated for two separate un-saturated and saturated regions. For thefirst unsaturated mode, the current can be directly calculated from the first equation for all flux linkage values below the saturation level. After saturation is reached, the current waveform will follow the second given expression for fluxlinkage values above the saturation level. The saturation time s t can be found at the time when the current reaches the saturation current level s i .Where m λ,r λ,m V and ωare the nominal peak flux linkage, residual flux linkage, peak supply voltage and angular frequency, respectivelyThe inrush current waveform peak will essentially exist during saturation mode of operation. The focus should be concentrated on the second current waveform equation describing saturated operation mode, equation (5). The expression of inrush current peak could be directly evaluated when both saturation time s t and peak time of the inrush current waveform peak t t =are known [9].(10))( (9) )(2/)(222222121//)()(2B eA t e i A peak peak t s t s n peak n n peak R I R R t +−⋅+−−⋅+=+=ττωψπThe peak time peak t at which the inrush current will reachits peak can be numerically found through setting the derivative of equation (10) with respect to time equal to zero at peak t t =.()(11) )sin(/)(022222221212221/ψωωττττ−⋅⋅⋅−−−⋅+−=+−⋅peak t s t B A t te A i peak s peakeThe inrush waveform consists of exponentially decaying'DC' term and a sinusoidal 'AC' term. Both DC and AC amplitudes are significantly reduced with the increase of the available series impedance. The inrush waveform, neglecting the relatively small saturating current s i ,12A and 22A when extremely high could be normalized with respect to theamplitude of the sinusoidal term as follows; (12) )sin(/)()(2221221⎥⎦⎤⎢⎣⎡−⋅+−−⋅⋅=ψωτt t t e B A B t i s p(13) )sin(/)()sin()( 22221⎥⎦⎤⎢⎣⎡−⋅+−−⋅⋅−⋅=ψωτωψt t t e t B t i s s p ))(sin()( 2s n n t R R K ⋅−=ωψ (14) ωλλλφλφωλλφωmm m r s s t r m s mV t dt t V dtd t V V s=⎪⎭⎪⎬⎫⎪⎩⎪⎨⎧⎥⎥⎦⎤⎢⎢⎣⎡⎟⎟⎠⎞⎜⎜⎝⎛−−+−⋅=+⋅+⋅⋅==+⋅⋅=−∫(8) 1cos 1(7))sin((6))sin(10The factor )(n R K depends on transformer saturation characteristics (s λand r λ) and other parameters during saturation.Typical saturation and residual flux magnitudes for power transformers are in the range[9]; .).(35.1.).(2.1u p u p s <<λ and .).(9.0.).(7.0u p r u p <<λIt can be easily shown that with increased damping 'resistance' in the circuit, where the circuit phase angle 2ψhas lower values than the saturation angle s t ⋅ω, the exponential term is negative resulting in an inrush magnitude that is lowerthan the sinusoidal term amplitude.B. Neutral Grounding Resistor SizingBased on (10), the inrush current peak expression, it is now possible to select a neutral resistor size that can achieve a specific inrush current reduction ratio )(n R α given by:(15) )0(/)()(==n peak n peak n R I R I R α For the maximum inrush current condition (0=n R ), the total energized phase system impedance ratio X/R is high and accordingly, the damping of the exponential term in equation (10) during the first cycle can be neglected; [][](16))0(1)0()0(2212=⋅++⎥⎦⎤⎢⎣⎡⋅−+===⎟⎟⎠⎞⎜⎜⎝⎛+⋅⋅n s p c p s pR x n m n peak R x x R x x r R K V R I c s σ High n R values leading to considerable inrush current reduction will result in low X / R ratios. It is clear from (14) that X / R ratios equal to or less than 1 ensure negative DC component factor ')(n R K ' and hence the exponential term shown in (10) can be conservatively neglected. Accordingly, (10) can be re-written as follows;()[](17) )()(22122n s p c p s n p R x m n n peak R x x R x x R r V R B R I c s σ⋅++⎥⎦⎤⎢⎣⎡⋅−+=≈⎟⎟⎠⎞⎜⎜⎝⎛+⋅Using (16) and (17) to evaluate (15), the neutral resistorsize which corresponds to a specific reduction ratio can be given by;[][][](18) )0()(1)0( 12222=⋅++⋅−⋅++⋅−+⋅+=⎥⎥⎦⎤⎢⎢⎣⎡⎥⎥⎦⎤⎢⎢⎣⎡=n s p c p s p n s p c p s n p n R x x R x x r R x x R x x R r R K σσα Very high c R values leading to low transformer core loss, it can be re-written equation (18) as follows [9]; [][][][](19) 1)0(12222s p p s p n p n x x r x x R r R K +++++⋅+==α Equations (18) and (19) reveal that transformers require higher neutral resistor value to achieve the desired inrush current reduction rate. IV. A NALYSIS OF SECOND-P HASE E NERGIZING It is obvious that the analysis of the electric and magnetic circuit behavior during second phase switching will be sufficiently more complex than that for first phase switching.Transformer behaviour during second phase switching was served to vary with respect to connection and core structure type. However, a general behaviour trend exists within lowneutral resistor values where the scheme can effectively limitinrush current magnitude. For cases with delta winding or multi-limb core structure, the second phase inrush current is lower than that during first phase switching. Single phase units connected in star/star have a different performance as both first and second stage inrush currents has almost the same magnitude until a maximum reduction rate of about80% is achieved. V. NEUTRAL VOLTAGE RISEThe peak neutral voltage will reach values up to peak phasevoltage where the neutral resistor value is increased. Typicalneutral voltage peak profile against neutral resistor size is shown in Fig. 6- Fig. 8, for the 225 KVA transformer during 1st and 2nd phase switching. A del ay of 40 (ms) between each switching stage has been considered. VI. S IMULATION A 225 KVA, 2400V/600V, 50 Hz three phase transformer connected in star-star are used for the simulation study. The number of turns per phase primary (2400V) winding is 128=P N and )(01.0pu R R s P ==, )(05.0pu X X s P ==,active power losses in iron core=4.5 KW, average length and section of core limbs (L1=1.3462(m), A1=0.01155192)(2m ), average length and section of yokes (L2=0.5334(m),A2=0.01155192)(2m ), average length and section of air pathfor zero sequence flux return (L0=0.0127(m),A0=0.01155192)(2m ), three phase voltage for fluxinitialization=1 (pu) and B-H characteristic of iron core is inaccordance with Fig.3. A MATLAB program was prepared for the simulation study. Simulation results are shown in Fig.4-Fig.8.Fig. 3.B-H characteristic iron coreFig.4. Inrush current )(0Ω=n RFig.5. Inrush current )(5Ω=n RFig.6. Inrush current )(50Ω=n RFig.7. Maximum neutral voltage )(50Ω=n RFig.8. Maximum neutral voltage ).(5Ω=n RFig.9. Maximum inrush current in (pu), Maximum neutral voltage in (pu), Duration of the inrush current in (s)VII. ConclusionsIn this paper, Based on the sequential switching, presents an analytical method to select optimal neutral grounding resistor for transformer inrush current mitigation. In this method, complete transformer model, including core loss and nonlinearity core specification, has been used. It was shown that high reduction in inrush currents among the three phases can be achieved by using a neutral resistor .Other work presented in this paper also addressed the scheme's main practical limitation: the permissible rise of neutral voltage.VIII.R EFERENCES[1] Hanli Weng, Xiangning Lin "Studies on the UnusualMaloperation of Transformer Differential Protection During the Nonlinear Load Switch-In",IEEE Transaction on Power Delivery, vol. 24, no.4, october 2009.[2] Westinghouse Electric Corporation, Electric Transmissionand Distribution Reference Book, 4th ed. East Pittsburgh, PA, 1964.[3] K.P.Basu, Stella Morris"Reduction of Magnetizing inrushcurrent in traction transformer", DRPT2008 6-9 April 2008 Nanjing China.[4] J.H.Brunke, K.J.Frohlich “Elimination of TransformerInrush Currents by Controlled Switching-Part I: Theoretical Considerations” IEEE Trans. On Power Delivery, Vol.16,No.2,2001. [5] R. Apolonio,J.C.de Oliveira,H.S.Bronzeado,A.B.deVasconcellos,"Transformer Controlled Switching:a strategy proposal and laboratory validation",IEEE 2004, 11th International Conference on Harmonics and Quality of Power.[6] E. Andersen, S. Bereneryd and S. Lindahl, "SynchronousEnergizing of Shunt Reactors and Shunt Capacitors," OGRE paper 13-12, pp 1-6, September 1988.[7] Y. Cui, S. G. Abdulsalam, S. Chen, and W. Xu, “Asequential phase energizing method for transformer inrush current reduction—part I: Simulation and experimental results,” IEEE Trans. Power Del., vol. 20, no. 2, pt. 1, pp. 943–949, Apr. 2005.[8] W. Xu, S. G. Abdulsalam, Y. Cui, S. Liu, and X. Liu, “Asequential phase energizing method for transformer inrush current reduction—part II: Theoretical analysis and design guide,” IEEE Trans. Power Del., vol. 20, no. 2, pt. 1, pp. 950–957, Apr. 2005.[9] S.G. Abdulsalam and W. Xu "A Sequential PhaseEnergization Method for Transformer Inrush current Reduction-Transient Performance and Practical considerations", IEEE Transactions on Power Delivery,vol. 22, No.1, pp. 208-216,Jan. 2007.。
uppaal-tutorial
A Tutorial on Uppaal4.0Updated November28,2006Gerd Behrmann,Alexandre David,and Kim rsenDepartment of Computer Science,Aalborg University,Denmark{behrmann,adavid,kgl}@cs.auc.dk.Abstract.This is a tutorial paper on the tool Uppaal.Its goal is to bea short introduction on theflavour of timed automata implemented inthe tool,to present its interface,and to explain how to use the tool.Thecontribution of the paper is to provide reference examples and modellingpatterns.1IntroductionUppaal is a toolbox for verification of real-time systems jointly developed by Uppsala University and Aalborg University.It has been applied successfully in case studies ranging from communication protocols to multimedia applications [35,55,24,23,34,43,54,44,30].The tool is designed to verify systems that can be modelled as networks of timed automata extended with integer variables,struc-tured data types,user defined functions,and channel synchronisation.Thefirst version of Uppaal was released in1995[52].Since then it has been in constant development[21,5,13,10,26,27].Experiments and improvements in-clude data structures[53],partial order reduction[20],a distributed version of Uppaal[17,9],guided and minimal cost reachability[15,51,16],work on UML Statecharts[29],acceleration techniques[38],and new data structures and memory reductions[18,14].Version4.0[12]brings symmetry reduction[36], the generalised sweep-line method[49],new abstraction techniques[11],priori-ties[28],and user defined functions to the mainstream.Uppaal has also gen-erated related Ph.D.theses[50,57,45,56,19,25,32,8,31].It features a Java user interface and a verification engine written in C++.It is freely available at /.This tutorial covers networks of timed automata and theflavour of timed automata used in Uppaal in section2.The tool itself is described in section3, and three extensive examples are covered in sections4,5,and6.Finally,section7 introduces common modelling patterns often used with Uppaal.2Timed Automata in UppaalThe model-checker Uppaal is based on the theory of timed automata[4](see[42] for automata theory)and its modelling language offers additional features such as bounded integer variables and urgency.The query language of Uppaal,usedto specify properties to be checked,is a subset of TCTL (timed computation tree logic)[39,3].In this section we present the modelling and the query languages of Uppaal and we give an intuitive explanation of time in timed automata.2.1The Modelling LanguageNetworks of Timed Automata A timed automaton is a finite-state machine extended with clock variables.It uses a dense-time model where a clock variable evaluates to a real number.All the clocks progress synchronously.In Uppaal ,a system is modelled as a network of several such timed automata in parallel.The model is further extended with bounded discrete variables that are part of the state.These variables are used as in programming languages:They are read,written,and are subject to common arithmetic operations.A state of the system is defined by the locations of all automata,the clock values,and the values of the discrete variables.Every automaton may fire an edge (sometimes misleadingly called a transition)separately or synchronise with another automaton 1,which leads to a new state.Figure 1(a)shows a timed automaton modelling a simple lamp.The lamp has three locations:off ,low ,and bright .If the user presses a button,i.e.,synchronises with press?,then the lamp is turned on.If the user presses the button again,the lamp is turned off.However,if the user is fast and rapidly presses the button twice,the lamp is turned on and becomes bright.The user model is shown in Fig.1(b).The user can press the button randomly at any time or even not press the button at all.The clock y of the lamp is used to detect if the user was fast (y <5)or slow (y >=5).press?‚‚‚‚‚press!(a)Lamp.(b)User.Fig.1.The simple lamp example.We give the basic definitions of the syntax and semantics for the basic timed automata.In the following we will skip the richer flavour of timed automata supported in Uppaal ,i.e.,with integer variables and the extensions of urgent and committed locations.For additional information,please refer to the helpmenu inside the tool.We use the following notations:C is a set of clocks and B (C )is the set of conjunctions over simple conditions of the form x ⊲⊳c or x −y ⊲⊳c ,where x,y ∈C ,c ∈N and ⊲⊳∈{<,≤,=,≥,>}.A timed automaton is a finite directed graph annotated with conditions over and resets of non-negative real valued clocks.Definition 1(Timed Automaton (TA)).A timed automaton is a tuple (L,l 0,C,A,E,I ),where L is a set of locations,l 0∈L is the initial location,C is the set of clocks,A is a set of actions,co-actions and the internal τ-action,E ⊆L ×A ×B (C )×2C ×L is a set of edges between locations with an action,a guard and a set of clocks to be reset,and I :L →B (C )assigns invariants to locations. In the previous example on Fig.1,y:=0is the reset of the clock y ,and the labels press?and press!denote action–co-action (channel synchronisations here).We now define the semantics of a timed automaton.A clock valuation is a function u :C →R ≥0from the set of clocks to the non-negative reals.Let R C be the set of all clock valuations.Let u 0(x )=0for all x ∈C .We will abuse the notation by considering guards and invariants as sets of clock valuations,writing u ∈I (l )to mean that u satisfies I (l ).0000000001111111110001110000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111110000000000000000000000000000000000000000000000000000000011111111111111111111111111111111111111111111111111111111000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111100001111<B,x=1><A,x=2><A,x=3><A,x=3>action transition delay(+1) transition delay(+2) transition state: <A,x=1>actiontransitionOK invalid action transition invalid state: invariant x<3 violatedFig.2.Semantics of TA:different transitions from a given initial state.Definition 2(Semantics of TA).Let (L,l 0,C,A,E,I )be a timed automaton.The semantics is defined as a labelled transition system S,s 0,→ ,where S ⊆L ×R C is the set of states,s 0=(l 0,u 0)is the initial state,and →⊆S ×(R ≥0∪A )×S is the transition relation such that:–(l,u )d−→(l,u +d )if ∀d ′:0≤d ′≤d =⇒u +d ′∈I (l ),and –(l,u )a −→(l ′,u ′)if there exists e =(l,a,g,r,l ′)∈E s.t.u ∈g ,u ′=[r →0]u ,and u ′∈I (l ′),3where for d∈R≥0,u+d maps each clock x in C to the value u(x)+d,and [r→0]u denotes the clock valuation which maps each clock in r to0and agrees with u over C\r. Figure2illustrates the semantics of TA.From a given initial state,we can choose to take an action or a delay transition(different values here).Depending of the chosen delay,further actions may be forbidden.Timed automata are often composed into a network of timed automata over a common set of clocks and actions,consisting of n timed automata A i= (L i,l0i,C,A,E i,I i),1≤i≤n.A location vector is a vector¯l=(l1,...,l n). We compose the invariant functions into a common function over location vec-tors I(¯l)=∧i I i(l i).We write¯l[l′i/l i]to denote the vector where the i th element l i of¯l is replaced by l′i.In the following we define the semantics of a network of timed automata.Definition3(Semantics of a network of Timed Automata).Let A i= (L i,l0i,C,A,E i,I i)be a network of n timed automata.Let¯l0=(l01,...,l0n)be the initial location vector.The semantics is defined as a transition system S,s0,→ , where S=(L1×···×L n)×R C is the set of states,s0=(¯l0,u0)is the initial state,and→⊆S×S is the transition relation defined by:–(¯l,u)d−→(¯l,u+d)if∀d′:0≤d′≤d=⇒u+d′∈I(¯l).−−→l′i s.t.u∈g,–(¯l,u)a−→(¯l[l′i/l i],u′)if there exists l iτgru′=[r→0]u and u′∈I(¯l[l′i/l i]).–(¯l,u)a−→(¯l[l′j/l j,l′i/l i],u′)if there exist l i c?g i r i−−−−→l′i and−−−−→l′j s.t.u∈(g i∧g j),u′=[r i∪r j→0]u and u′∈I(¯l[l′j/l j,l′i/l i]).l j c!g j r jAs an example of the semantics,the lamp in Fig.1may have the follow-ing states(we skip the user):(Lamp.off,y=0)→(Lamp.off,y=3)→(Lamp.low,y=0)→(Lamp.low,y=0.5)→(Lamp.bright,y=0.5)→(Lamp.bright,y=1000)...Timed Automata in Uppaal The Uppaal modelling language extends timed automata with the following additional features(see Fig.3:Templates automata are defined with a set of parameters that can be of any type(e.g.,int,chan).These parameters are substituted for a given argument in the process declaration.Constants are declared as const name value.Constants by definition cannot be modified and must have an integer value.Bounded integer variables are declared as int[min,max]name,where min and max are the lower and upper bound,respectively.Guards,invariants,and assignments may contain expressions ranging over bounded integer variables.The bounds are checked upon verification and violating a bound leads to an invalid state that is discarded(at run-time).If the bounds are omitted,the default range of-32768to32768is used.4Fig.3.Declarations of a constant and a variable,and illustration of some of the channel synchronisations between two templates of the train gate example of Section4,and some committed locations.5Binary synchronisation channels are declared as chan c.An edge labelled with c!synchronises with another labelled c?.A synchronisation pair is chosen non-deterministically if several combinations are enabled. Broadcast channels are declared as broadcast chan c.In a broadcast syn-chronisation one sender c!can synchronise with an arbitrary number of receivers c?.Any receiver than can synchronise in the current state must do so.If there are no receivers,then the sender can still execute the c!action,i.e.broadcast sending is never blocking.Urgent synchronisation channels are declared by prefixing the channel decla-ration with the keyword urgent.Delays must not occur if a synchronisation transition on an urgent channel is enabled.Edges using urgent channels for synchronisation cannot have time constraints,i.e.,no clock guards. Urgent locations are semantically equivalent to adding an extra clock x,that is reset on all incoming edges,and having an invariant x<=0on the location.Hence,time is not allowed to pass when the system is in an urgent location. Committed locations are even more restrictive on the execution than urgent locations.A state is committed if any of the locations in the state is commit-ted.A committed state cannot delay and the next transition must involve an outgoing edge of at least one of the committed locations.Arrays are allowed for clocks,channels,constants and integer variables.They are defined by appending a size to the variable name,e.g.chan c[4];clock a[2];int[3,5]u[7];.Initialisers are used to initialise integer variables and arrays of integer vari-ables.For instance,int i=2;or int i[3]={1,2,3};.Record types are declared with the struct construct like in C.Custom types are defined with the C-like typedef construct.You can define any custom-type from other basic types such as records.User functions are defined either globally or locally to templates.Template parameters are accessible from local functions.The syntax is similar to C except that there is no pointer.C++syntax for references is supported for the arguments only.Expressions in Uppaal Expressions in Uppaal range over clocks and integer variables.The BNF is given in Fig.33in the appendix.Expressions are used with the following labels:Select A select label contains a comma separated list of name:type expressions where name is a variable name and type is a defined type(built-in or custom).These variables are accessible on the associated edge only and they will takea non-deterministic value in the range of their respective types.Guard A guard is a particular expression satisfying the following conditions: it is side-effect free;it evaluates to a boolean;only clocks,integer variables, and constants are referenced(or arrays of these types);clocks and clock differences are only compared to integer expressions;guards over clocks are essentially conjunctions(disjunctions are allowed over integer conditions).A guard may call a side-effect free function that returns a bool,although clock constraints are not supported in such functions.6Synchronisation A synchronisation label is either on the form Expression!or Expression?or is an empty label.The expression must be side-effect free, evaluate to a channel,and only refer to integers,constants and channels. Update An update label is a comma separated list of expressions with a side-effect;expressions must only refer to clocks,integer variables,and constants and only assign integer values to clocks.They may also call functions. Invariant An invariant is an expression that satisfies the following conditions:it is side-effect free;only clock,integer variables,and constants are referenced;it is a conjunction of conditions of the form x<e or x<=e where x is a clock reference and e evaluates to an integer.An invariant may call a side-effect free function that returns a bool,although clock constraints are not supported in such functions.2.2The Query LanguageThe main purpose of a model-checker is verify the model w.r.t.a requirement specification.Like the model,the requirement specification must be expressed in a formally well-defined and machine readable language.Several such logics exist in the scientific literature,and Uppaal uses a simplified version of TCTL. Like in TCTL,the query language consists of path formulae and state formulae.2 State formulae describe individual states,whereas path formulae quantify over paths or traces of the model.Path formulae can be classified into reachability, safety and liveness.Figure4illustrates the different path formulae supported by Uppaal.Each type is described below.State Formulae A state formula is an expression(see Fig.33)that can be evaluated for a state without looking at the behaviour of the model.For instance, this could be a simple expression,like i==7,that is true in a state whenever i equals7.The syntax of state formulae is a superset of that of guards,i.e.,a state formula is a side-effect free expression,but in contrast to guards,the use of disjunctions is not restricted.It is also possible to test whether a particular process is in a given location using an expression on the form P.l,where P is a process and l is a location.In Uppaal,deadlock is expressed using a special state formula(although this is not strictly a state formula).The formula simply consists of the keyword deadlock and is satisfied for all deadlock states.A state is a deadlock state if there are no outgoing action transitions neither from the state itself or any of its delay successors.Due to current limitations in Uppaal,the deadlock state formula can only be used with reachability and invariantly path formulae(see below).Reachability Properties Reachability properties are the simplest form of properties.They ask whether a given state formula,ϕ,possibly can be satisfied3Notice that A ϕ=¬E3¬ϕ8there should exist a maximal path such thatϕis always true.4In Uppaal we write A[]ϕand E[]ϕ,respectively.Liveness Properties Liveness properties are of the form:something will even-tually happen,e.g.when pressing the on button of the remote control of the television,then eventually the television should turn on.Or in a model of a communication protocol,any message that has been sent should eventually be received.In its simple form,liveness is expressed with the path formula A3ϕ,mean-ingϕis eventually satisfied.5The more useful form is the leads to or response property,writtenϕ ψwhich is read as wheneverϕis satisfied,then eventu-allyψwill be satisfied,e.g.whenever a message is sent,then eventually it will be received.6In Uppaal these properties are written as A<>ϕandϕ-->ψ, respectively.2.3Understanding TimeInvariants and Guards Uppaal uses a continuous time model.We illustrate the concept of time with a simple example that makes use of an observer.Nor-mally an observer is an add-on automaton in charge of detecting events without changing the observed system.In our case the clock reset(x:=0)is delegated to the observer for illustration purposes.Figure5shows thefirst model with its observer.We have two automata in parallel.Thefirst automaton has a self-loop guarded by x>=2,x being a clock,that synchronises on the channel reset with the second automaton.The second automaton,the observer,detects when the self loop edge is taken with the location taken and then has an edge going back to idle that resets the clock x.We moved the reset of x from the self loop to the observer only to test what happens on the transition before the reset.Notice that the location taken is committed(marked c)to avoid delay in that location.The following properties can be verified in Uppaal(see section3for an overview of the interface).Assuming we name the observer automaton Obs,we have:–A[]Obs.taken imply x>=2:all resets offx will happen when x is above2.This query means that for all reachable states,being in the locationObs.taken implies that x>=2.–E<>Obs.idle and x>3:this property requires,that it is possible to reach-able state where Obs is in the location idle and x is bigger than3.Essentially we check that we may delay at least3time units between resets.The result would have been the same for larger values like30000,since there are no invariants in this model.x>=2reset!‚‚‚‚‚246824"time"c l o c k x (a)Test.(b)Observer.(c)Behaviour:one possible run.Fig.5.First example with anobserver.x>=2reset!246824"time"c l o c k x(a)Test.(b)Updated behaviour with an invariant.Fig.6.Updated example with an invariant.The observer is the same as in Fig.5and is not shown here.We update the first model and add an invariant to the location loop ,as shown in Fig.6.The invariant is a progress condition:the system is not allowed to stay in the state more than 3time units,so that the transition has to be taken and the clock reset in our example.Now the clock x has 3as an upper bound.The following properties hold:–A[]Obs.taken imply (x>=2and x<=3)shows that the transition is takenwhen x is between 2and 3,i.e.,after a delay between 2and 3.–E<>Obs.idle and x>2:it is possible to take the transition when x is be-tween 2and 3.The upper bound 3is checked with the next property.–A[]Obs.idle imply x<=3:to show that the upper bound is respected.The former property E<>Obs.idle and x>3no longer holds.Now,if we remove the invariant and change the guard to x>=2and x<=3,you may think that it is the same as before,but it is not!The system has no progress condition,just a new condition on the guard.Figure 7shows what happens:the system may take the same transitions as before,but deadlock may also occur.The system may be stuck if it does not take the transition after 3time units.In fact,the system fails the property A[]not deadlock .The property A[]Obs.idle imply x<=3does not hold any longer and the deadlock can also be illustrated by the property A[]x>3imply not Obs.taken ,i.e.,after 3time units,the transition is not taken any more.10x>=2 && x<=3reset!246824"time"c l o c k x(a)Test.(b)Updated behaviour with a guard and no invariant.Fig.7.Updated example with a guard and no invariant.P0P1P2Fig.8.Automata in parallel with normal,urgent and commit states.The clocks are local,i.e.,P0.x and P1.x are two different clocks.Committed and Urgent Locations There are three different types of loca-tions in Uppaal :normal locations with or without invariants (e.g.,x<=3in the previous example),urgent locations,and committed locations.Figure 8shows 3automata to illustrate the difference.The location marked u is urgent and the one marked c is committed.The clocks are local to the automata,i.e.,x in P0is different from x in P1.To understand the difference between normal locations and urgent locations,we can observe that the following properties hold:–E<>P0.S1and P0.x>0:it is possible to wait in S1of P0.–A[]P1.S1imply P1.x==0:it is not possible to wait in S1of P1.An urgent location is equivalent to a location with incoming edges reseting a designated clock y and labelled with the invariant y<=0.Time may not progress in an urgent state,but interleavings with normal states are allowed.A committed location is more restrictive:in all the states where P2.S1is active (in our example),the only possible transition is the one that fires the edge outgoing from P2.S1.A state having a committed location active is said to11be committed:delay is not allowed and the committed location must be left in the successor state(or one of the committed locations if there are several ones). 3Overview of the Uppaal ToolkitUppaal uses a client-server architecture,splitting the tool into a graphical user interface and a model checking engine.The user interface,or client,is imple-mented in Java and the engine,or server,is compiled for different platforms (Linux,Windows,Solaris).7As the names suggest,these two components may be run on different machines as they communicate with each other via TCP/IP. There is also a stand-alone version of the engine that can be used on the com-mand line.3.1The Java ClientThe idea behind the tool is to model a system with timed automata using a graphical editor,simulate it to validate that it behaves as intended,andfinally to verify that it is correct with respect to a set of properties.The graphical interface(GUI)of the Java client reflects this idea and is divided into three main parts:the editor,the simulator,and the verifier,accessible via three“tabs”. The Editor A system is defined as a network of timed automata,called pro-cesses in the tool,put in parallel.A process is instantiated from a parameterised template.The editor is divided into two parts:a tree pane to access the different templates and declarations and a drawing canvas/text editor.Figure9shows the editor with the train gate example of section4.Locations are labelled with names and invariants and edges are labelled with guard conditions(e.g.,e==id), synchronisations(e.g.,go?),and assignments(e.g.,x:=0).The tree on the left hand side gives access to different parts of the system description:Global declaration Contains global integer variables,clocks,synchronisation channels,and constants.Templates Train,Gate,and IntQueue are different parameterised timed au-tomata.A template may have local declarations of variables,channels,and constants.Process assignments Templates are instantiated into processes.The process assignment section contains declarations for these instances.System definition The list of processes in the system.The syntax used in the labels and the declarations is described in the help system of the tool.The local and global declarations are shown in Fig.10.The graphical syntax is directly inspired from the description of timed automata in section2.12Fig.9.The train automaton of the train gate example.The select button is activated in the tool-bar.In this mode the user can move locations and edges or edit labels. The other modes are for adding locations,edges,and vertices on edges(called nails).A new location has no name by default.Two textfields allow the user to define the template name and its eful trick:The middle mouse button is a shortcut for adding new elements,i.e.pressing it on the canvas,a location,or edge adds a new location,edge,or nail,respectively.The Simulator The simulator can be used in three ways:the user can run the system manually and choose which transitions to take,the random mode can be toggled to let the system run on its own,or the user can go through a trace (saved or imported from the verifier)to see how certain states are reachable. Figure11shows the simulator.It is divided into four parts:The control part is used to choose andfire enabled transitions,go through a trace,and toggle the random simulation.The variable view shows the values of the integer variables and the clock con-straints.Uppaal does not show concrete states with actual values for the clocks.Since there are infinitely many of such states,Uppaal instead shows sets of concrete states known as symbolic states.All concrete states in a sym-bolic state share the same location vector and the same values for discretevariables.The possible values of the clocks is described by a set of con-Fig.10.The different local and global declarations of the train gate example.We superpose several screen-shots of the tool to show the declarations in a compact manner.straints.The clock validation in the symbolic state are exactly those that satisfy all constraints.The system view shows all instantiated automata and active locations of the current state.The message sequence chart shows the synchronisations between the differ-ent processes as well as the active locations at every step.The Verifier The verifier“tab”is shown in Fig.12.Properties are selectable in the Overview list.The user may model-check one or several properties,8insert or remove properties,and toggle the view to see the properties or the comments in the list.When a property is selected,it is possible to edit its definition(e.g., E<>Train1.Cross and Train2.Stop...)or comments to document what the property means informally.The Status panel at the bottom shows the commu-nication with the server.When trace generation is enabled and the model-checkerfinds a trace,the user is asked if she wants to import it into the simulator.Satisfied properties are marked green and violated ones red.In case either an over approximation or an under approximation has been selected in the options menu,then it may happen that the verification is inconclusive with the approximation used.In that casethe properties are marked yellow.Fig.11.View of the simulator tab for the train gate example.The interpretation of the constraint system in the variable panel depends on whether a transition in the transition panel is selected or not.If no transition is selected,then the constrain system shows all possible clock valuations that can be reached along the path.If a transition is selected,then only those clock valuations from which the transition can be taken are shown.Keyboard bindings for navigating the simulator without the mouse can be found in the integrated help system.3.2The Stand-alone VerifierWhen running large verification tasks,it is often cumbersome to execute these from inside the GUI.For such situations,the stand-alone command line verifier called verifyta is more appropriate.It also makes it easy to run the verification on a remote UNIX machine with memory to spare.It accepts command line arguments for all options available in the GUI,see Table3in the appendix.4Example1:The Train Gate4.1DescriptionThe train gate example is distributed with Uppaal.It is a railway control system which controls access to a bridge for several trains.The bridge is a critical shared resource that may be accessed only by one train at a time.The system is defined as a number of trains(assume4for this example)and a controller.A train can not be stopped instantly and restarting also takes time.Therefor,there are timing constraints on the trains before entering the bridge.When approaching,15。
多智能体系统的非震颤固定时间一致性
讯时滞和随机噪声扰动的蜂拥问题。除了线性系统之 外，文献[11]研究了基于事件触发的随机非确定线性多 智能体系统的指数同步问题。最近，文献[12]讨论了事 件触发机制下的多智能体领导跟随一致性。
总 体 来 说 ，在 这 些 系 统 中 [2- 12] 实 现 一 致（或 蜂 拥）都 是渐进稳定的，也就是收敛时间是趋于无穷大的。但是 在实际运用中往往需要多智能体系统在有限时间内实 现一致，比如要实现较高的控制精度。此外，有限时间 一致性具有较高的抗干扰性和鲁棒性。Wang 等 较 [13] 早 地分析了动态多智能体网络的有限时间一致性问题。 Sun 等 继 [14-16] 续讨论了在噪声环境下的有限时间一致性 和蜂拥问题。同时，这些工作 都 [13-16] 对实现一致性（或蜂
158 2020，56（4）
Computer Enginቤተ መጻሕፍቲ ባይዱering and Applications 计算机工程与应用
多智能体系统的非震颤固定时间一致性
茆汉国，张建德 南京工程学院 计算机工程学院，南京 211167
摘 要：研究了多智能体系统的非震颤固定时间一致性问题。基于李雅普诺夫稳定性理论，导出了实现固定时间一 致性的充分条件 ，其中到达一致时间的上界估计不再依赖于多智能体系统的初始状态条件。此外 ，与传统含有符号 函数的有限时间和固定时间控制器不同的是 ，所提出的新颖控制方案是非震颤的 ，有利于多智能体系统的一致性性 能表征。最后，用一个数值例子验证了理论分析结果的有效性和可行性。 关键词：多智能体 ；一致性 ；固定时间 ；非震颤 文献标志码：A 中图分类号：TP273 doi：10.3778/j.issn.1002-8331.1811-0223
1 引言
随着人工智能技术的火热发展，多智能体系统的一 致性问题受到了国内外学者们的广泛关注[1]，并且在机 器人编队控制、无人机协同控制、虫类蜂拥、蜂群计算等 领域有着广泛的应用[2-5]。
Timing discriminator for pulsed time-of-flight laser rangefinding measurements
TIMING DISCRIMINATOR FOR PULSED TIME-OF-FLIGHT LASER RANGEFINDING MEASUREMENTSAri Kilpelä, Juha Ylitalo, Kari Määttä, Juha KostamovaaraUniversity of OuluDepartment of Electrical Engineering and Infotech Oulu, Electronics LaboratoryFIN-90570 Oulu FinlandABSTRACTA time-pickoff circuit based on constant fraction discriminator (CFD) timing principle has been developed for pulsed time-of-flight laser rangefinding. It is based on the detection of the crossing point of the trailing edge of the original timing pulse and the leading edge of its delayed replica with a fast ECL comparator. A simplified theory has been presented for the sources of the walk error in constant fraction time discriminators, and three different comparator types have been tested in the CFD developed. It has been noticed that if there are not any crosstalk disturbances, the walk error produced by the limited gain-bandwidth product of the comparator is the dominating walk error source and that walk error can be decreased to +/- 1 mm in a 1:10 dynamic range of input pulses by adding an external offset voltage between the input nodes of the comparator. The bandwidth of the preamplifier used was 100 kHz-100 MHz.1.INTRODUCTIONThe time-pickoff circuit is an essential component in TOF laser radars and more generally in time spectroscopy, which is used for example in nuclear physics measurements 1,2. The purpose of the time-pickoff circuit is to gain a logic output pulse that is precisely related in time to the occurrence of an event. The source of the event may be, for example, the detection of a laser light pulse with varying shape and amplitude.The performance of the time-pickoff circuit is measured with three parameters: walk error, drift and timing jitter. The walk error, which is often the most important parameter, is the timing error in the time-pickoff circuit as a function of the shape and amplitude of the input pulses. Drift, again, is the long-term timing error as a function of component aging and temperature variations in the timing circuitry. Long-termdrift can often be calibrated so that it is sufficiently small. Timing jitter, which isexpressed with the term resolution or precision, is caused by statistical fluctuation ofthe shape of the measurement pulses and noise in the measurement system. The effectof jitter can be reduced by averaging several successive measurement results.In both pulsed laser rangefinding and nuclear physics the amplitude and shape of themeasurement pulse may change in the measurement process. In nuclear physics, theymay vary typically in a relatively large range from one pulse to another due to thedetection process, and, for this reason the gain control cannot be used to cancel theamplitude variation. In pulsed time-of-flight laser rangefinding the variations in thereceived pulse amplitude are induced mostly due to the variation in the measurementdistance and object reflection. The effect of these amplitude variations on timing canusually be cancelled by optical gain control with a negligible timing error. However,the optical gain control is not always fast enough to hold a stable optical peak powerin the pulses. This happens, for example, when the measurement beam is scannedover a surface. In that situation it is necessary to have a time-pickoff circuit with lowwalk error, because the time-pickoff circuit can adapt even to two successive pulses,which have varying amplitudes. It is possible that the averaged shapes of the pulsesmay vary also in the laser rangefinders.The aim of this work was to develop a timing discriminator for pulsed time-of-flightlaser rangefinding measurements with a walk error less than +/-1 mm (+/-7 ps) in aninput amplitude range of 1:5. The application environment is a laser radar describedin chapter 2 and in more detail in ref. 3. It is a double-channel laser radar which isused in steel industry for measuring the thickness of the lining in a steel converter.Tests were made also with a single-channel laser radar, which is designed formeasuring the shapes of ship blocks in shipyards in distances varying from 2 to 30 m 4. In order to decrease the walk error, it was studied how the speed of the timing comparator affects the walk error. Also a compensation method based on theadjustment of the offset voltage of the timing comparator was analyzed. Theadjustment procedure should be easy and fast and applicable to all devices of theselected laser type.2. CONSTRUCTION OF A PULSED TIME-OF-FLIGHT RADARThe block diagram of a double-channel laser radar used in the applicationenvironment in this work is presented in figure 1. The measurement system consistsof a transmitter, two receiver channels, two constant fraction discriminators and a timemeasuring unit. In addition, the system may include also an optical attenuator and amicroprocessor unit which measures the power of the received signal and controls theoperation of the optical attenuator. The start pulses are taken directly from theoutgoing radiation from diffuse reflection. In a single-channel laser radar the wholereceiver channel is common to start and stop pulses, which are separated after thetime-pickoff circuit to their own channels with logic gates. The laser transmitter sendsoptical pulses in 4 kHz frequency. The laser may be either a SH or DH type, the pulse power of which may vary in the range of 5 to 50 W. The FWHM (full-width-at-half-maximum) of the measurement pulses in the channel are in the range of 6 to 8 ns. The lower and upper -3 dB corner frequencies of the whole receiver channel are 100 kHz and 100 MHz, respectively.The time-pickoff circuit converts the analog measurement pulses to ECL logic pulses which are fed to the TDC (time-to-digital converter). The TDC measures the time difference between the start and stop pulses. It consists of a 100 MHz oscillator and counters which roughly digitize the time interval to be measured. The time fractions between the start and stop pulses and their respective next clock pulse but one are digitized with an interpolation circuit based on analog time-to-amplitude conversion 3,5.3. OPERATION OF A TIME-PICKOFF CIRCUIT3.1. GENERAL CONSIDERATIONS OF A TIME-PICKOFF CIRCUITThe time-pickoff circuits can be roughly divided into two groups, constant fraction discriminators and leading edge discriminators. The timing moment may be detected with a comparator 6,7, or a tunnel diode 8. In the leading edge discriminator, the timing moment is the crossing moment of the leading edge of the input pulse and a fixed threshold level. The timing moment is a function of the amplitude and rise time of the input signal. The result of the variation of the timing moment is that the walk error is large and the resolution does not remain at an optimum level.In constant fraction timing, the timing moment is always located at some fractional point of the leading and trailing edges of the input pulse. Usually the input signal is divided into two parts. The other part of the signal is delayed and inverted. An undelayed, but attenuated signal is summed with it. The timing moment is the point where the rising edge of the non-attenuated pulse has an equal voltage level with the peak level of the attenuated pulse. Then the summed bipolar pulse crosses zero voltage level. The optimum fractional point and the value of the delay are selected so that the resolution value is minimized 1. The delay is usually implemented with a delay cable and the attenuation with a resistor divider. Pulse inverting is possible to realize with a pulse transformer or with a shorted delay cable. If a comparator is used in the detection of the timing moment, the delayed and undelayed pulses can be fed to the different input nodes, and subtraction of the pulses from each other is not needed.There are three possible sources for walk error: first, variation of the crossing moment of the two signals in the input of the time-pickoff circuit, second, the limited gain-bandwidth product of the comparator, and third, the possible crosstalk in the circuit.All these sources may increase walk error, but they may also cancel out the effect of each other.The crossing moment may vary due to the timing principle itself or because there is an offset voltage between the two input pulses. The offset voltage may introduce walk error, but it may be also used for cancelling the walk error, which is caused by the limited speed of the comparator. The effect of the offset voltage can be seen from the figure 2, where the input pulse of the time-pickoff circuit is divided into two pulses and the other pulse is delayed. The timing moment is the crossing point of the two pulses which are fed to different input nodes of the comparator. From fig. 2 it can be seen that if a positive offset voltage is added to the delayed pulse and if the amplitude of the input pulse is decreased, the timing moment shifts to an earlier position.The propagation delay of the time-pickoff circuit changes, when the slew rates of the pulses change, because the comparator has a limited gain-bandwidth product. The higher the slew rate of the input pulse, the smaller is the propagation delay of the comparator. If the amplitudes of the input pulses are changed, but the slew rates of the input pulses are kept constant by changing the rise time, the propagation delay remains unchanged, provided that the amplitudes of the input pulses exceed some minimum level 9.The third source for the walk error may be some crosstalk between the input pulses and some other pulses in the time-pickoff circuit. In some cases also the disturbance caused by the crosstalk may cancel the effect of some other walk error source, but then the adjustment procedure of the walk error may be very time-consuming and unpredictable.The timing jitter σt of the measurement result depends on the slew rate and noise of the input pulse:σσt nV D dV dt 222==(/),(1)where σn is the r.m.s. noise of the input of the time-pickoff circuit and (/)dV dt V D =is the slew rate of the signal at the timing moment 10. Eq. 1 is derived for timing,where the input pulse crosses a reference level. From (1) it can be noted that the timing moment should be chosen as a point in which the ratio between noise and slew rate is at minimum. If it is assumed that the distance is measured n times and the noise in the measurement process is randomly distributed, the resolution is improved by factor n compared to a single measurement result.There are many sources of noise in TOF laser radars: the signal-induced noise, the excess noise from an avalanche photodiode and amplifiers and the noise from the current caused by background radiation. According to measurements in ref. 3, when the temperature of the target is near room temperature or lower, the effect of the background noise can be neglected. At small signal levels, both the noise from theelectronics and the signal-induced noise must be taken into account, but at high signal levels the signal-induced noise is dominating, if an avalanche photodiode is used as a photodetector. The higher the timing moment is chosen in the leading or trailing edge, the stronger the signal-induced noise is at the timing moment. At the top of the laser output pulse the slew rate is small and, for example, the relaxation oscillations may cause instability in the shape of the pulse 11. For these reasons the timing moment should not be chosen near the peak of the pulse. The lower the timing moment is at the linear part of the leading or the trailing edges, the better the resolution, because the signal-induced noise is there at its lowest, assuming that the timing moment is chosen from the linear parts of the leading and trailing edges.3.2. CONSTRUCTION OF THE DEVELOPED CFDThe main principle of the time-pickoff circuit used here is the following: the amplified input pulse is divided into two parts which have equal amplitudes and the other pulse is delayed. The delayed and non-delayed signals are fed to the different input nodes of a fast comparator with ECL logic outputs. The value of the delay is selected so that the two pulses cross each other at the trailing edge of the first pulse and at the leading edge of the latter pulse. The pulse diagram is presented in figure 2. With this method, the advantage is that the resolution is small, because both pulses to the inputs have high slew rates at the timing point. The timing moment is usually selected to be at 30 % - 40 % from the maximum amplitude, because, according to the measurements, the resolution is smallest at that level.A simplified schematic diagram of the CFD developed is presented in figure 3. The threshold level of the noise comparator is adjusted to exceed the peak level of the background noise, for example to a level of 100 mV to 150 mV. The output pulse of the noise comparator goes through ECL-flip-flop n:o 1 (type 10H131) to the data input of the flip-flop N2. So the output of the flip-flop N2, which is at the same time the output of the discriminator, can change its state only when the amplitude of the input pulse of the discriminator exceeds the threshold level adjusted to the noise comparator. The output timing pulse from the timing comparator triggers the clock input of flip-flop N2.Flip-flop N1 has two purposes: it extends the data input pulse of the flip-flop N2 and latches the output nodes of the noise comparator to a stable state until the output of the flip-flop N2 resets the state of flip-flop N1. The latter function is important, because the output nodes of the noise comparator may change at the same time as the input pulses to the timing comparator cross each other. Then the output pulse of the noise comparator can be coupled to the input nodes of the timing comparator through the parasitical capacitances between the bonding wires in a dual comparator circuit inducing timing error.The presented configuration is a result of evolution. Originally the timing comparator was enabled by the noise comparator through its latch input only for the period oftiming. The idea was that in this case the offset of the timing comparator can be selected freely without oscillations which may be present in the version of fig. 3 if the noise level exceeds the input offset 5. However, this method needs an extra delay cable in order to adjust the timing for the latch input of the timing comparator. We found that that the latching of the timing comparator is not needed, because the possible oscillations in the output of the timing comparator in the construction of fig.3 are suppressed when the timing pulse exists at its input, and were not found to produce any measurable errors.4. MEASUREMENTSThree different comparator types were tested in a CFD circuit described in chapter 3. The types were Analog Devices AD 96687 and Signal Processing Technology HCMP 96870A and SPT 9689. The walk error of the distance meter was measured with several offset voltages with all three comparator types. All the comparators tested are pin-compatible with each other. The main difference between the comparators is in the -3 dB bandwidth of small signal open loop gain. However, not any exact values are given in the datasheets, but it seems that the SPT9689 is the fastest comparator and the AD96687 is the slowest one.In all walk error measurements a double-channel laser radar was used, except for the measurement presented in figure 8, which was measured with a single-channel laser radar. In the single-channel radar only the comparator SPT9689 was tested. The semiconductor laser used in double-channel radar was a pigtailed DH laser diode CVD-193F (manufactured by Laser Diode Inc.), the pulse power of which was 18 W measured from the end of the fiber. The rise and fall times (between 10 % and 90 %) of the channel pulse (at the input of the CFD) were 4.5 ns and 4.7 ns, respectively, and the FWHM was 7.9 ns measured with an oscilloscope of 1 GHz analog bandwidth. The shape of the channel pulse is presented in figure 4. In a single-channel laser radar the laser type CVD-93F was used. It had a pulse power of 5 W, rise time of 3.3 ns, fall time of 4.3 ns and FWHM of 6.8 ns. The delay cable in the constant fraction discriminator was 190 cm long in the measurements presented in figures 5 to 12. With that cable the crossing point of the undelayed and delayed pulses was about at 41 % of the maximum height of the pulse in a double-channel radar and 28 % in the single-channel radar.The walk error measurements with zero offset voltage are presented in figure 5. The external offset voltage compensated the internal offset voltage of the comparator. We found that the walk error was clearly largest with the AD 96687 comparator and smallest with the SPT 9689 comparator.The walk error measurements with different offset voltages are presented in figures 6 to 9. For all comparators the walk error curves have been measured with several values of offset voltage. The smallest walk error, +/- 1 mm in the input amplitude range of 0.2 to 2.0 V, was achieved with SPT 9689 in a double-channel radar. The best measured walk error in the single-channel radar with SPT9689 was about +/- 1.5 mm in the input amplitude range of 0.2 to 2.0 V.The effect of the timing level on the performance of the CFD was studied by measuring the single-shot resolution values vs. input pulse amplitudes with several delay cable lengths (figure 10). The comparator type was AD96687. The timing levels are indicated as relative levels of the crossing point of the input pulses of the timing comparator compared to the maximum amplitude of the pulses. The timing levels were measured with zero offset voltage. The results show that the resolution depends slightly on the timing level, as expected, and the higher the timing level, the worse the resolution. However, with input amplitudes smaller than 1.3 V the resolution was clearly the best with 41 % timing level and not with the lowest timing level. This is probably due to the fact that with low signal amplitudes, the noise of the amplifiers becomes the dominating noise source and the total noise levels at the timing points at 23 % and 41 % timing levels are somewhat equal. The lower slew rate value at 23 % level gives a worse resolution than at 41 % level at low signal amplitudes.The effect of crosstalk between the output of the noise comparator and the input of the timing comparator may have an impact on the shape of the walk error curve. It was proved to be true by measuring the walk error curves so that the latch inputs of the noise comparator were not in use. The walk error curves measured with and without using the latch inputs, with different noise comparator threshold values, are presented in figures 11 and 12, respectively. In both measurements the comparator type was AD96687. All curves in the figures are measured with the same delay cable length and the same timing comparator offset voltage. It can be seen that the crosstalk between bonding wires inside the double comparator circuit has a rather strong effect on the shape of the walk error curves and for this reason it is necessary to prevent the change of state of the output nodes of the noise comparator during the timing moment at the inputs of the timing comparator.5. EVALUATION OF THE WALK ERROR VALUEIn the evaluation of the value of the walk error, two things must be taken into account: the dependence of the propagation delay on the slew rate of the input pulses and the offset voltage in the input nodes of the comparator.A simplified model of the propagation delay of a comparator has been introduced in12. The propagation delay is created by the internal capacitances of the comparator. In the following, we make a simple assumption that the comparator is an amplifier which has a single high-frequency pole and the shape of the input pulses remains the same at all input signal amplitudes. The amplification is linear, but we take into account the effect of operating in a large signal range by including in the calculation the minimum propagation delay τD. It is assumed that the maximum slew rate of the comparator is not exceeded. The open loop gain in the s-domain is:U s U s F se AsAo is D()()()()()==⋅+−ττ10(2),where A(0) is the open loop gain in zero frequency and τ001= the time constant corresponding to the upper -3 dB corner frequency of the unit gain. The terms U i(s) and U o(s) are the input and output voltages of the amplifier, respectively. Assuming that the input signal is a linear ramp ()u t SR ti=⋅and taking the inverse Laplace transform from U o(s) we can calculate the response time t delay required to reach some output level V o:tVSRdelay D=⋅+200ττ(3)Eq. (3) consists of the minimum propagation delay τD and another delay, the value of which depends on the slew rate of the input signal. The propagation delay has the simplified form in small signal analysis:t AB slew ratedelay=+,(4)where A ja B are constants. The smaller is the constant 200⋅Vτ, the smaller the dispersion of the propagation delay (walk error) of the comparator. In practice it means that the comparator should be as fast as possible.The effect of the offset voltage summed to the input nodes of the comparator can be evaluated coarsely using input pulses which have linear leading and trailing edges (figure 13). Now we derive the crossing point of the pulses from a pair of equations which define the straight lines of the leading and trailing edges of the pulse:u U U t t u U U t t of pr p pf−=⋅−=−⋅(5),where U of = offset voltage between the input nodes, U p = the amplitude of the input pulses in the comparator nodes, t r = rise time (0-100 %) of the pulse and t f = fall time (100%-0) of the pulse. We can calculate the crossing point t cross by solving the pair of equations in the crossing point:t U U t t cross of pr f =−+111(6)If U of , t r ja t f are constants, we come to a simplified solution for the crossing point:t C D slew ratecross =− (7),where C and D are constants and the term slew rate equals to the sum of the slew rates of the leading and trailing edges: slew rate U t U t p r p f=+.In order to calculate the final walk error curves, we may select the values V 0 and τ0 in eq. 3 so that the shape of the calculated propagation delay curve is close to the shape of the measured propagation delay curve of AD96687 presented in figure 5. For example, if we choose the value of 0.5 V for V 0 and assume that the AD96687 has a gain of 170 at the frequency of 100 MHz, the calculated walk error curve comes very close to the measured one. If we sum up equations 3 and 6 and use the measured rise and fall times t r and t f , we can calculate the walk error curves with different offset voltage values. The result of such calculations for AD96687 is presented in figure 14.In equation 6 the rise time t r (0-100 %) used was 4.9 ns and the fall time t f (100%-0)used was 5.6 ns, and in equation 3 the rise and fall times used were 5.6 ns both.Comparing the calculated walk error curves of figure 14 and the measured walk error curves of figure 6 with each other, it seems that they are reasonably close to each other and it can be concluded that the forming of the walk error curve is based on the factors described above. The value of the walk error can be decreased in a limited amplitude range by adding an external positive voltage between the input nodes of the timing comparator, as the calculations show. The differences between calculated and measured curves are probably due to the facts that the comparator propably has more than one high-frequency poles and that the pulse edges in equation 5 have been approximated to be linear, which in reality is not, of course, quite true.6. DISCUSSIONTo achieve a small walk error, the bandwidth of the timing comparator should be increased. In this way only a small offset voltage is needed to straighten the walk error curve and the result is a decreased walk error value especially at low amplitudes. From eq. 5 it can also be seen that if the rise and fall times of the input pulses are decreased, the walk error decreases.The new semiconductor technologies make it possible to fabricate faster amplifiers and comparators. There are already commercially available transimpedance and voltage amplifiers with bandwidths ranging from 0.5 to 1 GHz. However, with high bandwidths, the importance of the layout increases and all stray capacitances must be minimized in order to prevent other parts of the circuit from disturbing the input pulses of the timing comparator. The crosstalk could also be minimized by integrating the CFD with the amplifiers on the same semiconductor chip. ACKNOWLEDGMENTSThe authors would like to thank the Academy of Finland for financial support of the work.REFERENCES1 D.A. Gedcke, W.J. McDonald, Nuclear Instruments and Methods, 58, 253 (1968)2 T.J. Paulus, IEEE Transactions on Nuclear Science, 3, (1985)3 Kari Määttä, Juha Kostamovaara, Risto Myllylä Applied Optics, 27, 5334 (1993)4 Kaisto I., Kostamovaara J., Manninen M., Myllylä R., SPIE Proceedings 2088, 121 (1993)5 Juha Kostamovaara, Kari Määttä, Risto Myllylä, SPIE Proceedings 1614, 283 (1991)6 Michael R. Maier, Donald A. Landis, Nuclear Instruments and Methods, 117, 245, (1974)7 M.D. Cable, M.S. Derzon, R.G. Vieira, H.P. Spracklen, IEEE Transactions on Nuclear Science, 35(1), 133, (1988)8 Branko Leskovar, C.C. Lo, Paul R. Hartig, Kenneth Sauer, Rev. Sci. Instrum., 47(9), 1113, (1976)9 David M. Binkley, Michael E. Casey, IEEE Transactions on Nuclear Science, 35(1), 226, (1988)10 Bertolini, G., Coche, A., Semiconductor detectors, , pp. 243-276, North-Holland Publishing Co., Amsterdam (1968)11 Peter K. Cheo: "Handbook of Solid-State Lasers", pp. 82-84, ISBN 0-8247-7857-X, Marcel Dekker Inc., New York (1989)12 Arie F. Arbel, "Analog Signal Processing and Instrumentation", pp.172-176, Cambridge University Press (1980)Figure 1. A simplified diagram of a laser radar.Figure 2. The formation of timing point, when an offset voltage has been added between the input nodes of the timing comparator.Figure 3. The schematic diagram of a constant fraction time discriminator used in this work.Time [ns]C h a n n e l p u l s e [V ]00.20.40.60.811.2010203040Figure 4. The delayed and non-delayed pulses measured from the input pins of the comparator AD96687. The offset voltage between the input pins was 36 mV and the timing level was 41 %.Figure 5. The walk error of the CFD for three comparator types with zero external offset voltage and 41 % timing level.offset voltages. The timing level was 41 %.Figure 7. The measured walk error curves of the CFD with HCMP96870A and different offset voltages. The timing level was 41 %.Figure 8. The measured walk error curves of the CFD with SPT 9689 and different offset voltages. The timing level was 41 %.Figure 9. The measured walk error curves of SPT 9689 with different offset voltages in single-channel laser radar. The timing level was 41 %.Figure 10. The single-shot resolution of the laser radar as a function of the amplitude of the channel pulse measured with four different timing levels. The comparator type was AD96687 and the offset voltage was 33 mV.Figure 12. The walk error curves measured with different noise comparator threshold values without using the latch inputs of the noise comparator. The timing level was 41 % and the offset voltage of the timing comparator was 33 mV.。
稳定的高功率激光系统在高级引力波探测器中的应用
Stabilized high-power laser system forthe gravitational wave detector advancedLIGOP.Kwee,1,∗C.Bogan,2K.Danzmann,1,2M.Frede,4H.Kim,1P.King,5J.P¨o ld,1O.Puncken,3R.L.Savage,5F.Seifert,5P.Wessels,3L.Winkelmann,3and B.Willke21Max-Planck-Institut f¨u r Gravitationsphysik(Albert-Einstein-Institut),Hannover,Germany2Leibniz Universit¨a t Hannover,Hannover,Germany3Laser Zentrum Hannover e.V.,Hannover,Germany4neoLASE GmbH,Hannover,Germany5LIGO Laboratory,California Institute of Technology,Pasadena,California,USA*patrick.kwee@aei.mpg.deAbstract:An ultra-stable,high-power cw Nd:Y AG laser system,devel-oped for the ground-based gravitational wave detector Advanced LIGO(Laser Interferometer Gravitational-Wave Observatory),was comprehen-sively ser power,frequency,beam pointing and beamquality were simultaneously stabilized using different active and passiveschemes.The output beam,the performance of the stabilization,and thecross-coupling between different stabilization feedback control loops werecharacterized and found to fulfill most design requirements.The employedstabilization schemes and the achieved performance are of relevance tomany high-precision optical experiments.©2012Optical Society of AmericaOCIS codes:(140.3425)Laser stabilization;(120.3180)Interferometry.References and links1.S.Rowan and J.Hough,“Gravitational wave detection by interferometry(ground and space),”Living Rev.Rel-ativity3,1–3(2000).2.P.R.Saulson,Fundamentals of Interferometric Gravitational Wave Detectors(World Scientific,1994).3.G.M.Harry,“Advanced LIGO:the next generation of gravitational wave detectors,”Class.Quantum Grav.27,084006(2010).4. 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A.Bullington,ntz,M.Fejer,and R.Byer,“Modal frequency degeneracy in thermally loaded optical res-onators,”Appl.Opt.47,2840–2851(2008).23.G.Mueller,“Beam jitter coupling in Advanced LIGO,”Opt.Express13,7118–7132(2005).24.V.Delaubert,N.Treps,ssen,C.C.Harb,C.Fabre,m,and H.-A.Bachor,“TEM10homodynedetection as an optimal small-displacement and tilt-measurement scheme,”Phys.Rev.A74,053823(2006). 25.P.Kwee,B.Willke,and K.Danzmann,“Laser power noise detection at the quantum-noise limit of32A pho-tocurrent,”Opt.Lett.36,3563–3565(2011).26. A.Araya,N.Mio,K.Tsubono,K.Suehiro,S.Telada,M.Ohashi,and M.Fujimoto,“Optical mode cleaner withsuspended mirrors,”Appl.Opt.36,1446–1453(1997).27.P.Kwee,B.Willke,and K.Danzmann,“Shot-noise-limited laser power stabilization with a high-power photodi-ode array,”Opt.Lett.34,2912–2914(2009).28. ntz,P.Fritschel,H.Rong,E.Daw,and G.Gonz´a lez,“Quantum-limited optical phase detection at the10−10rad level,”J.Opt.Soc.Am.A19,91–100(2002).1.IntroductionInterferometric gravitational wave detectors[1,2]perform one of the most precise differential length measurements ever.Their goal is to directly detect the faint signals of gravitational waves emitted by astrophysical sources.The Advanced LIGO(Laser Interferometer Gravitational-Wave Observatory)[3]project is currently installing three second-generation,ground-based detectors at two observatory sites in the USA.The4kilometer-long baseline Michelson inter-ferometers have an anticipated tenfold better sensitivity than theirfirst-generation counterparts (Inital LIGO)and will presumably reach a strain sensitivity between10−24and10−23Hz−1/2.One key technology necessary to reach this extreme sensitivity are ultra-stable high-power laser systems[4,5].A high laser output power is required to reach a high signal-to-quantum-noise ratio,since the effect of quantum noise at high frequencies in the gravitational wave readout is reduced with increasing circulating laser power in the interferometer.In addition to quantum noise,technical laser noise coupling to the gravitational wave channel is a major noise source[6].Thus it is important to reduce the coupling of laser noise,e.g.by optical design or by exploiting symmetries,and to reduce laser noise itself by various active and passive stabilization schemes.In this article,we report on the pre-stabilized laser(PSL)of the Advanced LIGO detector. The PSL is based on a high-power solid-state laser that is comprehensively stabilized.One laser system was set up at the Albert-Einstein-Institute(AEI)in Hannover,Germany,the so called PSL reference system.Another identical PSL has already been installed at one Advanced LIGO site,the one near Livingston,LA,USA,and two more PSLs will be installed at the second #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10618site at Hanford,WA,USA.We have characterized the reference PSL and thefirst observatory PSL.For this we measured various beam parameters and noise levels of the output beam in the gravitational wave detection frequency band from about10Hz to10kHz,measured the performance of the active and passive stabilization schemes,and determined upper bounds for the cross coupling between different control loops.At the time of writing the PSL reference system has been operated continuously for more than18months,and continues to operate reliably.The reference system delivered a continuous-wave,single-frequency laser beam at1064nm wavelength with a maximum power of150W with99.5%in the TEM00mode.The active and passive stabilization schemes efficiently re-duced the technical laser noise by several orders of magnitude such that most design require-ments[5,7]were fulfilled.In the gravitational wave detection frequency band the relative power noise was as low as2×10−8Hz−1/2,relative beam pointingfluctuations were as low as1×10−7Hz−1/2,and an in-loop measurement of the frequency noise was consistent with the maximum acceptable frequency noise of about0.1HzHz−1/2.The cross couplings between the control loops were,in general,rather small or at the expected levels.Thus we were able to optimize each loop individually and observed no instabilities due to cross couplings.This stabilized laser system is an indispensable part of Advanced LIGO and fulfilled nearly all design goals concerning the maximum acceptable noise levels of the different beam pa-rameters right after installation.Furthermore all or a subset of the implemented stabilization schemes might be of interest for many other high-precision optical experiments that are limited by laser noise.Besides gravitational wave detectors,stabilized laser systems are used e.g.in the field of optical frequency standards,macroscopic quantum objects,precision spectroscopy and optical traps.In the following section the laser system,the stabilization scheme and the characterization methods are described(Section2).Then,the results of the characterization(Section3)and the conclusions(Section4)are presented.ser system and stabilizationThe PSL consists of the laser,developed and fabricated by Laser Zentrum Hannover e.V.(LZH) and neoLASE,and the stabilization,developed and integrated by AEI.The optical components of the PSL are on a commercial optical table,occupying a space of about1.5×3.5m2,in a clean,dust-free environment.At the observatory sites the optical table is located in an acoustically isolated cleanroom.Most of the required electronics,the laser diodes for pumping the laser,and water chillers for cooling components on the optical table are placed outside of this cleanroom.The laser itself consists of three stages(Fig.1).An almostfinal version of the laser,the so-called engineering prototype,is described in detail in[8].The primary focus of this article is the stabilization and characterization of the PSL.Thus only a rough overview of the laser and the minor modifications implemented between engineering prototype and reference system are given in the following.Thefirst stage,the master laser,is a commercial non-planar ring-oscillator[9,10](NPRO) manufactured by InnoLight GmbH in Hannover,Germany.This solid-state laser uses a Nd:Y AG crystal as the laser medium and resonator at the same time.The NPRO is pumped by laser diodes at808nm and delivers an output power of2W.An internal power stabilization,called the noise eater,suppresses the relaxation oscillation at around1MHz.Due to its monolithic res-onator,the laser has exceptional intrinsic frequency stability.The two subsequent laser stages, used for power scaling,inherit the frequency stability of the master laser.The second stage(medium-power amplifier)is a single-pass amplifier[11]with an output power of35W.The seed laser beam from the NPRO stage passes through four Nd:YVO4crys-#161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10619power stabilizationFig.1.Pre-stabilized laser system of Advanced LIGO.The three-staged laser(NPRO,medium power amplifier,high power oscillator)and the stabilization scheme(pre-mode-cleaner,power and frequency stabilization)are shown.The input-mode-cleaner is not partof the PSL but closely related.NPRO,non-planar ring oscillator;EOM,electro-optic mod-ulator;FI,Faraday isolator;AOM,acousto-optic modulator.tals which are longitudinally pumped byfiber-coupled laser diodes at808nm.The third stage is an injection-locked ring oscillator[8]with an output power of about220W, called the high-power oscillator(HPO).Four Nd:Y AG crystals are used as the active media. Each is longitudinally pumped by sevenfiber-coupled laser diodes at808nm.The oscillator is injection-locked[12]to the previous laser stage using a feedback control loop.A broadband EOM(electro-optic modulator)placed between the NPRO and the medium-power amplifier is used to generate the required phase modulation sidebands at35.5MHz.Thus the high output power and good beam quality of this last stage is combined with the good frequency stability of the previous stages.The reference system features some minor modifications compared to the engineering proto-type[8]concerning the optics:The external halo aperture was integrated into the laser system permanently improving the beam quality.Additionally,a few minor designflaws related to the mechanical structure and the optical layout were engineered out.This did not degrade the output performance,nor the characteristics of the locked laser.In general the PSL is designed to be operated in two different power modes.In high-power mode all three laser stages are engaged with a power of about160W at the PSL output.In low-power mode the high-power oscillator is turned off and a shutter inside the laser resonator is closed.The beam of the medium-power stage is reflected at the output coupler of the high power stage leaving a residual power of about13W at the PSL output.This low-power mode will be used in the early commissioning phase and in the low-frequency-optimized operation mode of Advanced LIGO and is not discussed further in this article.The stabilization has three sections(Fig.1:PMC,PD2,reference cavity):A passive resonator, the so called pre-mode-cleaner(PMC),is used tofilter the laser beam spatially and temporally (see subsection2.1).Two pick-off beams at the PMC are used for the active power stabilization (see subsection2.2)and the active frequency pre-stabilization,respectively(see subsection2.3).In general most stabilization feedback control loops of the PSL are implemented using analog electronics.A real-time computer system(Control and Data Acquisition Systems,CDS,[13]) which is common to many other subsystems of Advanced LIGO,is utilized to control and mon-itor important parameters of the analog electronics.The lock acquisition of various loops,a few #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10620slow digital control loops,and the data acquisition are implemented using this computer sys-tem.Many signals are recorded at different sampling rates ranging from16Hz to33kHz for diagnostics,monitoring and vetoing of gravitational wave signals.In total four real-time pro-cesses are used to control different aspects of the laser system.The Experimental Physics and Industrial Control System(EPICS)[14]and its associated user tools are used to communicate with the real-time software modules.The PSL contains a permanent,dedicated diagnostic instrument,the so called diagnostic breadboard(DBB,not shown in Fig.1)[15].This instrument is used to analyze two different beams,pick-off beams of the medium power stage and of the HPO.Two shutters are used to multiplex these to the DBB.We are able to measurefluctuations in power,frequency and beam pointing in an automated way with this instrument.In addition the beam quality quantified by the higher order mode content of the beam was measured using a modescan technique[16].The DBB is controlled by one real-time process of the CDS.In contrast to most of the other control loops in the PSL,all DBB control loops were implemented digitally.We used this instrument during the characterization of the laser system to measure the mentioned laser beam parameters of the HPO.In addition we temporarily placed an identical copy of the DBB downstream of the PMC to characterize the output beam of the PSL reference system.2.1.Pre-mode-cleanerA key component of the stabilization scheme is the passive ring resonator,called the pre-mode-cleaner(PMC)[17,18].It functions to suppress higher-order transverse modes,to improve the beam quality and the pointing stability of the laser beam,and tofilter powerfluctuations at radio frequencies.The beam transmitted through this resonator is the output beam of the PSL, and it is delivered to the subsequent subsystems of the gravitational wave detector.We developed and used a computer program[19]to model thefilter effects of the PMC as a function of various resonator parameters in order to aid its design.This led to a resonator with a bow-tie configuration consisting of four low-loss mirrors glued to an aluminum spacer. The optical round-trip length is2m with a free spectral range(FSR)of150MHz.The inci-dence angle of the horizontally polarized laser beam is6◦.Theflat input and output coupling mirrors have a power transmission of2.4%and the two concave high reflectivity mirrors(3m radius of curvature)have a transmission of68ppm.The measured bandwidth was,as expected, 560kHz which corresponds to afinesse of133and a power build-up factor of42.The Gaussian input/output beam had a waist radius of about568µm and the measured acquired round-trip Gouy phase was about1.7rad which is equivalent to0.27FSR.One TEM00resonance frequency of the PMC is stabilized to the laser frequency.The Pound-Drever-Hall(PDH)[20,21]sensing scheme is used to generate error signals,reusing the phase modulation sidebands at35.5MHz created between NPRO and medium power amplifier for the injection locking.The signal of the photodetector PD1,placed in reflection of the PMC, is demodulated at35.5MHz.This photodetector consists of a1mm InGaAs photodiode and a transimpedance amplifier.A piezo-electric element(PZT)between one of the curved mirrors and the spacer is used as a fast actuator to control the round-trip length and thereby the reso-nance frequencies of the PMC.With a maximum voltage of382V we were able to change the round-trip length by about2.4µm.An analog feedback control loop with a bandwidth of about 7kHz is used to stabilize the PMC resonance frequency to the laser frequency.In addition,the electronics is able to automatically bring the PMC into resonance with the laser(lock acquisition).For this process a125ms period ramp signal with an amplitude cor-responding to about one FSR is applied to the PZT of the PMC.The average power on pho-todetector PD1is monitored and as soon as the power drops below a given threshold the logic considers the PMC as resonant and closes the analog control loop.This lock acquisition proce-#161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10621dure took an average of about65ms and is automatically repeated as soon as the PMC goes off resonance.One real-time process of CDS is dedicated to control the PMC electronics.This includes parameters such as the proportional gain of the loop or lock acquisition parameters.In addition to the PZT actuator,two heating foils,delivering a maximum total heating power of14W,are attached to the aluminum spacer to control its temperature and thereby the roundtrip length on timescales longer than3s.We measured a heating and cooling1/e time constant of about2h with a range of4.5K which corresponds to about197FSR.During maintenance periods we heat the spacer with7W to reach a spacer temperature of about2.3K above room temperature in order to optimize the dynamic range of this actuator.A digital control loop uses this heater as an actuator to off-load the PZT actuator allowing compensation for slow room temperature and laser frequency drifts.The PMC is placed inside a pressure-tight tank at atmospheric pressure for acoustic shield-ing,to avoid contamination of the resonator mirrors and to minimize optical path length changes induced by atmospheric pressure variations.We used only low-outgassing materials and fabri-cated the PMC in a cleanroom in order to keep the initial mirror contamination to a minimum and to sustain a high long-term throughput.The PMCfilters the laser beam and improves the beam quality of the laser by suppress-ing higher order transverse modes[17].The acquired round-trip Gouy phase of the PMC was chosen in such a way that the resonance frequencies of higher order TEM modes are clearly separated from the TEM00resonance frequency.Thus these modes are not resonant and are mainly reflected by the PMC,whereas the TEM00mode is transmitted.However,during the design phase we underestimated the thermal effects in the PMC such that at nominal circu-lating power the round-trip Gouy-phase is close to0.25FSR and the resonance of the TEM40 mode is close to that of the TEM00mode.To characterize the mode-cleaning performance we measured the beam quality upstream and downstream of the PMC with the two independent DBBs.At150W in the transmitted beam,the circulating power in the PMC is about6.4kW and the intensity at the mirror surface can be as high as1.8×1010W m−2.At these power levels even small absorptions in the mirror coatings cause thermal effects which slightly change the mirror curvature[22].To estimate these thermal effects we analyzed the transmitted beam as a function of the circulating power using the DBB.In particular we measured the mode content of the LG10and TEM40mode.Changes of the PMC eigenmode waist size showed up as variations of the LG10mode content.A power dependence of the round-trip Gouy phase caused a variation of the power within the TEM40mode since its resonance frequency is close to a TEM00mode resonance and thus the suppression of this mode depends strongly on the Gouy phase.We adjusted the input power to the PMC such that the transmitted power ranged from100W to 150W corresponding to a circulating power between4.2kW and6.4kW.We used our PMC computer simulation to deduce the power dependence of the eigenmode waist size and the round-trip Gouy phase.The results are given in section3.1.At all circulating power levels,however,the TEM10and TEM01modes are strongly sup-pressed by the PMC and thus beam pointingfluctuations are reduced.Pointingfluctuations can be expressed tofirst order as powerfluctuations of the TEM10and TEM01modes[23,24].The PMC reduces thefield amplitude of these modes and thus the pointingfluctuations by a factor of about61according to the measuredfinesse and round-trip Gouy phase.To keep beam point-ingfluctuations small is important since they couple to the gravitational wave channel by small differential misalignments of the interferometer optics.Thus stringent design requirements,at the10−6Hz−1/2level for relative pointing,were set.To verify the pointing suppression effect of the PMC we used DBBs to measure the beam pointingfluctuations upstream and downstream #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10622Fig.2.Detailed schematic of the power noise sensor setup for thefirst power stabilizationloop.This setup corresponds to PD2in the overview in Fig.1.λ/2,waveplate;PBS,polar-izing beam splitter;BD,glassfilters used as beam dump;PD,single element photodetector;QPD,quadrant photodetector.of the PMC.The resonator design has an even number of nearly normal-incidence reflections.Thus the resonance frequencies of horizontal and vertical polarized light are almost identical and the PMC does not act as polarizer.Therefore we use a thin-film polarizer upstream of the PMC to reach the required purity of larger than100:1in horizontal polarization.Finally the PMC reduces technical powerfluctuations at radio frequencies(RF).A good power stability between9MHz and100MHz is necessary as the phase modulated light in-jected into the interferometer is used to sense several degrees of freedom of the interferometer that need to be controlled.Power noise around these phase modulation sidebands would be a noise source for the respective stabilization loop.The PMC has a bandwidth(HWHM)of about 560kHz and acts tofirst order as a low-passfilter for powerfluctuations with a-3dB corner frequency at this frequency.To verify that the suppression of RF powerfluctuations is suffi-cient to fulfill the design requirements,we measured the relative power noise up to100MHz downstream of the PMC with a dedicated experiment involving the optical ac coupling tech-nique[25].In addition the PMC serves the very important purpose of defining the spatial laser mode for the downstream subsystem,namely the input optics(IO)subsystem.The IO subsystem is responsible,among other things,to further stabilize the laser beam with the suspended input mode cleaner[26]before the beam will be injected into the interferometer.Modifications of beam alignment or beam size of the laser system,which were and might be unavoidable,e.g., due to maintenance,do not propagate downstream of the PMC tofirst order due to its mode-cleaning effect.Furthermore we benefit from a similar isolating effect for the active power and frequency stabilization by using the beams transmitted through the curved high-reflectivity mirrors of the PMC.2.2.Power stabilizationThe passivefiltering effect of the PMC reduces powerfluctuations significantly only above the PMC bandwidth.In the detection band from about10Hz to10kHz good power stability is required sincefluctuations couple via the radiation pressure imbalance and the dark-fringe offset to the gravitational wave channel.Thus two cascaded active control loops,thefirst and second power stabilization loop,are used to reduce powerfluctuations which are mainly caused by the HPO stage.Thefirst loop uses a low-noise photodetector(PD2,see Figs.1and2)at one pick-off port #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10623of the PMC to measure the powerfluctuations downstream of the PMC.An analog electronics feedback control loop and an AOM(acousto-optic modulator)as actuator,located upstream of the PMC,are used to stabilize the power.Scattered light turned out to be a critical noise source for thisfirst loop.Thus we placed all required optical and opto-electronic components into a box to shield from scattered light(see Fig.2).The beam transmitted by the curved PMC mirror has a power of about360mW.This beam isfirst attenuated in the box using aλ/2waveplate and a thin-film polarizer,such that we are able to adjust the power on the photodetectors to the optimal operation point.Afterwards the beam is split by a50:50beam splitter.The beams are directed to two identical photode-tectors,one for the control loop(PD2a,in-loop detector)and one for independent out-of-loop measurements to verify the achieved power stability(PD2b,out-of-loop detector).These pho-todetectors consist of a2mm InGaAs photodiode(PerkinElmer C30642GH),a transimpedance amplifier and an integrated signal-conditioningfilter.At the chosen operation point a power of about4mW illuminates each photodetector generating a photocurrent of about3mA.Thus the shot noise is at a relative power noise of10−8Hz−1/2.The signal conditioningfilter has a gain of0.2at very low frequencies(<70mHz)and amplifies the photodetector signal in the im-portant frequency range between3.3Hz and120Hz by about52dB.This signal conditioning filter reduces the electronics noise requirements on all subsequent stages,but has the drawback that the range between3.3Hz and120Hz is limited to maximum peak-to-peak relative power fluctuations of5×10−3.Thus the signal-conditioned channel is in its designed operation range only when the power stabilization loop is closed and therefore it is not possible to measure the free running power noise using this channel due to saturation.The uncoated glass windows of the photodiodes were removed and the laser beam hits the photodiodes at an incidence angle of45◦.The residual reflection from the photodiode surface is dumped into a glassfilter(Schott BG39)at the Brewster angle.Beam positionfluctuations in combination with spatial inhomogeneities in the photodiode responsivity is another noise source for the power stabilization.We placed a silicon quadrant photodetector(QPD)in the box to measure the beam positionfluctuations of a low-power beam picked off the main beam in the box.The beam parameters,in particular the Gouy phase,at the QPD are the same as on the power sensing detectors.Thus the beam positionfluctuations measured with the QPD are the same as the ones on the power sensing photodetectors,assuming that the positionfluctuations are caused upstream of the QPD pick-off point.We used the QPD to measure beam positionfluctuations only for diagnostic and noise projection purposes.In a slightly modified experiment,we replaced one turning mirror in the path to the power sta-bilization box by a mirror attached to a tip/tilt PZT element.We measured the typical coupling between beam positionfluctuations generated by the PZT and the residual relative photocurrent fluctuations measured with the out-of-the-loop photodetector.This coupling was between1m−1 and10m−1which is a typical value observed in different power stabilization experiments as well.We measured this coupling factor to be able to calculate the noise contribution in the out-of-the-loop photodetector signal due to beam positionfluctuations(see Subsection3.3).Since this tip/tilt actuator was only temporarily in the setup,we are not able to measure the coupling on a regular basis.Both power sensing photodetectors are connected to analog feedback control electronics.A low-pass(100mHz corner frequency)filtered reference value is subtracted from one signal which is subsequently passed through several control loopfilter stages.With power stabilization activated,we are able to control the power on the photodetectors and thereby the PSL output power via the reference level on time scales longer than10s.The reference level and other important parameters of these electronics are controlled by one dedicated real-time process of the CDS.The actuation or control signal of the electronics is passed to an AOM driver #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10624。
Chaos synchronization of discrete-time dynamic systems
Nonlinear Dyn(2011)63:277–283DOI10.1007/s11071-010-9803-6O R I G I NA L PA P E RChaos synchronization of discrete-time dynamic systems with a limited capacity communication channelGexia WangReceived:27June2010/Accepted:5August2010/Published online:3September2010©Springer Science+Business Media B.V.2010Abstract This paper offers a new control strategy for discrete-time chaos synchronization where the drive system and the response system are coupled via a limited capacity communication channel(LCCC for short).One simple condition is presented to ensure synchronization between the two chaotic systems cou-pled by a LCCC.Based on this condition,an explicit coder–decoder pair for the coding algorithm is de-signed and the synchronization error between the two chaotic systems decays to zero exponentially based on this coding algorithm.Finally,the proposed control strategy is applied to the well-known H\ {e}non sys-tem,and numerical simulations illustrate the validity of the obtained result.Keywords Chaos synchronization·Discrete-time·Coder·Decoder1IntroductionChaotic synchronization without information con-straints has been well studied,see[1]and references therein.Recently,information-theoretic concepts are applied to analyze and quantify synchronization[2–8]. In[2,3],the methods of the symbolic dynamics were G.Wang( )Department of Mathematic and Physics,ShanghaiUniversity of Electric Power,Shanghai201300,Chinae-mail:gxwang_2004@ used to relate synchronization precision to the capac-ity of the information channel and to the entropy of the drive system.More subtle arguments are given to analyze the system precision under information con-straints based on both Lyapunov functions and coding analysis in[4–8].First results concerning limit possibilities of ob-server-based synchronization of nonlinear(chaotic) continuous-time systems under information constraints were investigated in[4].Sampling rate was consid-ered as a design parameter and the one-step-memory coder was used.It was shown in[4]that the up-per bound of the limit synchronization error can be guaranteed to be less than an arbitrarily small scalar if the transmission rate(channel capacity)is large enough.Next,the researchers extended their work from observer-based synchronization to controlled master–slave synchronization[5].An output feed-back control law was proposed based on the passifi-cation method.Then,observer-based synchronization was extended to the one with more complicated net-works having a“chain,”“star,”or“star-chain”topol-ogy[6].Moreover,observer-based synchronization of a discrete-time chaotic system under information con-straints was studied in[7].Instead of thefirst-order coder adopted in[4],the observer-based full-order coder was designed in[7].Moreover,the decay of the synchronization error asymptotically was ensured un-der information constraints in[7].In the mentioned work,A.L.Fradkov et al.have in-vestigated synchronization problem under information278G.Wangconstraints.Nonlinear systems in the Lurie form(a lin-ear part plus a non-linearity)are full studied in their works[4–7].However,there is little attention paid on the matter of a more general chaotic system,rather than the Lurie form with limited information,except for[8].In[8],the synchronization of two identically continuous-time chaotic systems with a more general form coupled through a limited capacity communica-tion channel was addressed.Full-order coder and im-pulsive control method are proposed in the encoding algorithm to achieve the decay of the synchronization error asymptotically in[8].In the previous works of synchronization problem under information constraints,few works are done on discrete-time nonlinear synchronization systems with a more general form,not limited to Lurie form.On one hand,although the synchronization of two iden-tically continuous-time chaotic systems with a more general form under information constraints was stud-ied in[8],its results can not directly extend to the discrete-time case because impulsive control method is applied in the continuous-time case,where the state at each sampling time is updated by the limit of the state up to the sampling time and the quantized sig-nal,which is nonsense in the discrete-time one.On the other hand,since nonlinear systems in the Lurie form are considered in[4–7],obtained results also can not directly apply to discrete-time nonlinear synchro-nization systems with a more complicated form.Espe-cially,though many chaotic systems are in the Lurie form,its results mainly rely on the property of the lin-ear part of the systems in[4–7],a natural question oc-curs:How to do if the linear part of the systems doesn’t match the condition in[4–7].Therefore,it is neces-sary to further study synchronization problem under information constraints.Hence,the paper is going to provide alternate methods to deal with the issue men-tioned above.We try to give a different encoding strategy based on the Lipschitz property of the whole system,which is different from the one in[4–7].Parameters will be explicitly designed according to the encoding strategy. Here,a full-order coder is designed such that the syn-chronization error decays to zero asymptotically.It is worth pointing that the duplicate of the response sys-tem with quantization is added at the side of the coder as a full-order coder,which is different from the one in[7],where observer-based quantizer is used as a full-order coder at the side of a drive system.In a word,a limit synchronization of discrete-time chaotic systems under information constraints is estab-lished in this paper.Discrete-time nonlinear systems with a more general form coupled through a limited capacity communication channel are considered here.A full-order coder is designed and the duplicate of the response system with quantization is added at the side of the coder as a full-order coder.In addition,our result is successfully applied to H\ {e}non’s chaotic system.Numerical simulations illustrate the feasibil-ity of the obtained result.This paper is organized as follows.Problem formu-lation is provided in Sect.2after an introduction given in Sect.1.The coding algorithm is designed properly in Sect.3.In Sect.4,the main result is presented with a rigorous proof on the basis of the designed coding algorithm,followed by an illustrative numerical exam-ple in Sect.5.A summary is given in Sect.6.2Problem formulationConsider a discrete-time nonlinear system modeled as follows:x k+1=f(x k),(2.1) where the state vector x k∈R n,f:R n→R n is a nonlinear vectorfield on x k,k is discrete time,k= 0,1,2,....Suppose that the initial condition x0∈ 0 and the initial set 0is a given set contained in a bounded set (e.g.,an attractor of a chaotic system). Such an assumption is typical for chaotic systems.As-sume that the Lipschitz constant of the vector function f on the set is L.Remark2.1Note that many discrete-time chaotic sys-tems are in the form of(2.1),e.g.,H\ {e}non chaotic systems,Fold chaotic systems,etc.Hence,discrete-time nonlinear systems with a more general form are studied here,not limited to the Lurie form.The response system is described as:y k+1=f(y k).(2.2) Assume that the initial condition y0=0. Remark2.2Synchronization of two identical chaotic systems coupled without limited information has been well studied,for example,see[9].Chaos synchronization of discrete-time dynamic systems with a limited capacity communication279 Fig.1Synchronization of two chaotic systems coupled via alimited capacity communication channelNew problem arises when we take into accounttransmissions errors.We assume that the state x k ofthe drive system(2.1)is sampled and encoded fromafinite alphabet at discrete time k.Then the code-word will be sent and arrive at the remote responsesystem(2.2)at discrete time instant k(k=0,1,2,...)via a limited capacity communication channel.Thiscan be illustrated by Fig.1.Since the coded symbolis transmitted over a digital communication channelwith afinite capacity,transmission error occurs,thatis,the response system can only get the drive signal x kwithfinite precision.To simplify the problem,we as-sume that the channel is noiseless,and no time delayfor the data transmission.The main goal of the paper isto design the coding algorithm such that the responsesystem synchronizes with the drive system coupled viathe channel with afinite capacity.In the presence of the transmission error,the re-sponse system is described as followsy k+1=fy k+Q(x k),(2.3)where Q(x k)is a quantized signal of the driving sig-nal x k,which is transmitted via a digital communica-tion channel with afinite capacity.The response sys-tem(2.3)is unidirectionally driven by the drive sys-tem(2.1)with a driving signal Q(x k),which is illus-trated by Fig.1.Our main goal is to design a suitable coding algorithm such that the response system(2.3) synchronizes with the drive system(2.1)driven by the quantized signal Q(x k).The coding algorithm consists of two components: thefirst component measures and encodes the driving signal x k,which is named by coder;then the encoded driving signal Q(x k)is transmitted via a limited ca-pacity communication channel and arrives at the sec-ond component named by decoder.The decoder de-codes the codeword Q(x k).The main objective of this paper is to design a series of proper encoding and de-coding functions such that the synchronization error between(2.1)and(2.3)decays to zero exponentially. 3A coding algorithm3.1Static coderA memoryless coder with uniform discretization and constant range is given in[6].For example,let M>0 be a given real number and q be any positive integer.A uniform scaled coder is defined by a discretized map as follows:f M,q(y)=2Mqy q2M,|y|≤MM sign(y),otherwise(3.1)where y rounds the argument y towards nearest in-teger.Then,we havey−f M,q(y)≤Mq,|y|≤M.(3.2)The range interval[−M,M]is divided into q dis-cretization intervals of length2Mq.Therefore,the car-dinality of the mapping f M,q image is equal to q,and each codeword symbol contains R=log q2bits of in-formation.Remark3.1Note that it is very important to design the range number M and the scaling number q for an encoding algorithm in advance,which are shared by the coder and the decoder.Moreover,the n th-order state x k of the drive system(2.1)is transmitted in the paper.For any x∈B n∞(0,a)and a given positive integer q,where B n∞(0,a)={x∈R n, x ∞<a}and a>0is a given constant,there exists a unique group of numbersi1=f a,q(x1),i2=f a,q(x2),...,i n=f a,q(x n),(3.3)where x i is the i th component of the vector x(i= 1,2,...,n),f a,q(.)is a static coder defined in(3.1).Thus,for any x∈B n∞(0,a),defineF a,q(x)={i1,i2,...,i n}=f a,q(x1),f a,q(x2),...,f a,q(x n),(3.4) as a static coder of the vector x of n dimensions.280G.WangBy (3.2),we have x −F M,q (x)∞≤a q,for any x∈B n∞(0,a).(3.5)3.2Full-order coderAs mentioned in [6],the full-order coder usually con-tains “embedded”systems incorporating the model of the system.Different ways are shown for designing the coder–decoder pair (see [6]).Here we introduce the following nonlinear system as a part of the coder:y k +1=f y k +Q(εk ) ,(3.6)εk =x k −y k ,Q(εk )=F M k ,q (εk ),y 0=0,(3.7)wherea 0=sup x 0∈ 0x 0 ∞;M 0=2a 0;M k =ρk M 0,ρ=L/q,k =1,2,...,(3.8)and F M k ,q (.)is the static coder function definedin (3.4)and q is a positive integer to be determined.The quantized signal Q(εk )is represented as an n log q2bits of information symbol from the coding al-phabet and transmitted over the communication chan-nel to the decoder.Assume the decoder decodes the quantized signal Q(εk )at the same instant when it re-ceives it based on the same parameters defined in (3.8).Remark 3.2Parameters for static coder at each step are given in (3.8)explicitly,which shows that these parameters depend on the property of the drive sys-tem.Hence,the proposed coder is more practical and performable.Remark 3.3It is worth pointing out that the relation between the decay parameter ρ(0<ρ<1)and the channel capacity (q )is shown in (3.8).Since the de-cay parameter ρ<1,we can deduce from the rela-tion defined by (3.8)that the minimum channel ca-pacity (q )exists.This result confirms the general statement claiming that stabilization under informa-tion constraints is possible if and only if the capacity of the information channel exceeds the entropy pro-duction of the system at the equilibrium [10].Therefore,the response system (2.3)is represented asy k +1=f y k +Q(x k ) =f y k +F M k ,q (εk ).(3.9)Remark 3.4Since the decoder shares the parametersdefined in (3.8),the response system can decode the quantized signal Q(εk ).Therefore,the system (3.6)is a duplicate of the system (3.9).4Main resultTheorem 4.1Suppose that the positive integer q sat-isfies q >L ,where L is a Lipschitz constant of f on the bounded set (the attractor of the chaotic sys-tem (2.1)).Then ,the synchronization error converges to zero exponentially for the drive system (2.1)and the response system (3.9)coupled over a digital com-munication channel with a finite capacity through the coder–decoder pair (3.6)–(3.8).Proof First,we will showεk ∈B n∞(0,M k )(4.1)for k =0,1,2,...by mathematical induction.By the definition for M 0in (3.8)and the definitionof ε0=x 0−y 0in (3.7),we know that (4.1)holds for k =0by assumption.Next,it will be shown that (4.1)holds for k =1.Sinceε1=x 1−y 1=f (x 0)−f y 0+Q(ε0) ,(4.2)then f (x 0)−f y 0+Q(ε0) ∞≤L x 0−y 0−Q(ε0) ∞=L ε0−Q(ε0) ∞.(4.3)By the fact that (4.1)holds for k =0and (3.5),we get that f (x 0)−f y 0+Q(ε0) ∞≤LM 0q =LqM 0=ρM 0=M 1.(4.4)Thus,(4.1)holds true for k =1.Chaos synchronization of discrete-time dynamic systems with a limited capacity communication 281Suppose that the inequality (4.1)is true for k ≥1,and then show that it also holds true for k +1.In a similar way,we haveεk +1 ∞= x k +1−y k +1= f (x k )−f ( y k +Q(εk ) ∞≤L x k − y k −Q(εk ) ∞=L εk −Q(εk ) ∞.(4.5)By the fact that (4.1)holds for k ≥1and (3.5),one hasthatεk +1 ∞≤LM kq=ρM k =M k +1.(4.6)Then,(4.1)holds true for k +1.Therefore,(4.1)holds true for all k =0,1,2,...by mathematical induction.Moreover,(4.1)indicates that x k −y k ∞≤M k =M 0ρk .(4.7)By (3.6)and (3.9),one has that y k =y k .Therefore, x k −y k ∞= x k −y k ∞≤M k =M 0ρk .Since q >L ,we have 0<ρ=L q <1,which shows that the synchronization error between the drive sys-tem (2.1)and the response system (3.9)coupled with a limited capacity communication channel converges to zero exponentially through the coder–decoder pair (3.6)–(3.8).This completes the proof. Remark 4.1Theorem 4.1indicates that full-order coder ensures synchronization error between the drive system (2.1)and the response system (3.9)decays to zero exponentially provided that the capacity of the communication channel is large enough such that the condition q >L holds.Remark 4.2In [8],the duplicate of the response sys-tem is added at the side of the coder in the algorithm for the continuous chaos synchronization.But the state of the response system is updated at each sampling time by the limit of the state up to each sampling time,which is not applicable in the discrete-time case.Remark 4.3Equation (4.1)shows that coder satura-tion does not happen in our coding algorithm.5Numerical examplesExample 5.1Consider the well-known H \ {e}nonsystem x 1k +1=A 0+p −(x 1k )2+Bx 2kx 2k +1=x 1k(5.1)When A 0=1.4,p =0and B =0.3,the dynamics of the system (5.1)represents chaos,e.g.,see Fig.2withan initial condition x 10=0.2and x 20=1.Let x k =(x 1k ,x 2k )T ,then the system (5.1)can bewritten in a vector form as follows:x k +1=f (x k )= A 0−(x 1k )2+Bx 2kx 1k.(5.2)Thus,for any u k =(u 1k ,u 2k )T and v k =(v 1k ,v 2k )T ,f (u k )−f (v k )= −(u 1k )2+(v 1k )2+B(u 2k −v 2k )u 1k −v 1k= −u 1k +v 1k B10 u 1k −v 1k u 2k −v 2k=Λ(u k −v k ),where Λ= −u 1k +v 1k B 1.Moreover,f (u k )−f (v k )∞≤ f (u k )−f (v k ) 2≤ Λ 2 u k −v k 2≤√Λ ∞ u k −v k ∞.(5.3)Denote t =−u 1(k)+v 1(k),then ΛT Λ= t 2+10.3t 0.3t 0.09.It is easy to know that the largest eigenvalue of ΛTΛFig.2The chaotic H \ {e}non model282G.WangFig.3The synchronizationerrorFig.4Sequence of the codewordis λ=t 2+1+0.092+√2,where =(t 2+1+0.09)2−0.36.Since the first state x 1kof the chaotic system (5.1)is in the interval [−2,2],we have t =−u 1k +v 1k ∈[−4,4].Then,the largest eigenvalue of ΛT Λis ob-tained when t =±4for t ∈[−4,4].Therefore,Λ 2=the largest eigenvalue of ΛT Λ≤ t 2+1+0.092+√2t =±4=bine this with (5.3),one has that the Lipschitz constant of f is L =√2×4.1334=5.8455.In view of Theorem 4.1,we choose the coding index as q =7>L .From Fig.2,we define a 0=3,which is the norm bound of the initial condition x 0of the system (5.1).Fig.5Sequence of thecodewordFig.6Quantizer range M kMoreover,parameters in (3.8)are M 0=2a 0=6,M k =ρk M 0,ρ=0.8351,k =0,1,2,3,....(5.4)Numerical simulation is shown in Fig.3,which indicates that the synchronization error converges to zero exponentially under the coder–decoder pair (3.6)–(3.8)with parameters defined in (5.4).The code-words are shown in Figs.4and 5.Quantizer range is presented in Fig.6.6ConclusionThe synchronization of the discrete-time chaotic sys-tems coupled via a limited capacity communicationChaos synchronization of discrete-time dynamic systems with a limited capacity communication283channel is investigated in this paper.One simple con-dition is presented to guarantee the synchronization.A coding algorithm is designed explicitly step by step. The proposed control strategy is successfully applied to the H\ {e}non’s chaotic system.Moreover,numeri-cal simulations illustrate the feasibility of the obtained result.Acknowledgements The authors would like to express their gratitude to anonymous reviewers for their constructive com-ments and suggestions to improve the quality of the paper.This research was supported by Shanghai Education Fundation for distinguished Young Teachers with number sdl08021. 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Timed Automata Semantics, Algorithms and Tools
Timed Automata:Semantics,Algorithms and ToolsJohan Bengtsson and Wang YiUppsala UniversityEmail:{johanb,yi}@it.uu.seAbstract.This chapter is to provide a tutorial and pointers to results and relatedwork on timed automata with a focus on semantical and algorithmic aspects ofverification tools.We present the concrete and abstract semantics of timed au-tomata(based on transition rules,regions and zones),decision problems,andalgorithms for verification.A detailed description on DBM(Difference BoundMatrices)is included,which is the central data structure behind several verifica-tion tools for timed systems.As an example,we give a brief introduction to thetool U PPAAL.1IntroductionTimed automata is a theory for modeling and verification of real time systems.Exam-ples of other formalisms with the same purpose,are timed Petri Nets,timed process algebras,and real time logics[BD91,RR88,Yi91,NS94,AH94,Cha99].Following the work of Alur and Dill[AD90,AD94],several model checkers have been developed with timed automata being the core of their input languages e.g.[Yov97,LPY97].It is fair to say that they have been the driving force for the application and development of the theory.The goal of this chapter is to provide a tutorial on timed automata with a focus on the semantics and algorithms based on which these tools are developed.In the original theory of timed automata[AD90,AD94],a timed automaton is afinite-state Büchi automaton extended with a set of real-valued variables modeling clocks. Constraints on the clock variables are used to restrict the behavior of an automaton,and Büchi accepting conditions are used to enforce progress properties.A simplified ver-sion,namely Timed Safety Automata is introduced in[HNSY94]to specify progress properties using local invariant conditions.Due to its simplicity,Timed Safety Au-tomata has been adopted in several verification tools for timed automata e.g.U PPAAL [LPY97]and Kronos[Yov97].In this presentation,we shall focus on Timed Safety Au-tomata,and following the literature,refer them as Timed Automata or simply automata when it is understood from the context.The rest of the chapter is organized as follows:In the next section,we describe the syn-tax and operational semantics of timed automata.The section also addresses decision problems relevant to automatic verification.In the literature,the decidability and unde-cidability of such problems are often considered to be the fundamental properties of a computation model.Section3presents the abstract version of the operational semantics based on regions and zones.Section4describes the data structure DBM(DifferenceBound Matrices)for the efficient representation and manipulation of zones,and opera-tions on zones,needed for symbolic verification.Section 5gives a brief introduction to the verification tool U PPAAL .Finally,as an appendix,we list the pseudo-code for the presented DBM algorithms.2Timed AutomataA timed automaton is essentially a finite automaton (that is a graph containing a finite set of nodes or locations and a finite set of labeled edges)extended with real-valued variables.Such an automaton may be considered as an abstract model of a timed sys-tem.The variables model the logical clocks in the system,that are initialized with zero when the system is started,and then increase synchronously with the same rate.Clock constraints i.e.guards on edges are used to restrict the behavior of the automaton.A transition represented by an edge can be taken when the clocks values satisfy the guard labeled on the edge.Clocks may be reset to zero when a transition is taken.The first example Fig.1(a)is an example timed automaton.The timing behavior of the automaton is controlled by two clocks and .The clock is used to control theself-loop in the location loop .The single transition of the loop may occur when.Clock controls the execution of the entire automaton.The automaton may leave start at any time point when is in the interval between 10and 20;it can go from loop to end when is between 40and 50,etc.x==1x:=0work10<=y<=20y:=0x==1x:=0work 10<=y y:=0(a)(b)Fig.1.Timed Automata and Location InvariantsTimed Büchi Automata A guard on an edge of an automaton is only an enabling con-dition of the transition represented by the edge;but it can not force the transition to be taken.For instance,the example automaton may stay forever in any location,justidling.In the initial work by Alur and Dill[AD90],the problem is solved by introduc-ing Büchi-acceptance conditions;a subset of the locations in the automaton are marked as accepting,and only those executions passing through an accepting location infinitely often are considered valid behaviors of the automaton.As an example,consider again the automaton in Fig.1(a)and assume that end is marked as accepting.This implies that all executions of the automaton must visit end infinitely many times.This imposes implicit conditions on start and loop.The location start must be left when the value of is at most20,otherwise the automaton will get stuck in start and never be able to enter end.Likewise,the automaton must leave loop when is at most50to be able to enter end.Timed Safety Automata A more intuitive notion of progress is introduced in timed safety automata[HNSY94].Instead of accepting conditions,in timed safety automata,loca-tions may be put local timing constraints called location invariants.An automaton may remain in a location as long as the clocks values satisfy the invariant condition of the location.For example,consider the timed safety automaton in Fig.1(b),which corre-sponds to the Büchi automaton in Fig.1(a)with end marked as an accepting location. The invariant specifies a local condition that start and end must be left when is at most20and loop must be left when is at most50.This gives a local view of the timing behavior of the automaton in each location.In the rest of this chapter,we shall focus on timed safety automata and refer such au-tomata as Timed Automata or simply automata without confusion.2.1Formal SyntaxAssume afinite set of real-valued variables ranged over by etc.standing for clocks and afinite alphabet ranged over by etc.standing for actions.Clock Constraints A clock constraint is a conjunctive formula of atomic constraints of the form or for and.Clock constraints will be used as guards for timed automata.We use to denote the set of clock constraints,ranged over by and also by later.Definition1(Timed Automaton)A timed automaton is a tuple where –is afinite set of locations(or nodes),–is the initial location,–is the set of edges and–assigns invariants to locationsWe shall write when.As in verification tools e.g.U PPAAL[LPY97],we restrict location invariants to con-straints that are downwards closed,in the form:or where is a natural number.Concurrency and Communication To model concurrent systems,timed automata can be extended with parallel composition.In process algebras,various parallel com-position operators have been proposed to model different aspects of concurrency(see S and CSP[Mil89,Hoa78]).These algebraic operators can be adopted in timed automata.In the U PPAAL modeling language[LPY97],the CCS parallel composition operator[Mil89]is used,which allows interleaving of actions as well as hand-shake synchronization.The precise definition of this operator is given in Section5. Essentially the parallel composition of a set of automata is the product of the automata. Building the product automaton is an entirely syntactical but computationally expensive operation.In U PPAAL,the product automaton is computed on-the-fly during verifica-tion.2.2Operational SemanticsThe semantics of a timed automaton is defined as a transition system where a state or configuration consists of the current location and the current values of clocks.There are two types of transitions between states.The automaton may either delay for some time (a delay transition),or follow an enabled edge(an action transition).To keep track of the changes of clock values,we use functions known as clock assign-ments mapping to the non-negative reals.Let denote such functions,and use to mean that the clock values denoted by satisfy the guard.For,let denote the clock assignment that maps all to,and for,letdenote the clock assignment that maps all clocks in to0and agree with for the other clocks in.Definition2(Operational Semantics)The semantics of a timed automaton is a tran-sition system(also known as a timed transition system)where states are pairs, and transitions are defined by the rules:–if and for a non-negative real–if and2.3Verification ProblemsThe operational semantics is the basis for verification of timed automata.In the follow-ing,we formalize decision problems in timed automata based on transition systems.Language Inclusion A timed action is a pair,where is an action taken by an automaton after time units since has been started.The absolute timeis called a time-stamp of the action.A timed trace is a(possibly infinite)sequence of timed actions where for all.Definition3A run of a timed automaton with initial stateover a timed trace is a sequence of transitions:satisfying the condition for all.The timed language is the set of all timed traces for which there exists a run of over.Undecidability The negative result on timed automata as a computation model is that the language inclusion checking problem i.e.to check is undecidable [AD94,ACH94].Unlikefinite state automata,timed automata is not determinizable in general.Timed automata can not be complemented either,that is,the complement of the timed language of a timed automaton may not be described as a timed automaton. The inclusion checking problem will be decidable if in checking is restricted to the deterministic class of timed automata.Research effort has been made to characterize interesting classes of determinizable timed systems e.g.event-clock au-tomata[AFH99]and timed communicating sequential processes[YJ94].Essentially, the undecidability of language inclusion problem is due to the arbitrary clock reset.If all the edges labeled with the same action symbol in a timed automaton,are also labeled with the same set of clocks to reset,the automaton will be determinizable.This covers the class of event-clock automata[AFH99].We may abstract away from the time-stamps appearing in timed traces and define the untimed language as the set of all traces in the form for which there exists a timed trace in the timed language of.The inclusion checking problem for untimed languages is decidable.This is one of the classic results for timed automata[AD94].Bisimulation Another classic result on timed systems is the decidability of timed bisimulation[Cer92].Timed bisimulation is introduced for timed process algebras[Yi91]. However,it can be easily extended to timed automata.Definition4A bisimulation over the states of timed transition systems and the al-phabet,is a symmetrical binary relation satisfying the following condition: for all,if for some and,then and for some.Two automata are timed bisimilar iff there is a bisimulation containing the initial states of the automata.Intuitively,two automata are timed bisimilar iff they perform the same action transition at the same time and reach bisimilar states.In[Cer92],it is shown that timed bisimula-tion is decidable.We may abstract away from timing information to establish bisimulation between au-tomata based actions performed only.This is captured by the notion of untimed bisim-ulation.We define if for some real number.Untimed bisimulation is defined by by replacing the alphabet with in Definition4.As timed bisimula-tion,untimed bisimulation is decidable[LW97].Reachability Analysis Perhaps,the most useful question to ask about a timed automa-ton is the reachability of a givenfinal state or a set offinal states.Suchfinal states may be used to characterize safety properties of a system.Definition5We shall write if for some. For an automaton with initial state,,is reachable iff. More generally,given a constraint we say that the configuration is reachable if is reachable for some satisfying.The notion of reachability is more expressive than it appears to be.We may specify invariant properties using the negation of reachability properties,and bounded liveness properties using clock constraints in combination with local properties on locations [LPY01](see Section5for an example).The reachability problem is decidable.In fact,one of the major advances in verification of timed systems is the symbolic technique[Dil89,YL93,HNSY94,YPD94,LPY95],de-veloped in connection with verification tools.It adopts the idea from symbolic model checking for untimed systems,which uses boolean formulas to represent sets of states and operations on formulas to represent sets of state transitions.It is proven that the infinite state-space of timed automata can befinitely partitioned into symbolic states using clock constraints known as zones[Bel57,Dil89].A detailed description on this is given in Section3and4.3Symbolic Semantics and VerificationAs clocks are real-valued,the transition system of a timed automaton is infinite,which is not an adequate model for automated verification.3.1Regions,Zones and Symbolic SemanticsThe foundation for the decidability results in timed automata is based on the notion of region equivalence over clock assignments[AD94,ACD93].Definition6(Region Equivalence)Let be a function,called a clock ceiling,map-ping each clock to a natural number(i.e.the ceiling of).For a realnumber,let denote the fractional part of,and denote its integer part.Two clock assignments are region-equivalent,denoted,iff1.for all,either or both and,2.for all,if then iff and3.for all if and then iffNote that the region equivalence is indexed with a clock ceiling.When the clock ceil-ing is given by the maximal clock constants of a timed automaton under consideration, we shall omit the index and write instead.An equivalence class induced by is called a region,where denotes the set of clock assignments region-equivalent to.The basis for afinite partitioning of the state-space of a timed automaton is the follow-ing facts.First,for afixed number of clocks each of which has a maximal constant,the number of regions isfinite.Second,implies and are bisimilar w.r.t. the untimed bisimulation for any locaton of a timed automaton.We use the equivalence classes induced by the untimed bisimulation as symbolic(or abstract)states to construct afinite-state model called the region graph or region automaton of the original timed automaton.The transition relation between symbolic states is defined as follows:yxFig.2.Regions for a System with Two Clocks–if for a positive real number and–if for an action.Note that the transition relation isfinite.Thus the region graph for a timed automaton isfinite.Several verification problems such as reachability analysis,untimed language inclusion,language emptiness[AD94]as well as timed bisimulation[Cer92]can be solved by techniques based on the region construction.However,the problem with region graphs is the potential explosion in the number of re-gions.In fact,it is exponential in the number of clocks as well as the maximal constantsappearing in the guards of an automaton.As an example,consider Fig.2.Thefigure shows the possible regions in each location of an automaton with two clocks and. The largest number compared to is3,and the largest number compared to is2.In thefigure,all corner points(intersections),line segments,and open areas are regions. Thus,the number of possible regions in each location of this example is60.A more efficient representation of the state-space for timed automata is based on the notion of zone and zone-graphs[Dil89,HNSY92,YL93,YPD94,HNSY94].In a zone graph,instead of regions,zones are used to denote symbolic states.This in practice gives a coarser and thus more compact representation of the state-space.The basic operations and algorithms for zones to construct zone-graphs are described in Section4. As an example,a timed automaton and the corresponding zone graph(or reachability graph)is shown in Fig.3.We note that for this automaton the zone graph has only8 states.The region-graph for the same example has over50states.offx>10press?press?–ifWe shall study these operations in details in Section4where is written as up and as reset.It will be shown that the set of zones is closed un-der these operations,in the sense that the result of the operations is also a zone.Anotherimportant property of zones is that a zone has a canonical form.A zone is closed un-der entailment or just closed for short,if no constraint in can be strengthened without reducing the solution set.The canonicity of zones means that for each zone,there is a unique zone such that and have exactly the same solution set and is closed under entailment.Section4describes how to compute and representthe canonical form of a zone.It is the key structure for the efficient implementation of state-space exploration using the symbolic semantics.The symbolic semantics corresponds closely to the operational semantics in the sensethat implies for all,for some.More generally,the symbolic semantics is a correct and full characterization of the operational semantics given in Definition2.Theorem1Assume a timed automaton with initial state.1.(soundness)implies for all.2.(Completeness)implies for somesuch thatThe soundness means that if the initial symbolic state may lead to a set of final states according to,all thefinal states should be reachable according to the concrete operational semantics.The completeness means that if a state is reachable according to the concrete operational semantics,it should be possible to conclude this using the symbolic transition relation.Unfortunately,the relation is infinite,and thus the zone-graph of a timed automatonmay be infinite,which can be a problem to guarantee termination in a verification pro-cedure.As an example,consider the automaton in Fig.4.The value of clock drifts away unboundedly,inducing an infinite zone-graph.The solution is to transform(i.e.normalize)zones that may contain arbitrarily large constants to their representatives in a class of zones whose constants are bounded by fixed constants e.g.the maximal clock constants appearing in the automaton,using an abstraction technique similar to the widening operation[Hal93].The intuition is that once the value of a clock is larger than the maximal constant in the automaton,it is no longer important to know the precise value of the clock,but only the fact that it is above the constant.3.2Zone-Normalization for Automata without Difference ConstraintsIn the original theory of timed automata[AD94],difference constraints are not allowed to appear in the guards.Such automata(whose guards contain only atomic constraints instartx<=10endx==10x:=0x<z+1, z<y+1Fig.6.A counter example(a)Zones without normalization(b)Zones normalized with-normalizationFig.7.Zones for the counter example in Fig.6Note that at and,the normalized and un-normalized zones are identical.The problem is at where the intersection of the guard(on the only outgoing edge)with the un-normalized zone is empty and non-empty with the normalized zone.3.3Zone-Normalization for Automata with Difference ConstraintsOur definition of timed automata(Definition1)allows any clock constraint to appear in a guard,which may be a difference constraint in the form of.Such automata are indeed needed in many applications e.g.to model scheduling problems[FPY02]. It is shown that an automaton containing difference constraints can be transformed to an equivalent diagonal-free automaton[BDGP98].However,the transformation is not applicable since it is based on the region construction.Besides,it is impractical to im-plement such an approach in a tool.Since the transformation modifies the model before analysis,it is difficult to trace debugging information provided by the tool back to the original model.In[Ben02,BY03],a refined normalization algorithm is presented for automata that may have guards containing difference constraints.The algorithm transforms DBMs accord-ing to not only the maximal constants of clocks but also difference constraints appearing in the automaton under consideration.Note that the difference constraints correspond to the diagonal lines which split the entire space of clock assignments.Afiner partitioning is needed.We present the semantical characterization for the refined normalization operation based on a refined version of the region equivalence from Definition6.Definition10(Normalization Using Difference Constraints)Let stand for afinite set of difference constraints of the form for,and ,and for a clock ceiling.Two clock assignments are equivalent,denotedif the following holds:–and–for all,iff.The semantics of the refined-normalization operation on zones is defined as follows:normNote that the refined region equivalence is indexed by both a clock ceiling and afinite set of difference constraints,and so is the normalization operation.Since the number of regions induced by isfinite and there are onlyfinitely many constraints in,inducesfinitely many equivalence classes.Thus for any given zone,norm is well-defined in the sense that it contains only afinite set of equivalence classes though the set may not be a convex zone,and it can be computed effectively according to the refined regions.In general,norm is a non-convex zone,which can be implemented as the union of afinite list of convex zones.The next section will show how to compute this efficiently.The refined zone-normalization gives rise to afinite characterization for.Definition11norm if.The following states the correctness andfiniteness of.Theorem3Assume a timed automaton with initial state,whose maximal clock constants are bounded by a clock ceiling,and whose guards contain only afinite set of difference constraints denoted.1.(soundness)implies for allsuch that for all.2.(Completeness)with for all impliesfor some such that3.(Finiteness)The transition relation isfinite.3.4Symbolic Reachability AnalysisModel-checking concerns two types of properties liveness and safety.The essential algorithm of checking liveness properties is loop detection,which is computationally expensive.The main effort on verification of timed systems has been put on safety properties that can be checked using reachability analysis by traversing the state-space of timed automata.P ASSED W AITwhile W AIT dotake from W AITif then return“YES”if for all P ASSED thenadd to P ASSEDfor all such that doadd to W AITend forend ifend whilereturn“NO”The algorithm computes the transitive closure of step by step,and at each step, checks if the reached zones intersect with.From Theorem2,it follows that the algo-rithm will return with a correct answer.It is also guaranteed to terminate becauseisfinite.As mentioned earlier,for a given timed automaton with afixed set of clocks whose maximal constants are bounded by a clock ceiling,and afixed set of diago-nal constraints contained in the guards,the number of all possible normalized zones is bounded because a normalized zone can not contain arbitrarily large or arbitrarily small constants.In fact the smallest possible zones are the refined regions.Thus the whole state-space of a timed automaton can only be partitioned intofinitely many symbolic states and the worst case is the size of the region graph of the automaton,induced by the refined region equivalence.Therefore,the algorithm is working on afinite structure and it will terminate.Algorithm1also highlights some of the issues in developing a model-checker for timed automata.Firstly,the representation and manipulation of states,primarily zones,is cru-cial to the performance of a model-checker.Note that in addition to the operations to compute the successors of a zone according to,the algorithm uses two more op-erations to check the emptiness of a zone as well as the inclusion between two zones. Thus,designing efficient algorithms and data-structures for zones is a major issue in developing a verification tool for timed automata,which is addressed in Section4.Sec-ondly,P ASSED holds all encountered states and its size puts a limit on the size of sys-tems we can verify.This raises the research challenges e.g.state compression[Ben02], state-space reduction[BJLY98]and approximate techniques[Bal96].4DBM:Algorithms and Data StructuresThe preceding section presents the key elements needed in symbolic reachability anal-ysis.Recall that the operations on zones are all defined in terms of sets of clock assign-ments.It is not clear how to compute the result of such an operation.In this section,we describe how to represent zones,compute the operations and check properties on zones. Pseudo code for the operations is given in the appendix.4.1DBM basicsRecall that a clock constraint over is a conjunction of atomic constraints of the form and where,and.A zone denoted by a clock constraint is the maximal set of clock assignments satisfying. The most important property of zones is that they can can be represented as matrices i.e.DBMs(Difference Bound Matrices)[Bel57,Dil89],which have a canonical repre-sentation.In the following,we describe the basic structure and properties of DBMs. To have a unified form for clock constraints we introduce a reference clock with the constant value0.Let.Then any zone can be rewritten as a conjunction of constraints of the form for,and.Naturally,if the rewritten zone has two constraints on the same pair of variables only the intersection of the two is significant.Thus,a zone can be represented using at most atomic constraints of the form such that each pair of clocks is mentionedonly once.We can then store zones using matrices where each element in the matrix corresponds to an atomic constraint.Since each element in such a matrixrepresents a bound on the difference between two clocks,they are named Difference Bound Matrices(DBMs).In the following presentation,we use to denote element in the DBM representing the zone.To construct the DBM representation for a zone,we start by numbering all clocks in as and the index for is0.Let each clock be denoted by one row in the matrix.The row is used for storing lower bounds on the difference between the clock and all other clocks,and thus the corresponding column is used for upper bounds.The elements in the matrix are then computed in three steps.–For each constraint of,let.–For each clock difference that is unbounded in,let.Where is a special value denoting that no bound is present.–Finally add the implicit constraints that all clocks are positive,i.e.,and that the difference between a clock and itself is always0,i.e..As an example,consider the zone.To construct the matrix representation of,we number the clocks in the order.The resulting matrix representation is shown below:To manipulate DBMs efficiently we need two operations on bounds:comparison and addition.We define that,if and .Further we define addition as,and.Canonical DBMs Usually there are an infinite number of zones sharing the same solu-tion set.However,for each family of zones with the same solution set there is a unique constraint where no atomic constraint can be strengthened without losing solutions. To compute the canonical form of a given zone we need to derive the tightest constraint on each clock difference.To solve this problem,we use a graph-interpretation of zones.A zone may be transformed to a weighted graph where the clocks in are nodes and the atomic constraints are edges labeled with bounds.A constraint in the form of will be converted to an edge from node to node labeled with, namely the distance from to is bounded by.。
抽象神经自动机演化过程中熵极限性质
又叩¨抽象神经自动机演化过程中熵极限性质１西广成中冒科学院自葫化研究所．北京，１０００８０擒要：在关于复杂系统理论和神经码络理论的研究中，笔者提出了抽象神经自动机理论…圳”，本文探讨抽象神经自动机演化过程中的熵极限性质，给出了有普遍意义的演化定理－关ｔ词：抽象神经自动机Ｇｉｂｂｓ测度熵演化定理ＡｂｓｔｒａｃｔＮｅｕｒａｌＡｕｔｏｍａｔａ：ＰｒｏｐｅｒｔｙｏｆＥｎｔｒｏｐｉｃＬｉｍｉｔｏｆＥｖｏｌｕｔｉｏｎａｒｙＰｒｏｃｅｓｓＸｉＧｕａｎｇｃｈｅｎｇＩｎｓｔｉｔｕｌｅｏｆＡｕｔｏｍａｔｉｏｎ．ＣｈｉｎｅｓｅＡｅｏｄｅｍｙｏｆＳｃｉｅｎｃｅ，Ｂｅｉｊｉｎｇ．Ｃｈｉｎａ，ｌ０００８０ｏｆｐ，ｅｕｒａｌｎ吐ｗｏｒｋ＇ｔｈ。
ＡｂｓｔｒａｃｔＩｎｓｌｕｄ如ｎｇｆｏｒｔｈｅｔｈｅｏｒｙｏｆｅｏｍｐｌｅｘｓｙｓｔｅｍａｎｄｔｈｅｔｈｅｏｒｙｎ％ｒａｌａｍｏｍａｔａｉｓｐｒｏｐｏｓｅｄｂｙｔｈｅａｕｔｈ。
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ｔｈｅｏ“ｊｏｆａｂｓｔｒａｃｔｔｈｅｏｒｅｍｗｈｉｃｈｌｉｍｉｔｏｆａｂｍｒａｃｌｎｅｕｎＩａｕｔｏｍａｔａｉｓｉｎｑｕｉｒｅｄｉｎｔｏｉｎｔｈｉｓｐａｐｅｒ．ｇｉｖｉｎｇｅｖｏｌｕｔｉｏｎａｒｙｉｓｏｆｕｎｉｖｅｒｓａｌｓｉｇｎｉｆｉｃａｎｃｅａｕｔｏｍａｔａ．Ｇｉｂｂｓｒｔｌｅａｓｕｒｅｓ．Ｅｎｔｒｏｐｙ，ＥｖｏｌｕｔｉｏｎａｒｙｔｈｅｏｒｅｍＫｏｙｗｏｒｄｓＡｂｓｔｒａｃｔｎｅｕｒａｌ１．引言在关于复杂系统理沦和神经网络理论的研究巾，笔者提出了抽象神经自机理论·抽象神经自动机理论途径可对各种不同随机神经网络模型给出一种一般的描述和证明．抽象神经自动机是，０穷维开放的复杂系统，是认识和心维的机器．本文探讨抽豫神经自动机演化过程巾熵极限性质，给出了有普遍意义的演化定理．１ｑ寐｜，Ｉ然利学摧金资助深题－１Ｇ８·２．主要定义和结果定义Ｉ一个随机自动机ｄ定义为带有一个函数对（Ｆ，Ｇ）的集合三元！瞰Ｑ，ｙ，ｚ）口＝（（Ｑ，ｙ，ｚ），（Ｆ，Ｇ））（１）其中Ｑ是有限状态空间；Ｙ是输入有限集；ｚ是输出有限集；Ｆ：＇，×Ｑ２斗【Ｏ，ｌ】，使得Ｖｙ∈Ｙ，Ｖｑ∈Ｑ，有∑厂（ｙ，可，ｇ‘）＝１口’田Ｇ：Ｑ×ｚ—｝【０，１】，使得Ｖｑ∈Ｑ，有∑Ｇ（ｑ，：）＝１：∈Ｚ（２）（３）实际上，ｇ（ｙ，叮，ｑ’）表示输人为Ｙ时状态从ｇ到ｑ’的慨率；Ｇ（ｑ，ｚ）表示状态为ｑ时输出为ｚ的概率．定义２．一个随机自动机网络Ｓ定义为一个ｄ维神经（格点）集Ｔ。
元胞自动机理论基础
元胞自动机理论基础Chapter1元胞自动机(Cellular Automata，简称CA，也有人译为细胞自动机、点格自动机、分子自动机或单元自动机)。
是一时间和空间都离散的动力系统。
散布在规则格网 (Lattice Grid)中的每一元胞(Cell)取有限的离散状态，遵循同样的作用规则，依据确定的局部规则作同步更新。
大量元胞通过简单的相互作用而构成动态系统的演化。
不同于一般的动力学模型，元胞自动机不是由严格定义的物理方程或函数确定，而是用一系列模型构造的规则构成。
凡是满足这些规则的模型都可以算作是元胞自动机模型。
因此，元胞自动机是一类模型的总称，或者说是一个方法框架。
其特点是时间、空间、状态都离散，每个变量只取有限多个状态，且其状态改变的规则在时间和空间上都是局部的。
1. 自动机自动机(Automaton)通常指不需要人们逐步进行操作指导的设备(夏培肃，1984)。
例如，全自动洗衣机可按照预先安排好的操作步骤作自动地运行;现代计算机能自动地响应人工编制的各种编码指令。
完成各种复杂的分析与计算;机器人则将自动控制系统和人工智能结合，实现类人的一系列活动。
另一方面，自动机也可被看作为一种离散数字动态系统的数学模型。
例如，英国数学家A.M.Turing于1936年提出的图灵机就是一个描述计算过程的数学模型(TuringA M.，1936)。
它是由一个有限控制器、一条无限长存储带和一个读写头构成的抽象的机器，并可执行如下操作:·读写头在存储带上向左移动一格;·读写头在存储带上向右移动一格;·在存储的某一格内写下或清除一符号;·条件转移。
图灵机在理论上能模拟现代数字计算机的一切运算，可视为现代数字计算机的数学模型。
实际上，一切"可计算"函数都等价于图灵机可计算函数，而图灵机可计算函数类又等价于一般递归函数类。
根据存储带是否有限，可将自动机划分为有限带自动机(Finite Automaton)和无限带自动机(Infinite Automaton)。
基于时间贝叶斯Petri网的溯因故障诊断
常 见的故障诊断方法
的情况下 ， 一般 能够 获得 较为准确 的诊 断结果 。然而 ， 当复杂系 统 中的多个 内部元件同时或 次序地发 生故 障时 ， 一个较短 时 在
间区间 内产生的大量告警信 息给故 障诊 断带来 了新 的问题 ： 监
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时间序列主题模式
Abstract. Recently, the research on efficient extraction of previously unknown, frequently appearing patterns in a time-series data has received much attention. These patterns are called ‘motifs’. Motifs are useful for various time-series data mining tasks. In this paper, we propose a motif discovery algorithm to extract a motif that represents a characteristic pattern of the given data based on Minimum Description Length (MDL) principle. In addition, the algorithm can extract motifs from multi-dimensional time-series data by using Principal Component Analysis (PCA). In experimental evaluation, we show the efficiency of the motif discovery algorithm, and the usefulness of extracted motifs to various data mining tasks. Keywords: time-series motifs, multi-dimensional time-series data, PCA, MDL principle
计算传热学
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∂ 2φ ∂x 2
4
iv. 频谱法（spectral schemes） v. 边界元法(boundary element methods) vi. 分区自动化(cellular automata) 不同的方法影响精度，求解问题的难度，编程和调试的难度，计算的速度。 精度越高，涉及的网点就越多，系数矩阵就越大，需要的内存就越高，由此 不得不使用粗网格，结果反而影响精度。目前一般二阶精度为最佳选择。
5
1.2.4 空间区域的离散化
i. 计算区域(domain)
ii. 网格(grid)
iii. 网格线(grid line)
iv. 格子（cell）
v. 节点(grid pointer，node, center node) • 计算节点（computational node, FDM） • 节点（FVM）
vi. 控制容积(control volume，CV)
vii. 界面(face)
1.2.5 数值网格（numerical grid）
i. 结构化网格(structured grid)或称规则网格(regular grid) • 网格线：自己不交，以其它线只交一次。 • 节点可用一组坐标下标唯一表示， 例（i,j,k） • 相邻节点坐标用 ±1 表示 优点：使用广泛 缺点：只适合几何简单的计算区域
Jitter Analysis
What is Jitter
• 1. The deviation of a signal transition from its ideal position in time, or… • 2. The timing variation from transition to transition, or… • 3. As the short-term variations of a digital signal’s significant instants from their ideal positions in time.
Periodic Jitter
• • Jitter that repeats in a cyclic fashion is called periodic jitter. Typically caused by external deterministic noise sources coupling into system, such as switching-power-supply noise or a strong local RF carrier. It may also be caused by an unstable clock-recovery PLL
Period Jitter, Cycle-cycle Jitter, and TIE
Period Jitter
Cycle To Cycle Jitter
Digital Jitter Measurement Period Jitter
Jitter Statistics
• TIE of the signal in Figure 3.2b is modulated by the triangle wave depicted in Figure 3.2c • Figure 3.2d is the time trend (jitter vs. time)
Methods and systems for jitter minimization in str
专利名称：Methods and systems for jitter minimizationin streaming media发明人：Luis Ortiz申请号：US10242776申请日：20020913公开号：US20040052209A1公开日：20040318专利内容由知识产权出版社提供专利附图：摘要：A method and system for avoiding variance in transmission times of real-time,packet-based communications is disclosed. Transmissions such as voice andvideoconferencing generally require a substantially constant delivery rate in order to besatisfactory to end users. When occurring via a packet-based network, such transmissions often experience unacceptable levels of variation in delay in their transmission times, and this variation in delay is known as jitter. One cause of jitter relates to collisions between packets generated by a first source and sent via a packet transport medium and other packets, generated by one or more other sources and transmitted by the same transport medium. The method and system disclosed allow data sources to independently establish their respective transmission timings so as to avoid these collisions, without a need for a master clock shared between all of the data sources. By operating in such a peer-to-peer manner, the data sources establish a reduction in jitter in a manner that is reliable, efficient, inexpensive, scaleable, and easy to implement.申请人：ORTIZ LUIS更多信息请下载全文后查看。
relaxing the levels of discretization
relaxing the levels of discretizationAs a computer program, discretization plays an important role in data analysis and modeling. Discretization is the process of converting continuous data into discrete data by partitioning it into intervals or bins. However, in many cases, it is necessary to relax the levels of discretization in order to produce more accurate and meaningful results.One reason to relax the levels of discretization is to reduce the effect of noise on data analysis. Noise is random variation within data, which can cause distortion orincorrect results in analysis. By relaxing the levels of discretization, the amount of noise in the data is reduced, leading to more accurate results.Another reason to relax the levels of discretization is to increase the sensitivity of modeling techniques. A modelis a simplified representation of a real-world problem, andit is used to predict or explain behavior. In some cases, the levels of discretization may be too coarse or too fine to capture the true behavior of the model. By relaxing thelevels of discretization, new patterns may emerge that were previously overlooked. This can lead to a better understanding of the problem and more accurate predictions.Relaxing the levels of discretization is also useful in cases where data is missing or incomplete. Missing data is a common problem in data analysis, and it can be difficult to estimate the missing values accurately. By relaxing thelevels of discretization, missing data can be more easilyestimated, leading to more complete and accurate data sets.Overall, relaxing the levels of discretization is an important tool in data analysis and modeling. It can lead to more accurate and meaningful results, reduce the effect of noise, increase the sensitivity of modeling techniques, and improve the estimation of missing data. However, it is important to balance the levels of discretization with the complexity of the problem and the available computational resources.。
A state minimization technique for Timed Automata
The state space of a real-time system can result in an in nite number of states due to unbounded time values. For automatic analysis based on state space exploration, it is important to be able to nitely represent the state space of a real-time system. In this paper, we present an approach that produces a compact representation of the reachable state space of a real-time system. The algorithm yields a small state space, but still retains enough information for analysis. To avoid the state explosion which can be caused by simply adding time values to states, our approach rst uses history equivalence and transition bisimulation to collapse states into equivalent classes. To experiment with effectiveness of our approach, we have developed an automatic analysis tool called TREAT. This paper includes the experimental result on Fisher's mutual exclusion protocol.
Software Technology Timed Automata Semantics, Algorithms and Tools
International Institute for Software Technology
Timed Automata: Semantics, Algorithms and Tools
Johan Bengtsson and Wang Yi
September 2004
UNU-IIST Report No. 316
Wang Yi is a professor at the Division of Computer Systems, Department of Information Technology, Uppsala University, Box 337, 751 05 Uppsala, Sweden. He visited UNU-IIST for two months in 2003 working on this report. Email: yi@it.uu.se. Johan Bengtsson is at Uppsala University
UNU/IIST
International Institute for Software Technology
P.O. Box 3058 Macau
Timed Automata: Semantics, Algorithms and Tools
Johan Bengtsson and Wang Yi
Abstract
This report is to provide a tutorial and pointers to results and related work on timed automata with a focus on semantical and algorithmic aspects of verification tools. We present the concrete and abstract semantics of timed automata (based on transition rules, regions and zones), decision problems, and algorithms for verification. A detailed description on DBM (Difference Bound Matrices) is included, which is the central data structure behind several verification tools for timed systems. As an example, we give a brief introduction to the tool U PPAAL.
SVM with discriminative dynamic time alignment
SVM with discriminative dynamic time alignment 佚名【期刊名称】《哈尔滨工业大学学报（英文版）》【年(卷),期】2007(014)005【摘要】In the past several years, support vector machines (SVM) have achieved a huge success in many field, especially in pattern recognition. But the standard SVM cannot deal with length-variable vectors, which is one severe obstacle for its applications to some important areas, such as speech recognition and part-of-speech tagging. The paper proposed a novel SVM with discriminative dynamic time alignment (DDTA-SVM) to solve this problem. When training DDTA-SVM classifier, according to the category information of the training Samples, different time alignment strategies were adopted to manipulate them in the kernel functions, which contributed to great improvement for training speed and generalization capability of the classifier. Since the alignment operator was embedded in kernel functions, the training algorithms of standard SVM were still compatible in DDTA-SVM. In order to increase the reliability of the classification, a new classification algorithm was suggested. The preliminary experimental results on Chinese confusable syllables speech classification task show that DDTA-SVM obtains faster convergence speed and better classification performance than dynamic time alignment kernel SVM (DTAK-SVM).Moreover, DDTA-SVM also gives higher classificationprecision compared to the conventional HMM. This proves that the proposed method is effective, especially for confusable lengthvariable pattern classification tasks.【总页数】6页(P598-603)【关键词】支持向量机;动态时间对准;核函数;语音识别【正文语种】中文【中图分类】TP391.4;TP181因版权原因，仅展示原文概要，查看原文内容请购买。
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Discretization of Timed Automata in TimedµCRL`a la Regions and ZonesJan Friso Groote Michel A.Reniers Yaroslav enkoLaboratory for Quality Software,Department of Mathematics and Computer Science, Technical University of Eindhoven,P.O.Box513,5600MB Eindhoven,The Netherlands1IntroductionWe present thefirst step towards combining the best parts of the real-time verification methods based on timed automata(the use of regions and zones),and of the process-algebraic approach of languages like LOTOS andµCRL.µCRL targets the specification of system behavior in a process-algebraic(ACP)style and deals with data elements in the form of abstract data types.A timed automata specification is a parallel composition of timed automata.We use the existing results to translate it to a parallel composition of timedµCRL processes.This transla-tion uses a very simple sort Time to represent the real-time clock values.As a result we obtain a semantically equivalent specification in timedµCRL.As the next step in our scheme,we aim at replacing all parameters of sort Time occurring in the resulting process equation by parameters of discrete sorts.To achieve this goal we apply process-algebraic transformations and abstraction techniques to the given process equation. As a result we obtain a process equation that is closely related to the given one in the following sense.If we abstract from the fractional parts of the time stamps in the actions,both of the equations will be timed bisimilar.2Discretization Steps2.1Representing Timed Automata in TimedµCRLTimed automata[1,2]can be represented in timedµCRL by associating a recursion variable with each location of the automaton as follows(see[6]for the initial idea).Consider a timed automaton A=<L,l0,Σ,C,i,E>,where L is afinite set of locations,l0∈L is the initial location,Σis afinite set of edge labels,C is afinite set of clocks,i is a mapping that assigns to each location an invariant,and E is a set of edges.An edge is a quintuple(l,a e,φe,λe,l e)with l and l e∈L the start and end location of the edge,a e∈Σthe label of the edge,φe the guard associated with the edge andλe⊆C the set of clocks that are to be reset by the transition.All φ(e)and i(l)are formulas with the following syntax:c≡n|c1−c2≡n|φ1∧φ2,where ≡∈{<,≤,=,≥,>}and n∈Nat.The following timedµCRL process equation for X l is a translation of a location l∈L of a timed automaton A:X l(t a:Time,v:ClVals)=∑e∈E l∑t r:Timea e (t a+t r)·X le(t a+t r,v )sat inv l(v)∧sat inv l(v )∧sat cond e(v )∧sat inv le(v ) δ 0+∑t r:Timeδ (t a+t r) sat inv l(v)∧sat inv l(v ) δ 0where t a:Time represents the current absolute time;v:ClVals⊆C→Time represents the current values of the clocks(in relative time);E l⊆E is the set of outgoing edges from l with the elements of the form e=(l,a e,φe,λe,l e);v (c)=v(c)+t r represents the values of the clocks after time t r;v (c)=if(c∈λe,0,v (c))represents the values of the clocks after time t r and resetting the clocks fromλe.The condition sat inv l:ClVals→Bool is defined as sat inv l(v)=i(l)[ c:=v( c)];and the condition sat cond e:ClVals→Bool is defined as sat cond e(v)=φe[ c:=v( c)].In these two conditions the values v(c)are substituted for the clock variables c.This substitution is applied to both the location invariant formula i(l)and the guard formulaφe.The conditions sat inv l(v)and sat inv l(v )express that the invariant of location l has to hold in the start state of the transition and in the state just before the edge is taken.Condition sat cond e(v )expresses that the guard of the transition has to be satisfied at the moment theedge is taken,and condition sat inv le (v )means that the invariant of the end location of theedge has to be satisfied(after the clock resets are applied).2.2Splitting the Parameters into Integral and Fractional PartsFirst we split the parameters t a and v and the bound variable t r in two parts:integral and fractional.We make it a bit different from what an obvious split would be as:t r is the offset since t a i,not since t a.The parameter v is split into v i and l r f that represent an(approximate) integral value and the fractional part of the reset time of the clocks,respectively.To be more precise,this step can be characterized as the following coordinate transformation:t a i=fl(t a), t a f=fr(t a),v i=fl(v)+if(fr(t a)≥fr(v),0,1),and l r f=fr(t a−v),wherefland fr are thefloor and the fraction functions.In the other direction:t a=t a i+t a f and v=v i+t a f−l r f.The correspondence between the two t r is the following:t r=t r i+t r f−t a f,and t r i and t r f are the integral and the fractional parts of t r+fr(t a),respectively.The resulting process will look as:X l(t a i:Nat,t a f:Time,v i:ClValsN,l r f:ClVals)=∑e∈E l∑t r i:Nat∑t r f:Timea e (t a i+t r i+t r f)·X le(t a i+t r i,t r f,v i,l r f )t r f<1∧(t r f≥t a f∨t r i>0)∧sat inv l(v)∧sat inv l(v )∧sat cond e(v )∧sat inv le(v ) δ 0+∑t r i:Nat∑t r f:Timeδ (t a i+t r i+t r f) t r f<1∧(t r f≥t a f∨t r i>0)∧sat inv l(v)∧sat inv l(v ) δ 0where v i:ClValsN⊆C→Nat and l r f:ClVals are as defined above;v i(c)=v i(c)+t r i represents the value of v i after time t r i;v i(c)=if(c∈λe,0,v i(c))represents the value of v i after time t r i taking into account the clock resets;l r f (c)=if(c∈λe,t r f,l r f(c))represents the new fractional values of the times the clocks were last reset;v (c)=(v i(c)+t r i)+t r f−l r f(c)is the value of v (c)using the new coordinates,and v (c)=if(c∈λe,0,v (c))is calculated in the same way as in the previous section.Given the specific form of the clock constraints and the specific forms of v,v and v ,the functions in the conditions can be expressed as the conjunctions of the following formulas (some cases for the function sat inv l(v)):•for the case of c<n constraint,substituting the value of v(c)we get v i(c)+t a f−l r f(c)<n which is equivalent to v i(c)<n∨(v i(c)=n∧t a f<l r f(c));•for the case of c≤n constraint we get v i(c)+t a f−l r f(c)≤n which is equivalent to v i(c)<n∨(v i(c)=n∧t a f≤l r f(c));•for the case of c1−c2<n constraint we get(v i(c1)+t a f−l r f(c1))−(v i(c2)+t a f−l r f(c2))<n which is equivalent to(v i(c1)−v i(c2))−l r f(c1)+l r f(c2)<n,or equivalently (v i(c1)−v i(c2))<n∨((v i(c1)−v i(c2))=n)∧l r f(c1)>l r f(c2)).For the functions sat inv l(v )and sat cond e(v )we will get similar constraints,with v i(c)+t r i in place of v i(c)and t r f in place of t a f(due to the fact that v (c)=(v i(c)+t r i)+t r f−l r f(c)).Forthe function sat inv le (v )we apply a similar reasoning.We claim that X l(t a,v)and X l(fl(t a),fr(t a),fl(v)+if(fr(t a)≥fr(v),0,1),fr(t a−v))have the same solutions in every model of timedµCRL.2.3Splitting the Conditions into Integral and Fractional PartsIt is visible from the conditions that the actual values of the real-valued parameters(t a f and l r f)and the bound variable t r f are not important,but the relations between pairs of them may be.Therefore we introduce an abstraction of these parameters and try to use this abstraction instead of the real-valued parameters in the conditions.This corresponds to the use of regions in timed automata([1]).Let the set of clocks C be{1,...,n},and C0be C∪{0}.Each region will be characterized by an ordering p0<1p1<2···<n p n,where<k is either<or=,and p k is either l r f(p k),or it is t a f in case p k=0,and all p k are unique.We assume to have such a data type called Ord and the functions is cond:Ord×C0×C0→Bool for every possible condition<,≤,=,≥,>.It is also important to know the relation between t r f and the values of l r f.We assume a data type Pos to indicate the position of t r f in the ordering ord.We use the functionfits: Nat×Pos×Ord→Bool to check that the positionfits within the given ordering,and if the first parameter is0,then it checks whether t r f≥t a f.We can assume that l r f and t a f conform to ord in the initial state of X l and prove that it will be an invariant.The condition conform: Ord×Pos×Time×ClVals×Time→Bool says that conform(ord,pos,t a f,l r f,t r f)implies that t r f is less than1and has indeed the position pos in the ordering ord w.r.t.t a f and l r f.The resultingprocess X l will look as:X l(t a i:Nat,v i:ClValsN,ord:Ord,t a f:Time,l r f:ClVals)=∑e∈E l∑t r i:Nat∑pos:Pos(∑t r f:Timea e (t a i+t r i+t r f)·X le(t a i+t r i,v i,upd ord(ord,pos,λe),t r f,l r f ) conform(ord,pos,t a f,l r f,t r f) δ 0) fits(t r i,pos,ord)∧sat inv l(v i,t r i,ord)∧sat inv l(v i,t r i,ord,pos)∧sat cond e(v i,t r i,ord,pos)∧sat inv le(v i,t r i,ord,pos,λe) δ 0+∑t r i:Nat∑t r f:Time∑pos:Pos(∑t r f:Timeδ (t a i+t r i+t r f) conform(ord,pos,t a f,l r f,t r f) δ 0) fits(t r i,pos,ord)∧sat inv l(v i,t r i,ord)∧sat inv l(v i,t r i,ord,pos) δ 0where upd ord(ord,pos,λe)gives the new ordering based on the old one,the position of t r f and the clock resets.The order of the clocks that are not reset do not change;the new position of t a f and the clocks that are reset will be the position of t r f.The sat formulas(some cases for the function sat inv l(v))have the constraints that are defined as follows:•for the case of c<n constraint:if ord implies t a f<l r f(c),then v i(c)≤n,else v i(c)<n: thus if(is le(ord,0,c),v i(c)≤n,v i(c)<n);•for the case of c≤n constraint:if(is leq(ord,0,c),v i(c)≤n,v i(c)<n);•for the case of c1−c2<n:if(is le(ord,c2,c1),v i(c1)−v i(c2)≤n,v i(c1)−v i(c2)<n).We claim without further proof that X l(t a i,t a f,v i,l r f)and X l(t a i,v i,ord,t a f,l r f)are timed bisimilar for all parameters ord that conform with the actual values of t a f and l r f.2.4Abstraction from Fractional PartsSuppose we are not interested in the fractional parts of the action and the delta time stamps.E.g.we replace a e (t a i+t r i+t r f)by a e (t a i+t r i)in X l(we get rid of the boxed parts).The resulting process variable we call Y l.Now we apply sum elimination to Y l(cf.[5])in order to get rid of the summation with t r f and the condition conform.For this we use the fact that the Time domain is dense and for every t r i,pos,ord such thatfits(t r i,pos,ord)and for every admissible t a f and l r f there exists a t r f<1such that conform(ord,pos,t a f,l r f,t r f).As a result we obtain the process equation for Y l.Finally,we apply the parameter elimination to the last two parameters.As a result we get the following process equation for Y l:Y l(t a i:Nat,v i:ClValsN,ord:Ord)=∑e∈E l∑t r i:Nat∑pos:Posa e (t a i+t r i)·Y le(t a i+t r i,v i,upd ord(ord,pos,λe))fits(t r i,pos,ord)∧sat inv l(v i,t r i,ord)∧sat inv l(v i,t r i,ord,pos)∧sat cond e(v i,t r i,ord,pos)∧sat inv le(v i,t r i,ord,pos,λe) δ 0+∑t r i:Nat∑pos:Posδ (t a i+t r i)fits(t r i,pos,ord)∧sat inv l(v i,t r i,ord)∧sat inv l(v i,t r i,ord,pos) δ 0The transformations we apply here are known to be standard forµCRL equations[4].We claim without further proof that Y l,Y l and Y l are timed bisimilar.3Conclusions and Future WorkIn this paper we transformed a timedµCRL process equation representing a timed automaton into a closely related timedµCRL process equation with discrete parameters and bound vari-ables only.This could enable simulation and verification via enumeration of reachable states. As a result,some of the existing untimed analysis tools in theµCRL Toolset[3]could become applicable to the analysis of real-time systems.As the future step in our scheme we would like to make the parameters and the bound variablesfinite.To this end we apply a relativization technique to get rid of the absolute time parameter t a i.Due to the presence of the greatest constant in timed automata we can apply the abstract interpretation technique to limit both the integer values of the clocks v i and the integer relative time step t r i.As the next step we would like to factorize the remaining time-related parameters to be able to deal with them like with zones.Both regions and zones,as well as the operations on them could be specified as the abstract data types Region or Zone inµCRL,either as clock constraints or as difference-bound matrices.We could even go further,analyze where exactly we use the fact that we are dealing with timed automata and extend some of the results to a more general setting.References[1]R.Alur.Timed automata.In Proc.CAV’99,LNCS1633,pages8–22,1999.[2]J.Bengtsson and W.Yi.Timed automata:Semantics,algorithms and tools.Technical Report316,UNU-IIST,P.O.Box3058,Macau,September2004.[3]S.Blom,W.J.Fokkink,J.F.Groote,ngevelde,B.Lisser,and J.C.v.d.Pol.µCRL:Atoolset for analysing algebraic specifications.In G.Berry,on,and A.Finkel,editors,Proc CAV’01,volume2102of LNCS,pages250–254.Springer,2001.[4]J.F.Groote and puter assisted manipulation of algebraic process specifications.SIGPLAN Notices,37(12):98–107,2002.[5]J.F.Groote and M.A.Reniers.Algebraic process verification.In J.A.Bergstra,A.Ponse,andS.A.Smolka,editors,Handbook of Process Algebra,chapter17,pages1151–1208.Elsevier,2001.[6]T.A.C.Willemse.Semantics and Verification in Process Algebras with Data and Timing.PhDthesis,Eindhoven University of Technology,2003.。