MAX5711中文资料
MAX1771ESA+中文资料
MAX1771
Ordering Information
PART MAX1771CPA MAX1771CSA MAX1771C/D MAX1771EPA MAX1771ESA MAX1771MJA TEMP RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C -55°C to +125°C PIN-PACKAGE 8 Plastic DIP 8 SO Dice* 8 Plastic DIP 8 SO 8 CERDIP**
ELECTRICAL CHARACTERISTICS
(V+ = 5V, ILOAD = 0mA, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Input Voltage Range Minimum Start-Up Voltage Supply Current Standby Current Output Voltage (Note 1) Output Voltage Line Regulation (Note 2) Output Voltage Load Regulation (Note 2) Maximum Switch On-Time Minimum Switch Off-Time Efficiency tON(max) tOFF(min) V+ = 5V, VOUT = 12V, ILOAD = 500mA, Circuit of Figure 2a MAX1771C Reference Voltage VREF IREF = 0µA MAX1771E MAX1771M REF Load Regulation REF Line Regulation FB Trip Point Voltage VFB 0µA ≤ IREF ≤ 100µA 3V ≤ V+ ≤ 16.5V MAX1771C MAX1771E MAX1771M 1.4700 1.4625 1.4550 MAX1771C/E MAX1771M 1.4700 1.4625 1.4550 V+ = 16.5V, SHDN = 0V (normal operation) V+ = 10V, SHDN ≥ 1.6V (shutdown) V+ = 16.5V, SHDN ≥ 1.6V (shutdown) V+ = 2V to 12V, over full load range, Circuit of Figure 2a V+ = 5V to 7V, VOUT = 12V ILOAD = 700mA, Circuit of Figure 2a V+ = 6V, VOUT = 12V, ILOAD = 0mA to 500mA, Circuit of Figure 2a 12 1.8 11.52 SYMBOL CONDITIONS MAX1771 (internal feedback resistors) MAX1771C/E (external resistors) MAX1771MJA (external resistors) MIN 2.0 3.0 3.1 1.8 85 2 4 12.0 5 12.48 TYP MAX 12.5 16.5 16.5 2.0 110 5 V µA µA V mV/V V UNITS
DSC-CN5711
最大结温…………………...150℃ 存储温度…………………....－65℃ to 150℃ 焊接温度…………………...260℃
超出以上所列的极限参数可能造成器件的永久损坏。以上给出的仅仅是极限范围，在这样的极限条件下 工作，器件的技术指标将得不到保证，长期在这种条件下还会影响器件的可靠性。
输入电源
3
4
8
VCC VCC
CE
5 LED LED 6
CN5711
可调 电阻
RISET2
RISET1
1 ISET
GND 2
图5 用可变电阻调整发光二极管的亮度
6
REV 1.1
如韵电子 CONSONANCE
稳定性
通常情况下，在ISET管脚没有外加电容时，在此管脚可以接一个阻值最大为30K的电阻。如果在ISET管 脚有外接的电容，则在此管脚允许外接的电阻值会减小。为了保证电流回路的稳定性，ISET管脚外接电 阻，电容所形成的极点应高于300KHz。假设ISET管脚外接电容C，用下面的公式可以计算ISET管脚允许 外接的最大电阻值：
REV 1.1
如韵电子 CONSONANCE
典型应用电路：
图 1 典型应用电路
订购信息：
器件型号 CN5711
封装形式 SOP8
包装 盘装，每盘 2500 只
工作环境温度 －40℃ 到 85℃
功能框图：
CE ISET
Sc hmitt
VCC
+
电压基准源
电流镜
GND
图 2 功能框图
2
LED
REV 1.1
如韵电子 CONSONANCE
管脚描述：
序号.
MAX7221的资料
MAX7221的资料MAX72211 概述MAX7221 是Maxim（美信）公司专为LED 显示驱动而设计生产的串行接口八位LED 显示驱动芯片.该芯片包含有七段译码器、位和段驱动器、多路扫描器、段驱动电流调节器、亮度脉宽调节器及多个特殊功能寄存器.该芯片采用串行接口方式，可以很方便地和单片机相连，未经扩展最多可用于8 位数码显示或64 段码显示.经实际使用发现，该芯片具有占用单片机I/O 口少（仅三线）、显示多样、可靠性高、简单实用、编程灵活方便的特点.2 MAX7221 功能简介2.1 MAX7221 的功能特点（1）10MHz 的串行接口；（2）BCD 译码/非译码模式选择；（3）耗电仅150uA 的省电模式（显示关闭）；（4）数字和模拟双重亮度控制；（5）SPI、QSPI、Microwire 等多种串行接口；（6）显示位数可方便地进行扩展.2.2 MAX7221 引脚介绍（见图1）Din 脚，串行数据输入端，数据存入内部16 位移位寄存器.DIG0~DIG7 脚，8 位共阴极数码管的控制输入端，显示关闭时输出高电平.GND 脚，接地端，4 和9 脚都要接地.CS 脚，片选输入端，当CS=0 时，串行数据存入移位寄存器，当CS 为上升沿时锁存最后16 位数据.CLK 脚，串行时钟输入端，最高频率10MHz，在时钟上升沿数据移位存入内部移位寄存器，当时钟下降沿时，数据由Dout 输出，CLK 输入仅当CS=0 时有效.SEGA~SEGG，SEGDP 脚，数码管七段驱动和小数点驱动端，关闭显示时各段驱动输出为高电平.收稿日期：2003－11－20作者简介：张华林（1973－），男，福建诏安县人，讲师，学士.44漳州师范学院学报（自然科学版）2004 年Iset 脚，连接到Vdd 的电阻连接端，用来模拟设定各段驱动电流.Vdd 脚，5V 正电压输入端.Dout 脚，串行数据输出端，数据由Din 输入，经16.5 个时钟延迟后由Dout 引脚输出，此引脚用来扩展MAX7221.2.3 MAX7221 功能2.3.1 串行数据输入和控制寄存器串行数据输入输出时CS 必须为低电平，串行数据由Din 送入一个16 位的数据包，并在每个时钟上升沿时存入内部16 位移位寄存器.数据经16.5 个周期后，在时钟的下降沿由Dout 引脚输出.16 位数据D0~D15 的排列见表1.D0~D7 包含数据，D8~D11 包含寄存器地址，D12~D15 为未定义位，芯片最先接收D15 位.控制寄存器的地址图见表2.表1表22.3.2 省电模式MAX7221 允许工作在省电模式（显示关闭，见表3），在该模式下，供电电流可降低到150uA. 器件在这种模式下上电时，250us 内即可进入正常工作模式.在测试状态下，省电模式被屏蔽.表32.3.3 译码/非译码模式译码模式寄存器可以设置对每一位数字的BCD 译码模式或非译码模式，寄存器的每一位对应一个数字，高电平代表译码，低电平代表旁路译码器.见表4.当芯片处于译码模式时，数据位只有D0~D3 有效，D4~D6 位为无效位，D7 为小数点位，见表5.当芯片处于非译码模式时，数据D0~D7 位对应8 个笔划段，见表6.第1 期张华林:MAX7221 的原理与应用45 表4表5表62.3.4 亮度控制寄存器本芯片允许由外加在Vdd 和Iset 之间的电阻Rset 调节LED 亮度，Rset 阻值至少为9.53K，它也允许由亮度控制寄存器进行设置，通过设置每一笔划的扫描脉冲占空比达到调整亮度的目的，见表7.2.3.5 扫描位数控制寄存器扫描位数控制寄存器可以设置显示1~8 位（见表8），多路扫描器在显示8 位时典型的扫描频率为800Hz.显示位数减少时，扫描频率上升为8f/N（f 为扫描频率，N 为显示位数）.当显示位数为3 位、2 位、1 位时，Rset 应至少增大为15K、20K、40K.46漳州师范学院学报（自然科学版）2004 年表7表82.3.6 显示测试模式和空操作模式显示测试寄存器操作有两种模式：正常模式和显示测试模式（见表9）.显示测试时屏蔽所有功能设置，全部8 位的每一笔划的扫描脉冲占空比均为15/16.空操作模式用于芯片扩展，后面的芯片要显示的数据经过前面的芯片时，前面的芯片应处于空操作模式.表93 MAX7221 与PIC 单片机的连接MAX7221 与PIC16C73 单片机的接口电路如图2 所示，该电路是某型号打码机的显示部分电路，U1、U2、U3 分别用来显示打码速度、打码碳带温度、打码位置.U1、U2、U3 共占用7 个数码管，另有4 个指示灯，分别为工作指示、测试指示、温度过高报警指示、碳带用完报警指示.PIC 单片机的RC3、RC4、RC5 分别接MAX7221 的CLK、DATAIN、CS 引脚.本文介绍的显示电路应用于某型号打码机，经实践证明，其显示简单，运行可靠.该芯片还第1 期张华林:MAX7221 的原理与应用47 可以广泛应用于段曲线显示、工业控制、LED 矩阵显示等.图2。
MAX4211AETE中文资料
4V TO 28V
+ -
+ -
25:1
IOUT POUT
1.21V REFERENCE INHIBIT
REF
CIN1+
COUT1 CIN1LE CIN2+ COUT2
µMAX is a registered trademark of Maxim Integrated Products, Inc. Pin Configurations and Selector Guide appear at end of data sheet.
MAX4211A MAX4211B MAX4211C GND
CIN2-
Functional Diagrams continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
Functional Diagrams
+
VSENSE RSENSE LOAD RS+ VCC 2.7V TO 5.5V RS-
-
Applications
Overpower Circuit Breakers Smart Battery Packs/Chargers Smart Peripheral Control Short-Circuit Protection Power-Supply Displays Measurement Instrumentation Baseband Analog Multipliers VGA Circuits Power-Level Detectors
XOSM-571中文资料
ENABLE/ PACKAGE OPTIONS DISABLE CODE
For technical questions contact: frequency@
FREQUENCY
Document Number: 35061 Revision: 05-Mar-07
元器件交易网
Operating Temperature Storage Temperature Range Power Supply Voltage Aging (First Year)
TOPR TSTG VDD
25 ºC ± 3 ºC
0 ºC ~ 70 ºC (- 40 ºC ~ + 85 ºC option) - 55 ºC ~ + 125 ºC 1.8 V ± 10 % ± 5 ppm
Output Symmetry Rise Time Fall Time
Output Voltage
Output Load
HCMOS Load
Sym
Tr Tf VOH VOL
At 1/2 VDD 10 % VDD ~ 90 % VDD 90 % VDD ~ 10 % VDD
40/60 % (45/5 5% Option) 6 ns Max 6 ns Max
E ENABLE/DISABLE E = Disable to Tristate
50 M FREQUENCY/MHz
e4 JEDEC LEAD (Pb)-FREE STANDARD
GLOBAL PART NUMBER
X
O
1
7
C
T
E
C
N
A
5
0
M
MODEL
36
MAX15301数据手册中文版
MAX15301是一个全功能，高效，数字化的点负载（POL）操纵器与先进的电源治理和遥测功能与PID 为基础的数字电源稳压器，MAX15301采纳Maxim拥有专利的Intune的™自动补偿，状态空间操纵算法。
Intune 的操纵律是有效的小信号和大信号响应，占占空比饱和度的阻碍。
这排除需要用户以确信和设置的阈值从线性转换到非线性模式。
这些能力在快速环路的瞬态响应，并减少输出电容器的数量相较，竞争的模拟和数字操纵器。
MAX15301包括多种功能，以优化效率。
内部开关BabyBuck的稳压器可产生栅极驱动器和内部偏置电源，低功耗的操纵器。
一种先进的，高效率的MOSFET的栅极驱动器，具有自适应非重叠按时，而持续调整的高侧和低侧的按时和驱动电压的全范围内的电压，电流和温度，以尽可能减少开关损耗。
MAX15301设计最终客户的设计环境的初衷。
上的PMBus™兼容的串行总线接口进行通信的监控器监控和故障治理。
全套的电源治理功能，无需复杂和昂贵的测序和监控IC。
大体的DC-DC转换操作，可设置通过引脚搭接，并非需要用户配置固件。
这使得电源子系统的快速进展前完成板级系统的工程。
Maxim提供支持的硬件和软件配置MAX15301 ，MAX15301可在32引线，5mm×5mm TQFN封装，工作在-40°C至+85°C的温度范围内。
特点：的自动补偿功能能够确保稳固，同时优化瞬态性能2.在快速瞬态响应减少输出电容的非线性补偿结果3.差分远端电压传感许诺±1％V OUT精度在整个温度范围内（-40°C至+85°C）接口用于配置，操纵和监测5.支持电压定位6.提高效率（自适应非重叠时序驱动器）至14V的宽输入电压范围8.高效片上BabyBuck稳压器的自偏置9.输出电压范围从到10.进入预偏置输出启动11.可配置的软启动和软停止时刻12.固定工作频率同步（300kHz至1MHz）13.灵活的排序和故障治理14.引脚手动跳线配置（输出电压，从机地址，开关频率，电流限制）15.能够快速原型图表典型工作电路引脚名字功能1SYNC外部开关频率同步输入端。
1N5711;中文规格书,Datasheet资料
1/3®1N5711SMALL SIGNAL SCHOTTKY DIODEOctober 2001 - Ed: 1BSymbol ParameterValue Unit V RRM Repetitive Peak Reverse Voltage 70V I F Forward Continuous Current*T a = 25°C 15mA P tot Power Dissipation*T a = 25°C430mW T stg T j Storage and Junction Temperature Range- 65 to 200- 65 to 200°C T LMaximum Lead Temperature for Soldering during 10s at 4mm from Case230°CABSOLUTE RATINGS (limiting values)Symbol Test ConditionsValue Unit R th(j-a)Junction-ambient*400°C/WTHERMAL RESISTANCE* On infinite heatsink with 4mm lead length **Pulse test: t p ≤300µs δ<2%.Matched batches available on request. Test conditions (forward voltage and/or capacitance) according to customer specification.Symbol Test Conditions Min.Typ.Max.Unit V BR T amb = 25°C I R = 10µA 70V V F * *T amb = 25°C I F = 1mA 0.41VT amb = 25°CI F = 15mA 1I R * *T amb = 25°CV R = 50V0.2µASTATIC CHARACTERISTICSELECTRICAL CHARACTERISTICS Symbol Test Conditions Min.Typ.Max.Unit C T amb = 25°C V R = 0V f = 1MHz 2pF τT amb = 25°CI F = 5mAKrakauer Method100psDYNAMIC CHARACTERISTICSMetal to silicon junction diode featuring high break-down, low turn-on voltage and ultrafast switching.Primarly intended for high level UHF/VHF detec-tion and pulse application with broad dynamic range. Matched batches are available on requestDESCRIPTION1N5711Fig.1:Forward current versus forward voltage atlow level (typical values).Fig.2:Capacitance C versus reverse applied voltage V R (typical values).Fig.3:Reverse current versus ambient tempera-ture.Fig.4:Reverse current versus continuous reverse voltage (typical values).Cooling method : by convection and conductionMarking: clear, ring at cathode end.Weight: 0.15gInformation furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics© 2001 STMicroelectronics - Printed in Italy - All rights reserved.STMicroelectronics GROUP OF COMPANIESAustralia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.分销商库存信息: STM1N5711。
MAX9111中文资料
General DescriptionThe MAX9111/MAX9113 single/dual low-voltage differen-tial signaling (LVDS) receivers are designed for high-speed applications requiring minimum power consumption, space, and noise. Both devices support switching rates exceeding 500Mbps while operating from a single +3.3V supply, and feature ultra-low 300ps (max)pulse skew required for high-resolution imaging applica-tions such as laser printers and digital copiers.The MAX9111 is a single LVDS receiver, and the MAX9113 is a dual LVDS receiver.Both devices conform to the EIA/TIA-644 LVDS standard and convert LVDS to LVTTL/CMOS-compatible outputs.A fail-safe feature sets the outputs high when the inputs are undriven and open, terminated, or shorted. The MAX9111/MAX9113 are available in space-saving 8-pin SOT23 and SO packages. Refer to the MAX9110/MAX9112 data sheet for single/dual LVDS line drivers.________________________ApplicationsFeatureso Low 300ps (max) Pulse Skew for High-Resolution Imaging and High-Speed Interconnecto Space-Saving 8-Pin SOT23 and SO Packages o Pin-Compatible Upgrades to DS90LV018A and DS90LV028A (SO Packages Only)o Guaranteed 500Mbps Data Rateo Low 29mW Power Dissipation at 3.3V o Conform to EIA/TIA-644 Standard o Single +3.3V Supplyo Flow-Through Pinout Simplifies PC Board Layout o Fail-Safe Circuit Sets Output High for Undriven Inputso High-Impedance LVDS Inputs when Powered OffMAX9111/MAX9113Single/Dual LVDS Line Receivers withUltra-Low Pulse Skew in SOT23________________________________________________________________Maxim Integrated Products 1≥Pin Configurations/Functional Diagrams/Truth Table19-4802; Rev 0; 7/00For free samples and the latest literature, visit or phone 1-800-998-8800.For small orders, phone 1-800-835-8769.Ordering InformationLaser Printers Digital Copiers Cellular Phone Base Stations Telecom Switching EquipmentNetwork Switches/Routers LCD DisplaysBackplane Interconnect Clock DistributionTypical Operating Circuit appears at end of data sheet.M A X 9111/M A X 9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT232_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS(V CC = +3.0V to +3.6V, magnitude of input voltage, |V ID | = +0.1V to +1.0V, V CM = |V ID |/2 to (2.4V - (|V ID |/2)), T A = -40°C to +85°C.Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V CC to GND..............................................................-0.3V to +4V IN_ _ to GND .........................................................-0.3V to +3.9V OUT_ _ to GND...........................................-0.3V to (V CC + 0.3V)ESD Protection All Pins(Human Body Model, IN_+, IN_-)..................................±11kV Continuous Power Dissipation (T A = +70°C)8-Pin SOT23 (derate 7.52mW/°C above +70°C)..........602mW8-Pin SO (derate 5.88mW°C above +70°C).................471mW Operating Temperature RangesMAX911_E.......................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°CMAX9111/MAX9113Single/Dual LVDS Line Receivers withUltra-Low Pulse Skew in SOT23_______________________________________________________________________________________3T A = +25°C.Note 2:Current into the device is defined as positive. Current out of the devices is defined as negative. All voltages are referencedto ground except V TH and V TL .Note 3:Guaranteed by design, not production tested.Note 4:AC parameters are guaranteed by design and characterization.Note 5:C L includes probe and test jig capacitance.Note 6:f MAX generator output conditions: t R = t F < 1ns (0% to 100%), 50% duty cycle, V OH = 1.3V, V OL = 1.1V.Note 7:t SKD1is the magnitude difference of differential propagation delays in a channel. t SKD1= |t PLHD - t PHLD |.Note 8:t SKD2is the magnitude difference of the t PLHD or t PHLD of one channel and the t PLHD or t PHLD of the other channel on thesame device.Note 9:t SKD3is the magnitude difference of any differential propagation delays between devices at the same V CC and within 5°Cof each other.Note 10:t SKD4, is the magnitude difference of any differential propagation delays between devices operating over the rated supplyand temperature ranges.Test Circuit DiagramsM A X 9111/M A X 9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT234_______________________________________________________________________________________Figure 1. Receiver Propagation Delay and Transition Time Test CircuitFigure 2. Receiver Propagation Delay and Transition Time WaveformsMAX9111/MAX9113Single/Dual LVDS Line Receivers withUltra-Low Pulse Skew in SOT23_______________________________________________________________________________________5Typical Operating Characteristics(V CC = 3.3V, |V ID | = 200mV, V CM = 1.2V, f IN = 200MHz, C L = 15pF, T A = +25°C and over recommended operating conditions unless otherwise specified.)3.03.23.13.33.43.53.6SUPPLY VOLTAGE (V)O U T P U T H I G H V O L T A G E (V )OUTPUT HIGH VOLTAGE vs. SUPPLY VOLTAGE2.52.72.62.82.93.03.13.23.33.43.53.63.73.03.23.33.13.43.53.6SUPPLY VOLTAGE (V)O U T P U T L O W V O L T A G E (m V )OUTPUT LOW VOLTAGE vs. SUPPLY VOLTAGE1301201101009048585368637873833.0 3.2 3.33.1 3.4 3.53.6SUPPLY VOLTAGE (V)O U T P U T S H O R T -C I R C U I T C U R R E N T (m A )OUTPUT SHORT-CIRCUIT CURRENTvs. SUPPLY VOLTAGE1416201822243.03.23.13.33.43.53.6SUPPLY VOLTAGE (V)D I F FE R E N T I A L T H R E S H O L D V O L T A G E (m V )DIFFERENTIAL THRESHOLD VOLTAGEvs. SUPPLY VOLTAGE0.010.11101001000FREQUENCY (MHz)P O W E R -S U P P L Y C U R R E N T (m A )0201040305060MAX9113 POWER-SUPPLY CURRENTvs. FREQUENCY-4010-15356085TEMPERATURE (°C)P O W E R -S U P P L Y C U R R E N T (m A )POWER-SUPPLY CURRENTvs. TEMPERATURE6.56.76.66.86.97.07.17.27.37.47.57.67.71.501.601.551.651.701.751.801.851.901.952.002.052.103.03.13.23.43.3 3.53.6DIFFERENTIAL PROPAGATION DELAYvs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)D I F FE R E N T I A L P R O P A G A T I O N D E L A Y (n s )1.501.601.551.651.751.701.801.851.902.001.952.052.102.152.20-40-1510356085DIFFERENTIAL PROPAGATION DELAYvs. TEMPERATURETEMPERATURE (°C)D I F FE R E N T I A L P R O P A G A T I O N D E L A Y (n s )1201008060403.03.33.13.2 3.4 3.53.6DIFFERENTIAL PULSE SKEW vs. SUPPLY VOLTAGEM A X 9111 t o c 09SUPPLY VOLTAGE (V)D I F FE R E N T I A L S K E W (n s )M A X 9111/M A X 9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT236_______________________________________________________________________________________1.01.61.41.21.82.02.22.42.62.83.001000500150020002500DIFFERENTIAL PROPAGATION DELAY vs. DIFFERENTIAL INPUT VOLTAGEDIFFERENTIAL INPUT VOLTAGE (mV)D I F F E R E N T I A L P R O P A G A T I O N D E L A Y (n s )050150100200250-4010-15356085TEMPERATURE (°C)D I F FE R E N T I A L S K E W (p s )DIFFERENTIAL PULSE SKEWvs. TEMPERATURE1.61.81.72.01.92.12.201.01.50.52.02.53.0DIFFERENTIAL PROPAGATION DELAY vs. COMMON-MODE VOLTAGECOMMON-MODE VOLTAGE (V)D I F FE R E N T I A L P R O P A G A T I O N D E L A Y (n s )330430380530480630580680-4010-15356085TEMPERATURE (°C)T R A N S I T I O N T I M E (p s )TRANSITION TIME vs. TEMPERATURE1.51.91.72.32.12.52.72.93.1102025153035404550LOAD (pF)D I F FE R E N T I A L P R O P A G A T I O N D E L A Y (n s )DIFFERENTIAL PROPAGATION DELAYvs. LOADTypical Operating Characteristics (continued)2006001000140018002200102015253035404550TRANSITION TIME vs. LOADLOAD (pF)T R A N S I T I O N T I M E (p s )(V CC = 3.3V, |V ID | = 200mV, V CM = 1.2V, f IN = 200MHz, C L = 15pF, T A = +25°C and over recommended operating conditions,unless otherwise specified.)MAX9111/MAX9113Single/Dual LVDS Line Receivers withUltra-Low Pulse Skew in SOT23_______________________________________________________________________________________7_______________Detailed DescriptionLVDS InputsThe MAX9111/MAX9113 feature LVDS inputs for inter-facing high-speed digital circuitry. The LVDS interface standard is a signaling method intended for point-to-point communication over a controlled impedance media, as defined by the ANSI/EIA/TIA-644 standards.The technology uses low-voltage signals to achieve fast transition times, minimize power dissipation, and noise immunity. Receivers such as the MAX9111/MAX9113convert LVDS signals to CMOS/LVTTL signals at rates in excess of 500Mbps. The devices are capable of detecting differential signals as low as 100mV and as high as 1V within a 0V to 2.4V input voltage range . The LVDS standard specifies an input voltage range of 0 to 2.4V referenced to ground.Fail-SafeThe fail-safe feature sets the output to a high state when the inputs are undriven and open, terminated, or shorted. When using one channel in the MAX9113,leave the unused channel open.ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly.The receiver inputs of the MAX9111/MAX9113 have extra protection against static electricity. Maxim ’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±11kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down.ESD protection can be tested in various ways; the receiver inputs of this product family are characterized for protection to the limit of ±11kV using the H uman Body Model.Human Body ModelFigure 3a shows the H uman Body Model, and Figure 3b shows the current waveform it generates when dis-charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of inter-est, which is then discharged into the test device through a 1.5k Ωresistor.__________Applications InformationSupply BypassingBypass V CC with high-frequency surface-mount ceram-ic 0.1µF and 0.001µF capacitors in parallel, as close to the device as possible, with the 0.001µF valued capaci-tor the closest to the device. For additional supply bypassing, place a 10µF tantalum or ceramic capacitor at the point where power enters the circuit board.Differential TracesOutput trace characteristics affect the performance of the MAX9111/MAX9113. Use controlled impedance traces to match trace impedance to both transmission medium impedance and the termination resistor.Eliminate reflections and ensure that noise couples as common mode by running the differential traces close together. Reduce skew by matching the electrical length of the traces. Excessive skew can result in a degradation of magnetic field cancellation.Maintain the distance between the differential traces to avoid discontinuities in differential impedance. Avoid 90°turns and minimize the number of vias to further prevent impedance discontinuities.Cables and ConnectorsTransmission media should have a differential charac-teristic impedance of about 100Ω. Use cables and con-nectors that have matched impedance to minimize impedance discontinuities.Avoid the use of unbalanced cables such as ribbon or simple coaxial cable. Balanced cables such as twisted pair offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables tend to pick up noise as common mode, which is rejected by the LVDS receiver.TerminationTermination resistors should match the differential char-acteristic impedance of the transmission line. Because the MAX9111/MAX9113 are current steering devices,an output voltage will not be generated without a termi-nation resistor. Output voltage levels depend upon the value of the termination resistor. Resistance values may range from 75Ωto 150Ω.Minimize the distance between the termination resistor and receiver inputs. Use a single 1% to 2% surface-mount resistor across the receiver inputs.Board LayoutFor LVDS applications, a four-layer PC board that pro-vides separate power, ground, LVDS signals, and input signals is recommended. Isolate the input and LVDS signals from each other to prevent coupling. For best results, separate the input and LVDS signal planes with the power and ground planes.M A X 9111/M A X 9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT238_______________________________________________________________________________________Figure 3a. Human Body ESD Test Modules Figure 3b. Human Body Current WaveformMAX9111/MAX9113Single/Dual LVDS Line Receivers withUltra-Low Pulse Skew in SOT23_______________________________________________________________________________________9Typical Operating CircuitChip InformationTRANSISTOR COUNT:MAX9111: 675MAX9113: 675PROCESS: CMOSM A X 9111/M A X 9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT2310______________________________________________________________________________________Package InformationMAX9111/MAX9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23______________________________________________________________________________________11Package Information (continued)M A X 9111/M A X 9113Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embod ied in a Maxim prod uct. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.12____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.NOTES。
MAX713中文资料
BATTERY MANAGEMENT Jul 09, 1998 Switch-Mode Battery Charger Delivers 5AThe fast-charge controller IC3 (Figure 1) normally directs current to the battery via an external pnp transistor. In this circuit, the transistor is replaced with a 5A switching regulator (IC1) that delivers equivalent power with higher efficiency.Figure 1. By controlling the PWM duty cycle of switching regulator IC1, the fast-charge controller (IC3) makes efficient delivery of the battery's charging current.IC1 is a 5A buck switching regulator whose output is configured as a current source. Its internal power switch (an npn transistor) is relatively efficient because V CE(SAT) is small in comparison with the 15V-to-40V inputs. (For applications that require 2A or less, the low-saturation, non-Darlington power switch of a MAX726 offers better efficiency.)R6 senses the battery-charging current and enables IC3 to generate an analog drive signal at DRV. The signal is first attenuated by the op amp to assure stability by reducing gain in the control loop. It then drives IC1's compensation pin (VC), which gives direct access to the internal PWM comparator. IC3 thus controls the charging current via the PWM duty cycle of IC1. The Q1 buffer provides current to the DRV input.Loop stability is also determined by the feedback loop's dominant pole, set by C4 at the CC terminal of IC3. If you increase the value of the battery filter capacitor (C5), you should make a proportional increase in the value of C4. Lower values, however, assure good transient response. If your application produces load transients during the fast-charge cycle, check the worst-case response to a load step. To assure proper termination of the charge, battery voltage should settle within 2msec to 5mV times N (where N is the number of battery cells). More InformationMAX713:QuickView-- Full (PDF) Data Sheet-- Free Samples。
TEA5711中文资料
• Designed for simple and reliable printed-circuit board layout
• High impedance MOSFET input on AM.
APPLICATIONS • Portable AM/FM stereo radio • Mini/midi receiver sets • Personal headphone radio.
SYMBOL
PARAMETER
CONDITIONS
MIN.
VP
dynamic supply voltage
1.8
VP
static supply voltage
2.1
IP
supply current
AM mode
11.9
FM mode
13.5
Tamb
operating ambient temperature
September 1994
2
Philips Semiconductors
AM/FM stereo radio circuit
BLOCK DIAGRAM
September 1994
元器件交易网Thwiswtewx.tcisechber2ebi.ncwohmite to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
PIN
DESCRIPTION
1 not connected 2 left channel audio output (output impedance typ. 4.3 kΩ) 3 right channel audio output (output impedance typ. 4.3 kΩ) 4 pilot detector filter pin
JANTXV1N5712UR-1中文资料
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
D 1.60 1.70 0.063 0.067
F 0.41 0.55 0.016 0.022
G 3.30 3.70 .130 .146
G1 2.54 REF. .100 REF.
S
0.03 MIN. .001 MIN.
FIGURE 1
1000
100
10
1.0 0 5.0 10 15 20 25 30 VR – REVERSE VOLTAGE (V) (PULSED) Figure 2. CDLL2810 and CDLL5712 Typical Variation of Reverse Current (IR) vs. Reverse Voltage (VR) at Various Temperatures.
100,000
10,000
1000
1
10
1 0 10 20 30 40 50 60 VR – REVERSE VOLTAGE (V) (PULSED) Figure 4. CDLL5711 Typical Variation of Reverse Current (IR) vs. Reverse Voltage (VR) at Various Temperatures.
DESIGN DATA
CASE: DO-213AA, Hermetically sealed glass case. (MELF, SOD-80, LL34)
LEAD FINISH: Tin / Lead
THERMAL RESISTANCE: (ROJEC): 100 °C/W maximum at L = 0 inch THERMAL IMPEDANCE: (ZOJX): 40 °C/W maximum
M57140-01;中文规格书,Datasheet资料
VIN
Direct Current
VO
Between Pins 10 - 9 , 12 - 11, 14 - 13,
IL = 30mA
Between Pins 8 - 7 , IL = 100mA
ILP
Between Pins 10 - 9 , 12 - 11, 14 - 13
Between Pins 8 - 7
Load Regulation Efficiency
Reg-out h
Between Pins 10 - 9 , 12 - 11, 14 - 13, IL = 0 ~ 30mA
Between Pins 8 - 7 , IL = 0 ~ 100mA Between Pins 10 - 9 , 12 - 11, 14 - 13,
IL = 30mA Between Pins 8 - 7 , IL = 100mA
Min. 18 13.5
13.5 – – –
– –
–
Typ. 20 15.0
Max. 22 16.5
Units Volts Volts
15.0 16.5
33
–
110
–
5 10
Volts mA mA %
7 12
%
70
–
%
159 /
Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272
M57140-01 Isolated DC-to-DC Converter
Absolute Maximum Ratings, VIN = 20V, Ta = 25 °C unless otherwise specified
MAX7311中文资料
General DescriptionThe MAX7311 2-wire-interfaced expander provides 16-bit parallel input/output (I/O) port expansion for SMBus™and I 2C™ applications. The MAX7311 consists of input port registers, output port registers, polarity inversion reg-isters, configuration registers, a bus timeout register, and an I 2C-compatible serial interface logic compatible with SMBus. The system master can invert the MAX7311 input data by writing to the active-high polarity inversion regis-ter. The system master can enable or disable bus timeout by writing to the bus timeout register.Any of the 16 I/O ports can be configured as an input or output. A power-on reset (POR) initializes the 16 I/Os as inputs. Three address select pins configure one of 64 slave ID addresses.The MAX7311 supports hot insertion. All port pins, the INT output, SDA, SCL and the slave address inputs AD0–2 remain high impedance in power down (V+ =0V) with up to 6V asserted upon them.The MAX7311 is available in 24-pin SO, SSOP, TSSOP,and thin QFN packages and is specified over the -40°C to +125°C automotive temperature range.For applications requiring I/Os without pullup resistors,refer to the MAX7312 data sheet.ApplicationsServersRAID Systems Industrial Control Medical Equipment PLCsInstrumentation and Test MeasurementFeatures♦400kbps I 2C-Compatible Serial Interface♦2V to 5.5V Operation ♦5V Overvoltage Tolerant I/Os ♦Supports Hot Insertion♦16 I/O Pins that Default to Inputs on Power-Up ♦100k ΩPullup on Each I/O ♦Open-Drain Interrupt Output (INT )♦Bus Timeout for Lock-Up-Free Operation ♦Noise Filter on SCL / SDA Inputs ♦64 Slave ID Addresses Available ♦Low Standby Current (2.9µA typ)♦Polarity Inversion♦4mm ✕4mm, 0.8mm Thin QFN Package ♦-40°C to +125°C OperationMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection________________________________________________________________Maxim Integrated Products 1Ordering Information19-2747; Rev 4; 4/05For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .SMBus is a trademark of Intel Corp.Purchase of I 2C components of Maxim Integrated Products, Inc.or one of its sublicensed Associated Companies, conveys a license under the Phillips I 2C Patent Rights to use these compo-nents in an I 2C system, provided that the system conforms to the I 2C Standard Specification as defined by Phillips.Pin ConfigurationsM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion ProtectionABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V +to GND................................................................-0.3V to +6V I/O0–I/O15 as Inputs....................................(GND - 0.3V) to +6V SCL, SDA, AD0, AD1, AD2, INT ...................(GND - 0.3V) to +6V Maximum V +Current......................................................+250mA Maximum GND Current...................................................-250mA DC Input Current on I/O0–I/O15.......................................±20mA DC Output Current on I/O0–I/O15....................................±80mAContinuous Power Dissipation (T A = +70°C)24-Pin Wide SO (derate 11.8mW/°C above +70°C)....941mW 24-Pin SSOP (derate 8.0mW/°C above +70°C)...........640mW 24-Pin TSSOP (derate 12.2mW/°C above +70°C).......975mW 24-Pin Thin QFN (derate 20.8mW/°C above +70°C).1668mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°CMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________3Note 2:Minimum SCL clock frequency is limited by the MAX7311 bus timeout feature, which resets the serial bus interface if eitherSDA or SCL is held low for a minimum of 25ms. Disable bus timeout feature for DC operation.Note 3:A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V IL of the SCLsignal) in order to bridge the undefined region SCL’s falling edge.Note 4:C B = total capacitance of one bus line in pF.Note 5:The maximum t F for the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage t F isspecified at 250ns. This allows series protection resistors to be connected between the SDA and SCL pins and the SDA/SCL bus lines without exceeding the maximum specified t F .Note 6:Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.DC ELECTRICAL CHARACTERISTICS (continued)(V += 2V to 5.5V, T A = -40°C to +125°C, unless otherwise noted. Typical values are at V += 3.3V, T A = +25°C.) (Note 1)AC ELECTRICAL CHARACTERISTICSM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 4_______________________________________________________________________________________Typical Operating Characteristics(T A = +25°C, unless otherwise noted.)SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )1007525500-251020304050607080901000-50125STANDBY SUPPLY CURRENTvs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )100752550-251234567890-50125SUPPLY CURRENT vs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (µA )5.04.53.5 4.03.02.510203040506070809010002.05.5I/O SINK CURRENT vs. OUTPUT LOW VOLTAGEV OL (V)I S I N K (m A )0.50.40.30.20.124681012141618202224000.6I/O SINK CURRENT vs. OUTPUT LOW VOLTAGEV OL (V)I S I N K (m A )0.50.40.30.20.15101520253035404550000.6I/O SINK CURRENT vs. OUTPUT LOW VOLTAGEV OL (V)I S I N K (m A )0.40.30.20.1510152025303540455000.5I/O OUTPUT LOW VOLTAGEvs. TEMPERATURETEMPERATURE (°C)V O L (m V )10075-252550501001502002503003504000-50125I/O SOURCE CURRENT vs. OUTPUT HIGH VOLTAGEV + - V OH (V)I S O U R C E (m A )0.60.50.40.30.20.151015202500.7I/O SOURCE CURRENT vs. OUTPUT HIGH VOLTAGEV + - V OH (V)I S O U R C E (m A )0.60.50.30.40.20.15101520253035404550000.7MAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________5Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)I/O SOURCE CURRENT vs. OUTPUT HIGH VOLTAGEV + - V OH (V)I S O U R C E (m A )0.60.50.30.40.20.1510152025303540455000I/O HIGH VOLTAGE vs. TEMPERATURETEMPERATURE (°C)V + - V O H (V )100755025-25100200300400500-50125M A X 7311Detailed DescriptionThe MAX7311 general-purpose input/output (GPIO)peripheral provides up to 16 I/O ports, controlled through an I 2C-compatible serial interface. The MAX7311 consists of input port registers, output port registers, polarity inversion registers, configuration reg-isters, and a bus-timeout register. Upon power-on, all I/O lines are set as inputs. Three slave ID address select pins, AD0, AD1, and AD2, choose one of 64 slave ID addresses, including the eight addresses supported by the Phillips PCA9555. Table 1 is the register address table. Tables 2–6 show detailed register information.Serial InterfaceSerial AddressingThe MAX7311 operates as a slave that sends and receives data through a 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master, typically a microcon-troller, initiates all data transfers to and from the MAX7311, and generates the SCL clock that synchro-nizes the data transfer (Figure 2).2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 6_______________________________________________________________________________________Figure 1. MAX7311 Block DiagramFigure 2. 2-Wire Serial Interface Timing DiagramEach transmission consists of a START condition sent by a master, followed by the MAX7311 7-bit slave address plus R/W bit, a register address byte, 1 or more data bytes, and finally a STOP condition (Figure 3).START and STOP ConditionsBoth SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmis-sion with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 3).Bit TransferOne data bit is transferred during each clock pulse.The data on SDA must remain stable while SCL is high (Figure 4).AcknowledgeThe acknowledge bit is a clocked 9th bit, which the recipient uses as a handshake receipt of each byte of data (Figure 5). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is sta-ble low during the high period of the clock pulse. When the master is transmitting to the MAX7311, theMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________7Figure 3. START and STOP ConditionsFigure 4. Bit TransferFigure 5. AcknowledgeM A X 7311MAX7311 generates the acknowledge bit since the MAX7311 is the recipient. When the MAX7311 is trans-mitting to the master, the master generates the acknowledge bit.Slave AddressThe MAX7311 has a 7-bit-long slave address (Figure 6).The 8th bit following the 7-bit slave address is the R/W bit. Set this bit low for a write command and high for a read command.Slave address pins AD2, AD1, and AD0 choose 1 of 64slave ID addresses (Table 7).Data Bus TransactionThe command byte is the first byte to follow the 8-bit device slave address during a write transmission (Table 1, Figure 7). The command byte is used to deter-mine which of the following registers are written or read.Writing to Port RegistersTransmit data to the MAX7311 by sending the device slave address and setting the LSB to a logic zero. The command byte is sent after the address and deter-mines which registers receive the data following the command byte (Figure 7).2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 8_______________________________________________________________________________________Figure 7. Writes to Output Registers Through Write Byte ProtocolEight of the MAX7311’s nine registers are configured to operate as four register pairs: input ports, output ports,polarity inversion ports, and configuration ports. After sending 1 byte of data to one register, the next byte is sent to the other register in the pair. For example, if the first byte of data is sent to output port 2, then the next byte of data is stored in output port 1. An unlimited number of data bytes can be sent in one write transmis-sion. This allows each 8-bit register to be updated inde-pendently of the other registers.Reading Port RegistersTo read the device data, the bus master must first send the MAX7311 address with the R/W bit set to zero, fol-lowed by the command byte, which determines which register is accessed. After a restart, the bus master must then send the MAX7311 address with the R/W bit set to 1. Data from the register defined by the com-mand byte is then sent from the MAX7311 to the master (Figures 8, 9).MAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________9Figure 8. Read from RegisterFigure 9. Read from Input RegistersM A X 7311Data is clocked into a register on the falling edge of the acknowledge clock pulse. After reading the first byte,additional bytes may be read and reflect the content in the other register in the pair. For example, if input port 1is read, the next byte read is input port 2. An unlimited number of data bytes can be read in one read trans-mission, but the final byte received must not be acknowledged by the bus master.Interrupt (INT )The open-drain interrupt output, INT,activates when one of the port pins changes states and only when the pin is configured as an input. The interrupt deactivates when the input returns to its previous state or the input register is read (Figure 9). A pin configured as an out-put does not cause an interrupt. Each 8-bit port register is read independently; therefore, an interrupt caused by port 1 is not cleared by a read of port 2’s register. Changing an I/O from an output to an input may cause a false interrupt to occur if the state of that I/O does not match the content of the input port register.Input/Output PortWhen an I/O is configured as an input, FETs Q1 and Q2are off (Figure 10), creating a high-impedance input with a nominal 100k Ωpullup to V +. All inputs are overvoltage protected to 5.5V, independent of supply voltage. When a port is configured as an output, either Q1 or Q2 is on,depending on the state of the output port register. When V +powers up, an internal power-on reset sets all regis-ters to their respective defaults (Table 1).Input Port RegistersThe input port registers (Table 2) are read-only ports.They reflect the incoming logic levels of the pins,regardless of whether the pin is defined as an input or an output by the respective configuration register. A read of the input port 1 register latches the current value of I/O0–I/O7. A read of the input port 2 register latches the current value of I/O8–I/O15. Writes to the input port registers are ignored.2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 10______________________________________________________________________________________Figure 10. Simplified Schematic of I/OsThe output port registers (Table 3) set the outgoing logic levels of the I/Os defined as outputs by the respective configuration register. Reads from the out-put port registers reflect the value that is in the flip-flop controlling the output selection, not the actual I/O value.Polarity Inversion Registers The polarity inversion registers (Table 4) enable polarity inversion of pins defined as inputs by the respective port configuration registers. Set the bit in the polarity inversion register to invert the corresponding port pin’s polarity. Clear the bit in the polarity inversion register to retain the corresponding port pin’s original polarity.Configuration Registers The configuration registers (Table 5) configure the directions of the I/O pins. Set the bit in the respective configuration register to enable the corresponding port as an input. Clear the bit in the configuration register to enable the corresponding port as an output.Set register 0x08 LSB (bit 0) to enable the bus timeout function (Table 6) or clear it to disable the bus timeout function. Enabling the timeout feature resets theMAX7311 serial bus interface when SCL stops either highor low during a read or write. If either SCL or SDA is lowfor more than 29ms after the start of a valid serial transfer,the interface resets itself and sets up SDA as an input.The MAX7311 then waits for another START condition.StandbyThe MAX7311 goes into standby when the I2C bus isidle. Standby supply current is typically 2.9µA.Applications InformationHot InsertionThe I/O ports I/O0–I/O15, interrupt output INT, and serial interface SDA, SCL, AD0–2 remain high impedance withup to 6V asserted on them when the MAX7311 is pow-ered down (V+ = 0V). The MAX7311 can therefore beused in hot-swap applications. Note that each I/O’s100kΩpullup effectively becomes a 100kΩpulldownwhen the MAX7311 is powered down.Power-Supply ConsiderationThe MAX7311 operates from a supply voltage of 2V to5.5V. Bypass the power supply to GND with a 0.047µF capacitor as close to the device as possible. For theQFN version, connect the exposed pad to GND.MAX73112-Wire-Interfaced 16-Bit I/O Port Expanderwith Interrupt and Hot-Insertion Protection ______________________________________________________________________________________11 Table 2. Registers 0x00, 0x01—Input Port RegistersM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 12______________________________________________________________________________________Table 7. MAX7311 Address MapMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection______________________________________________________________________________________13Chip InformationTRANSISTOR COUNT: 12,994PROCESS: BiCMOSM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 14______________________________________________________________________________________Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)MAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection______________________________________________________________________________________15Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)M A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protectionimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________16©2005 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products, Inc.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)。
MAX471MAX472的中文资料大全
MAX471/MAX472的特点、功能美国美信公司生产的精密高端电流检测放大器是一个系列化产品，有MAX471/MAX472、MAX4172/MAX4173等。
它们均有一个电流输出端，可以用一个电阻来简单地实现以地为参考点的电流/电压的转换，并可工作在较宽电压内。
MAX471/MAX472具有如下特点：●具有完美的高端电流检测功能；●内含精密的内部检测电阻（MAX471）；●在工作温度范围内，其精度为2%；●具有双向检测指示，可监控充电和放电状态；●内部检测电阻和检测能力为3A，并联使用时还可扩大检测电流范围；●使用外部检测电阻可任意扩展检测电流范围（MAX472）；●最大电源电流为100μA；●关闭方式时的电流仅为5μA；●电压范围为3～36V；●采用8脚DIP/SO/STO三种封装形式。
MAX471/MAX472的引脚排列如图1所示，图2所示为其内部功能框图。
表1为MAX471/MAX472的引脚功能说明。
MAX471的电流增益比已预设为500μA/A，由于2kΩ的输出电阻（ROUT）可产生1V/A的转换，因此±3A时的满度值为3V.用不同的ROUT电阻可设置不同的满度电压。
但对于MAX471，其输出电压不应大于VRS+。
对于MAX472，则不能大于。
MAX471引脚图如图１所示，MAX472引脚图如图２所示。
MAX471/MAX472的引脚功能说明引脚名称功能MAX471MAX47211SHDN关闭端。
正常运用时连接到地。
当此端接高电平时，电源电流小于5μA2，3-RS+内部电流检测电阻电池（或电源端）。
“+”仅指示与SIGN输出有关的流动方向。
封装时已将2和3连在了一起-2空脚88OUT 电流输出，它正比于流过TSENSE被测电路的幅度，在MAX741中，此引脚到地之间应接一个2kΩ电阻，每一安培被测电流将产生大小等于1V的电压OUT端为电流幅度输出端，而SIGN端可用来指示输出电流的方向。
三相中频高压电源控制程序
//// 三相中频高压电源控制程序(by whu_jyf 2008.5.15)// ver1.0 for emulation(150Mhz)_HWPWM_New(for ZPDY_NEW.PCB 2008.5.15)//###########################################################################//// FILE: CodeRunFromXintf.c (MPNMC=1)//8.7. MAX5711->MAX5712;ACH1->ACH4//8.15 modify SVPWM//8.19 add PDP Restart////8.23 150MHz//9.6 modify Adc_Isr//9.10 HARD W ARE PWM//2007.12.1:modify ADC CHANNEL//2008.4.14 N:18->24//###########################################################################//// Ver | dd mmm yyyy | Who | Description of changes//=====|=============|======|============================================= ==// 1.0 | 00 May 2007 | Jyf | Original Release For F2812 EzDSP.//////###########################################################################// Step 0: Include required header files:// DSP28_Device.h: device specific definitions #include statements for// all of the peripheral .h definition files.#include "DSP28_Device.h"//#include "math.h"//***********************************************************// Prototype statements for functions found within this file://***********************************************************// Assign this function to a section to be linked to internal RAM#pragma CODE_SECTION(xintf_zone6and7_timing,"internfuncs");//把函数xintf_zone6and7_timing的代码定位到internfuncs段中，internfuncs段在.cmd文件中规定了物理地址。
最低静态电流的超小尺寸降压转换器
新品发布NEW PRODUCTS今日电子 · 2018年5月 · 外带来新的层面，例如，混光。
整合式M O S F E T额定60V，使A L8862成为可行的解决方案，可用于更高功率的输出应用。
利用Diodes公司的专有技术，M O S F E T也具备仅0.4Ω的超低R D S(O N)，能在缩减外部零件需求的同时展现出高效率。
亦针对短路或开路可能造成的故障情形提供完整保护，同时包含了过热保护。
Diodes Incorporated线性LED控制器A L5814、A L5817、A L5815及AL5816线性LED控制器，为LED灯条提供可调光和可调节的驱动电流，效率高达80%以上。
A L58x x系列提供物料列表(B O M)成本低廉的解决方案，适用于商业和工业领域的各项产品应用，包括广告牌、仪器照明、家电内部照明、建筑细部照明，以及一般智能照明设备。
这些装置的输入范围为4.5～60V，无须电感，可保持良好的E M I效能，使系统整合更简单。
此外，相较于其他设计，外部功率晶体管可使内部功耗降至最低。
A L58x x系列可提供高达15m A 的电流给外部MOSFET或双极晶体管，以驱动LED灯条。
LED驱动电流由一个外部电阻配置，具有4%的参考电压准确度，以及出色的温度稳定性。
不仅如此，AL5815与AL5816装置支持PWM调光功能，A L5814与A L5817装置则同时支持模拟和PWM调光功能。
保护功能包括过温保护及输入欠压锁定。
A L5814及A L5817装置也利用VFAULT脚位提供「LED 开回路」保护功能，以及L E D 热回流保护。
A L58x x系列线性控制器提供良好的E M I效能，而广泛的工作温度范围(-40～+105℃)使其适用于恶劣环境。
Diodes Incorporated超小电源模块MAXM17532和MAXM15462超小尺寸(2.6mm×3.0mm×1.5mm)、集成式DC-DC电源模块是Maxim喜马拉雅电源方案专有组合的一部分，适用于工业、医疗健康、通信和消费市场。
S-5711A中文资料
1
元器件交易网
HALL IC S-5711A Series Block Diagrams
1. Nch open drain output product
VDD Sleep/Awake logic
*1 *1
Rev.2.4_00
OUT
Chopping stabilized amplifier VSS
(Ta = 25°C unless otherwise specified) Absolute Maximum Rating Unit VSS−0.3 to VSS+7.0 VSS−0.3 to VSS+7.0 VSS−0.3 to VDD+0.3 *1 300 430
*1
V V V mW mW °C °C
1 2
2 3 4
*1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS. Figure 3
SOT-23-3 Top view 1
Table 3 Pin No. 1 2 3 Symbol VSS VDD OUT GND pin Power supply pin Output pin Pin Description
2
3
Figure 4
4
Seiko Instruments Inc.
元器件交易网
HALL IC S-5711A Series
Rev.2.4_00 Absolute Maximum Ratings
Table 4 Item Power supply voltage Output voltage Power dissipation Nch open drain output CMOS output SNT-4A SOT-23-3 Symbol VDD VOUT PD Topr TC S-5711A Series Pin Configurations
SFH5711中文资料
SFH 5711Hochgenauer Umgebungslichtsensor High Accuracy Ambient Light SensorLead (Pb) Free Product - RoHS Compliant 2007-04-031Wesentliche Merkmale•Optohybrid mit logarithmischem Stromausgang •Perfekt an die Augenempfindlichkeit (V λ) angepasst•Niedriger Temperaturkoeffizient der Fotoempfindlichkeit•Hohe Genauigkeit über weiten Beleuchtungsstärkebereich •Automotive Freigabe Anwendungen •Anwendungen im Automobilbereich •Sonnenlichtsensor / Fahrlichtkontrolle •Steuerung von Displayhinterleuchtungen •Mobile GeräteTyp TypeBestellnummer Ordering codeAusgangsstrom , E v = 1000lx, (white LED LW 541C) Output current , I OUT / μA SFH 5711-2/31)1)Nur eine Gruppe innerhalb einer Verpackungseinheit, siehe Kenndaten. Only one bin within one packing unit, see characteristicsQ65110A451327 - 32SFH 5711-1/21)on request 25 - 30SFH 5711-3/41)on request29 - 34Features•Opto hybrid with logarithmic current output •Perfect match to Human Eye Sensitivity (V λ) •Low temperature coefficient of spectral sensitivity•High accuracy over wide illumination range •Automotive qualified Applications •Automotive applications•Sunlight sensor / head lamp control •Control of display backlighting •Mobile devices2007-04-032GrenzwerteMaximum Ratings Bezeichnung ParameterSymbol SymbolWert Value Einheit Unit Betriebs- und LagertemperaturOperating and storage temperature range T stg – 40 … + 1001)1)Maximum operation temperature of 100°C is only valid after soldering with JEDEC level 4 preconditioning. With JEDEC level 3 max. preconditioning operating temperature is 85°C.°C Versorgungsspannung Supply voltage V CC6V Ausgangsspannung Output voltageV OUT< V CC V Elektrostatische Entladung Electrostatic dischargeHuman Body Model according to EOS/ESD-5.1-1993ESD 2kVEmpfohlener ArbeitsbereichRecommended Operating Conditions Bezeichnung Parameter Symbol SymbolWert Value Einheit Unitmin.typ.max.Betriebsspannung Supply voltageV CC 2.35.5V Beleuchtungsstärke IlluminanceT A = – 30 °C ... + 70 °C T A = – 40 °C ... + 100 °CE V3 ... 80k 10...80klxA CharacteristicsBezeichnung Parameter SymbolSymbolWertValueEinheitUnitmin.typ.max.Stromaufnahme, E V = 0 Current consumptionV CC = 2.5 VV CC = 5.0 V ICC410420500μAStromaufnahme, E V = 1000lx Current consumption, E V = 1000lx V CC = 2.5 VV CC = 5.0 V ICC460470550μASpektraler Bereich der Fotoempfindlichkeit Spectral range of sensitivity λ10%475 ...650nmWellenlänge der max. FotoempfindlichkeitWavelength of max. photosensitivityλs max540555570nmAbmessung der bestrahlungsempfindlichen FlächeDimensions of radiant sensitive area L x BL x W0.4 x0.4mm x mmAusgangskapazitätOutput capacitanceC OUT3pFTransferfunktion Transfer function, s. Fig. 1G9.51010.5µA / dekµA / decAbweichung der Ausgangskennlinie von derLogarithmierfunktionDeviation of outputcharacteristic from logarithmicfunction, s. Fig. 1L- 3+ 3%Maximale Ausgangsspannung Maximum output voltage V OUT V CC- 0.5VEinschaltzeit, E V = 1000 lx Power on time, E V = 1000 lx V CC = 0V -> V CC tON0.1 1.2msAntwortzeit, R L = 25 kOhm, C = 1 nF Response time, s. Fig. 2E V = 100 -> 1000 lxE V = 1000 -> 100 lx tr/ t f0.030.1ms2007-04-0332007-04-034Figure 1Ersatzschaltbild CircuitryAusgangsgenauigkeit über Temperaturbereich 1) Output accuracy over temperature range 1) E V = 1000 lxT A = – 40 °C ... + 100 °C T A = – 30 °C ... + 70 °C T A = 0 °C ... + 50 °CΔI OUT− 2.0 − 1.5 − 0.7± 1.0 ± 0.6 ± 0.2+ 2.0 + 1.5 + 0.7µAAusgangsdunkelstrom, E V = 0 Output dark currentI out0.1100nA1)Diese Werte entsprechen einer Photodiode mit einem TC von ungefähr 0.3 %/K. These values correspond to a photodiode with a TC of approximately 0.3 %/K.Gruppierung (T A = 25 °C) Binning Bezeichnung ParameterSymbol SymbolWert Value Einheit Unit-1-2-3-4Ausgangsstrom 1) Output current E V = 1000lx (white LED LW 541C)1)3µA Gruppenbreite entspricht einem Verhältnis von 1:2 in der Bestrahlungsstärke. 3µA bin width is equivalent to a spread of 1:2 of the irradiance.I out 25 ... 2827 (30)29 (32)31 (34)μAA Characteristics Bezeichnung ParameterSymbol SymbolWert Value Einheit Unit min.typ.max.Figure 2Definition der AntwortzeitDefinition of Response Time 2007-04-0352007-04-036Relative Spectral Sensitivity of photodiodeOutput Current I= f (E )Directional Characteristics of photodiode = ()Current Consumption IMaßzeichnungPackage OutlinesMaße in mm (inch) / Dimensions in mm (inch)AnschlußbelegungPin configurationPin #Description1GND2GND3V CC4I OUT2007-04-037Empfohlenes LötpaddesignRecommended Solderpad DesignMaße in mm (inch) / Dimensions in mm (inch)2007-04-0382007-04-039LötbedingungenVorbehandlung nach JEDEC Level 3 Soldering ConditionsPreconditioning acc. to JEDEC Level 3Reflow Lötprofil für bleifreies Löten(nach J-STD-020C) Reflow Soldering Profile for lead free soldering(acc. to J-STD-020C)Published byOSRAM Opto Semiconductors GmbHWernerwerkstrasse 2, D-93049 Regensburg © All Rights Reserved.The information describes the type of component and shall not be considered as assured characteristics.Terms of delivery and rights to change design reserved. Due to technical requirements components may contain dangerous substances. For information on the types in question please contact our Sales Organization.PackingPlease use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred.Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components 1 , may only be used in life-support devices or systems 2 with the express written approval of OSRAM OS.1A critical component is a component usedin a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.2Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered.。
Richtek Technology RT5711A 高效同步步下电源说明书
RT5711A1.5A, 1MHz, 6V CMCOT Synchronous Step-Down ConverterGeneral DescriptionThe RT5711A is a high efficiency synchronous step-down DC-DC converter. Its input voltage range is from 2.5V to 6V and provides an adjustable regulated output voltage from 0.6V to 3.4V while delivering up to 1.5A of output current.The internal synchronous low on-resistance power switches increase efficiency and eliminate the need for an external Schottky diode. The Current Mode Constant-On-time (CMCOT) operation with internal compensation allows the transient response to be optimized over a wide range of loads and output capacitors.Applications● STB, Cable Modem, & xDSL Platforms● LCD TV Power Supply & Metering Platforms ●General Purpose Point of Load (POL)Ordering InformationRT5711AH : HiccupNote :Richtek products are :④ RoHScompliant and compatible with the currentrequirements of IPC/JEDEC J-STD-020.④ Suitable for use in SnPb or Pb-free soldering processes.Features● Efficiency Up to 95%● R DSON 160m Ω HS / 110m Ω LS ● V IN Range 2.5V to 6V● V REF 0.6V with ±2% Accuracy●CMCOT ™ Control Loop Design for Best Transient Response, Robust Loop Stability with Low-ESR (MLCC) C OUT● Fixed Soft-Start 1.2ms● Cycle-by-Cycle Over-Current Protection ● Input Under-Voltage Lockout● Output Under-Voltage Protection (UVP Hiccup) ● Thermal Shutdown Protection ●Power Saving at Light LoadMarking Information2Z : Product Code W : Date CodePin Configuration(TOP VIEW)NC EN FB GND LXVIN541236G N D7WDFN-6L 2x2Simplified Application CircuitV INV OUTRT5711AFunctional Pin DescriptionFunctional Block DiagramFBOperationThe RT5711A is a synchronous low voltage step-down converter that can support the input voltage range from 2.5V to 6V and the output current can be up to 1.5A. The RT5711A uses a constant on-time, current mode architecture. In normal operation, the high side P-MOSFET is turned on when the switch controller is set by the comparator and is turned off when the Ton comparator resets the switch controller.Low side MOSFET peak current is measured by internal RSENSE. The error amplifier EA adjusts COMP voltage by comparing the feedback signal (V FB) from the output voltage with the internal 0.6V reference. When the load current increases, it causes a drop in the feedback voltage relative to the reference, then the COMP voltage rises to allow higher inductor current to match the load current. UV ComparatorIf the feedback voltage (V FB) is lower than threshold voltage 0.2V, the UV comparator's output will go high and the switch controller will turn off the high side MOSFET. The output under voltage protection is designed to operate in Hiccup mode.Enable ComparatorA logic-high enables the converter; a logic-low forces the IC into shutdown mode.Soft-Start (SS)An internal current source charges an internal capacitor to build the soft-start ramp voltage. The V FB voltage will track the internal ramp voltage during soft-start interval. The typical soft-start time is 1.2ms.RT5711A Over-Current Protection (OCP)The RT5711A provides over-current protection bydetecting low side MOSFET valley inductor current. Ifthe sensed valley inductor current is over the currentlimit threshold (1.8A typ.), the OCP will be triggered.When OCP is tripped, the RT5711A will keep theover-current threshold level until the over currentcondition is removed.Thermal Shutdown (OTP)The device implements an internal thermal shutdownfunction when the junction temperature exceeds 150°C.The thermal shutdown forces the device to stopswitching when the junction temperature exceeds thethermal shutdown threshold. Once the die temperaturedecreases below the hysteresis of 20°C, the devicereinstates the power up sequence.RT5711AAbsolute Maximum Ratings(Note 1)●Supply Input Voltage ----------------------------------------------------------------------------------------- -0.3V to 6.5V●LX Pin Switch Voltage ---------------------------------------------------------------------------------------- -0.3V to (V IN + 0.3V) <20ns ------------------------------------------------------------------------------------------------------------- -4.5V to 7.5V●Power Dissipation, P D @ T A = 25︒CWDFN-6L 2x2 -------------------------------------------------------------------------------------------------- 0.833W●Package Thermal Resistance (Note 2)WDFN-6L 2x2, θJA -------------------------------------------------------------------------------------------- 120︒C/WWDFN-6L 2x2, θJC-------------------------------------------------------------------------------------------- 7︒C/W●Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260︒C●Junction Temperature ---------------------------------------------------------------------------------------- -40︒C to 150︒C●Storage Temperature Range ------------------------------------------------------------------------------- -65︒C to 150︒C●ESD Susceptibility (Note 3)HBM (Human Body Model) --------------------------------------------------------------------------------- 2kV Recommended Operating Conditions(Note 4)●Supply Input Voltage ------------------------------------------------------------------------------------------ 2.5V to 6V●Ambient Temperature Range-------------------------------------------------------------------------------- -40︒C to 85︒C●Junction Temperature Range ------------------------------------------------------------------------------- -40︒C to 125︒CElectrical Characteristics(V IN = 3.6V, T A = 25︒C, unless otherwise specified)RT5711ANote 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.Note 2. θJA is measured at T A= 25︒C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package.Note 3. Devices are ESD sensitive. Handling precaution recommended.Note 4. The device is not guaranteed to function outside its operating conditions.RT5711ATypical Application Circuit2.5V to 6VV INV OUT*C FF : Optional for performance fine-tuneTable 1. Suggested Component ValuesRT5711ATypical Operating CharacteristicsEfficiency vs. Output Current010203040506070809010000.30.60.91.21.5Output Current (A)E f f i c i e n c y (%)Efficiency vs. Output Current1020304050607080901000.0010.010.1110Output Current (A)E f f i c i e n c y (%)Output Voltage vs. Output Current1.121.141.161.181.201.221.241.261.2800.30.60.91.21.5Output Current (A)O u t p u t V o l t a g e (V)Output Voltage vs. Output Current3.243.263.283.303.323.343.363.383.403.423.4400.30.60.91.21.5Output Current (A)O u t p u t V o l t a g (V)Output Voltage vs. Input Voltage1.151.161.171.181.191.201.211.221.231.241.252.533.544.555.5Input Voltage (V)O u t p u t V o l t a g e (V)Output Voltage vs. Input Voltage4.54.64.74.84.955.15.25.35.45.5Input Voltage (V)RT5711AReference Voltage vs. Input Voltage0.550.560.570.580.590.600.610.620.630.640.652.533.544.555.5Input Voltage (V)R e f e r e n c e V o l t a g e (V)Reference Voltage vs. Temperature0.550.570.590.610.630.65-50-25255075100125Temperature (°C)R e f e r e n c e V o l t a g e (V)Switching Frequency vs. Temperature0.00.10.20.30.40.50.60.70.80.91.01.11.2-50-25255075100125Temperature (°C)S w i t c h i n g F r e q u e n c y (M H z )Shutdown Quiescent Current vs. Input Voltage-0.10.00.10.20.30.40.50.60.70.80.91.02.533.544.555.5Input Voltage (V)S h u t d o w n Q u i e s c e n t C ur r e n t (μA )Shutdown Quiescent Current vs. Temperature0.00.51.01.52.02.53.03.54.04.55.0-50-25255075100125Temperature (°C)S h u t d o w n Q u i e s c e n t C ur r e n t (μA )Quiescent Current vs. Input Voltage0510********352.533.544.555.5Input Voltage (V)Q u i e s c e n tC u r r e n t (µA )RT5711AQuiescent Current vs. Temperature0510152025303540-50-25255075100125Temperature (°C)Q u i e s c e n t C u r r e n t (µA )Inductor Current Limit vs. Input Voltage0.00.51.01.52.02.53.02.533.544.555.5Input Voltage (V)I n d u c t o r C u r r e n t(A )Inductor Current Limit vs. Temperature0.00.51.01.52.02.53.0-50-25255075100125Temperature (°C)I n d u c t o r C u r r e n t(A )Input UVLO vs. Temperature1.51.61.71.81.92.02.12.22.32.42.5-50-25255075100125Temperature (°C)I n p u t U V L O (V )Enable Threshold vs. Temperature0.00.20.40.60.81.01.21.4-50-25255075100125Temperature (°C)E n a b l e T h r e s h o l d (V )Load Transient ResponseV OUT (50mV/Div)I OUT(1A/Div)V IN = 3.3V, V OUT = 1.2V, I OUT = 0A to 1.5ATime (100 s/Div)RT5711ATime (100μs/Div)Load Transient ResponseV IN = 3.3V, V OUT = 1.2V, I OUT = 0.5A to 1.5AV OUT (50mV/Div)I OUT (1A/Div)Voltage RippleV IN = 3.3V, V OUT = 1.2V, I OUT = 1AV OUT (10mV/Div)V LX (2V/Div)Time (500ns/Div)Voltage RippleV IN = 5V, V OUT = 3.3V, I OUT = 1AV OUT (10mV/Div)V LX (2V/Div)Time (500ns/Div)Time (500μs/Div)Power On from ENV EN (5V/Div)V OUT (2V/Div)I OUT (1A/Div)V IN = 5V, V OUT = 1.2V, I OUT = 1ATime (50μs/Div)Power Off from ENV EN (5V/Div)V OUT (2V/Div)I OUT (1A/Div)V IN = 5V, V OUT = 1.2V, I OUT = 1AApplication InformationThe RT5711A is a single-phase step-down converter. It provides single feedback loop, constant on-time current mode control with fast transient response. An internal 0.6V reference allows the output voltage to be precisely regulated for low output voltage applications. A fixed switching frequency (1MHz) oscillator and internal compensation are integrated to minimize external component count. Protection features include over-current protection, under-voltage protection and over-temperature protection. Output Voltage SettingConnect a resistive voltage divider at the FB between V OUT and GND to adjust the output voltage. The output voltage is set according to the following equation :OUT REF R1V = V 1R2⎛⎫⨯+ ⎪⎝⎭where V REF is the feedback reference voltage 0.6V (typ.).VFigure 1. Setting V OUT with a Voltage Divider Chip Enable and DisableThe EN pin allows for power sequencing between the controller bias voltage and another voltage rail. The RT5711A remains in shutdown if the EN pin is lower than 400mV. When the EN pin rises above the V EN trip point, the RT5711A begins a new initialization and soft-start cycle. Internal Soft-StartThe RT5711A provides an internal soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. The soft-start (SS) automatically begins once the chip is enabled. During soft-start, the internal soft-start capacitor becomes charged and generates a linear ramping up voltage across the capacitor. This voltage clamps thevoltage at the FB pin, causing PWM pulse width to increase slowly and in turn reduce the input surge current. The internal 0.6V reference takes over the loop control once the internal ramping-up voltage becomes higher than 0.6V. UVLO ProtectionThe RT5711A has input Under Voltage Lockout protection (UVLO). If the input voltage exceeds the UVLO rising threshold voltage (2.25V typ.), the converter resets and prepares the PWM for operation. If the input voltage falls below the UVLO falling threshold voltage during normal operation, the device will stop switching. The UVLO rising and falling threshold voltage has a hysteresis to prevent noise-caused reset. Inductor SelectionThe switching frequency (on-time) and operating point (% ripple or LIR) determine the inductor value as shown below :()OUT IN OUT SW LOAD(MAX)INV V VL =f LIR I V ⨯-⨯⨯⨯where LIR is the ratio of the peak-to-peak ripple current to the average inductor current.Find a low loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. The core must be large enough not to saturate at the peak inductor current (I PEAK ) :PEAK LOAD(MAX)LOAD(MAX)LIR I = I + I 2⎛⎫⨯ ⎪⎝⎭The calculation above serves as a general reference.To further improve transient response, the output inductor can be further reduced. This relation should be considered along with the selection of the output capacitor.Inductor saturation current should be chosen over IC’s current limit.Input Capacitor SelectionHigh quality ceramic input decoupling capacitor, such as X5R or X7R, with values greater than 10μF are recommended for the input capacitor. The X5R andX7R ceramic capacitors are usually selected for power regulator capacitors because the dielectric material has less capacitance variation and more temperature stability.Voltage rating and current rating are the key parameters when selecting an input capacitor. Generally, selecting an input capacitor with voltage rating 1.5 times greater than the maximum input voltage is a conservatively safe design.The input capacitor is used to supply the input RMS current, which can be approximately calculated usingthe following equation :IN_RMS LOAD I = I The next step is selecting a proper capacitor for RMS current rating. One good design uses more than one capacitor with low equivalent series resistance (ESR) in parallel to form a capacitor bank.The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be approximately calculated using the following equation :OUT(MAX)OUTOUTIN IN SW ININ I V V V = 1C f V V⎛⎫∆⨯⨯- ⎪⨯⎝⎭Output Capacitor SelectionThe output capacitor and the inductor form a low pass filter in the Buck topology. In steady state condition, the ripple current flowing into/out of the capacitor results in ripple voltage. The output voltage ripple (V P-P ) can be calculated by the following equation :P_P LOAD(MAX)OUT SW 1V = LIR I ESR + 8C f ⎛⎫⨯⨯ ⎪⨯⨯⎝⎭ When load transient occurs, the output capacitorsupplies the load current before the controller can respond. Therefore, the ESR will dominate the output voltage sag during load transient. The output voltage undershoot (V SAG ) can be calculated by the following equation :SAG LOAD V = I ESR ∆⨯For a given output voltage sag specification, the ESR value can be determined.Another parameter that has influence on the output voltage sag is the equivalent series inductance (ESL).The rapid change in load current results in di/dt during transient. Therefore, the ESL contributes to part of the voltage sag. Using a capacitor with low ESL can obtain better transient performance. Generally, using several capacitors connected in parallel can have better transient performance than using a single capacitor for the same total ESR. Thermal ConsiderationsFor continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : P D(MAX) = (T J(MAX) - T A ) / θJAwhere T J(MAX) is the maximum junction temperature, T A is the ambient temperature, and θJA is the junction to ambient thermal resistance.For recommended operating condition specifications, the maximum junction temperature is 125︒C. The junction to ambient thermal resistance, θJA , is layout dependent. For WDFN-6L 2x2 package, the thermal resistance, θJA , is 120︒C/W on a standard four-layer thermal test board. The maximum power dissipation at T A = 25︒C can be calculated by the following formula : P D(MAX) = (125︒C - 25︒C) / (120︒C/W) = 0.833W for WDFN-6L 2x2 packageThe maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA . The derating curve in Figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.Figure 2. Derating Curve of Maximum PowerDissipation0.00.20.40.60.81.0255075100125Ambient Temperature (°C)M a x i m u m P o w e r D i s s i p a t i o n (W )Outline DimensionW-Type 6L DFN 2x2 PackageRichtek Technology Corporation14F, No. 8, Tai Yuen 1st Street, Chupei CityHsinchu, Taiwan, R.O.C.Tel: (8863)5526789Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.。
MAXIM MAX7311 说明书
现货库存、技术资料、百科信息、热点资讯，精彩尽在鼎好!General DescriptionThe MAX7311 2-wire-interfaced expander provides 16-bit parallel input/output (I/O) port expansion for SMBus™and I 2C™ applications. The MAX7311 consists of input port registers, output port registers, polarity inversion reg-isters, configuration registers, a bus timeout register, and an I 2C-compatible serial interface logic compatible with SMBus. The system master can invert the MAX7311 input data by writing to the active-high polarity inversion regis-ter. The system master can enable or disable bus timeout by writing to the bus timeout register.Any of the 16 I/O ports can be configured as an input or output. A power-on reset (POR) initializes the 16 I/Os as inputs. Three address select pins configure one of 64 slave ID addresses.The MAX7311 supports hot insertion. All port pins, the INT output, SDA, SCL and the slave address inputs AD0–2 remain high impedance in power down (V+ =0V) with up to 6V asserted upon them.The MAX7311 is available in 24-pin SO, SSOP, TSSOP,and thin QFN packages and is specified over the -40°C to +125°C automotive temperature range.For applications requiring I/Os without pullup resistors,refer to the MAX7312 data sheet.ApplicationsServersRAID Systems Industrial Control Medical Equipment PLCsInstrumentation and Test MeasurementFeatures♦400kbps I 2C-Compatible Serial Interface♦2V to 5.5V Operation ♦5V Overvoltage Tolerant I/Os ♦Supports Hot Insertion♦16 I/O Pins that Default to Inputs on Power-Up ♦100k ΩPullup on Each I/O ♦Open-Drain Interrupt Output (INT )♦Bus Timeout for Lock-Up-Free Operation ♦Noise Filter on SCL / SDA Inputs ♦64 Slave ID Addresses Available ♦Low Standby Current (2.9µA typ)♦Polarity Inversion♦4mm ✕4mm, 0.8mm Thin QFN Package ♦-40°C to +125°C OperationMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection________________________________________________________________Maxim Integrated Products 1Ordering Information19-2747; Rev 4; 4/05For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .SMBus is a trademark of Intel Corp.Purchase of I 2C components of Maxim Integrated Products, Inc.or one of its sublicensed Associated Companies, conveys a license under the Phillips I 2C Patent Rights to use these compo-nents in an I 2C system, provided that the system conforms to the I 2C Standard Specification as defined by Phillips.Pin ConfigurationsM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion ProtectionABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V +to GND................................................................-0.3V to +6V I/O0–I/O15 as Inputs....................................(GND - 0.3V) to +6V SCL, SDA, AD0, AD1, AD2, INT ...................(GND - 0.3V) to +6V Maximum V +Current......................................................+250mA Maximum GND Current...................................................-250mA DC Input Current on I/O0–I/O15.......................................±20mA DC Output Current on I/O0–I/O15....................................±80mAContinuous Power Dissipation (T A = +70°C)24-Pin Wide SO (derate 11.8mW/°C above +70°C)....941mW 24-Pin SSOP (derate 8.0mW/°C above +70°C)...........640mW 24-Pin TSSOP (derate 12.2mW/°C above +70°C).......975mW 24-Pin Thin QFN (derate 20.8mW/°C above +70°C).1668mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°CMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________3Note 2:Minimum SCL clock frequency is limited by the MAX7311 bus timeout feature, which resets the serial bus interface if eitherSDA or SCL is held low for a minimum of 25ms. Disable bus timeout feature for DC operation.Note 3:A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V IL of the SCLsignal) in order to bridge the undefined region SCL’s falling edge.Note 4:C B = total capacitance of one bus line in pF.Note 5:The maximum t F for the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage t F isspecified at 250ns. This allows series protection resistors to be connected between the SDA and SCL pins and the SDA/SCL bus lines without exceeding the maximum specified t F .Note 6:Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.DC ELECTRICAL CHARACTERISTICS (continued)(V += 2V to 5.5V, T A = -40°C to +125°C, unless otherwise noted. Typical values are at V += 3.3V, T A = +25°C.) (Note 1)AC ELECTRICAL CHARACTERISTICSM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 4_______________________________________________________________________________________Typical Operating Characteristics(T A = +25°C, unless otherwise noted.)SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )1007525500-251020304050607080901000-50125STANDBY SUPPLY CURRENTvs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )100752550-251234567890-50125SUPPLY CURRENT vs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (µA )5.04.53.5 4.03.02.510203040506070809010002.05.5I/O SINK CURRENT vs. OUTPUT LOW VOLTAGEV OL (V)I S I N K (m A )0.50.40.30.20.124681012141618202224000.6I/O SINK CURRENT vs. OUTPUT LOW VOLTAGEV OL (V)I S I N K (m A )0.50.40.30.20.15101520253035404550000.6I/O SINK CURRENT vs. OUTPUT LOW VOLTAGEV OL (V)I S I N K (m A )0.40.30.20.1510152025303540455000.5I/O OUTPUT LOW VOLTAGEvs. TEMPERATURETEMPERATURE (°C)V O L (m V )10075-252550501001502002503003504000-50125I/O SOURCE CURRENT vs. OUTPUT HIGH VOLTAGEV + - V OH (V)I S O U R C E (m A )0.60.50.40.30.20.151015202500.7I/O SOURCE CURRENT vs. OUTPUT HIGH VOLTAGEV + - V OH (V)I S O U R C E (m A )0.60.50.30.40.20.15101520253035404550000.7MAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________5Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)I/O SOURCE CURRENT vs. OUTPUT HIGH VOLTAGEV + - V OH (V)I S O U R C E (m A )0.60.50.30.40.20.1510152025303540455000I/O HIGH VOLTAGE vs. TEMPERATURETEMPERATURE (°C)V + - V O H (V )100755025-25100200300400500-50125M A X 7311Detailed DescriptionThe MAX7311 general-purpose input/output (GPIO)peripheral provides up to 16 I/O ports, controlled through an I 2C-compatible serial interface. The MAX7311 consists of input port registers, output port registers, polarity inversion registers, configuration reg-isters, and a bus-timeout register. Upon power-on, all I/O lines are set as inputs. Three slave ID address select pins, AD0, AD1, and AD2, choose one of 64 slave ID addresses, including the eight addresses supported by the Phillips PCA9555. Table 1 is the register address table. Tables 2–6 show detailed register information.Serial InterfaceSerial AddressingThe MAX7311 operates as a slave that sends and receives data through a 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master, typically a microcon-troller, initiates all data transfers to and from the MAX7311, and generates the SCL clock that synchro-nizes the data transfer (Figure 2).2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 6_______________________________________________________________________________________Figure 1. MAX7311 Block DiagramFigure 2. 2-Wire Serial Interface Timing DiagramEach transmission consists of a START condition sent by a master, followed by the MAX7311 7-bit slave address plus R/W bit, a register address byte, 1 or more data bytes, and finally a STOP condition (Figure 3).START and STOP ConditionsBoth SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmis-sion with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 3).Bit TransferOne data bit is transferred during each clock pulse.The data on SDA must remain stable while SCL is high (Figure 4).AcknowledgeThe acknowledge bit is a clocked 9th bit, which the recipient uses as a handshake receipt of each byte of data (Figure 5). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is sta-ble low during the high period of the clock pulse. When the master is transmitting to the MAX7311, theMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________7Figure 3. START and STOP ConditionsFigure 4. Bit TransferFigure 5. AcknowledgeM A X 7311MAX7311 generates the acknowledge bit since the MAX7311 is the recipient. When the MAX7311 is trans-mitting to the master, the master generates the acknowledge bit.Slave AddressThe MAX7311 has a 7-bit-long slave address (Figure 6).The 8th bit following the 7-bit slave address is the R/W bit. Set this bit low for a write command and high for a read command.Slave address pins AD2, AD1, and AD0 choose 1 of 64slave ID addresses (Table 7).Data Bus TransactionThe command byte is the first byte to follow the 8-bit device slave address during a write transmission (Table 1, Figure 7). The command byte is used to deter-mine which of the following registers are written or read.Writing to Port RegistersTransmit data to the MAX7311 by sending the device slave address and setting the LSB to a logic zero. The command byte is sent after the address and deter-mines which registers receive the data following the command byte (Figure 7).2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 8_______________________________________________________________________________________Figure 7. Writes to Output Registers Through Write Byte ProtocolEight of the MAX7311’s nine registers are configured to operate as four register pairs: input ports, output ports,polarity inversion ports, and configuration ports. After sending 1 byte of data to one register, the next byte is sent to the other register in the pair. For example, if the first byte of data is sent to output port 2, then the next byte of data is stored in output port 1. An unlimited number of data bytes can be sent in one write transmis-sion. This allows each 8-bit register to be updated inde-pendently of the other registers.Reading Port RegistersTo read the device data, the bus master must first send the MAX7311 address with the R/W bit set to zero, fol-lowed by the command byte, which determines which register is accessed. After a restart, the bus master must then send the MAX7311 address with the R/W bit set to 1. Data from the register defined by the com-mand byte is then sent from the MAX7311 to the master (Figures 8, 9).MAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection_______________________________________________________________________________________9Figure 8. Read from RegisterFigure 9. Read from Input RegistersM A X 7311Data is clocked into a register on the falling edge of the acknowledge clock pulse. After reading the first byte,additional bytes may be read and reflect the content in the other register in the pair. For example, if input port 1is read, the next byte read is input port 2. An unlimited number of data bytes can be read in one read trans-mission, but the final byte received must not be acknowledged by the bus master.Interrupt (INT )The open-drain interrupt output, INT,activates when one of the port pins changes states and only when the pin is configured as an input. The interrupt deactivates when the input returns to its previous state or the input register is read (Figure 9). A pin configured as an out-put does not cause an interrupt. Each 8-bit port register is read independently; therefore, an interrupt caused by port 1 is not cleared by a read of port 2’s register. Changing an I/O from an output to an input may cause a false interrupt to occur if the state of that I/O does not match the content of the input port register.Input/Output PortWhen an I/O is configured as an input, FETs Q1 and Q2are off (Figure 10), creating a high-impedance input with a nominal 100k Ωpullup to V +. All inputs are overvoltage protected to 5.5V, independent of supply voltage. When a port is configured as an output, either Q1 or Q2 is on,depending on the state of the output port register. When V +powers up, an internal power-on reset sets all regis-ters to their respective defaults (Table 1).Input Port RegistersThe input port registers (Table 2) are read-only ports.They reflect the incoming logic levels of the pins,regardless of whether the pin is defined as an input or an output by the respective configuration register. A read of the input port 1 register latches the current value of I/O0–I/O7. A read of the input port 2 register latches the current value of I/O8–I/O15. Writes to the input port registers are ignored.2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 10______________________________________________________________________________________Figure 10. Simplified Schematic of I/OsThe output port registers (Table 3) set the outgoing logic levels of the I/Os defined as outputs by the respective configuration register. Reads from the out-put port registers reflect the value that is in the flip-flop controlling the output selection, not the actual I/O value.Polarity Inversion Registers The polarity inversion registers (Table 4) enable polarity inversion of pins defined as inputs by the respective port configuration registers. Set the bit in the polarity inversion register to invert the corresponding port pin’s polarity. Clear the bit in the polarity inversion register to retain the corresponding port pin’s original polarity.Configuration Registers The configuration registers (Table 5) configure the directions of the I/O pins. Set the bit in the respective configuration register to enable the corresponding port as an input. Clear the bit in the configuration register to enable the corresponding port as an output.Set register 0x08 LSB (bit 0) to enable the bus timeout function (Table 6) or clear it to disable the bus timeout function. Enabling the timeout feature resets theMAX7311 serial bus interface when SCL stops either highor low during a read or write. If either SCL or SDA is lowfor more than 29ms after the start of a valid serial transfer,the interface resets itself and sets up SDA as an input.The MAX7311 then waits for another START condition.StandbyThe MAX7311 goes into standby when the I2C bus isidle. Standby supply current is typically 2.9µA.Applications InformationHot InsertionThe I/O ports I/O0–I/O15, interrupt output INT, and serial interface SDA, SCL, AD0–2 remain high impedance withup to 6V asserted on them when the MAX7311 is pow-ered down (V+ = 0V). The MAX7311 can therefore beused in hot-swap applications. Note that each I/O’s100kΩpullup effectively becomes a 100kΩpulldownwhen the MAX7311 is powered down.Power-Supply ConsiderationThe MAX7311 operates from a supply voltage of 2V to5.5V. Bypass the power supply to GND with a 0.047µF capacitor as close to the device as possible. For theQFN version, connect the exposed pad to GND.MAX73112-Wire-Interfaced 16-Bit I/O Port Expanderwith Interrupt and Hot-Insertion Protection ______________________________________________________________________________________11 Table 2. Registers 0x00, 0x01—Input Port RegistersM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 12______________________________________________________________________________________Table 7. MAX7311 Address MapMAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection______________________________________________________________________________________13Chip InformationTRANSISTOR COUNT: 12,994PROCESS: BiCMOSM A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection 14______________________________________________________________________________________Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)MAX73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection______________________________________________________________________________________15Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)M A X 73112-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protectionimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________16©2005 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products, Inc.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)。
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19-2195; Rev 0; 10/01For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .General DescriptionThe MAX5711 is a small footprint, low-power, 10-bit digi-tal-to-analog converter (DAC) that operates from a single +2.7V to +5.5V supply. The MAX5711 on-chip precision output amplifier provides Rail-to-Rail ®output swing.Drawing an 85µA supply current at 3V, the MAX5711 is ideally suited to portable battery-operated equipment.The MAX5711 utilizes a 3-wire serial interface compatible with SPI™/QSPI™/MICROWIRE™ and DSP-interface standards. All logic inputs are CMOS-logic compatible and buffered with Schmitt triggers to allow direct interfac-ing to optocouplers. The MAX5711 incorporates a power-on reset (POR) circuit that ensures that the DAC begins in a zero-volt-state upon power-up. A power-down mode that reduces current consumption to 0.3µA may be initiat-ed through a software command.The MAX5711 is available in a small 6-pin SOT23 pack-age. For dual and quad 10-bit versions, see the MAX5721and MAX5741 data sheets. For single, dual, and quad 12-bit versions, see the MAX5712, MAX5722, and MAX5742 data sheets. The MAX5711 is specified over the automotive temperature range of -40°C to +125°C.ApplicationsAutomatic TuningGain and Offset Adjustment Power Amplifier Control Process Control I/O Boards Battery-Powered EquipmentVCO ControlFeatureso Wide -40°C to +125°C Operating Temperature Range o Low 85µA Supply Currento Ultra Low 0.3µA Power-Down Supply Current o Single +2.7V to +5.5V Supply Voltageo Fast 20MHz 3-Wire SPI/QSPI/MICROWIRE and DSP-Compatible Serial Interface o Schmitt-Triggered Inputs for Direct Interfacing to Optocouplers o Rail-to-Rail Output Buffer o Power-On Reset to Zero Voltso Three Software-Selectable Power-Down Output Impedances (100k Ω, 1k Ω, Hi-Z)o Tiny 6-Pin SOT23 PackageMAX571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT23________________________________________________________________Maxim Integrated Products 1__________________Pin ConfigurationFunctional DiagramOrdering InformationRail-to-Rail is a registered trademark of Nippon Motorola, Ltd.SPI and QSPI are trademarks of Motorola, Inc.MICROWIRE is a trademark of National Semiconductor, Corp.M A X 571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT232_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V DD to GND..............................................................-0.3V to +6V OUT, SCLK, DIN, CS to GND.....................-0.3V to (V DD + 0.3V)Maximum Current into Any Pin.........................................±50mA Continuous Power Dissipation (T A = +70°C)6-Pin SOT23 (derate 9.1mW/°C above +70°C)...........727mWOperating Temperature RangeMAX5711EUT .................................................-40°C to +85°C MAX5711AUT...............................................-40°C to +125°C Maximum Junction Temperature.....................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C-4-2-30-1123402563841285126407688961024CODEI N L (L S B )INTEGRAL NONLINEARITY vs. CODE (T A = +25°C)MAX571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT23_______________________________________________________________________________________3Note 3:Offset and gain error limit the FSR.Note 4:Guaranteed by design.ELECTRICAL CHARACTERISTICS (continued)(V DD = +2.7V to +5.5V, GND = 0, R L = 5k Ω, C L = 200pF, T A = T MIN to T MAX , T A = +25°C, unless otherwise noted. Typical values are at Typical Operating Characteristics(T A = +25°C, unless otherwise noted.)-0.20-0.10-0.150-0.050.050.100.150.2002563841285126407688961024CODED N L (L S B )DIFFERENTIAL NONLINEARITY vs. CODE (T A = +25°C)V DD = +3V OR +5V-1.0-0.6-0.8-0.2-0.40.200.40.80.61.02563841285126407688961024CODET O T A L U N A D J U S T E D E R R O R (%)TOTAL UNADJUSTED ERROR vs. CODE (T A = +25°C)-4-2-30-1123402563841285126407688961024CODEI N L (L S B )INTEGRAL NONLINEARITY vs. CODE (T A = +125°C)-0.20-0.10-0.150-0.050.050.100.150.2002563841285126407688961024CODED N L (LS B )DIFFERENTIAL NONLINEARITY vs. CODE (T A = +125°C)V DD = +3V OR +5V-1.0-0.6-0.8-0.2-0.40.200.40.80.61.02563841285126407688961024CODET O T A L U N A D J U S T E D E R R O R (%)TOTAL UNADJUSTED ERROR vs. CODE (T A = +125°C)-4-2-30-1123402563841285126407688961024CODEI N L (L S B )INTEGRAL NONLINEARITY vs. CODE (T A = -40°C)-0.20-0.10-0.150-0.050.050.100.150.2002563841285126407688961024CODED N L (L S B )DIFFERENTIAL NONLINEARITYvs. CODE (T A = -40°C)V DD = +3V OR +5V2563841285126407688961024CODET O T A L U N A D J U S T E D E R R O R(%)TOTAL UNADJUSTED ERROR vs. CODE (T A = -40°C)-0.8-0.4-0.60.20-0.20.80.60.41.0-4-2-310-1324-4020-20406080100120TEMPERATURE (°C)I N L A N D D N L (L S B )WORST-CASE INL AND DNL vs. TEMPERATURE00.51.01.52.02.53.00426810121416SOURCE AND SINK CURRENT CAPABILITY (V DD = +3V)I SOURCE/SINK (mA)V O U T (V)1.00.52.01.53.02.53.54.54.05.0101552025303540SOURCE AND SINK CURRENT CAPABILTIY (V DD = +5V)I SOURCE/SINK (mA)V O U T (V )Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)M A X 571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT234_______________________________________________________________________________________0402080601001202.75.2SUPPLY CURRENT vs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (µA )3.73.24.24.70100502001502503002.73.74.23.24.75.2SUPPLY VOLTAGE (V)P O W E R -D O W N S U P P L Y C U R R E N T (n A )POWER-DOWN SUPPLY CURRENTvs. SUPPLY VOLTAGE200100500400300800700600900021345S U P P L Y C U R R E N T (µA )SUPPLY CURRENT vs. CS INPUT VOLTAGEFULL-SCALE SETTLING TIME(V DD = +5V)MAX5711 toc16V OUT 1V/divV SCLK 5V/div1µs/divCODE 000 TO 3FF HEX R L = 5k ΩC L = 200pF FULL-SCALE SETTLING TIME(V DD = +5V)MAX5711 toc17V OUT 1V/divV SCLK 5V/div2µs/divCODE 3FF HEX TO 000R L = 5k ΩC L = 200pFHALF-SCALE SETTLING TIME(V DD = +3V)MAX5711 toc18V OUT 1V/divV SCLK 5V/div1µs/divCODE 100 HEX TO 300 HEX R L = 5k ΩC L = 200pFHALF-SCALE SETTLING TIME(V DD = +3V)MAX5711 toc19V OUT 1V/divV SCLK 5V/div 1µs/divCODE 300 HEX TO 100 HEX R L = 5k ΩC L = 200pFEXITING POWER-DOWN(V DD = +5V)MAX5711 toc20V OUT1V/divV SCLK 5V/div5µs/divCODE 200 HEXR L = 5k ΩC L = 200pFDIGITAL-TO-ANALOG GLITCH IMPULSE (V DD = +5V)MAX5711 toc21V OUT 10mV/divCODE 200 HEX TO 1FF HEX R L = 5k ΩC L = 200pF500ns/divTypical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)MAX571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT23_______________________________________________________________________________________5M A X 571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT236_______________________________________________________________________________________Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)DIGITAL-TO-ANALOG GLITCH IMPULSE (V DD = +5V)MAX5711 toc22V OUT 10mV/div500ns/divCODE 1FF HEX TO 200 HEX R L = 5k ΩC L = 200pFCLOCK FEEDTHROUGH(V DD = +5V)MAX5711 toc23V OUT 1mV/divV SCLK 2V/div500ns/divR L = 5k ΩC L = 200pFMAX571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT23_______________________________________________________________________________________7Detailed DescriptionThe MAX5711 voltage-output, 10-bit DAC, offers a full 10-bit performance in a small 6-pin SOT23 package.The SOT23 footprint is less than 9mm 2. The MAX5711has less than 1LSB differential nonlinearity error, ensur-ing monotonic performance. The device uses a simple 3-wire, SPI/QSPI/MICROWIRE and DSP-compatible ser-ial interface that operates up to 20MHz. The MAX5711incorporates three shutdown modes, making it ideal for low-power applications.Analog SectionThe MAX5711 consists of a resistor string, an output buffer, and a POR circuit. Monotonic digital-to-analog conversion is achieved using a resistor string architec-ture. Since V DD is the reference for the MAX5711, the accuracy of the DAC depends on the accuracy of V DD .The low bias current of the MAX5711 allows its power to be supplied by a voltage reference such as the MAX6030. The 10-bit DAC code is binary-unipolar with 1LSB = V DD /1024.Output BufferThe DAC output buffer has a rail-to-rail output and is capable of driving a 5k Ωresistive load in parallel with a 200pF capacitive load. With a capacitive load of 200pF,the output buffer slews 0.5V/µs. With a 1/4FS to 3/4FS output transition, the amplifier output settles to 1/2LSB in less than 10µs when loaded with 5k Ωin parallel with 200pF. The buffer amplifier is stable with any combination of resistive loads greater than 5k Ωand capacitive loads less than 200pF.Program the input register bits to power-down the device. The DAC registers are preserved during power-down and upon wake-up, the DAC output is restored to its pre-power-down voltage.Power-On ResetThe MAX5711 has a POR circuit to set the DACs output to zero when V DD is first applied. This ensures that unwanted DAC output voltages will not occur immedi-ately following a system startup, such as after a loss of power. Upon initial power-up, an internal power-on reset circuit ensures that all DAC registers are cleared,the DAC is powered-down, and its output is terminated to GND by a 100k Ωresistor. An 8µs recovery time after issuing a wake-up command is needed before writing to the DAC registers.Digital Section3-Wire Serial InterfaceThe MAX5711 digital interface is a standard 3-wire con-nection compatible with SPI/QSPI/MICROWIRE/DSP interfaces. The chip-select input (CS ) frames the serial data loading at DIN. Immediately following CS high-to-low transition, the data is shifted synchronously and latched into the input register on the falling edge of the serial clock input (SCLK ). After 16 bits have been loaded into the serial input register, the serial input reg-ister transfers its contents to the DAC latch. CS may then either be held low or brought high. CS must be brought high for a minimum of 80ns before the next write sequence, since a write sequence is initiated on aM A X 571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT238_______________________________________________________________________________________falling edge of CS . Not keeping CS low during the first 15 SCLK cycles discards input data. The serial clock (SCLK) can idle either high or low between transitions.Figure 1 shows the complete 3-wire serial interface transmission. Table 1 lists serial-interface mapping. The first command after V DD is applied must be the wake-up command.Power-Down ModesThe MAX5711 includes three software-controlled power-down modes that reduce the supply current to below 1µA. In two of the three power-down modes,OUT is connected to GND through a resistor. Table 1lists the three power-down modes of operation. When in power-down, the MAX5711 does not respond to the “set and update ” command.Applications InformationDevice Powered by an External ReferenceThe MAX5711 generates an output voltage proportional to V DD , coupling power-supply noise to the output. The circuit in Figure 2 rejects this power-supply noise by powering the device directly with a precision voltage reference, improving overall system accuracy. The MAX6030 (+3V, 75ppm) or the MAX6050 (+5V, 75ppm)precision voltage references are ideal choices due to the low-power requirements of the MAX5711. This solu-tion is also useful when the required full-scale output voltage is less than the available supply voltages.Digital Inputs and Interface LogicThe 3-wire digital interface for the MAX5711 is compati-ble with SPI, QSPI, MICROWIRE, and DSP. The three digital inputs (CS , DIN, and SCLK) load the digital input serially into the DAC. All of the digital inputs includeSchmitt-trigger buffers to accept slow-transition inter-faces. This allows optocouplers to interface directly to the MAX5711 without additional external logic. The digi-tal inputs are compatible with CMOS-logic levels.Power-Supply Bypassing and LayoutCareful PC board layout is important for optimal system performance. Keep analog and digital signals separate to reduce noise injection and digital feedthrough. Use a ground plane to ensure that the ground return from GND to the supply ground is short and low impedance.Bypass V DD with a 0.1µF capacitor to ground as close as possible to the device.Chip InformationTRANSISTOR COUNT: 3856PROCESS: BiCMOSMAX571110-Bit, Low-Power, Rail-to-RailVoltage-Output Serial DAC in SOT23Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________9©2001 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.Package Information。