P89LPC924_925-03_cn
飞利浦单片机选型指南
ＸＴＡＬ１／Ｐ３．１ 2
１６字节可擦除页规格。
ＣＬＫＯＵＴ／ＸＴＡＬ２／Ｐ３．０ 3
● ２个１６位定时／计数器（ＬＰＣ９０１的定时器０可作为ＰＷＭ输出）。 ● 模拟比较器：２个（ＬＰＣ９０２／９０３／９０４），１个（ＬＰＣ９０１）。
ＲＳＴ／Ｐ１．５ 4
● ２路输入的Ａ／Ｄ转换器／１个ＤＡＣ输出，可选择参考源（ＬＰＣ９０４）。
功能部件 ＵＡＲＴ，ＲＴＣ，ＫＢＩ
ＡＤＣ／ＤＡＣ ＣＭＰ ＰＷＭ
１２８Ｂ
８脚
１Ｋ
功能部件 ＵＡＲＴ，ＲＴＣ，ＫＢＩ
ＡＤＣ／ＤＡＣ ＣＭＰ ＰＷＭ
ＳＰＩ、Ｉ２Ｃ
１６脚 １４脚
２５６Ｂ ２Ｋ １Ｋ １２８Ｂ
功能部件 ＵＡＲＴ，ＲＴＣ，ＫＢＩ
ＡＤＣ／ＤＡＣ ＣＭＰ ＰＷＭ
ＳＰＩ、Ｉ２Ｃ ＩＳＰ
８Ｋ ４Ｋ ２５６Ｂ ２０脚 ２Ｋ
在程序运行时改变代码。 ● ６４脚ＬＱＦＰ封装。 ● ＤＰ－９４０１开发套件。
智能卡水表 ／ 气表“单片”解决方案
Ｐ８９ＬＰＣ９１０２／９１０３／９１０７ Ｆｌａｓｈ单片机
０４ ● １２８字节 ＲＡＭ数据存储器。１ｋＢ可字节擦除的Ｆｌａｓｈ程 序存储器，组成２５６字节扇区和１６字节擦除页规格。
13 Ｐ０．２／ＣＩＮ２Ａ／ＫＢＩ２ 12 Ｐ０．４／ＣＩＮ１Ａ／ＫＢＩ４ 11 Ｐ０．５／ＣＭＰＲＥＦ／ＫＢＩ５ 10 ＶＤＤ
9 Ｐ１．０／ＴＸＤ
8 ＣＬＫＯＵＴ／ＸＴＡＬ２／Ｐ３．０
Ｐ２．２／ＭＯＳＩ 1 ＳＰＩＣＬＫ／Ｐ２．５ 2
● Ｆｌａｓｈ保密位可防止程序被读出。 ● 在应用中编程（ＩＡＰ－Ｌｉｔｅ）和字节擦写功能使得程序存储器可用于非易
失性数据的存储。 ● 实时时钟可作为系统定时器。 ● ２个模拟比较器。可选择输入和参考源。 ● ＳＰＩ通信端口、４个键盘中断输入。 ● 选择片内振荡和片内复位时可多达１２个Ｉ／Ｏ口。 ● １４脚ＴＳＳＯＰ和ＤＩＰ封装。
P89LPC922FDH中文资料
plastic dual in-line package; 20 leads (300 mil) SOT146-1
3.1 Ordering options
Table 2: Part options
Type number
Flash memory
P89LPC920FDH
2 kB
P89LPC921FDH
8-bit microcontrollers with two-clock 80C51 core
3. Ordering information
Table 1: Ordering information
Type number
Package
Name
Description
Version
P89LPC920FDH TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm
s Low voltage reset (Brownout detect) allows a graceful system shutdown when power fails. May optionally be configured as an interrupt.
s Idle and two different Power-down reduced power modes. Improved wake-up from Power-down mode (a low interrupt input starts execution). Typical Power-down current is 1 µA (total Power-down with voltage comparators disabled).
北京单片机八路模拟开关板芯片型号
北京单片机八路模拟开关板芯片型号一、引言北京单片机八路模拟开关板是一种常用的电子元器件，它能够实现对电路的控制和监测。
本文将介绍该开关板的芯片型号及其特点。
二、北京单片机八路模拟开关板概述北京单片机八路模拟开关板是一种具有8个模拟输入通道和8个数字输出通道的电子元器件。
它可以用于模拟信号采集、温度测量、压力测量等领域。
该开关板采用了高精度ADC芯片和可编程逻辑器件，具有高精度、高速度和可编程性强等特点。
三、芯片型号介绍北京单片机八路模拟开关板采用了TI公司的MSP430F149芯片作为主控芯片，同时还配备了MAX11607 ADC芯片和74HC595数字输出芯片。
1. MSP430F149芯片MSP430F149是TI公司生产的超低功耗16位RISC微控制器，具有512KB闪存和10KB RAM。
该芯片具有多种外设接口，包括UART、I2C、SPI等，并支持多种中断方式。
此外，MSP430F149还具有低功耗模式，在待机状态下功耗仅为0.1μA。
2. MAX11607 ADC芯片MAX11607是Maxim公司生产的12位精度、8通道、模拟输入ADC芯片。
该芯片具有内部参考电压和程序可编程增益，可以适应不同的输入信号范围。
此外，该芯片还具有内部温度传感器和多种电源管理功能。
3. 74HC595数字输出芯片74HC595是一种串行输入、并行输出的移位寄存器，可以实现8位二进制数据的输出。
该芯片采用CMOS技术，具有低功耗、高噪声抑制等特点。
此外，74HC595还支持级联操作，可以扩展输出通道数量。
四、北京单片机八路模拟开关板特点北京单片机八路模拟开关板具有以下特点：1. 高精度该开关板采用了12位精度的ADC芯片和高精度参考电压源，能够实现对模拟信号的高精度采集和处理。
2. 高速度MSP430F149芯片具有16MHz工作频率和快速中断响应能力，能够满足对高速信号的处理需求。
3. 可编程性强MSP430F149芯片支持多种外设接口和中断方式，并具有可编程的闪存和RAM，可以实现对不同应用场景的灵活适应。
P89LPC914FDH,129,P89LPC912FDH,129,P89LPC913FDH,129, 规格书,Datasheet 资料
P89LPC912/913/9148-bit microcontrollers with two-clock 80C51 core, 1 kB 3 Vflash with 128-byte RAMRev. 05 — 28 September 2007Product data sheet1.General descriptionThe P89LPC912/913/914 are single-chip microcontrollers in low-cost 14-pin packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices. Many system-level functionshave been incorporated into the P89LPC912/913/914 in order to reduce componentcount, board space, and system cost.2.Features2.1Principal featuresI 1 kB byte-erasable flash code memory organized into 256B sectors and 16B pages.Single-byte erasing allows any byte(s) to be used as non-volatile data storage.I128B RAM data memory.I Two 16-bit counter/timers. Each timer may be configured to toggle a port output upontimer overflow or to become a PWM output.I23-bit system timer that can also be used as a RTC.I Two analog comparators with selectable inputs and reference source.I Enhanced UART with fractional baud rate generator, break detect, framing errordetection, automatic address detection and versatile interrupt capabilities(P89LPC913, P89LPC914).I SPI communication port.I Internal RC oscillator (factory calibrated to±1%) option allows operation withoutexternal oscillator components.The RC oscillator option is selectable andfine tunable.I 2.4V to 3.6V V DD operating range. I/O pins are 5V tolerant (may be pulled up ordriven to 5.5V).I Up to 12 I/O pins when using internal oscillator and reset options.2.2Additional featuresI14-pin TSSOP packages.I A high performance 80C51 CPU provides instruction cycle times of 111ns to 222nsfor all instructions except multiply and divide when executing at 18MHz (167ns to333ns at12MHz).This is six times the performance of the standard80C51running atthe same clock frequency.A lower clock frequency for the same performance results inpower savings and reduced EMI.I In-Application Programming(IAP-Lite)and byte erase allows code memory to be usedfor non-volatile data storage.I Serial flash In-Circuit Programming (ICP) allows simple production coding withcommercial EPROM programmers. Flash security bits prevent reading of sensitive application programs.I Watchdog timer with separate on-chip oscillator, requiring no external components.The watchdog prescaler is selectable from eight values.I Low voltage reset (brownout detect) allows a graceful system shutdown when powerfails. May optionally be configured as an interrupt.I Idle and two different power-down reduced power modes. Improved wake-up fromPower-down mode (a LOW interrupt input starts execution). Typical power-downcurrent is 1µA (total power-down with voltage comparators disabled).I Active-LOW reset. On-chip power-on reset allows operation without external resetcomponents. A reset counter and reset glitch suppression circuitry prevent spurious and incomplete resets. A software reset function is also available.I Configurable on-chip oscillator with frequency range options selected by userprogrammed flash configuration bits. Oscillator options support frequencies from 20kHz to the maximum operating frequency of 18MHz (P89LPC912, P89LPC913).I Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillatorallowing it to perform an oscillator fail detect function.I Programmable port output configuration options: quasi-bidirectional, open-drain,push-pull, input-only.I Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value ofthe pins match or do not match a programmable pattern.I LED drive capability (20mA) on all port pins. A maximum limit is specified for theentire chip.I Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10nsminimum ramp times.I Only power and ground connections are required to operate the P89LPC912/913/914when internal reset option is selected.I Four interrupt priority levels.I Four keypad interrupt inputs.I Second data pointer.I Schmitt trigger port inputs.I Emulation support.3.Product comparisonTable 1 highlights the differences between these three devices. For a complete list of device features, please see Section 2 “Features” on page 1.4.Ordering information4.1Ordering optionsTable 1.Product comparisonType numberExternal crystal pinsX2 CLKOUT T0 PWM outputSPI with SS pinSPI without SS pinUART Max f osc (MHz)TXD RXDP89LPC912X X X X ---18P89LPC913X X --X X X 18P89LPC914--XX-XX12Table 2.Ordering informationType numberPackage NameDescriptionVersion P89LPC912FDH TSSOP14plastic thin shrink small outline package; 14leads; body width 4.4mmSOT402-1P89LPC912HDH P89LPC913FDH P89LPC914FDHTable 3.Ordering optionsType number Temperature range Frequency P89LPC912FDH −40°C to +85°C 0 MHz to 18MHz P89LPC912HDH −40°C to +125°C 0 MHz to 18MHz P89LPC913FDH −40°C to +85°C 0 MHz to 18MHz P89LPC914FDH−40°C to +85°C0 MHz to 12 MHz5.Block diagramFig 1.P89LPC912 block diagram1 kB CODE FLASHSPICMP1CIN2A CIN1A CMPREFP2[5:2]P3[1:0]P1.2, P1.5P0.2, P0[6:4]MOSI SPICLK MISO T0P89LPC912002aaa472SS128 BYTE DATA RAMPORT 3CONFIGURABLE I/O PORT 2CONFIGURABLE I/OPORT 1CONFIGURABLE I/OPORT 0CONFIGURABLE I/OKEYPAD INTERRUPTWATCHDOG TIMER AND OSCILLATORPROGRAMMABLE OSCILLATOR DIVIDERCPU clockCRYST ALORRESONATORXT AL1XT AL2CONFIGURABLE OSCILLATORON-CHIP OSCILLATORPOWER MONITOR (POWER-ON RESET, BROWNOUT RESET)ANALOG COMPARATORSTIMER 0TIMER 1REAL TIME CLOCK/SYSTEM TIMERinternal busHIGH PERFORMANCEACCELERATED 2-CLOCK 80C51 CPUFig 2.P89LPC913 block diagram1kB CODE FLASHSPICMP1CIN2A CIN1A CMPREFP2.2, P2.3, P2.5P3[1:0]P1.0, P1.1, P1.5P0.2, P0[6:4]TXDRXDMOSI SPICLK MISOP89LPC913002aaa473128 BYTE DATA RAM PORT 3CONFIGURABLE I/OPORT 2CONFIGURABLE I/OPORT 1CONFIGURABLE I/OPORT 0CONFIGURABLE I/OKEYPAD INTERRUPTWATCHDOG TIMER AND OSCILLATORPROGRAMMABLE OSCILLATOR DIVIDERCPU clockCRYSTAL ORRESONA TORXT AL1XT AL2CONFIGURABLE OSCILLATORON-CHIP OSCILLATORANALOG COMP ARATORSTIMER 0TIMER 1REAL TIME CLOCK/SYSTEM TIMERUARTHIGH PERFORMANCEACCELERATED 2-CLOCK 80C51 CPUinternal busPOWER MONITOR (POWER-ON RESET, BROWNOUT RESET)Fig 3.P89LPC914 block diagram1 kB CODE FLASHSPICMP1CIN2A CIN1A CMPREFP2[5:2]P1.5, P1[2:0]P0.2, P0[6:4]MOSI SPICLK MISO T0P89LPC914002aaa474SSTXDRXD HIGH PERFORMANCEACCELERATED 2-CLOCK 80C51 CPU128 BYTE DAT A RAM PORT 2CONFIGURABLE I/O PORT 1CONFIGURABLE I/O PORT 0CONFIGURABLE I/OKEYPAD INTERRUPTWATCHDOG TIMER AND OSCILLATORPROGRAMMABLE OSCILLATOR DIVIDERCPU clockON-CHIP OSCILLATORPOWER MONITOR (POWER-ON RESET, BROWNOUT RESET)ANALOG COMP ARATORSTIMER 0TIMER 1REAL TIME CLOCK/SYSTEM TIMERUARTinternal bus6.Functional diagramFig 4.P89LPC912 functional diagramFig 5.P89LPC913 functional diagramKBI2KBI4KBI5KBI6CIN2ACIN1A CMPREF CMP1T0RSTP89LPC912MOSIMISO SS SPICLK002aaa475V DDV SSCLKOUTXTAL2XTAL1PORT 0PORT 3PORT 1PORT 2KBI2KBI4KBI5KBI6CIN2ACIN1A CMPREF CMP1TXD RXDRSTP89LPC913MOSIMISOSPICLK002aaa476V DD V SSCLKOUTXTAL2XTAL1PORT 0PORT 3PORT 1PORT 2KBI2KBI4 KBI5 KBI6CIN2ACIN1ACMPREFCMP1TXDRXDT0RSTP89LPC914MOSIMISOSSSPICLK002aaa477V DD V SSPORT 0PORT 1PORT 2Fig 6.P89LPC914 functional diagram7.Pinning information7.1PinningFig 7.P89LPC912 TSSOP14 pin configurationFig 8.P89LPC913 TSSOP14 pin configurationFig 9.P89LPC914 TSSOP14 pin configurationP89LPC912P2.2/MOSI P2.3/MISO P2.5/SPICLKP0.2/CIN2A/KBI2P1.5/RSTP0.4/CIN1A/KBI4V SSP0.5/CMPREF/KBI5P0.6/CMP1/KBI6V DD P1.2/T0P2.4/SSP3.1/XTAL1P3.0/XTAL2/CLKOUT002aaa4781234567810912111413P89LPC913P2.2/MOSI P2.3/MISO P2.5/SPICLKP0.2/CIN2A/KBI2P1.5/RSTP0.4/CIN1A/KBI4V SSP0.5/CMPREF/KBI5P0.6/CMP1/KBI6V DD P1.1/RXD P1.0/TXDP3.1/XTAL1P3.0/XTAL2/CLKOUT002aaa4791234567810912111413P89LPC914P2.2/MOSI P2.3/MISO P2.5/SPICLKP0.2/CIN2A/KBI2P1.5/RSTP0.4/CIN1A/KBI4V SSP0.5/CMPREF/KBI5P0.6/CMP1/KBI6V DD P1.1/RXD P1.0/TXD P1.2/T0P2.4/SS002aaa48012345678109121114137.2Pin description Table 4.P89LPC912 pin descriptionSymbol Pin Type DescriptionP0.2, P0.4 to P0.6I/O Port0:Port0 is a 4-bit I/O port with a user-configurable output type. During reset Port0 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port0pins as inputs and outputs depends upon the portconfiguration selected. Each port pin is configured independently. Refer to Section8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.The Keypad Interrupt feature operates with Port0 pins.All pins have Schmitt triggered inputs.Port0 also provides various special functions as described below:P0.2/CIN2A/ KBI213I/O P0.2 —Port0 bit2.I CIN2A —Comparator2 positive input A.I KBI2 —Keyboard input2.P0.4/CIN1A/ KBI412I/O P0.4 —Port0 bit4.I CIN1A —Comparator1 positive input A.I KBI4 —Keyboard input4.P0.5/CMPREF/ KBI511I/O P0.5 —Port0 bit5.I CMPREF —Comparator reference (negative) input.I KBI5 —Keyboard input5.P0.6/CMP1/ KBI65I/O P0.6 —Port0 bit6.O CMP1 —Comparator1 output.I KBI6 —Keyboard input6.P1.2, P1.5I/O(P1.2);I(P1.5)Port1:Port1is a2-bit I/O port with P1.2having a user-configurable output type as noted below.During reset Port1latches are configured in the input only mode with the internal pull-up disabled. The operation of the P1.2 input and outputs depends upon the port configuration selected. Refer to Section 8.12.1 “Port configurations”and T able13“Static characteristics”for details.P1.2is an open drain when used as an output. P1.5 is input only.All pins have Schmitt triggered inputs.Port1 also provides various special functions as described below:P1.2/T06I/O P1.2 —Port1 bit2. (Open drain when used as an output.)I/O T0 —Timer/counter0 external count input or overflow output. (Open drain whenused as outputs.).P1.5/RST3I P1.5 —Port1 bit5. (Input only.)I RST —External Reset input during power-on or if selected via UCFG1. Whenfunctioning as a reset input a LOW on this pin resets the microcontroller, causingI/O ports and peripherals to take on their default states, and the processor beginsexecution at address 0. Also used during a power-on sequence to force ISP mode.When using an oscillator frequency above12MHz,the reset input function ofP1.5 must be enabled. An external circuit is required to hold the device inreset at power-up until V DD has reached its specified level. When systempower is removed V DD will fall below the minimum specified operatingvoltage. When using an oscillator frequency above 12MHz, in someapplications, an external brownout detect circuit may be required to hold thedevice in reset when V DD falls below the minimum specified operatingvoltage.P2.2 to P2.5I/O Port 2:Port 2 is a 4-bit I/O port with a user-configurable output type. During reset Port 2 latches are configured in the input only mode with the internal pull-up disabled.The operation of Port 2pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port 2 also provides various special functions as described below:P2.2/MOSI 1I/OP2.2 —Port 2 bit 2.I/O MOSI —SPI master out slave in. When configured as master, this pin is output,when configured as slave, this pin is input.P2.3/MISO 14I/O P2.3 —Port 2 bit 3.I/O MISO —SPI master in slave out. When configured as master, this pin is input,when configured as slave, this pin is output.P2.4/SS 9I/O P2.4 —Port 2 bit 4.I SS —SPI Slave select.P2.5/SPICLK 2I/O P2.5 —Port 2 bit 5.I/O SPICLK —SPI clock. When configured as master, this pin is output, whenconfigured as slave, this pin is input.P3.0 to P3.1I/OPort 3:Port 3 is a 2-bit I/O port with a user-configurable output type. During resetPort 3 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port 3pins as inputs and outputs depends upon the portconfiguration selected. Each port pin is configured independently. Refer to Section8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port 3 also provides various special functions as described below:P3.0/XT AL2/CLKOUT 8I/O P3.0 —Port 3 bit 0.OXTAL2 —Output from the oscillator amplifier (when a crystal oscillator option is selected via the flash configuration).O CLKOUT —CPU clock divided by 2 when enabled via SFR bit (ENCLK - TRIM.6).It can be used if the CPU clock is the internal RC oscillator, watchdog oscillator orexternal clock input, except when XTAL1/XT AL2 are used to generate clock sourcefor the Real-Time clock/system timer.P3.1/XT AL17I/O P3.1 —Port 3 bit 1.I XTAL1 —Input to the oscillator circuit and internal clock generator circuits (whenselected via the flash configuration). It can be a port pin if internal RC oscillator orwatchdog oscillator is used as the CPU clock source,and if XTAL1/XT AL2 are notused to generate the clock for the Real-Time clock/system timer.V SS 4I Ground: 0V reference.V DD 10IPower Supply:This is the power supply voltage for normal operation as well as Idleand Power-down modes.Table 4.P89LPC912 pin description …continued Symbol Pin TypeDescriptionTable 5.P89LPC913 pin descriptionSymbol Pin Type DescriptionP0.2,P0.4to P0.6I/O Port0:Port0 is a 4-bit I/O port with a user-configurable output type. During reset Port0 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port0pins as inputs and outputs depends upon the portconfiguration selected. Each port pin is configured independently. Refer to Section8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.The Keypad Interrupt feature operates with Port0 pins.All pins have Schmitt triggered inputs.Port0 also provides various special functions as described below:P0.2/CIN2A/ KBI213I/O P0.2 —Port0 bit2.I CIN2A —Comparator2 positive input A.I KBI2 —Keyboard input 2.P0.4/CIN1A/ KBI412I/O P0.4 —Port0 bit4.I CIN1A —Comparator1 positive input A.I KBI4 —Keyboard input 4.P0.5/CMPREF/ KBI511I/O P0.5 —Port0 bit5.I CMPREF —Comparator reference (negative) input.I KBI5 —Keyboard input 5.P0.6/CMP1/ KBI65I/O P0.6 —Port0 bit6.O CMP1 —Comparator1 output.I KBI6 —Keyboard input 6.P1.0, P1.1, P1.5I/O(P1.0,P1.1);I(P1.5)Port1:Port1is a3-bit I/O port with a user-configurable output type,except for P1.5noted below.During reset Port1latches are configured in the input only mode withthe internal pull-up disabled.The operation of the configurable Port1pins as inputsand outputs depends upon the port configuration selected.Each of the configurableport pins are programmed independently. Refer to Section 8.12.1 “Portconfigurations” and Table 13 “Static characteristics” for details. P1.5 is input only.All pins have Schmitt triggered inputs.Port1 also provides various special functions as described below:P1.0/TXD9I/O P1.0 —Port1 bit0.O TXD —T ransmitter output for the serial port.P1.1/RXD6I/O P1.1 —Port1 bit1.I RXD —Receiver input for the serial port.P1.5/RST3I P1.5 —Port1 bit5 (input only).I RST —External Reset input during Power-on or if selected via UCFG1. Whenfunctioning as a reset input, a LOW on this pin resets the microcontroller, causingI/O ports and peripherals to take on their default states, and the processor beginsexecution at address 0. Also used during a power-on sequence to force ISP mode.When using an oscillator frequency above12MHz,the reset input function ofP1.5 must be enabled. An external circuit is required to hold the device inreset at power-up until V DD has reached its specified level. When systempower is removed V DD will fall below the minimum specified operatingvoltage. When using an oscillator frequency above 12MHz, in someapplications, an external brownout detect circuit may be required to hold thedevice in reset when V DD falls below the minimum specified operatingvoltage.P2.2, P2.3,P2.5I/O Port 2: Port 2 is a 3-bit I/O port with a user-configurable output type. During reset Port 2 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port 2pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port 2 also provides various special functions as described below:P2.2/MOSI 1I/OP2.2 —Port 2 bit 2.I/O MOSI —SPI master out slave in. When configured as master, this pin is output,when configured as slave, this pin is input.P2.3/MISO 14I/O P2.3 —Port 2 bit 3.I/O MISO —SPI master in slave out. When configured as master, this pin is input,when configured as slave, this pin is output.P2.5/SPICLK 2I/O P2.5 —Port 2 bit 5.I/O SPICLK —SPI clock. When configured as master, this pin is output, whenconfigured as slave, this pin is input.P3.0 to P3.1I/OPort 3:Port 3 is a 2-bit I/O port with a user-configurable output type. During resetPort 3 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port 3pins as inputs and outputs depends upon the portconfiguration selected. Each port pin is configured independently. Refer to Section8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port 3 also provides various special functions as described below:P3.0/XT AL2/CLKOUT 8I/O P3.0 —Port 3 bit 0.OXTAL2 —Output from the oscillator amplifier (when a crystal oscillator option is selected via the flash configuration).O CLKOUT —CPU clock divided by 2 when enabled via SFR bit (ENCLK - TRIM.6).It can be used if the CPU clock is the internal RC oscillator, watchdog oscillator orexternal clock input, except when XTAL1/XT AL2 are used to generate clock sourcefor the Real-Time clock/system timer.P3.1/XT AL17I/O P3.1 —Port 3 bit 1.I XTAL1 —Input to the oscillator circuit and internal clock generator circuits (whenselected via the flash configuration). It can be a port pin if internal RC oscillator orwatchdog oscillator is used as the CPU clock source,and if XTAL1/XT AL2 are notused to generate the clock for the Real-Time clock/system timer.V SS 4I Ground: 0V reference.V DD 10IPower Supply:This is the power supply voltage for normal operation as well as Idleand Power-down modes.Table 5.P89LPC913 pin description …continued SymbolPin Type DescriptionTable 6.P89LPC914 pin descriptionSymbol Pin Type DescriptionP0.2,P0.4to P0.6I/O Port0:Port0 is a 4-bit I/O port with a user-configurable output type. During reset Port0 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port0pins as inputs and outputs depends upon the portconfiguration selected. Each port pin is configured independently. Refer to Section8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.The Keypad Interrupt feature operates with Port0 pins.All pins have Schmitt triggered inputs.Port0 also provides various special functions as described below:P0.2/CIN2A/ KBI213I/O P0.2 —Port0 bit2.I CIN2A —Comparator2 positive input A.I KBI2 —Keyboard input 2.P0.4/CIN1A/ KBI412I/O P0.4 —Port0 bit4.I CIN1A —Comparator1 positive input A.I KBI4 —Keyboard input 4.P0.5/CMPREF / KBI511I/O P0.5 —Port0 bit5.I CMPREF —Comparator reference (negative) input.I KBI5 —Keyboard input 5.P0.6/CMP1/ KBI65I/O P0.6 —Port0 bit6.O CMP1 —Comparator1 output.I KBI6 —Keyboard input 6.P1.0to P1.2, P1.5I/O(P1.0toP1.2);I(P1.5)Port1: Port1 is a 4-bit I/O port with a user-configurable output type, except forthree pins noted below. During reset Port1 latches are configured in the input onlymode with the internal pull-up disabled. The operation of the configurable Port1pins as inputs and outputs depends upon the port configuration selected. Each ofthe configurable port pins are programmed independently. Refer to Section 8.12.1“Port configurations” and Table 13 “Static characteristics” for details. P1.2 is anopen drain when used as an output. P1.5 is input only.All pins have Schmitt triggered inputs.Port1 also provides various special functions as described below:P1.0/TXD9I/O P1.0 —Port1 bit0.O TXD —T ransmitter output for the serial port.P1.1/RXD6I/O P1.1 —Port1 bit1.I RXD —Receiver input for the serial port.P1.2/T07I/O P1.2 —Port1 bit2. (Open drain when used as an output.)I/O T0 —Timer/counter0 external count input or overflow output. (Open drain whenused as outputs.)P1.5/RST3I P1.5 —Port1 bit5 (input only).I RST —External Reset input during Power-on or if selected via UCFG1. Whenfunctioning as a reset input, a LOW on this pin resets the microcontroller, causingI/O ports and peripherals to take on their default states, and the processor beginsexecution at address 0. Also used during a power-on sequence to force ISP mode.Table 6.P89LPC914 pin description …continuedSymbol Pin Type DescriptionP2.2 to P2.5I/O Port2: Port2 is a 4-bit I/O port with a user-configurable output type. During resetPort2 latches are configured in the input only mode with the internal pull-updisabled.The operation of Port2pins as inputs and outputs depends upon the portconfiguration selected. Each port pin is configured independently. Refer to Section8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port2 also provides various special functions as described below:P2.2/MOSI1I/O P2.2 —Port2 bit2.I/O MOSI —SPI master out slave in. When configured as master, this pin is output,when configured as slave, this pin is input.P2.3/MISO14I/O P2.3 —Port2 bit3.I/O MISO —SPI master in slave out. When configured as master, this pin is input,when configured as slave, this pin is output.P2.4/SS8I/O P2.4 —Port 2 bit 4.I SS —SPI Slave select.P2.5/SPICLK2I/O P2.5 —Port2 bit5.I/O SPICLK —SPI clock. When configured as master, this pin is output, whenconfigured as slave, this pin is input.V SS4I Ground: 0V reference.V DD10I Power Supply: This is the power supply voltage for normal operation as well asIdle and Power-down modes.8.Functional descriptionRemark:Please refer to the P89LPC912/913/914 User manual for a more detailedfunctional description.8.1Special function registersRemark:SFR accesses are restricted in the following ways:•User must not attempt to access any SFR locations not defined.•Accesses to any defined SFR locations must be strictly for the functions for the SFRs.•SFR bits labeled ‘-’, ‘0’ or ‘1’ can only be written and read as follows:–‘-’ Unless otherwise specified,must be written with ‘0’, but can return any valuewhen read (even if it was written with ‘0’). It is a reserved bit and may be used infuture derivatives.–‘0’must be written with ‘0’, and will return a ‘0’ when read.–‘1’must be written with ‘1’, and will return a ‘1’ when read.P89LPC912_913_914_5© NXP B.V . 2007. All rights reserved.Product data sheet Rev. 05 — 28 September 200717 of 66NXP Semiconductors P89LPC912/913/9148-bit microcontrollers with two-clock 80C51 coreTable 7.P89LPC912 Special function registers* indicates SFRs that are bit Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex BinaryBit address E7E6E5E4E3E2E1E0ACC*Accumulator E0H 000000 0000AUXR1Auxiliary function register A2H CLKLP --ENT0SRST 0-DPS 00[1]0000 00x0Bit address F7F6F5F4F3F2F1F0B* B register F0H 000000 0000CMP1Comparator 1 control register ACH --CE1-CN1OE1CO1CMF100[1]xx00 0000CMP2Comparator 2 control register ADH --CE2-CN2-CO2CMF200[1]xx00 0000DIVM CPU clock divide-by-M control95H 000000 0000DPTR Data pointer (2 bytes)DPH Data pointer high 83H 000000 0000DPL Data pointer low 82H 000000 0000FMADRH Program flash address high E7H ------000000 0000FMADRL Program flash address low E6H 000000 0000FMCON Program flash control (Read)E4H BUSY ---HVA HVE SV OI 700111 0000Program flash control (Write)FMCMD.7FMCMD.6FMCMD.5FMCMD.4FMCMD.3FMCMD.2FMCMD.1FMCMD.FMDA T A Program flash data E5H 000000 0000Bit address AF AE AD AC AB AA A9A8IEN0*Interrupt enable 0A8H EA EWDRT EBO -ET1-ET0-000000 0000Bit address EF EE ED EC EB EA E9E8IEN1*Interrupt enable 1E8H ----ESPI EC EKBI -00[1]00x0 0000Bit address BF BE BD BC BB BA B9B8IP0*Interrupt priority 0B8H -PWDRT PBO -PT1-PT0-00[1]x000 0000IP0H Interrupt priority 0 high B7H -PWDRT HPBOH -PT1H -PT0H -00[1]x000 0000Bit address FF FE FD FC FB FA F9F8IP1*Interrupt priority 1F8H ----PSPI PC PKBI -00[1]00x0 0000IP1H Interrupt priority 1 high F7H ----PSPIH PCH PKBIH -00[1]00x0 0000芯天下--/P89LPC912_913_914_5© NXP B.V . 2007. All rights reserved.Product data sheet Rev. 05 — 28 September 200718 of 66NXP Semiconductors P89LPC912/913/9148-bit microcontrollers with two-clock 80C51 core KBCON Keypad control register 94H ------P ATN _SELKBIF 00[1]xxxx xx00KBMASK Keypad interrupt mask register86H 000000 0000KBP ATN Keypad pattern register 93H FF 1111 1111Bit address 8786858483828180P0*Port 080H CMP1/KB6CMPREF / KB5CIN1A/KB4CIN2A/KB2[1]Bit address 9796959493929190P1*Port 190H RST T0[1]Bit address A7A6A5A4A3A2A1A0P2*Port 2A0H SPICLK SS MISO MOSI [1]Bit address B7B6B5B4B3B2B1B0P3*Port 3B0H XTAL1XT AL2[1]P0M1Port 0 output mode 184H (P0M1.6)(P0M1.5)(P0M1.4)(P0M1.2)FF 1111 1111P0M2Port 0 output mode 285H (P0M2.6)(P0M2.5)(P0M2.4)(P0M2.2)000000 0000P1M1Port 1 output mode 191H (P1M1.2)D3[1]11x1 xx11P1M2Port 1 output mode 292H (P1M2.2)-00[1]00x0 xx00P2M1Port 2 output mode 1A4H (P2M1.5)(P2M1.4)(P2M1.3)(P2M1.2)FF 1111 1111P2M2Port 2 output mode 2A5H (P2M2.5)(P2M2.4)(P2M2.3)(P2M2.2)000000 0000P3M1Port 3 output mode 1B1H (P3M1.1)(P3M1.0)03[1]xxxx xx11P3M2Port 3 output mode 2B2H (P3M2.1)(P3M2.0)00[1]xxxx xx00PCON Power control register 87H --BOPD BOI GF1GF0PMOD1PMOD0000000 0000PCONA Power control register A B5H RTCPD -VCPD --SPPD --00[1]0000 0000Bit address D7D6D5D4D3D2D1D0PSW*Program status word D0H CY AC F0RS1RS0OV F1P 000000 0000PT0AD Port 0 digital input disable F6H --PT0AD.5PT0AD.4-PT0AD.2--00xx00 000x RSTSRC Reset source register DFH --BOF POF -R_WD R_SF R_EX [2]RTCCON Real-time clock control D1H RTCF RTCS1RTCS0---ERTC RTCEN 60[1][5]011x xx00RTCH Real-time clock register high D2H 00[5]0000 0000Table 7.P89LPC912 Special function registers …continued* indicates SFRs that are bit addressable.Name Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex Binary芯天下--/。
LPCPRO编程器功能介绍-LPCPRO编程器
LPC PRO编程器LPC PRO编程器是一款全面支持PHILIPS LPC系列单片机烧写的专用型编程器产品。
LPC PRO编程器不仅支持LPC700和LPC900系列单片机，也支持大部分24、25、93系列串行EEPROM的编程。
LPC PRO编程器经过全面技术创新，可同时支持串行下载(ICP)方式和并行方式编程，充分体现面向用户的设计理念。
LPC PRO编程器体现人性化设计，为用户带来操作的享受！方便灵活的编程方式，为用户消除烧写芯片的烦恼！LPC PRO编程器的超强功能 = CP900编程器+CP76X编程器+MiniICP下载线！参考图片功能特点U SB接口，支持多机操作，编程速度快；USB供电，无需电源适配器；体积小，重量轻，携带、使用方便；内置可靠电源电路，保证系统工作稳定；完善过流保护功能，编程芯片更安全；多种编程接口设计，使用更灵活；附加MiniICP功能，各种封装芯片任我选！支持ISP代码恢复，支持芯片内部EEPROM编程；软件可免费无限升级，维护用户利益！采用美国进口锁紧座，品质保障，质量更稳定！软件界面友好美观，功能强，操作方便；LPCPRO适用与产品的研发、量产和维护阶段。
支持器件：LPC900系列P89LPC90x：P89LPC901/902/903/904/906/907/908P89LPC910x：P89LPC9102/9103/9107P89LPC91x：P89LPC912/913/914/915/916/917P89LPC92x：P89LPC920/921/922/924/925P89LPC93x：P89LPC930/931/932/933/934/935/936/938P89LPC9401LPC700系列P87LPC759 P87LPC760 P87LPC761P87LPC762 P87LPC764 P87LPC767P87LPC768 P87LPC769 P87LPC776P87LPC777 P87LPC778 P87LPC779I2C接口的24系列芯片，SPI接口的25，93系列芯片支持ATC，ATMEL，CATALYAT，FAIRCHILD，HOLTEK，ISSI，LINKSMART，MICROCHIP，RAMTRON，ROHM，ST，XICOR等厂商的绝大多数串口EEPROM。
LPC900_ISP_ICP[1]
![LPC900_ISP_ICP[1]](https://img.taocdn.com/s3/m/8b8b018002d276a200292ebc.png)
表 1.1 支持 LPC900 系列单片机 ICP 方式的编程器
本文将详细介绍如何使用 ICP 及 ISP 等下载模式对芯片进行编程、及升级。
1.2 ICP 与 ISP 的简介
1.2.1 ICP 简介
ICP（In Ciruit Programming：在电路编程），当芯片焊接在电路板上以后，可以通过外 部的编程器将程序下载到 LPC900 系列芯片中。LPC900 系列全部支持 ICP 编程方式（仅除 老版本 P89LPC932）。表 1.1 中的编程器支持 ICP 方式。
1.2.1 ICP 简介 ...........................................................................................................1 1.2.2 ISP 简介 ............................................................................................................2 1.2.3 ISP 的限制 ........................................................................................................2 1.3 LPC900 配置信息详解 ................................................................................................2 1.3.1 用户配置字（UCFG1） ..................................................................................2 1.3.2 引导状态字（Boot Status）& 引导向量字（Boot Vector） ........................3 1.3.3 扇区加密字.......................................................................................................4 1.4 ICP 使用指南 ...............................................................................................................4 1.4.1 LPC900 系列单片机 ICP 编程相关引脚 ........................................................4 1.4.2 LPC900 系列单片机 ICP 编程方式连线图 ....................................................5 1.4.3 LPCPRO 编程器 ICP 应用范例.......................................................................5 1.4.4 EasyPRO800 编程器 ICP 应用范例 ................................................................6 1.5 ISP 使用指南................................................................................................................7 1.5.1 LPC900 系列支持的 ISP 型号.........................................................................7 1.5.2 串口的连接.......................................................................................................8 1.5.3 帧间隔方式进入 ISP ........................................................................................9 1.5.4 运行芯片中的程序.........................................................................................12 1.5.5 ISP 直接跳入法 ..............................................................................................12 1.5.6 复位脉冲方式进入 ISP ..................................................................................14 1.6 ISP900.........................................................................................................................17 1.6.1 ISP900 简介 ....................................................................................................17 1.6.2 ISP900 的使用 ................................................................................................17 1.7 恢复 ISP 代码.............................................................................................................19 1.8 相关资料.....................................................................................................................19 1.9 代理商联系方式.........................................................................................................20 1.10 文档信息.................................................................................................................20 1.10.1 文档版权.........................................................................................................20 1.10.2 文档版本.........................................................................................................20
P89LPC922自编ISP代码的研究sc
P89LPC922自编ISP代码的研究Research of programming ISP code by oneself of P89LPC922摘要：本文分析了P89LPC922预设的ISP代码的优缺点，进一步结合应用的实际情况，研究了自编ISP代码的方案，并给出了具体的实现方法，对于由P89LPC922构成的微控器系统具有很强的实用价值。
Summary: This text analyses the pluses and minuses of ISP code that P89LPC922 preserves . Combine the actual conditions used further , have studied the scheme of programming ISP code by oneself, and provide the concrete implementation method , have very strong practical value to the microcontroller system that is formed by P89LPC922 .关键词：P89LPC922 ISP代码程序下载Keyword: P89LPC922 ISP code Program download1 ISP应用概述随着微控器应用领域的不断扩展和深入，对其各方面性能的要求也逐渐提高。
目前，越来越多种类的微控器具有ISP（In-System Programming）即在系统编程功能。
ISP编程时不需要将微控器从目标系统中移出,并且只需要有限的几个管脚与外界相连，最大限度减少了额外的元件开销和电路板面积，给微控器产品的开发和具体应用都提供了相当的方便性。
2 P89LPC922预设ISP代码功能分析P89LPC922是一款由PHILIPS公司生产的单片封装的微控器1。
电脑板供电芯片图解常用电源芯片：RT9214 9202 9218,ISL6537, NCP5220,
稳压1117，RT9173、RT9199、W83310、RT9181、UP6103•1.三端稳压器117降压1117，3.3代表类型（3.3V输出）ADJ，可调节•开关电源工作原理：PWM 芯片控制 MOS 的高速开关来调节电压，当开关打开时电压上升，而关闭时则电压下降，电感电容组成 LC 储能电路。
通过高速切换 MOS 的开和关，控制 MOS 导通时间来控制电压的准位。
如图 T代表一个周期，T1 为开启状态，T2 为关闭状态，只要控制 T1 和 T2 的时间就可以控制电压的高低。
通过给负载馈电的时间改变供电电压当K闭合，则小灯泡获得12V电压；当K断开，小灯泡获得0V电压。
若K闭合1秒，断开一秒，重复动作1分钟，则在1分钟内小灯泡获得的平均电压：1分钟/（1开+1关）*12V=6.0V。
改变导通和截止的时间比例（占空比）就可以改变小灯泡获得的平均电压。
但这个电压不连续。
为了获得一个持续的电压。
电路加入滤波器件。
通常由窜连电感和并联的滤波电路来实现。
即上管导通下管闭合。
电感及电容端电压不能突变的特性使得上下管的导通给电感及电容提供了源源不断的电压经由电路构成回路，提供稳定的电流。
• 478主板平台内存供电一般比较器+场效应管的方式。
775以上的内存供电采用PWM方式供电。
供电芯片通常有RT9202、RT9214、RT9218等•RT9202引脚定义采用 12V 和 5V 供电的 RT9202 工作流程：1：5V 给 5 脚供电，5V 给上管供电，12V 经过 R4 给 1 脚供电，5V 经过 R1 给 7 脚供电；2：2 脚 UGATE 驱动上管导通；3：上管给电感 L2 和电容 C3 充电；4：当 L2 和 C3 成的储能电路电压经过 R2 和 R3 分压反馈给 FB 脚电压超过 0.8V 时，RT9202 关闭上管打开下管5：下管导通构成储能电路的放电回路，当电路经过分压后反馈给 FB 的电压低于 0.8V 时，RT9202 控制关闭下管打开上管，继续充电；6：2-5 循环。
4个公司的8脚单片机简单介绍
美国 ATMEL 公司的单片机 仅 8 脚的 AVR 性能介绍 1 路高速 PWM、4 路 A / D 转换器的 tiny15L 单片机(TINY 是一个系列) RISC 结构的 8 位单片机,在 1MHZ 频率下处理速度高达 1MIPS 1K 字节的 FLASH 存贮器支持 ISP 编程 1 路高速 PWM(150KHz) 4 通道带内部基准参考电压的 10 位 AD 转换器 1 路最大增益为 20X 的差分模拟信号输入 32 个通用寄存器 64 字节的 EEPROM 存贮器 内部 RC 振荡,频率最高为 1.6MHz,内部看门狗. 2 个 8 位定时/计数器 真正的 6 个 IO 口 ATTINY15L 工作电压 2.7V-5.5V 保密性能高 DIP8、SOIC8 DIP/SOIC8 开发工具:
4 个公司的 8 脚单片机简单介绍
台湾 EMC 公司的单片机 最通用的高速低功耗、低电压 8 位单片机 EM78P156 EM78156 系列单片机是具有高性能、高质量、低成本、多功能、多领域的应用.完备的开发手 段,可全面置换高成本的 PIC16C54/56/84. 特点 8 脚封装 SOP、SOIC 和 DIP. 工作电压: 2.2V~5.5V、工作温度: 0℃~70℃ 工作频率 C-36MHz. 低功耗: 5V/4MHz 时小于 1.6mA . 典型 3V/32KHz 时小于 15uA . 休眠方式为 1 uA . 1K×13 字节片内 ROM 、48×8 字节通用存储器 (SRAM). 内置 RC 振荡器、上电复位. 一个配置寄存器满足用户不同要求. 5 级堆栈、8-bit 实时时钟/计数器 (TCC) . 可编程设定为从 I/O 脚唤醒、或由片上看门狗唤醒后运行. 3 个中断源: TCC 溢出中断 输入口状态变化中断(从休眠方式中唤醒) 外部中断 2 个双向 、8 个上拉、7 个下拉、8 个 开路 I/O 脚. EM78X56 可与 PIC16C54/56/8 完全兼容,并提供 PIC→EMC 程序转换方法,且程序页面为 1K.
内置LCD驱动器的P89LPC9401 Flash单片机
内置LCD驱动器的P89LPC9401 Flash单片机
佚名
【期刊名称】《单片机与嵌入式系统应用》
【年(卷),期】2005(0)4
【总页数】1页(Pi006-i006)
【正文语种】中文
【中图分类】TP
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涛行LPC900系列单片机ISP程序编程器使用说明书
出现的对话框中，enable Watchdog 和 enable watchdog Safety 是关于看门狗设置的，可查阅 LPC932 的文档了解其特性。Enable Reset Pin 勾选上表示复位引脚有复位功能，如不勾上，表示复位引 脚作信号输入引脚使用。Enable Brownout Detection 选项表用于设 置是否激活低电压 Brownout 功能，如果 LPC932 供电电压低于 2.7V 时，此选项不能勾上，否则开机后芯片一直处于低电压复位状态。
靠近ISP下载接口的D5指示灯为数据传输信号线TXD值指示灯。由 于TXD没有数据发送时为高，所以此指示灯常亮，在PC机发送数据到
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TX_LPC900_ISP(V1.0)LPC900 系列单片机 ISP 编程器使用说明书
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TX_LPC900_ISP(V1.0)LPC900 系列单片机 ISP 编程器使用说明书
3.3、配置第三步（选定需编程的程序文件） 见下图红色框线所示部分:
当选定要下载的文件后，下次启动软件时会将最后一次下载了的 文件调入要下载的文件框中，在使用 FlashMagic 软件下载程序前， 如果以前选择了的文件内容有变化（以文件的最后修改日期是否有变 化来识别），则下载时将以新程序的数据下载到目标系统中，在文件 名下面的文件日期和时期也能看到其变化。所以程序文件内容有了更 新，不必重新载入，直接点击下载即可,非常地方便。
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LPC932_Presentation_cn
October 29th, 2002
Website Address
/microcontrollers/
Semiconductors
P89LPC932 10/29/02 P2
Philips MCU Core Roadmap
100
32/16-bit ARM7TDMI-S 16-bit
Throughput
10
LPC900
8-bit 2-Clock C51
16-bit XA
1
6-Clock C51 12-Clock C51
51MX
Memory Size
2 KB Semiconductors 64 KB 1 MB 16 MB P89LPC932 10/29/02 P3
增强型 UART
• • • • • •
间隔字符检测 帧错误检测 溢出错误检测 具有双缓冲发送功能 发送中断控制（停止位的开始或结束） 可将Tx/Rx 中断分开
– 轻松实现全双工串行I/O
增强型UART + 波特率发生器
RxD TxD
Semiconductors
P89LPC932 10/29/02 P22
LPC932 Data Memory
• 512B EEPROM
– 字节读，字节写，字节擦除 – 页填充(64B) 和块填充(512B) – SFR 接口(控制，地址，数据）
数据 EEPROM (512B) [SFR 访问] RAM (256B) AUX RAM (512B)
• •
256B 标准RAM 512B 附加 RAM
定时器 0
定时器 0/1 16-位
T0 INT0
T1 定时器 1 INT1
P89LPC9251片上温度传感器的使用方法
P89LPC9251片上温度传感器的使用方法1 概述随着微处理器的发展，越来越多的单片机向着小型、低成本、低功耗、高集成度的方向发展。
NXP(原Philips 半导体)公司推出了集成温度传感器的芯片P89LPC92X1 系列微型处理器，进一步为系统设计带来方便。
P89LPC9251(简称LPC9251)是P89LPC92X1 系列的一种。
它是一款高性能数字微控制器，包括一个内部温度传感器。
该传感器可用来校正与温度相关的信号，或作为一个独立的温度计。
在嵌入式系统设计中，使用LPC9251 不仅可以省去如DSl8820、TMP04 等常用的温度传感器件，同时可以节省系统设计的I／O口资源，以及减小布板PCB 的尺寸空间，进一步降低了系统设计的成本。
LPC9251 有2 个模数转换模块：ADC0 和ADCl。
ADCl 是一个8 位、4 通道复用逐次逼近A／D 转换器。
ADCO 是专门用于片上宽温度范围的温度传感器，其温度测量的范围是-40℃～+85℃，在该工作温度范围内输出分辨率近似为+11mV／℃。
其性能远远高于一般的温度传感器，如TMP04 的测量范围，适宜于中低温的测量，因此LPC9251 温度传感器可以在低温环境的系统中可靠工作。
2 温度传感器2．1 ADC 功能模块片上温度传感器集成在ADC0 功能模块中，通过Anin03 通道测量温度传感器Vsen，其他3 个通道Anin00、Aninol 和Anin02 暂未使用。
温度传感器和内部参考电压Vref(bg)(1．23 V±O．123 V) 引脚一起复用在相同的输入通道Anin03。
通过配置CONTROL LOGIC(控制逻辑单元)中TPS-CON 寄存器的TSELl 和TSELO 位来选择温度传感器还是内部参考电压。
2．2 温度传感器使用步骤为了准确地测量温度值，必须首先测量内部参考电压Vref(bg)的电源电压。
温度传感器的电压计算公式如下：传感器的计算公式如下：。
CP9XX 编程器使用指南
广州周立功单片机发展有限公司
Tel: (020)38730916
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Fax:38730925
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芯片
选择芯片型号（S）
选择当前所操作芯片的型号 读出（R） F4 将适配器中芯片的数据读出至缓冲区中 编程（P） F5 将缓冲区中的数据编程至芯片中 校验（C） F7 比较当前所操作芯片中的数据是否和缓冲区 中的数据一致 擦除（E） 擦除当前芯片中的数据 恢复ISP功能 (Z) 恢复0x1E00至0x1FFF程序空间的ISP代码 设置芯片编号（I） 设置当前所操作芯片的编号。此项功能只有 在选择芯片后才有效 设置芯片配置字（F） 设置当前所操作芯片的配置字
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Tel: (020)38730916
38730976
Fax:38730925
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4. CP9XX菜单命令
文件
装载（L）
装载十六进制文件或二进制文件 保存文件（S） 将当前文件保存为十六进制文件或二进制文件 关闭文件（C） 关闭当前所打开的文件 退出（E） 退出系统
快捷功能按钮 烧录芯片时的常用功能按钮，用户也可以在菜单中选择相应命令。 程序代码缓冲区 显示程序代码。 信息栏 显示当前用户所选择的芯片类型、缓冲区中数据的校验和、芯片具体配置。 状态栏 分别显示当前用户所进行操作、光标所在地址、Caps Lock键状态、Num Lock键状态 及通信状态。 通信状态指示灯 当系统没有连接具体编程器时，状态栏最右边的指示灯显示为红色，否则显示为绿色。
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P89LPC938_ADC
广州周立功单片机发展有限公司 } //-----------------------------------// ad_start: 启动 AD 转换子程序 //------------------------------------void ad_start(void) { ADCON0=0X05; while(!ADCON0&0x08); } //-----------------------------------// UART_init:初始化 UART //------------------------------------void UART_init() { SCON=0x50; SSTAT=0x60; BRGR0=0xF0; BRGR1=0x02; BRGCON = 0x03; } //------------------------------------
图 1
LPC938 引脚图
本文主要讨论 LPC938 与其他 LPC900 系列单片机在 A/D 转换使用上的不同之处， 并给 出了相应的测试例程。
P89LPC938 VDD VCC 21 W1
P01/AD00 TXD RxD 18 17 P10/TxD P11/RxD
26
VSS
7
图 2
测试电路图
LPC938 的 A/D 转换器使用时要注意的事项如下： 由于 LPC938 的 A/D 转换为 10 位，因而需要 2 个寄存器存放其结果，分别为 AD0DATxR 和 AD0DATxL，其中 x 为 0~7 表示 AD00~AD07 通道；此外其边界寄 存器也为 2 个，分别为 ADC0HBND 和 ADC0LBND； LPC938 中有些 A/D 转换用到的寄存器需要用到外部寻址 MOVX， 如 ADC0HBND、 ADC0LBND、AD0DATxR、AD0DATxL、BNDSTA0。这些寄存器的具体地址请参 考芯片应用指南； AD0DATxR 存放转换结果的 7：0 位，AD0DATxL 存放转换结果的 9：2 位。 LPC938 中 ADCON0 的地址为 97h，与 LPC935 中 ADCON0 的地址是不同的，如 果您使用 LPC935 的头文件将会出错。
P89LPC952资料
1.General descriptionThe P89LPC952is a single-chip microcontroller,available in low cost packages,based on a high performance processor architecture that executes instructions in two to four clocks,six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC952 in order to reduce component count, board space, and system cost.2.Features2.1Principal featuress 8kB byte-erasable flash code memory organized into 1kB sectors and 64-byte pages.Single-byte erasing allows any byte(s) to be used as non-volatile data storage.s 256-byte RAM data memory and a 256-byte auxiliary on-chip RAM.s 8-input multiplexed 10-bit ADC with window comparator that can generate an interrupt for in or out of range results. Two analog comparators with selectable inputs and reference source.s Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output)and a 23-bit system timer that can also be used as a RTC.s Two enhanced UARTs with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400kHz byte-wide I 2C-bus communication port and SPI communication port.s High-accuracy internal RC oscillator option,with clock doubler option,allows operation without external oscillator components.The RC oscillator option is selectable and fine tunable. Fast switching between the internal RC oscillator and any oscillator source provides optimal support of minimal power active mode with fast switching to maximum performance.s 2.4V to 3.6V V DD operating range. I/O pins are 5V tolerant (may be pulled up ordriven to 5.5V).s 44-pin packages with 40 I/O pins minimum while using on-chip oscillator and reset options.s Port 5 has high current sourcing/sinking (20 mA) for all Port 5 pins. All other port pins have high sinking capability (20mA). A maximum limit is specified for the entire chip.s Watchdog timer with separate on-chip oscillator, requiring no external components.The watchdog prescaler is selectable from eight values.P89LPC9528-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 10-bit ADCRev. 01 — 16 September 2005Preliminary data sheet2.2Additional featuress A high performance 80C51 CPU provides instruction cycle times of 111ns to 222ns for all instructions except multiply and divide when executing at 18MHz. This is sixtimes the performance of the standard 80C51 running at the same clock frequency. Alower clock frequency for the same performance results in power savings and reduced EMI.s Serial flash In-Circuit Programming (ICP) allows simple production coding with commercial EPROM programmers. Flash security bits prevent reading of sensitiveapplication programs.s Serial flash In-System Programming (ISP) allows coding while the device is mounted in the end application.s In-Application Programming(IAP)of theflash code memory.This allows changing the code in a running application.s Low voltage (brownout) detect allows a graceful system shutdown when power fails.May optionally be configured as an interrupt.s Idle and two different power-down reduced power modes. Improved wake-up from Power-down mode (a LOW interrupt input starts execution). Typical power-downcurrent is 1µA (total power-down with voltage comparators disabled).s Active-LOW reset input can be driven by any internal reset. On-chip power-on reset allows operation without external reset components. A reset counter and reset glitchsuppression circuitry prevent spurious and incomplete resets. A software resetfunction is also available.s Only power and ground connections are required to operate the P89LPC952 when internal reset option is selected.s Configurable on-chip oscillator with frequency range options selected by user programmed flash configuration bits. Oscillator options support frequencies from20kHz to the maximum operating frequency of 18MHz.s Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator allowing it to perform an oscillator fail detect function.s Programmable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only.s Port ‘input pattern match’ detect. Port0 may generate an interrupt when the value of the pins match or do not match a programmable pattern.s Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10ns minimum ramp times.s Four interrupt priority levels.s Eight keypad interrupt inputs, plus two additional external interrupt inputs.s Schmitt trigger port inputs.s Second data pointer.s Extended temperature range.s Emulation support.3.Ordering information3.1Ordering optionsTable 1:Ordering informationType numberPackage NameDescriptionVersion P89LPC952FA PLCC44plastic leaded chip carrier; 44 leadsSOT187-2P89LPC952FBDLQFP44plastic low profile quad flat package; 44 leads;body 10×10×1.4mmSOT389-1Table 2:Ordering optionsType number Flash memory Temperature range Frequency P89LPC952FA 8kB −40°C to +85°C 0 MHz to 18MHz P89LPC952FBD8kB−40°C to +85°C0 MHz to 18MHz4.Block diagramFig 1.Block diagramACCELERATED 2-CLOCK 80C51 CPU8 kBCODE FLASH 256-BYTE DATA RAM PORT 2CONFIGURABLE I/Os PORT 1CONFIGURABLE I/Os PORT 0CONFIGURABLE I/OsKEYPAD INTERRUPT PROGRAMMABLE OSCILLATOR DIVIDERCPU clockCONFIGURABLE OSCILLATORON-CHIP RCOSCILLATORinternal busCRYST AL ORRESONA TORPOWER MONITOR (POWER-ON RESET, BROWNOUT RESET)002aab305UART0ANALOG COMP ARATORS256-BYTE AUXILIARY RAMI 2C-BUSPORT 3CONFIGURABLE I/Os JTAG INTERFACEP89LPC952WATCHDOG TIMER AND OSCILLATORTIMER 0TIMER 1REAL-TIME CLOCK/SYSTEM TIMERSPIADC1P3[1:0]P2[5:0]PORT 4CONFIGURABLE I/Os PORT 5CONFIGURABLE I/Os P5[7:0]P4[7:0]P1[7:0]P0[7:0]X2X1TXD0RXD0UART1TXD1RXD1SCL SDA T0T1CMP2TRIG CIN2B SCLK SDATCIN2A CMP1CIN1ACIN1BAD00AD01AD02AD03AD04AD05AD06AD07SPICLK MOSI MISO SS5.Functional diagramFig 2.Functional diagramV DDV SSPORT 0PORT 3TXD0RXD0T0INT0INT1RST SCL SDA002aab358CMP2CIN2B CIN2A CIN1B CIN1A CMPREF CMP1T1XT AL2XT AL1KBI0KBI1KBI2KBI3KBI4KBI5KBI6KBI7MOSI MISO SSSPICLK AD00AD01AD02AD03AD05PORT 5PORT 1PORT 2P89LPC952AD04AD07AD06TRIG TXD1RXD1SDAT SCLKCLKOUTPORT 46.Pinning information6.1PinningFig 3.PLCC44 pin configurationP89LPC952FAP1.3/INT0/SDA P0.4/CIN1A/KBI4/AD03P1.2/T0/SCL P0.5/CMPREF/KBI5P1.1/RXD0P0.6/CMP1/KBI6P1.0/TXD0V DDAP3.1/XTAL1P0.7/T1/KBI7P3.0/XTAL2/CLKOUT P2.2/MOSI V DD P2.3/MISO P5.7P2.4/SS P5.6P2.5/SPICLK P5.5P4.0P5.4P4.1/TRIGP 5.3P 1.4/I N T 1P 5.2P 1.5/R S TP 5.1P 1.6P 5.0V S S AV S S P 1.7/A D 04P 4.7/S C L K P 2.0/A D 07P 4.6P 2.1/A D 06P 4.5/S D A T P 0.0/C M P 2/K B I 0/A D 05P 4.4P 0.1/C I N 2B /K B I 1/A D 00P 4.3/R X D 1P 0.2/C I N 2A /K B I 2/A D 01P 4.2/T X D 1P 0.3/C I N 1B /K B I 3/A D 02002aab3077891011121314151617393837363534333231302918192021222324252627286543214443424140Fig 4. LQFP44 pin configuration P89LPC952FBDP4.1/TRIG002aab3061 2 3 4 5 6 7 8 9 10 113332313029282726252423 121314151617181922122444342414393837363534P1.3/INT0/SDAP1.2/T0/SCLP1.1/RXD0P1.0/TXD0P3.1/XTAL1 P3.0/XTAL2/CLKOUTV DDP5.7P5.6P5.5P5.4P1.4/INT1P1.5/RSTP1.6VSSAP1.7/AD4P2./AD7P2.1/AD6P./CMP2/KBI/AD5P.1/CIN2B/KBI1/ADP.2/CIN2A/KBI2/AD1P.3/CIN1B/KBI3/AD2P0.4/CIN1A/KBI4/AD03P0.5/CMPREF/KBI5P0.6/CMP1/KBI6V DDAP0.7/T1/KBI7P2.2/MOSIP2.3/MISOP2.4/SSP2.5/SPICLKP4.0P5.3P5.2P5.1P5.VSSP4.7/SCLKP4.6P4.5/SDATP4.4P4.3/RXD1P4.2/TXD16.2Pin descriptionTable 3:Pin descriptionSymbol Pin Type DescriptionPLCC44LQFP44P0.0 to P0.7I/O Port0:Port0 is an 8-bit I/O port with a user-configurable output type.During reset Port0latches are configured in the input only mode with theinternal pull-up disabled. The operation of Port0 pins as inputs andoutputs depends upon the port configuration selected. Each port pin isconfigured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “Static characteristics” for details.The Keypad Interrupt feature operates with Port0 pins.All pins have Schmitt triggered inputs.Port0 also provides various special functions as described below:P0.0/CMP2/ KBI0/AD054337I/O P0.0 —Port0 bit0.O CMP2 —Comparator2 output.I KBI0 —Keyboard input0.I AD05 —ADC0 channel5 analog input.P0.1/CIN2B/ KBI1/AD004236I/O P0.1 —Port0 bit1.I CIN2B —Comparator2 positive input B.I KBI1 —Keyboard input1.I AD00 —ADC0 channel0 analog input.P0.2/CIN2A/ KBI2/AD014135I/O P0.2 —Port0 bit2.I CIN2A —Comparator2 positive input A.I KBI2 —Keyboard input2.I AD01 —ADC0 channel1 analog input.P0.3/CIN1B/ KBI3/AD024034I/O P0.3 —Port0 bit3.I CIN1B —Comparator1 positive input B.I KBI3 —Keyboard input3.I AD02 —ADC0 channel2 analog input.P0.4/CIN1A/ KBI4/AD033933I/O P0.4 —Port0 bit4.I CIN1A —Comparator1 positive input A.I KBI4 —Keyboard input4.I AD03 —ADC0 channel3 analog input.P0.5/CMPREF/ KBI53832I/O P0.5 —Port0 bit5.I CMPREF —Comparator reference (negative) input.I KBI5 —Keyboard input5.P0.6/CMP1/KBI63731I/O P0.6 —Port 0 bit 6.O CMP1 —Comparator 1 output.IKBI6 —Keyboard input 6.P0.7/T1/KBI73529I/O P0.7 —Port 0 bit 7.I/O T1 —Timer/counter 1 external count input or overflow output.IKBI7 —Keyboard input 7.P1.0 to P1.7I/O,I [1]Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type,except for three pins as noted below. During reset Port 1 latches areconfigured in the input only mode with the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs and outputs depends upon the port configuration selected. Each of the configurable port pins are programmed independently. Refer to Section 7.13.1 “Portconfigurations” and Table 10 “Static characteristics” for details. P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.All pins have Schmitt triggered inputs.Port 1 also provides various special functions as described below:P1.0/TXD0104I/O P1.0 —Port 1 bit 0.O TXD0 —Transmitter output for serial port 0.P1.1/RXD093I/O P1.1 —Port 1 bit 1.I RXD0 —Receiver input for serial port 0.P1.2/T0/SCL82I/O P1.2 —Port 1 bit 2 (open-drain when used as output).I/O T0 —Timer/counter 0external count input or overflow output (open-drain when used as output).I/OSCL —I 2C-bus serial clock input/output.P1.3/INT0/SDA 71I/O P1.3 —Port 1 bit 3 (open-drain when used as output).I INT0 —External interrupt 0 input.I/OSDA —I 2C-bus serial data input/output.P1.4/INT1644I P1.4 —Port 1 bit 4.I INT1 —External interrupt 1 input.P1.5/RST543I P1.5 —Port 1 bit 5 (input only).IRST —External Reset input during power-on or if selected via UCFG1.When functioning as a reset input, a LOW on this pin resets themicrocontroller, causing I/O ports and peripherals to take on their default states, and the processor begins execution at address 0. Also used during a power-on sequence to force ISP mode.When using anoscillator frequency above 12MHz, the reset input function of P1.5must be enabled.An external circuit is required to hold the device in reset at power-up until V DD has reached its specified level. When system power is removed V DD will fall below the minimum specified operating voltage. When using an oscillator frequency above12MHz, in some applications, an external brownout detect circuit may be required to hold the device in reset when V DD falls below the minimum specified operating voltage.Table 3:Pin description …continuedSymbolPin Type DescriptionPLCC44LQFP44P1.6442I/O P1.6 —Port1 bit6.P1.7/AD04240I/O P1.7 —Port1 bit7.I AD04 —ADC0 channel4 analog input.P2.0 to P2.5I/O Port2: Port2 is an 8-bit I/O port with a user-configurable output type.During reset Port2latches are configured in the input only mode with theinternal pull-up disabled. The operation of Port2 pins as inputs andoutputs depends upon the port configuration selected. Each port pin isconfigured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port2 also provides various special functions as described below:P2.0/AD07139I/O P2.0 —Port2 bit0.I AD07 —ADC0 channel7 analog input.P2.1/AD064438I/O P2.1 —Port2 bit1.I AD06 —ADC0 channel6 analog input.P2.2/MOSI3428I/O P2.2 —Port2 bit2.I/O MOSI —SPI master out slave in. When configured as master, this pin isoutput; when configured as slave, this pin is input.P2.3/MISO3327I/O P2.3 —Port2 bit3.I/O MISO —When configured as master, this pin is input, when configuredas slave, this pin is output.P2.4/SS3226I/O P2.4 —Port2 bit4.I/O SS —SPI Slave select.P2.5/SPICLK3125I/O P2.5 —Port2 bit5.I/O SPICLK —SPI clock. When configured as master, this pin is output;when configured as slave, this pin is input.P3.0 to P3.1I/O Port3: Port3 is a 2-bit I/O port with a user-configurable output type.During reset Port3latches are configured in the input only mode with theinternal pull-up disabled. The operation of Port3 pins as inputs andoutputs depends upon the port configuration selected. Each port pin isconfigured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port3 also provides various special functions as described below:P3.0/XT AL2/ CLKOUT 126I/O P3.0 —Port3 bit0.O XTAL2 —Output from the oscillator amplifier (when a crystal oscillatoroption is selected via the flash configuration.O CLKOUT —CPU clock divided by 2 when enabled via SFR bit (ENCLK-TRIM.6). It can be used if the CPU clock is the internal RC oscillator,watchdog oscillator or external clock input, except when XTAL1/XT AL2are used to generate clock source for the RTC/system timer.Table 3:Pin description …continuedSymbol Pin Type DescriptionPLCC44LQFP44Table 3:Pin description …continuedSymbol Pin Type DescriptionPLCC44LQFP44P3.1/XT AL1115I/O P3.1 —Port3 bit1.I XTAL1 —Input to the oscillator circuit and internal clock generatorcircuits (when selected via the flash configuration). It can be a port pin ifinternal RC oscillator or watchdog oscillator is used as the CPU clocksource,and if XT AL1/XTAL2 are not used to generate the clock for theRTC/system timer.P4.0 to P4.7I/O Port4: Port4 is an 8-bit I/O port with a user-configurable output type.During reset Port4latches are configured in the input only mode with theinternal pull-up disabled. The operation of Port4 pins as inputs andoutputs depends upon the port configuration selected. Each port pin isconfigured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port4 also provides various special functions as described below:P4.03024I/O P4.0 —Port4 bit0.P4.1/TRIG2923I/O P4.1 —Port4 bit1.O TRIG —JTAG trigger output.P4.2/TXD12822I/O P4.2 —Port4 bit2.O TXD1 —Transmitter output for serial port 1.P4.3/RXD12721I/O P4.3 —Port4 bit3.I RXD1 —Receiver input for serial port 1.P4.42620I/O P4.4 —Port4 bit4.P4.5/SDAT2519I/O P4.5 —Port4 bit5.I/O SDAT —Serial data input/output for JT AG interface.P4.62418I/O P4.6 —Port4 bit6.P4.7/SCLK2317I/O P4.7 —Port4 bit7.I SCLK —Serial clock input for JT AG interface.P5.0 to P5.7I/O Port5: Port5 is an 8-bit I/O port with a user-configurable output type.During reset Port5latches are configured in the input only mode with theinternal pull-up disabled. The operation of Port5 pins as inputs andoutputs depends upon the port configuration selected. Each port pin isconfigured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “Static characteristics” for details.All pins have Schmitt triggered inputs.Port5 also provides various special functions as described below:P5.02115I/O P5.0 —Port5 bit0.P5.12014I/O P5.1 —Port5 bit1.P5.21913I/O P5.2 —Port5 bit2.P5.31812I/O P5.3 —Port5 bit3.P5.41711I/O P5.4 —Port5 bit4.P5.51610I/O P5.5 —Port5 bit5.P5.6159I/O P5.6 —Port5 bit6.P5.7148I/O P5.7 —Port5 bit7.V SS2216I Ground: 0V reference.Table 3:Pin description …continuedSymbol Pin Type DescriptionPLCC44LQFP44V SSA341I Analog ground: 0V analog reference.V DD137I Power supply: This is the power supply voltage for normal operation aswell as Idle and Power-down modes.V DDA3630I Analog power supply: This is the analog power supply voltage fornormal operation as well as Idle and Power-down modes.[1]Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5.7.Functional descriptionRemark:Please refer to the P89LPC952 User’s Manual for a more detailed functionaldescription.7.1Special function registersRemark:SFR accesses are restricted in the following ways:•User must not attempt to access any SFR locations not defined.•Accesses to any defined SFR locations must be strictly for the functions for the SFRs.•SFR bits labeled ‘-’, ‘0’ or ‘1’ can only be written and read as follows:–‘-’ Unless otherwise specified,must be written with ‘0’, but can return any valuewhen read (even if it was written with ‘0’). It is a reserved bit and may be used infuture derivatives.–‘0’must be written with ‘0’, and will return a ‘0’ when read.–‘1’must be written with ‘1’, and will return a ‘1’ when read.Rev. 01— 16 September 200514 of 66P89LPC9528-bit microcontroller with 10-bit ADC AD0MODA ADC0 mode register A C0H BNDI0BURST0SCC0SCAN0----0000000000AD0MODB ADC0 mode register B A1H CLK2CLK1CLK0-----00000x0000AUXR1Auxiliary function register A2H CLKLP EBRR ENT1ENT0SRST0-DPS00000000x0Bit address F7F6F5F4F3F2F1F0 B* B register F0H0000000000BRGR0_0Baud rate generator 0 ratelowBEH0000000000BRGR1_0Baud rate generator 0 ratehighBFH0000000000BRGCON_0Baud rate generator 0 control BDH------SBRGS_BRGEN_00[2]xxxx xx00 CMP1Comparator1 control register ACH--CE1CP1CN1OE1CO1CMF100[1]xx000000CMP2Comparator2 control register ADH--CE2CP2CN2OE2CO2CMF200[1]xx000000DIVM CPU clock divide-by-M control95H0000000000DPTR Data pointer (2bytes)DPH Data pointer high83H0000000000DPL Data pointer low82H0000000000FMADRH Program flash address high E7H0000000000FMADRL Program flash address low E6H0000000000FMCON Program flash control (Read)E4H BUSY---HVA HVE SV OI7001110000 Program flash control (Write)E4H FMCMD.7FMCMD.6FMCMD.5FMCMD.4FMCMD.3FMCMD.2FMCMD.1FMCMD.0 FMDA T A Program flash data E5H0000000000I2ADR I2C-bus slave address register DBH I2ADR.6I2ADR.5I2ADR.4I2ADR.3I2ADR.2I2ADR.1I2ADR.0GC0000000000© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Rev. 01— 16 September 200515 of 66P89LPC9528-bit microcontroller with 10-bit ADC duty cycle register lowI2ST AT I2C-bus status register D9H STA.4STA.3STA.2STA.1ST A.0000F811111000Bit address AF AE AD AC AB AA A9A8 IEN0*Interrupt enable 0A8H EA EWDRT EBO ES/ESR ET1EX1ET0EX00000000000Bit address EF EE ED EC EB EA E9E8 IEN1*Interrupt enable 1E8H-EST--ESPI EC EKBI EI2C00[1]00x00000IEN2Interrupt enable 2D5H----EST1ES1/ESR1EADC-00[1]00x00000Bit address BF BE BD BC BB BA B9B8 IP0*Interrupt priority 0B8H-PWDRT PBO PS/PSR PT1PX1PT0PX000[1]x0000000IP0H Interrupt priority 0 high B7H-PWDRTHPBOH PSH/PSRHPT1H PX1H PT0H PX0H00[1]x0000000Bit address FF FE FD FC FB FA F9F8 IP1*Interrupt priority 1F8H-PST--PSPI PC PKBI PI2C00[1]00x00000IP1H Interrupt priority 1 high F7H-PSTH--PSPIH PCH PKBIH PI2CH00[1]00x00000IP2Interrupt priority 2D6H----PEST1PES1/PESR1P ADC-00[1]00x00000IP2H Interrupt priority 2 high D7H----PEST1H PES1H/PESR1HPADCH-00[1]00x00000KBCON Keypad control register94H------P A TN_SELKBIF00[1]xxxx xx00KBMASK Keypad interrupt maskregister86H0000000000 KBP ATN Keypad pattern register FF11111111© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Rev. 01— 16 September 200516 of 66P89LPC9528-bit microcontroller with 10-bit ADCBit address9796959493929190 P2*Port2A0H--SPICLK SS MISO MOSI--[1]Bit address B7B6B5B4B3B2B1B0 P3*Port3B0H------XTAL1XTAL2[1]P4Port4B3H-TMS--RXD1TXD1TRIG T3EX[1]P5Port5B4H T3-------[1]P0M1Port0 output mode184H(P0M1.7)(P0M1.6)(P0M1.5)(P0M1.4)(P0M1.3)(P0M1.2)(P0M1.1)(P0M1.0)FF[1]11111111P0M2Port0 output mode285H(P0M2.7)(P0M2.6)(P0M2.5)(P0M2.4)(P0M2.3)(P0M2.2)(P0M2.1)(P0M2.0)00[1]00000000P1M1Port1 output mode191H(P1M1.7)(P1M1.6)-(P1M1.4)(P1M1.3)(P1M1.2)(P1M1.1)(P1M1.0)D3[1]11x1xx11P1M2Port1 output mode292H(P1M2.7)(P1M2.6)-(P1M2.4)(P1M2.3)(P1M2.2)(P1M2.1)(P1M2.0)00[1]00x0xx00P2M1Port2 output mode1A4H--(P2M1.5)(P2M1.4)(P2M1.3)(P2M1.2)(P2M1.1)(P2M1.0)FF[1]11111111P2M2Port2 output mode2A5H--(P2M2.5)(P2M2.4)(P2M2.3)(P2M2.2)(P2M2.1)(P2M2.0)00[1]00000000P3M1Port3 output mode1B1H------(P3M1.1)(P3M1.0)03[1]xxxx xx11P3M2Port3 output mode2B2H------(P3M2.1)(P3M2.0)00[1]xxxx xx00PCON Power control register87H SMOD1SMOD0BOPD BOI GF1GF0PMOD1PMOD00000000000PCONA Power control register A B5H RTCPD-VCPD ADPD I2PD SPPD SPD-00[1]00000000Bit address D7D6D5D4D3D2D1D0 PSW*Program status word D0H CY AC F0RS1RS0OV F1P0000000000PT0AD Port0 digital input disable F6H--PT0AD.5PT0AD.4PT0AD.3PT0AD.2PT0AD.1-00xx00000xRSTSRC Reset source register DFH--BOF POF R_BK R_WD R_SF R_EX[3]© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Rev. 01— 16 September 200517 of 66P89LPC9528-bit microcontroller with 10-bit ADC S0BUF Serial Port data buffer register99H xx xxxx xxxxBit address9F9E9D9C9B9A9998 S0CON*Serial port control98H SM0_0/FE_0SM1_00SM2_0REN_0TB8_0RB8_0TI_0RI_00000000000S0ST AT Serial port extended statusregisterBAH DBMOD_INTLO_0CIDIS_0DBISEL_FE_0BR_0OE_0STINT_00000000000 SP Stack pointer81H0700000111SPCTL SPI control register E2H SSIG SPEN DORD MSTR CPOL CPHA SPR1SPR00400000100SPST AT SPI status register E1H SPIF WCOL------0000xx xxxxSPDA T SPI data register E3H0000000000S1CON Serial port 1 control B5H SM0_1/FE_1SM1_1SM2_1REN_1TB8_1RB8_1TI_1RI_10000000000S1ST AT Serial port 1 extended statusregisterD4H DBMOD_1INTLO_1CIDIS_1DBISEL_1FE_1BR_1OE_1STINT_10000000000 T AMOD Timer0 and 1 auxiliary mode8FH---T1M2---T0M200xxx0xxx0Bit address8F8E8D8C8B8A8988 TCON*Timer0 and 1 control88H TF1TR1TF0TR0IE1IT1IE0IT00000000000TH0Timer0 high8CH0000000000TH1Timer1 high8DH0000000000TL0Timer0 low8AH0000000000TL1Timer1 low8BH0000000000TMOD Timer0 and 1 mode89H T1GA TE T1C/T T1M1T1M0T0GA TE T0C/T T0M1T0M00000000000TRIM Internal oscillator trim register96H RCCLK ENCLK TRIM.5TRIM.4TRIM.3TRIM.2TRIM.1TRIM.0[5][6]WDCON Watchdog control register A7H PRE2PRE1PRE0--WDRUN WDTOF WDCLK[4][6]© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Rev. 01— 16 September 200518 of 66P89LPC9528-bit microcontroller with 10-bit ADC[3]The RSTSRC register reflects the cause of the P89LPC952 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value isxx110000.[4]After reset,the value is111001x1,i.e.,PRE2to PRE0are all logic1,WDRUN=1and WDCLK=1.WDTOF bit is logic1after watchdog reset and is logic0after power-on reset.Other resets will not affect WDTOF.[5]On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.[6]The only reset source that affects these SFRs is power-on reset.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Rev. 01— 16 September 200519 of 66P89LPC9528-bit microcontroller with 10-bit ADC (MSB)AD0DA T1R ADC0 data register1, right(LSB)FFFCH AD0DA T1[7:0]0000000000AD0DA T1L ADC0 data register1, left(MSB)FFFDH AD0DA T1[9:2]0000000000AD0DA T2R ADC0 data register2, right(LSB)FFFAH AD0DA T2[7:0]0000000000AD0DA T2L ADC0 data register2, left(MSB)FFFBH AD0DA T2[9:2]0000000000AD0DA T3R ADC0 data register3, right(LSB)FFF8H AD0DA T3[7:0]0000000000AD0DA T3L ADC0 data register3, left(MSB)FFF9H AD0DA T3[9:2]0000000000AD0DA T4R ADC0 data register4, right(LSB)FFF6H AD0DA T4[7:0]0000000000AD0DA T4L ADC0 data register4, left(MSB)FFF7H AD0DA T4[9:2]0000000000AD0DA T5R ADC0 data register5, right(LSB)FFF4H AD0DA T5[7:0]0000000000AD0DA T5L ADC0 data register5, left(MSB)FFF5H AD0DA T5[9:2]0000000000AD0DA T6R ADC0 data register6, right(LSB)FFF2H AD0DA T6[7:0]0000000000AD0DA T6L ADC0 data register6, left(MSB)FFF3H AD0DA T6[9:2]0000000000AD0DA T7R ADC0 data register7, right(LSB)FFF0H AD0DA T7[7:0]© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Rev. 01— 16 September 200520 of 66P89LPC9528-bit microcontroller with 10-bit ADC[1]Extended SFRs are physically located on-chip but logically located in external data memory address space(XDAT A).The MOVX A,@DPTR and MOVX@DPTR,A instructions areused to access these extended SFRs.[2]BRGR1_1 and BRGR0_1 must only be written if BRGEN_1 in BRGCON_1 SFR is logic0. If any are written while BRGEN_1=1, the result is unpredictable.P4M1Port4 output mode1FFB8H(P4M1.7)(P4M1.6)(P4M1.5)(P4M1.4)(P4M1.3)(P4M1.2)(P4M1.1)(P4M1.0)FF[1]11111111P4M2Port4 output mode2FFB9H(P4M2.7)(P4M2.6)(P4M2.5)(P4M2.4)(P4M2.3)(P4M2.2)(P4M2.1)(P4M2.0)00[1]00000000P5M1Port5 output mode1FFBAH(P5M1.7)(P5M1.6)(P5M1.5)(P5M1.4)(P5M1.3)(P5M1.2)(P5M1.1)(P5M1.0)FF[1]11111111P5M2Port5 output mode3FFBBH(P5M2.7)(P5M2.6)(P5M2.5)(P5M2.4)(P5M2.3)(P5M2.2)(P5M2.1)(P5M2.0)00[1]00000000S1ADDR Serial port 1 address register FFB2H0000000000S1ADEN Serial port 1 address enable FFB1H0000000000S1BUF Serial port 1 data bufferregisterFFB0H xx xxxx xxxx© Koninklijke Philips Electronics N.V. 2005. All rights reserved.。
外文文献翻译(王德林)改
P89LPC9521. 概述P89LPC952 是一款单片封装的微控制器，含有多种低成本的封装形式。
它采用了高性能的处理器结构，指令执行时间只需2 到4 个时钟周期。
6 倍于标准80C51 器件。
P89LPC952集成了许多系统级的功能，这样可大大减少元件的数目和电路板面积并降低系统的成本。
2. 特性2.1 主要特性8KB 可擦除Flash 程序存储器，具有1KB 扇区和64 字节页。
单字节擦除特性使得任何字节都可用于非易失性数据存储。
256 字节RAM 数据存储器和256 字节附加片内RAM。
具有window 比较器的8 输入多路10 位A/D 转换器，结果在允许范围以内或以外都可产生中断。
2 个模拟比较器可选择输入和参考源。
2 个16 位定时/计数器（每一个定时器均可设置为溢出时触发相应端口输出或作为PWM 输出），23 位的系统定时器可用作实时时钟（RTC）。
两个增强型UART，具有波特率发生器、间隔检测、帧错误检测和自动地址检测功能。
400kHz 字节宽度的I2C 通信端口和SPI 通信端口。
片内高精度的RC 振荡器选项带有时钟倍频器，无需外接振荡器件。
可选择RC 振荡器选项并且其频率可进行很好的调节。
内部RC 振荡器和任何振荡器源之间的快速切换，提供低功耗有效模式的最佳支持，可快速转变为最高性能。
VDD 操作电压范围为2.4～3.6V。
I/O 口可承受5V（可上拉或驱动到5.5V）。
44 脚封装，使用片内振荡器和复位选项时，至少可获得40 个I/O 口。
P5 的所有管脚可吸收/消耗高电流（20mA）。
其它所有的端口管脚都有高消耗电流的能力（20mA）。
整个芯片指定了最大值的限制。
门狗定时器具有独立的片内振荡器，无需外接元件。
看门狗预分频器可从8 个值中选择。
2.2 其它特性操作频率为18MHz 时，除乘法和除法指令外，高速80C51 CPU 的指令执行时间为111~222ns。
同一时钟频率下，其速度为标准80C51 器件的6 倍。
p89lpc936 编程
p89lpc936 编程P89LPC936是一款嵌入式微控制器，广泛应用于各种电子设备中。
它以其稳定性和高性能而受到了广大工程师的青睐。
在开发P89LPC936的程序时，我们需要首先了解其特性和功能。
P89LPC936采用了高性能的8051内核，具有8位的数据总线和16位的地址总线。
它集成了大容量的闪存和RAM，可以存储大量的程序和数据。
此外，P89LPC936还拥有多个通用输入输出引脚，用于与外部设备的连接和通信。
编写P89LPC936的程序需要使用汇编语言或高级语言，如C语言。
汇编语言是一种底层语言，直接操作硬件，可以提高程序的效率和响应速度。
而C语言则更加高级，提供了更多的编程功能和易用性。
在编程过程中，我们需要考虑到P89LPC936的硬件限制和功能特性。
例如，我们需要合理利用闪存和RAM的存储空间，避免占用过多的资源。
同时，我们还需要注意时钟频率和定时器的设置，以确保程序的稳定性和准确性。
在开发P89LPC936程序时，我们通常会遇到一些常见的问题和挑战。
例如，如何正确地配置和使用各种外设，如串口、定时器和中断等。
此外，我们还需要处理各种输入和输出，如按键输入、LED显示和蜂鸣器发声等。
为了更好地开发P89LPC936程序，我们可以参考官方提供的开发工具和文档。
这些资源包括开发板、调试器和编译器等，可以帮助我们更高效地编写和调试程序。
P89LPC936是一款强大的嵌入式微控制器，具有广泛的应用前景。
通过深入了解其特性和功能，并合理应用编程技巧，我们可以开发出稳定、高效的程序，为各种电子设备提供强大的控制能力。
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P89LPC924/925 器件手册
1. 概述..............................................................................................................................................4 2. 特性..............................................................................................................................................4 2.1 主要特性................................................................................................................................4 2.2 其它特性................................................................................................................................4 3. 定购信息......................................................................................................................................5 3.1 定购选项................................................................................................................................5 4. 功能框图......................................................................................................................................5 5. 管脚信息......................................................................................................................................6 5.1 管脚配置................................................................................................................................6 5.2 管脚描述..............................................................................................................................6 6. 逻辑符号......................................................................................................................................8 7.特殊功能寄存器............................................................................................................................8 8. 功能描述.................................................................................................................................... 11 8.1 增强型 CPU.........................................................................................................................12 8.2 时钟......................................................................................................................................12 8.2.1 时钟定义 .......................................................................................................................12 8.2.2 CPU 时钟(OSCCLK) ..................................................................................................12 8.2.3 低频振荡器选项 ...........................................................................................................12 8.2.4 中频振荡器选项 ............................................................................................................12 8.2.5 高频振荡器选项 ...........................................................................................................12 8.2.6 时钟输出 .......................................................................................................................12 8.3 片内 RC 振荡器选项 ..........................................................................................................13 8.4 看门狗振荡器选项 ..............................................................................................................13 8.5 外部时钟输入选项 ..............................................................................................................13 8.6 CPU 时钟（CCLK）唤醒延迟 ........................................................................................13 8.7 CPU 时钟（CCLK）调整：DIVM 寄存器 .....................................................................14 8.8 低功耗选择 ..........................................................................................................................14 8.9 A/D 转换器 ...........................................................................................................................14 8.9.1 概述...............................................................................................................................14 8.9.2 特性...............................................................................................................................14 8.9.3 A/D 工作模式 ................................................................................................................15 8.9.4 转换起动模式 ...............................................................................................................15 8.9.5 边界限制中断 ...............................................................................................................15 8.9.6 DAC 输出到高输出阻抗的 I/O 口................................................................................16