74AC378SMQB中文资料

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CD74AC86中文资料

0.05
3
0.05
4.5
12
3
24
4.5
75
5.5
(Note 6, 7)
50
5.5
(Note 6, 7)
25oC MIN MAX
-40oC TO 85oC
MIN MAX
-55oC TO 125oC
MIN MAX
UNITS
1.2
-
1.2
-
1.2
-
V
2.1
-
2.1
-
2.1
-
V
3.85
-
3.85
-
3.85
DC Electrical Speciﬁcations
PARAMETER AC TYPES High Level Input Voltage Low Level Input Voltage High Level Output Voltage
Low Level Output Voltage
TEST
CONDITIONS
• Speed of Bipolar FAST™/AS/S with Signiﬁcantly Reduced Power Consumption
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
CD54ACT86F3A CD74ACT86E
CD74ACT86M
-55 to 125
0 to 70oC, -40 to 85, -55 to 125
0 to 70oC, -40 to 85, -55 to 125

MC74ACT352D中文资料

The MC74AC352/74ACT352 is a dual 4-input multiplexer. It selects two bits of data from up to four sources under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (Ea, Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced HIGH. The logic equations for the outputs are shown below: Za = Ea•(I0a•S1•S0+I1a•S1•S0+ I2a•S1•S0+I3a•S1•S0) Zb = Eb•(I0b•S1•S0+I1b•S1•S0+ I2b•S1•S0+I3b•S1•S0) The MC74AC352/74ACT352 can be used to move data from a group of registers to a common output bus. The particular register from which the date came would be determined by the state of the Select inputs. A less obvious application is as a function generator. The MC74AC352/ 74ACT352 can generate two functions of three variables. This is useful for implementing highly irregular random logic.

MC74LVX245八线总线传输器说明书

MC74LVX245Octal Bus TransceiverWith 5 V−Tolerant InputsThe MC74LVX245 is an advanced high speed CMOS octal bus transceiver.It is intended for two−way asynchronous communication between data buses. The direction of data transmission is determined by the level of the T/R input. The output enable pin (OE) can be used to disable the device, so that the buses are effectively isolated.All inputs are equipped with protection circuits against static discharge.Features•High Speed: t PD = 4.7 ns (Typ) at V CC = 3.3 V•Low Power Dissipation: I CC = 4 m A (Max) at T A = 25°C •Power Down Protection Provided on Inputs •Balanced Propagation Delays •Low Noise: V OLP = 0.8 V (Max)•Pin and Function Compatible with Other Standard Logic Families •Latchup Performance Exceeds 300 mA•ESD Performance:Human Body Model > 2000 V;Machine Model > 200 V•These Devices are Pb−Free and are RoHS CompliantApplication Notes•Do Not Force a Signal on an I/O Pin when it is an Active Output,Damage May Occur•All Floating (High Impedance) Input or I/O Pins must be Fixed by Means of Pullup or Pulldown Resistors or Bus Terminator ICs •A Parasitic Diode is Formed between the Bus and V CC Terminals Therefore, the LVX245 cannot be Used to Interface 5.0 V to 3.0 VSystems DirectlySee detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.ORDERING INFORMATION120MARKING DIAGRAMSSOIC−20DW SUFFIX CASE 751DTSSOP−20DT SUFFIX CASE 948ELVX245= Specific Device Code A = Assembly Location WL, L = Wafer Lot Y= YearWW, W = Work WeekG or G= Pb−Free Package(Note: Microdot may be in either location)LVX 245ALYW G GSOIC−20TSSOP−20PIN ASSIGNMENT20−Lead (Top View)192018171615142134567V CC 1381291110OE B0B1B2B3B4B5B6B7T/R A0A1A2A3A4A5A6A7GNDB0OE 19T/R 1A0B1A1B2A2B3A3B4A4B5A5B6A6B7A7Figure 1. Logic DiagramTable 1. PIN NAMESPins FunctionOE T/R A0−A7Bo−B7Output Enable Input Transmit/Receive InputSide A 3−State Inputs or 3−State Outputs Side B 3−State Inputs or 3−State OutputsINPUTS OPERATING MODE Non−Inverting OE T/R L L B Data to A Bus L H A Data to B Bus HXZH = High Voltage Level; L = Low Voltage Level; Z = High Impedance State;X = High or Low Voltage Level and Transitions are Acceptable; For I CC reasons, Do Not Float InputsMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage–0.5 to +7.0V V in DC Input Voltage (T/R, OE)–0.5 to +7.0V V I/O DC Output Voltage–0.5 to V CC +0.5VI IK Input Diode Current−20mAI OK Output Diode Current±20mAI out DC Output Current, per Pin±25mAI CC DC Supply Current, V CC and GND Pins±75mAP D Power Dissipation180mW T stg Storage Temperature–65 to +150°C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC DC Supply Voltage 2.0 3.6V V in DC Input Voltage (T/R, OE)0 5.5V V I/O DC Output Voltage0V CC V T A Operating Temperature, All Package Types−40+85°CD t/D V Input Rise and Fall Time0100ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.DC ELECTRICAL CHARACTERISTICSSymbol Parameter Test Conditions V CCVT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min MaxV IH High−Level Input Voltage 2.03.03.61.52.02.41.52.02.4VV IL Low−Level Input Voltage 2.03.03.60.50.80.80.50.80.8VV OH High−Level Output Voltage(V in = V IH or V IL)I OH = −50 m AI OH = −50 m AI OH = −4 mA2.03.03.01.92.92.582.03.01.92.92.48VV OL Low−Level Output Voltage(V in = V IH or V IL)I OL = 50 m AI OL = 50 m AI OL = 4 mA2.03.03.00.00.00.10.10.360.10.10.44VI in Input Leakage Current V in = 5.5 V or GND(T/R, OE)3.6±0.1±1.0m AI OZ Maximum 3−State Leakage Current V in = V IL or V IHV out = V CC or GND 3.6±0.25±2.5m AI CC Quiescent Supply Current V in = V CC or GND 3.6 4.040.0m A Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.AC ELECTRICAL CHARACTERISTICS (Input t r = t f= 3.0 ns)Symbol Parameter Test ConditionsT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min Maxt PLH, t PHL Propagation DelayInput to OutputV CC = 2.7 V C L = 15 pFC L = 50 pF6.18.610.714.21.01.013.517.0nsV CC = 3.3 ± 0.3 V C L = 15 pFC L = 50 pF4.77.26.610.11.01.08.011.5t PZL, t PZH Output Enable Time toHigh and Low LevelV CC = 2.7 V C L = 15 pFR L = 1 k W C L = 50 pF9.011.516.920.41.01.020.524.0nsV CC = 3.3 ± 0.3 V C L = 15 pFR L = 1 k W C L = 50 pF7.19.611.014.51.01.013.016.5t PLZ, t PHZ Output Disable Time FromHigh and Low LevelV CC = 2.7 V C L = 50 pFR L = 1 k W11.518.0 1.021.0nsV CC = 3.3 ± 0.3 V C L = 50 pFR L = 1 k W9.612.8 1.014.5t OSHL t OSLH Output−to−Output Skew(Note 1)V CC = 2.7 V C L = 50 pFV CC = 3.3 ±0.3 V C L = 50 pF1.51.51.51.5ns1.Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t OSHL) or LOW−to−HIGH (t OSLH); parameter guaranteed by design.CAPACITIVE CHARACTERISTICSSymbol ParameterT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min MaxC in Input Capacitance (T/R, OE)41010pFC I/O Maximum 3−State I/O Capacitance8pFC PD Power Dissipation Capacitance (Note 2)21pF2.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation: I CC(OPR) = C PD V CC f in + I CC/8 (per bit). C PD is used to determine the no−load dynamic power consumption; P D = C PD V CC2 f in + I CC V CC.NOISE CHARACTERISTICS (Input t r = t f = 3.0ns, C L = 50pF, V CC = 3.3V, Measured in SOIC Package)Symbol CharacteristicT A = 25°CUnit Typ MaxV OLP Quiet Output Maximum Dynamic V OL0.50.8V V OLV Quiet Output Minimum Dynamic V OL−0.5−0.8V V IHD Minimum High Level Dynamic Input Voltage 2.0V V ILD Maximum Low Level Dynamic Input Voltage0.8VFigure 2. Figure 3.V CCGNDSWITCHING WAVEFORMSOEA or BA or BV CCGND HIGHIMPEDANCE V OL +0.3V V OH -0.3V HIGHIMPEDANCEV CC GNDT/R*Includes all probe and jig capacitance C L *TEST POINT *Includes all probe and jig capacitanceTEST POINT CONNECT TO V CC WHEN TESTING t PLZ AND t PZL .CONNECT TO GND WHEN TESTING t PHZ AND t PZH .TEST CIRCUITSFigure 4. Propagation Delay Test Circuit Figure 5. 3−State Test CircuitORDERING INFORMATIONDevicePackage Shipping †MC74LVX245DWR2G SOIC−20(Pb−Free)1000 / Tape & Reel MC74LVX245DTR2GTSSOP−20(Pb−Free)2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.CASE 948E−02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSCM0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.DETAIL E6.400.252------16X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.CASE 751D−05ISSUE GM0.25SA SBTDIM MIN MAXMILLIMETERSA 2.35 2.65A10.100.25B0.350.49C0.230.32D12.6512.95E7.407.60e 1.27 BSCH10.0510.55h0.250.75L0.500.90q0 7NOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCESPER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INCLUDE MOLDPROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE PROTRUSIONSHALL BE 0.13 TOTAL IN EXCESS OF BDIMENSION AT MAXIMUM MATERIALCONDITION.__ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATIONMouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:O N Semiconductor:MC74LVX245MELG MC74LVX245MG MC74LVX245DTR2MC74LVX245DTR2G MC74LVX245DWR2 MC74LVX245DWR2G。

74AC378DCQB资料

TL F 1023154AC 74AC378Parallel D Register with EnableMarch 199354AC 74AC378Parallel D Register with EnableGeneral DescriptionThe ’AC378is a 6-bit register with a buffered common En-able This device is similar to the ’AC174 but with common Enable rather than common Master ResetFeaturesY 6-bit high-speed parallel registerY Positive edge-triggered D-type inputsY Fully buffered common clock and enable inputsY Input clamp diodes limit high-speed termination effects YStandard Military Drawing (SMD) ’AC378 5962-91605Logic Symbols Connection DiagramsTL F 10231–1IEEE IECTL F 10231–4Pin Assignment for DIP SOIC and FlatpakTL F 10231–2Pin Assignmentfor LCCTL F 10231–3Pin Names DescriptionEEnable Input (Active LOW)D 0–D 5Data InputsCP Clock Pulse Input (Active Rising Edge)Q 0–Q 5OutputsFACT TM is a trademark of National Semiconductor Corporation C 1995National Semiconductor CorporationRRD-B30M75 Printed in U S AFunctional DescriptionThe’AC378consists of six edge-triggered D-type flip-flops with individual D inputs and Q inputs The Clock(CP)and Enable(E)inputs are common to all flip-flopsWhen the E input is LOW new data is entered into the register on the LOW-to-HIGH transition of the CP input When the E input is HIGH the register will retain the present data independent of the CP input Truth TableInputs OutputE CP D n Q nH L X No ChangeL L H HL L L LH e HIGH Voltage LevelL e LOW Voltage LevelX e ImmaterialL e LOW-to-HIGH Clock TransitionLogic DiagramTL F 10231–5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays2Absolute Maximum Ratings(Note1)If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage(V CC)b0 5V to a7 0V DC Input Diode Current(I IK)V I e b0 5V b20mA V I e V CC a0 5V a20mA DC Input Voltage(V I)b0 5V to V CC a0 5V DC Output Diode Current(I OK)V O e b0 5V b20mA V O e V CC a0 5V a20mA DC Output Voltage(V O)b0 5V to V CC a0 5V DC Output Sourceor Sink Current(I O)g50mA DC V CC or Ground Currentper Output Pin(I CC or I GND)g50mA Storage Temperature(T STG)b65 C to a150 C Junction Temperature(T J)CDIP175 C PDIP140 C Note1 Absolute maximum ratings are those values beyond which damage to the device may occur The databook specifications should be met without exception to ensure that the system design is reliable over its power supply temperature and output input loading variables National does not recom-mend operation of FACT TM circuits outside databook specifications Recommended Operating ConditionsSupply Voltage(V CC)’AC2 0V to6 0V Input Voltage(V I)0V to V CC Output Voltage(V O)0V to V CC Operating Temperature(T A)74AC b40 C to a85 C 54AC b55 C to a125 C Minimum Input Edge Rate(D V D t)’AC DevicesV IN from30%to70%of V CCV CC 3 3V 4 5V 5 5V125mV nsDC Characteristics for’AC Family Devices74AC54AC74ACSymbol Parameter V CCT A e a25 CT A e T A eUnits Conditions (V)b55 C to a125 C b40 C to a85 CTyp Guaranteed LimitsV IH Minimum High Level3 01 52 12 12 1V OUT e0 1V Input Voltage4 52 253 153 153 15V or V CC b0 1V5 52 753 853 853 85V IL Maximum Low Level3 01 50 90 90 9V OUT e0 1V Input Voltage4 52 251 351 351 35V or V CC b0 1V5 52 751 651 651 65V OH Minimum High Level3 02 992 92 92 9I OUT e b50m A Output Voltage4 54 494 44 44 4V5 55 495 45 45 4V IN e V IL or V IH3 02 562 42 46b12mA4 53 863 73 76V I OH b24mA5 54 864 74 76b24mA V OL Maximum Low Level3 00 0020 10 10 1I OUT e50m A Output Voltage4 50 0010 10 10 1V5 50 0010 10 10 1V IN e V IL or V IH3 00 360 50 4412mA4 50 360 50 44V I OL24mA5 50 360 50 4424mAI IN Maximum Input5 5g0 1g1 0g1 0m A V I e V CC GNDLeakage CurrentAll outputs loaded thresholds on input associated with output under test3DC Characteristics for’AC Family Devices(Continued)74AC54AC74ACSymbol Parameter V CC T A e T A e T A eUnits Conditions (V)a25 C b55 C to a125 C b40 C to a85 CTyp Guaranteed LimitsI OLD Minimum Dynamic5 55075mA V OLD e1 65V Max I OHD Output Current5 5b50b75mA V OHD e3 85V MinI CC Maximum Quiescent5 54 080 040 0m A V IN e V CCSupply Current or GNDMaximum test duration2 0ms one output loaded at a timeNote I IN and I CC 3 0V are guaranteed to be less than or equal to the respective limit 5 5V V CCI CC for54AC 25 C is identical to74AC 25 CAC Electrical Characteristics74AC54AC74ACV CC T A e a25 C T A e b55 C T A e b40 CSymbol Parameter(V)C L e50pF to a125 C to a85 C Units C L e50pF C L e50pFMin Typ Max Min Max Min Maxf max Maximum Clock3 312516095110MHz Frequency5 016020095145t PLH Propagation Delay3 32 58 511 01 512 02 512 5ns CP to Q n5 01 56 08 01 59 01 59 0t PHL Propagation Delay3 32 58 010 51 512 02 511 0ns CP to Q n5 01 55 57 51 59 01 58 0Voltage Range3 3is3 3V g0 3VVoltage Range5 0is5 0V g0 5VAC Operating Requirements74AC54AC74ACV CC T A e a25 C T A e b55 C T A e b40 CSymbol Parameter(V)C L e50pF to a125 C to a85 C Units C L e50pF C L e50pFTyp Guaranteed Minimumt s Setup Time HIGH or LOW3 31 53 04 03 5nsD n to CP5 01 02 04 02 5t h Hold Time HIGH or LOW3 31 02 04 02 0nsD n to CP5 01 02 04 02 0t s Setup Time HIGH or3 302 02 52 0ns LOW E to CP5 002 02 52 0t h Hold Time HIGH or3 31 02 04 02 0ns LOW E to CP5 01 02 04 02 0t w CP Pulse Width3 33 04 56 55 5ns HIGH or LOW5 02 03 56 54 0Voltage Range3 3is3 3V g0 3VVoltage Range5 0is5 0V g0 5VCapacitanceSymbol Parameter Typ Units ConditionsC IN Input Capacitance4 5pF V CC e OPENC PD Power Dissipation Capacitance28pF V CC e5 0V4Ordering InformationThe device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows74AC378P C QRTemperature Range Family Special Variations74AC e Commercial X e Devices shipped in13 reels54AC e Military QR e Commercial grade device withburn-inDevice Type QB e Military grade with environmentaland burn-in processing shipped Package Codein tubesP e Plastic DIPD e Ceramic DIP Temperature RangeF e Flatpak C e Commercial(b40 C to a85 C)L e Leadless Ceramic Chip Carrier(LCC)M e Military(b55 C to a125 C)S e Small Outline(SOIC)5Physical Dimensions inches(millimeters)20-Terminal Ceramic Leadless Chip Carrier(L)NS Package Number E20A16-Lead Ceramic Dual-In-Line Package(D)NS Package Number J16A6Physical Dimensions inches(millimeters)(Continued)16-Lead Small Outline Integrated Circuit(S)NS Package Number M16A16-Lead Plastic Dual-In-Line Package(P)NS Package Number N16E754A C 74A C 378P a r a l l e l D R e g i s t e r w i t h E n a b l ePhysical Dimensions inches (millimeters)(Continued)Lit 11480516-Lead Ceramic Flatpak (F)NS Package Number W16ALIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectivenessbe reasonably expected to result in a significant injury to the userNational Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor CorporationGmbHJapan LtdHong Kong LtdDo Brazil Ltda(Australia)Pty Ltd 2900Semiconductor DriveLivry-Gargan-Str 10Sumitomo Chemical13th Floor Straight Block Rue Deputado Lacorda Franco Building 16。

帕顿378s型号扫描开关使用手册说明书

USER MANUAL
MODEL 378S
Serial Scanning Switch
Part# 07M378S-B Doc# 020011UB Revised 4/20/93
SALES OFFICE (301) 975-1000 TECHNICAL SUPPORT (301) 975-1007
• Available with up to 1 Meg of RAM buffer
• Individual port LEDs show scanning progress and which port is loading data
• Buffer status LEDs show amount of buffer currently being used
To configure the Model 378S, you must first open the case by taking off the 4 screws (2 on each side). Then locate the DIP switches (shown below) at the lower center of the PC board:
The Model 378S allows input/output data rates to 19.2Kbps, and supports both hardware (CTS/DSR) and software (X-ON/X-OFF) handshaking methods. Convenience features of the Model 378S include a manual "step" button that overrides automatic scanning, and a master buffer clear button. Two sets of LED indicators are provided: one set shows which port is currently being scanned or loaded, the other set shows the percentage of buffer space currently available.

ST 74AC74 说明书

1/12April 2001sHIGH SPEED:f MAX = 300MHz (TYP.) at V CC = 5V sLOW POWER DISSIPATION:I CC = 2µA(MAX.) at T A =25°C sHIGH NOISE IMMUNITY:V NIH = V NIL = 28 % V CC (MIN.)s50Ω TRANSMISSION LINE DRIVING CAPABILITYsSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 24mA (MIN)sBALANCED PROPAGATION DELAYS:t PLH ≅ t PHLsOPERATING VOLTAGE RANGE:V CC (OPR) = 2V to 6VsPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74sIMPROVED LATCH-UP IMMUNITYDESCRIPTIONThe 74AC74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS tecnology. A signal on the D INPUT is transferred to the Q and Q OUTPUTS during the positive goingtransition of the clock pulse.CLEAR and PRESET are independent of the clock and accomplished by a low setting on the appropriate input.All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.74AC74DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEARPIN CONNECTION AND IEC LOGIC SYMBOLSORDER CODESPACKAGE TUBE T & R DIP 74AC74B SOP 74AC74M74AC74MTR TSSOP74AC74TTR74AC742/12INPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTIONTRUTH TABLELOGIC DIAGRAMThis logic diagram has not be used to estimate propagation delaysPIN No SYMBOL NAME AND FUNCTION 1, 131CLR, 2CLR Asynchronous Reset - Direct Input 2, 121D, 2D Data Inputs 3, 111CK, 2CKClock Input(LOW to HIGH, Edge Triggered)4, 101PR, 2PR Asynchronous Set - Direct Input5, 91Q, 2Q True Flip-Flop Outputs 6, 81Q, 2Q Complement Flip-Flop Outputs 7GND Ground (0V)14V CCPositive Supply Voltage74AC743/12ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.RECOMMENDED OPERATING CONDITIONS1) V IN from 30% to 70% of V CCSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +7V V I DC Input Voltage -0.5 to V CC + 0.5V V O DC Output Voltage -0.5 to V CC + 0.5V I IK DC Input Diode Current ± 20mA I OK DC Output Diode Current ± 20mA I O DC Output Current ± 50mA I CC or I GND DC V CC or Ground Current± 200mA T stg Storage Temperature -65 to +150°C T LLead Temperature (10 sec)300°CSymbol ParameterValue Unit V CC Supply Voltage 2 to 6V V I Input Voltage 0 to V CC V V O Output Voltage 0 to V CC V T op Operating Temperature-55 to 125°C dt/dvInput Rise and Fall Time V CC = 3.0, 4.5 or 5.5V (note 1)8ns/V74AC744/12DC SPECIFICATIONS1) Maximum test duration 2ms, one output loaded at time2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50ΩSymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.V IHHigh Level Input Voltage3.0V O = 0.1 V or V CC -0.1V 2.1 1.5 2.1 2.1V4.5 3.15 2.25 3.15 3.155.5 3.852.753.853.85V ILLow Level Input Voltage3.0V O = 0.1 V or V CC -0.1V 1.50.90.90.9V4.5 2.25 1.35 1.35 1.355.5 2.75 1.651.651.65V OHHigh Level Output Voltage3.0I O =-50 µA 2.9 2.99 2.9 2.9V4.5I O =-50 µA 4.4 4.49 4.4 4.45.5I O =-50 µA 5.4 5.495.4 5.43.0I O =-12 mA 2.56 2.46 2.44.5I O =-24 mA 3.86 3.76 3.75.5I O =-24 mA 4.864.764.7V OLLow Level Output Voltage3.0I O =50 µA 0.0020.10.10.1V4.5I O =50 µA 0.0010.10.10.15.5I O =50 µA 0.0010.10.10.13.0I O =12 mA 0.360.440.54.5I O =24 mA 0.360.440.55.5I O =24 mA 0.360.440.5I I Input Leakage Current5.5V I = V CC or GND ± 0.1± 1± 1µA I CC Quiescent Supply Current5.5V I = V CC or GND 22040µA I OLD Dynamic Output Current (note 1, 2)5.5V OLD = 1.65 V max 7550mA I OHDV OHD = 3.85 V min-75-50mA74AC745/12AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, R L = 500 Ω, Input t r = t f = 3ns)(*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5VCAPACITIVE CHARACTERISTICS1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /2 (per Flip-Flop)SymbolParameterTest ConditionValueUnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.t PLH t PHL Propagation DelayTime CK to Q or Q 3.3(*)7.014.016.017.5ns 5.0(**)5.010.010.512.0t PLH t PHL Propagation DelayTime PR or CLR to Q or Q3.3(*) 6.012.013.514.0ns5.0(**) 4.59.510.510.5t W Pulse Width HIGHor LOW, CK or PR or CLR3.3(*) 5.0 1.57.07.0ns5.0(**) 4.0 1.5 5.0 5.0t s Setup Time D to CKHIGH or LOW3.3(*)4.0-0.2 4.0 4.0ns5.0(**) 3.0-0.2 3.0 3.0t h Hold Time D to CK HIGH or LOW 3.3(*) 2.00.2 3.0 3.0ns 5.0(**) 2.00.2 3.0 3.0t REM Removal Time PR or CLR to CK 3.3(*) 1.0-1.0 1.0 1.0ns 5.0(**) 1.0-0.7 1.0 1.0f MAXMaximum Clock Frequency3.3(*)1003009090MHz5.0(**)140300130130SymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.C IN Input Capacitance 5.03pF C PDPower Dissipation Capacitance (note 1)5.0f IN = 10MHz35pF74AC746/12TEST CIRCUITC L = 50pF or equivalent (includes jig and probe capacitance)R L = R 1 = 500Ω or equivalentR T = Z OUT of pulse generator (typically 50Ω)WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES, CLOCK PULSE WIDTHS(f=1MHz; 50% duty cycle)74AC74 WAVEFORM 2: PROPAGATION DELAYS, RESET AND SET PULSE WIDTHS (f=1MHz; 50% duty cycle)7/1274AC74WAVEFORM 3: RECOVERY TIMES (f=1MHz; 50% duty cycle)WAVEFORM 4: PULSE WIDTH8/1274AC74Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2001 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - MoroccoSingapore - Spain - Sweden - Switzerland - United Kingdom© 12/12。

74AC378PCQR中文资料

74系列功能大全(中文)

74系列功能大全（中文）74、74HC、74LS系列芯片资料，从网上下的，集合了一下系列电平典型传输延迟ns 最大驱动电流(-Ioh/Lol)mAAHC CMOS 8.5 -8/8AHCT COMS/TTL 8.5 -8/8HC COMS 25 -8/8HCT COMS/TTL 25 -8/8ACT COMS/TTL 10 -24/24F TTL 6.5 -15/64ALS TTL 10 -15/64LS TTL 18 -15/24注：同型号的74系列、74HC系列、74LS系列芯片，逻辑功能上是一样的。

74LSxx的使用说明如果找不到的话，可参阅74xx或74HCxx的使用说明。

有些资料里包含了几种芯片，如74HC161资料里包含了74HC160、74HC161、74HC162、74HC163四种芯片的资料。

找不到某种芯片的资料时，可试着查看一下临近型号的芯片资料。

7400 QUAD 2-INPUT NAND GATES 与非门7401 QUAD 2-INPUT NAND GATES OC 与非门7402 QUAD 2-INPUT NOR GATES 或非门7403 QUAD 2-INPUT NAND GATES 与非门7404 HEX INVERTING GATES 反向器7406 HEX INVERTING GATES HV 高输出反向器7408 QUAD 2-INPUT AND GATE 与门7409 QUAD 2-INPUT AND GATES OC 与门7410 TRIPLE 3-INPUT NAND GATES 与非门7411 TRIPLE 3-INPUT AND GATES 与门74121 ONE-SHOT WITH CLEAR 单稳态74132 SCHMITT TRIGGER NAND GATES 触发器与非门7414 SCHMITT TRIGGER INVERTERS 触发器反向器74153 4-LINE TO 1 LINE SELECTOR 四选一74155 2-LINE TO 4-LINE DECODER 译码器74180 PARITY GENERATOR/CHECKER 奇偶发生检验74191 4-BIT BINARY COUNTER UP/DOWN 计数器7420 DUAL 4-INPUT NAND GATES 双四输入与非门7426 QUAD 2-INPUT NAND GATES 与非门7427 TRIPLE 3-INPUT NOR GATES 三输入或非门7430 8-INPUT NAND GATES 八输入端与非门7432 QUAD 2-INPUT OR GATES 二输入或门7438 2-INPUT NAND GATE BUFFER 与非门缓冲器7445 BCD-DECIMAL DECODER/DRIVER BCD译码驱动器7474 D-TYPE FLIP-FLOP D型触发器7475 QUAD LATCHES 双锁存器7476 J-K FLIP-FLOP J-K触发器7485 4-BIT MAGNITUDE COMPARATOR 四位比较器7486 2-INPUT EXCLUSIVE OR GATES 双端异或门74HC00 QUAD 2-INPUT NAND GATES 双输入与非门74HC02 QUAD 2-INPUT NOR GATES 双输入或非门74HC03 2-INPUT OPEN-DRAIN NAND GATES 与非门74HC04 HEX INVERTERS 六路反向器74HC05 HEX INVERTERS OPEN DRAIN 六路反向器74HC08 2-INPUT AND GATES 双输入与门74HC107 J-K FLIP-FLOP WITH CLEAR J-K触发器74HC109A J-K FLIP-FLOP W/PRESET J-K触发器74HC11 TRIPLE 3-INPUT AND GATES 三输入与门74HC112 DUAL J-K FLIP-FLOP 双J-K触发器74HC113 DUAL J-K FLIP-FLOP PRESET 双JK触发器74HC123A RETRIGGERABLE MONOSTAB 可重触发单稳74HC125 TRI-STATE QUAD BUFFERS 四个三态门74HC126 TRI-STATE QUAD BUFFERS 六三态门74HC132 2-INPUT TRIGGER NAND 施密特触发与非门74HC133 13-INPUT NAND GATES 十三输入与非门74HC137 3-TO-8 DECODERS W/LATCHES 3-8线译码器74HC138 3-8 LINE DECODER 3线至8线译码器74HC139 2-4 LINE DECODER 2线至4线译码器74HC14 TRIGGERED HEX INVERTER 六触发反向器74HC147 10-4 LINE PRIORITY ENCODER 10-4编码器74HC148 8-3 LINE PRIORITY ENCODER 8-3编码器74HC149 8-8 LINE PRIORITY ENCODER 8-8编码器74HC151 8-CHANNEL DIGITAL MUX 8通道多路器74HC153 DUAL 4-INPUT MUX 双四输入多路器74HC154 4-16 LINE DECODER 4线至16线译码器74HC155 2-4 LINE DECODER 2线至4线译码器74HC157 QUAD 2-INPUT MUX 四个双端多路器74HC161 BINARY COUNTER 二进制计数器74HC163 DECADE COUNTERS 十进制计数器74HC164 SERIAL-PARALLEL SHIFT REG 串入并出74HC165 PARALLEL-SERIAL SHIFT REG 并入串出74HC166 SERIAL-PARALLEL SHIFT REG 串入并出74HC173 TRI-STATE D FLIP-FLOP 三态D触发器74HC174 HEX D FLIP-FLOP W/CLEAR 六D触发器74HC175 HEX D FLIP-FLOP W/CLEAR 六D触发器74HC181 ARITHMETIC LOGIC UNIT 算术逻辑单元74HC182 LOOK AHEAD CARRYGENERATR 进位发生器74HC190 BINARY UP/DN COUNTER 二进制加减计数器74HC191 DECADE UP/DN COUNTER 十进制加减计数器74HC192 DECADE UP/DN COUNTER 十进制加减计数器74HC193 BINARY UP/DN COUNTER 二进制加减计数器74HC194 4BIT BI-DIR SHIFT 4位双向移位寄存器74HC195 4BIT PARALLEL SHIFT 4位并行移位寄存器74HC20 QUAD 4-INPUT NAND GATE 四个四入与非门74HC221A NON-RETRIG MONOSTAB 不可重触发单稳74HC237 3-8 LINE DECODER 地址锁3线至8线译码器74HC242/243 TRI-STAT TRANSCEIVER 三态收发器74HC244 OCTAL 3-STATE BUFFER 八个三态缓冲门74HC245 OCTAL 3-STATE TRANSCEIVER 三态收发器74HC251 8-CH 3-STATE MUX 8路3态多路器74HC253 DUAL 4-CH 3-STATE MUX 4路3态多路器74HC257 QUAD 2-CH 3-STATE MUX 4路3态多路器74HC258 2-CH 3-STATE MUX 2路3态多路器74HC259 3-8 LINE DECODER 8位地址锁存译码器74HC266A 2-INPUT EXCLUSIVE NOR GATE 异或非74HC27 TRIPLE 3-INPUT NOR GATE三个3输入或非门74HC273 OCTAL D FLIP-FLOP CLEAR 8路D触发器74HC280 9BIT ODD/EVEN GENERATOR 奇偶发生器74HC283 4BIT BINARY ADDER CARRY 四位加法器74HC299 3-STATE UNIVERSAL SHIFT 三态移位寄存74HC30 8-INPUT NAND GATE 8输入端与非门74HC32 QUAD 2-INPUT OR GATE 四个双端或门74HC34 NON-INVERTER 非反向器74HC354 8-CH 3-STATE MUX 8路3态多路器74HC356 8-CH 3-STATE MUX 8路3态多路器74HC365 HEX 3-STATE BUFFER 六个三态缓冲门74HC366 3-STATE BUFFER INVERTER 缓冲反向器74HC367 3-STATE BUFFER INVERTER 缓冲反向器74HC368 3-STATE BUFFER INVERTER 缓冲反向器74HC373 3-STATE OCTAL D LATCHES 三态D型锁存器74HC374 3-STATE OCTAL D FLIPFLOP 三态D触发器74HC393 4-BIT BINARY COUNTER 4位二进制计数器74HC4016 QUAD ANALOG SWITCH 四路模拟量开关74HC4020 14-Stage Binary Counter 14输出计数器74HC4017 Decade Counter/Divider with 10 Decoded Outputs 十进制计数器带10个译码输出端74HC4040 12 Stage Binary Counter 12出计数器74HC4046 PHASE LOCK LOOP 相位监测输出器74HC4049 LEVEL DOWN CONVERTER 电平变低器74HC4050 LEVEL DOWN CONVERTER 电平变低器74HC4051 8-CH ANALOG MUX 8通道多路器74HC4052 4-CH ANALOG MUX 4通道多路器74HC4053 2-CH ANALOG MUX 2通道多路器74HC4060 14-STAGE BINARY COUNTER 14阶BIN计数74HC4066 QUAD ANALOG MUX 四通道多路器74HC4075 TRIPLE 3-INPUT OR GATE 3输入或门74HC42 BCD TO DECIMAL BCD转十进制译码器74HC423A RETRIGGERABLE MONOSTAB 可重触发单稳74HC4511 BCD-7 SEG DRIVER/DECODER 7段译码器74HC4514 4-16 LINE DECODER 4至16线译码器74HC4538A RETRIGGERAB MONOSTAB 可重触发单稳74HC4543 LCD BCD-7 SEG LCD用的BCD-7段译码驱动74HC51 AND OR GATE INVERTER 与或非门74HC521 8BIT MAGNITUDE COMPARATOR 判决定路74HC533 3-STATE D LATCH 三态D锁存器74HC534 3-STATE D FLIP-FLOP 三态D型触发器74HC540 3-STATE BUFFER 三态缓冲器74HC541 3-STATE BUFFER INVERTER三态缓冲反向器74HC58 DUAL AND OR GATE 与或门74HC589 3STATE 8BIT SHIFT 8位移位寄存三态输出74HC594 8BIT SHIFT REG 8位移位寄存器74HC595 8BIT SHIFT REG 8位移位寄存器出锁存74HC597 8BIT SHIFT REG 8位移位寄存器入锁存74HC620 3-STATE TRANSCEIVER 反向3态收发器74HC623 3-STATE TRANSCEIVER 八路三态收发器74HC640 3-STATE TRANSCEIVER 反向3态收发器74HC643 3-STATE TRANSCEIVER 八路三态收发器74HC646 NON-INVERT BUS TRANSCEIVER 总线收发器74HC648 INVERT BUS TRANCIVER 反向总线收发器74HC688 8BIT MAGNITUDE COMPARATOR 8位判决电路74HC7266 2-INPUT EXCLUSIVE NOR GATE 异或非门74HC73 DUAL J-K FLIP-FLOP W/CLEAR 双JK触发器74HC74A PRESET/CLEAR D FLIP-FLOP 双D触发器74HC75 4BIT BISTABLE LATCH 4位双稳锁存器74HC76 PRESET/CLEAR JK FLIP-FLOP 双JK触发器74HC85 4BIT MAGNITUDE COMPARATOR 4位判决电路74HC86 2INPUT EXCLUSIVE OR GATE 2输入异或门74HC942 BAUD MODEM 300BPS低速调制解调器74HC943 300 BAUD MODEM 300BPS低速调制解调器74LS00 QUAD 2-INPUT NAND GATES 与非门74LS02 QUAD 2-INPUT NOR GATES 或非门74LS03 QUAD 2-INPUT NAND GATES 与非门74LS04 HEX INVERTING GATES 反向器74LS05 HEX INVERTERS OPEN DRAIN 六路反向器74LS08 QUAD 2-INPUT AND GATE 与门74LS09 QUAD 2-INPUT AND GATES OC 与门74LS10 TRIPLE 3-INPUT NAND GATES 与非门74LS109 QUAD 2-INPUT AND GATES OC 与门74LS11 TRIPLE 3-INPUT AND GATES 与门74LS112 DUAL J-K FLIP-FLOP 双J-K触发器74LS113 DUAL J-K FLIP-FLOP PRESET 双JK触发器74LS114 NEGATIVE J-K FLIP-FLOP 负沿J-K触发器74LS122 Retriggerable Monostab 可重触发单稳74LS123 Retriggerable Monostable 可重触发单稳74LS125 TRI-STATE QUAD BUFFERS 四个三态门74LS13 QUAL 4-in NAND TRIGGER 4输入与非触发器74LS160 BCD DECADE 4BIT BIN COUNTERS 计数器74LS136 QUADRUPLE 2-INPUT XOR GATE 异或门74LS138 3-8 LINE DECODER 3线至8线译码器74LS139 2-4 LINE DECODER 2线至4线译码器74LS14 TRIGGERED HEX INVERTER 六触发反向器74HC147 10-4 LINE PRIORITY ENCODER 10-4编码器74HC148 8-3 LINE PRIORITY ENCODER 8-3编码器74HC149 8-8 LINE PRIORITY ENCODER 8-8编码器74LS151 8-CHANNEL DIGITAL MUX 8通道多路器74LS153 DUAL 4-INPUT MUX 双四输入多路器74LS155 2-4 LINE DECODER 2线至4线译码器74LS156 2-4 LINE DECODER/DEMUX 2-4译码器74LS157 QUAD 2-INPUT MUX 四个双端多路器74LS158 2-1 LINE MUX 2-1线多路器74LS160A BINARY COUNTER 二进制计数器74LS161A BINARY COUNTER 二进制计数器74LS162A BINARY COUNTER 二进制计数器74LS163A DECADE COUNTERS 十进制计数器74LS164 SERIAL-PARALLEL SHIFT REG 串入并出74LS168 BI-DIRECT BCD TO DECADE 双向计数器74LS169 4BIT UP/DN BIN COUNTER 四位加减计数器74LS173 TRI-STATE D FLIP-FLOP 三态D触发器74LS174 HEX D FLIP-FLOP W/CLEAR 六D触发器74LS175 HEX D FLIP-FLOP W/CLEAR 六D触发器74LS190 BINARY UP/DN COUNTER 二进制加减计数器74LS191 DECADE UP/DN COUNTER 十进制加减计数器74LS192 DECADE UP/DN COUNTER 十进制加减计数器74LS193 BINARY UP/DN COUNTER 二进制加减计数器74LS194A 4BIT BI-DIR SHIFT 4位双向移位寄存器74LS195A 4BIT PARALLEL SHIFT4位并行移位寄存器74LS20 QUAD 4-INPUT NAND GATE 四个四入与非门74LS21 4-INPUT AND GATE 四输入端与门74LS240 OCTAL 3-STATE BUFFER 八个三态缓冲门74LS244 OCTAL 3-STATE BUFFER 八个三态缓冲门74LS245 OCTAL 3-STATE TRANSCEIVER 三态收发器74LS253 DUAL 4-CH 3-STATE MUX 4路3态多路器74LS256 4BIT ADDRESS LATCH 四位可锁存锁存器74LS257 QUAD 2-CH 3-STATE MUX 4路3态多路器74LS258 2-CH 3-STATE MUX 2路3态多路器74LS27 TRIPLE 3-INPUT NOR GATES 三输入或非门74LS279 QUAD R-S LATCHES 四个RS非锁存器74LS28 QUAD 2-INPUT NOR BUFFER 四双端或非缓冲74LS283 4BIT BINARY ADDER CARRY 四位加法器74LS30 8-INPUT NAND GATES 八输入端与非门74LS32 QUAD 2-INPUT OR GATES 二输入或门74LS352 4-1 LINE SELECTOR/MUX 4-1线选择多路器74LS365 HEX 3-STATE BUFFER 六个三态缓冲门74LS367 3-STATE BUFFER INVERTER 缓冲反向器74LS368A 3-STATE BUFFER INVERTER 缓冲反向器74LS373 OCT LATCH W/3-STATE OUT三态输出锁存器74LS76 Dual JK Flip-Flop w/set 2个JK触发器74LS379 QUAD PARALLEL REG 四个并行寄存器74LS38 2-INPUT NAND GATE BUFFER 与非门缓冲器74LS390 DUAL DECADE COUNTER 2个10进制计数器74LS393 DUAL BINARY COUNTER 2个2进制计数器74LS42 BCD TO DECIMAL BCD转十进制译码器74LS48 BCD-7 SEG BCD-7段译码器74LS49 BCD-7 SEG BCD-7段译码器74LS51 AND OR GATE INVERTER 与或非门74LS540 OCT Buffer/Line Driver 8路缓冲驱动器74LS541 OCT Buffer/LineDriver 8路缓冲驱动器74LS74 D-TYPE FLIP-FLOP D型触发器74LS682 8BIT MAGNITUDE COMPARATOR 8路比较器74LS684 8BIT MAGNITUDE COMPARATOR 8路比较器74LS75 QUAD LATCHES 双锁存器74LS83A 4BIT BINARY ADDER CARRY 四位加法器74LS85 4BIT MAGNITUDE COMPARAT 4位判决电路74LS86 2INPUT EXCLUSIVE OR GATE 2输入异或门74LS90 DECADE/BINARY COUNTER 十/二进制计数器74LS95B 4BIT RIGHT/LEFT SHIFT 4位左右移位寄存74LS688 8BIT MAGNITUDE COMPARAT 8位判决电路74LS136 2-INPUT XOR GATE 2输入异或门74LS651 BUS TRANSCEIVERS 总线收发器74LS653 BUS TRANSCEIVERS 总线收发器74LS670 3-STATE 4-BY-4 REG 3态4-4寄存器74LS73A DUAL J-K FLIP-FLOP W/CLEAR 双JK触发器。

SN74AVC8T245_07资料

FEATURESDG ACKAGE(T OPV I EW)V CCAD I RA1A2A3A4A5A6A7A8GNDGNDRHLP ACKAGE(T OPV I EW)2413D I RA1A2A3A4A5A6A7A8GNDGNDGNDDESCRIPTION/ORDERING INFORMATIONSN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES517H–DECEMBER2003–REVISED FEBRUARY2007•Control Inputs V IH/V IL Levels Are Referenced•Max Data Ratesto VCCAVoltage–170Mbps(VCCA<1.8V or VCCB<1.8V)•V CC Isolation Feature–If Either V CC Input Is at–320Mbps(VCCA≥1.8V and V CCB≥1.8V) GND,All I/O Ports Are in the High-Impedance•Latch-Up Performance Exceeds100mA Per State JESD78,Class II•I off Supports Partial Power-Down-Mode•ESD Protection Exceeds JESD22 Operation–8000-V Human-Body Model(A114-A)•Fully Configurable Dual-Rail Design Allows–200-V Machine Model(A115-A) Each Port to Operate Over the Full1.4-V to–1000-V Charged-Device Model(C101)3.6-V Power-Supply Range•I/Os Are4.6-V TolerantThis8-bit noninverting bus transceiver uses two separate configurable power-supply rails.The SN74AVC8T245 is optimized to operate with V CCA/V CCB set at1.4V to3.6V.It is operational with V CCA/V CCB as low as1.2V.The A port is designed totrack V CCA.V CCA accepts any supply voltage from1.2V to3.6V.The B port is designed to track V CCB.V CCB accepts any supply voltage from 1.2V to 3.6V.This allows for universal low-voltage bidirectional translation between any of the1.2-V,1.5-V,1.8-V,2.5-V,and3.3-V voltage nodes.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING QFN–RHL Reel of1000SN74AVC8T245RHLR WE245Tube of60SN74AVC8T245PW–40°C to85°C TSSOP–PW WE245Reel of2000SN74AVC8T245PWRTVSOP–DGV Reel of2000SN74AVC8T245DGVR WE245(1)For the most current package and ordering information,see the Package Option Addendum at the end of this document,or see the TIwebsite at .Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date.Copyright©2003–2007,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DESCRIPTION/ORDERING INFORMATION (CONTINUED)DI R OA1T oS e v e n O t h e r C h a n n e l s SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007The SN74AVC8T245is designed for asynchronous communication between data buses.The device transmits data from the A bus to the B bus or from the B bus to the A bus,depending on the logic level at the direction-control (DIR)input.The output-enable (OE)input can be used to disable the outputs so the buses are effectively isolated.The SN74AVC8T245is designed so the control pins (DIR and OE)are supplied by V CCA .The SN74AVC8T245solution is compatible with a single-supply system and can be replaced later with a '245function,with minimal printed circuit board redesign.This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.The V CC isolation feature ensures that if either V CC input is at GND,both ports are in the high-impedance state.To ensure the high-impedance state during power up or power down,OE shall be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.FUNCTION TABLE (each 8-bit section)INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus HXAll outputs Hi-ZLOGIC DIAGRAM (POSITIVE LOGIC)2Submit Documentation FeedbackAbsolute Maximum Ratings(1)SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES517H–DECEMBER2003–REVISED FEBRUARY2007over operating free-air temperature range(unless otherwise noted)MIN MAX UNITV CCASupply voltage range–0.5 4.6VV CCBI/O ports(A port)–0.5 4.6V I Input voltage range(2)I/O ports(B port)–0.5 4.6VControl inputs–0.5 4.6A port–0.5 4.6Voltage range applied to any outputV O V in the high-impedance or power-off state(2)B port–0.5 4.6A port–0.5V CCA+0.5V O Voltage range applied to any output in the high or low state(2)(3)VB port–0.5V CCB+0.5I IK Input clamp current V I<0–50mAI OK Output clamp current V O<0–50mAI O Continuous output current±50mAContinuous current through V CCA,V CCB,or GND±100mADGV package86θJA Package thermal impedance(4)PW package88°C/WRHL package43T stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3)The output positive-voltage rating may be exceeded up to4.6V maximum if the output current rating is observed.(4)The package thermal impedance is calculated in accordance with JESD51-7.3Submit Documentation FeedbackRecommended Operating Conditions (1)(2)(3)SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007V CCIV CCOMIN MAX UNIT V CCA Supply voltage 1.2 3.6V V CCB Supply voltage1.23.6V1.2V to 1.95VV CCI ×0.65High-level V IHData inputs1.95V to2.7V 1.6Vinput voltage2.7V to3.6V 21.2V to 1.95VV CCI ×0.35Low-level V ILData inputs1.95V to2.7V 0.7V input voltage2.7V to3.6V 0.81.2V to 1.95VV CCA ×0.65High-level DIRV IH1.95V to2.7V 1.6Vinput voltage(referenced to V CCA )2.7V to3.6V 21.2V to 1.95VV CCA ×0.35Low-level DIRV IL 1.95V to 2.7V 0.7V input voltage (referenced to V CCA )2.7V to3.6V0.8V I Input voltage 0 3.6V Active state 0V CCO V OOutput voltageV 3-state3.61.2V –31.4V to 1.6V–6I OHHigh-level output current1.65V to 1.95V –8mA2.3V to 2.7V –93V to3.6V –121.2V 31.4V to 1.6V6I OLLow-level output current1.65V to 1.95V 8mA2.3V to 2.7V 93V to3.6V12∆t/∆v Input transition rise or fall rate 5ns/V T A Operating free-air temperature–4085°C (1)V CCI is the V CC associated with the input port.(2)V CCO is the V CC associated with the output port.(3)All unused data inputs of the device must be held at V CCI or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.4Submit Documentation FeedbackElectrical Characteristics(1)(2)SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES517H–DECEMBER2003–REVISED FEBRUARY2007over recommended operating free-air temperature range(unless otherwise noted)T A=25°C–40°C to85°C PARAMETER TEST CONDITIONS V CCA V CCB UNITMIN TYP MAX MIN MAXI OH=–100µA 1.2V to3.6V 1.2V to3.6V V CCO–0.2I OH=–3mA 1.2V 1.2V0.95I OH=–6mA 1.4V 1.4V 1.05V OH V I=V IH VI OH=–8mA 1.65V 1.65V 1.2I OH=–9mA 2.3V 2.3V 1.75I OH=–12mA3V3V 2.3I OL=100µA 1.2V to3.6V 1.2V to3.6V0.2I OL=3mA 1.2V 1.2V0.15I OL=6mA 1.4V 1.4V0.35V OL V I=V IL VI OL=8mA 1.65V 1.65V0.45I OL=9mA 2.3V 2.3V0.55I OL=12mA3V3V0.7ControlI I V I=V CCA or GND 1.2V to3.6V 1.2V to3.6V±0.025±0.25±1µAinputs0V0V to3.6V±0.1±1±5A or BI off V I or V O=0to3.6VµAport0V to3.6V0V±0.1±1±5V O=V CCO or GND,A or BI OZ(3)V I=V CCI or GND, 3.6V 3.6V±0.5±2.5±5µAportOE=V IH1.2V to3.6V 1.2V to3.6V15I CCA V I=V CCI or GND,I O=00V 3.6V–2µA3.6V0V151.2V to3.6V 1.2V to3.6V15I CCB V I=V CCI or GND,I O=00V 3.6V15µA3.6V0V–2I<Subscript>CCA</Subscript>+V I=V CCI or GND,I O=0 1.2V to3.6V 1.2V to3.6V25µAI<Subscript>CCB</Subscript>ControlC i V I=3.3V or GND 3.3V 3.3V 3.5 4.5pFinputsA or BC io V O=3.3V or GND 3.3V 3.3V67pFport(1)V CCO is the V CC associated with the output port.(2)V CCI is the V CC associated with the input port.(3)For I/O ports,the parameter I OZ includes the input leakage current.5Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsSN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007over recommended operating free-air temperature range,V CCA =1.2V (see Figure 10)V CCB =1.2VV CCB =1.5VV CCB =1.8VV CCB =2.5VV CCB =3.3VFROM TO PARAMETERUNIT (INPUT)(OUTPUT)TYP TYP TYP TYP TYP t PLH 3.1 2.6 2.53 3.5A B ns t PHL 3.1 2.6 2.53 3.5t PLH 3.1 2.7 2.5 2.4 2.3B A ns t PHL 3.1 2.7 2.5 2.4 2.3t PZH 5.3 5.3 5.3 5.3 5.3OE A ns t PZL 5.3 5.3 5.3 5.3 5.3t PZH 5.14 3.5 3.2 3.1OE B ns t PZL 5.14 3.5 3.2 3.1t PHZ 4.8 4.8 4.8 4.8 4.8OE A ns t PLZ 4.8 4.8 4.8 4.8 4.8t PHZ 4.74 4.1 4.3 5.1OEBnst PLZ4.744.14.35.1over recommended operating free-air temperature range,V CCA =1.5V ±0.1V (see Figure 10)V CCB =1.5V V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =1.2VFROM TO ±0.1V ±0.15V ±0.2V ±0.3V PARAMETERUNIT(INPUT)(OUTPUT)TYP MIN MAX MIN MAX MIN MAX MIN MAX t PLH 2.70.5 5.40.5 4.60.5 4.90.5 6.8A B ns t PHL 2.70.5 5.40.5 4.60.5 4.90.5 6.8t PLH 2.60.5 5.40.5 5.10.5 4.70.5 4.5B A ns t PHL 2.60.5 5.40.5 5.10.5 4.70.5 4.5t PZH 3.7 1.18.7 1.18.7 1.18.7 1.18.7OE A ns t PZL 3.7 1.18.7 1.18.7 1.18.7 1.18.7t PZH 4.8 1.17.6 1.17.11 5.61 5.2OE B ns t PZL 4.8 1.17.6 1.17.11 5.61 5.2t PHZ 3.10.58.60.58.60.58.60.58.6OE A ns t PLZ 3.10.58.60.58.60.58.60.58.6t PHZ 4.10.58.40.57.60.57.20.57.8OEBns t PLZ4.10.58.40.57.60.57.20.57.86Submit Documentation FeedbackSwitching Characteristics Switching CharacteristicsSN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES517H–DECEMBER2003–REVISED FEBRUARY2007over recommended operating free-air temperature range,VCCA=1.8V±0.15V(see Figure10)V CCB=1.5V V CCB=1.8V V CCB=2.5V V CCB=3.3VV CCB=1.2VFROM TO±0.1V±0.15V±0.2V±0.3V PARAMETER UNIT (INPUT)(OUTPUT)TYP MIN MAX MIN MAX MIN MAX MIN MAXt PLH 2.50.5 5.10.5 4.40.540.5 3.9A B nst PHL 2.50.5 5.10.5 4.40.540.5 3.9t PLH 2.50.5 4.60.5 4.40.5 3.90.5 3.7B A nst PHL 2.50.5 4.60.5 4.40.5 3.90.5 3.7t PZH31 6.81 6.81 6.81 6.8 OE A ns t PZL31 6.81 6.81 6.81 6.8t PZH 4.6 1.18.21 6.70.5 5.10.5 4.5 OE B ns t PZL 4.6 1.18.21 6.70.5 5.10.5 4.5t PHZ 2.80.57.10.57.10.57.10.57.1 OE A ns t PLZ 2.80.57.10.57.10.57.10.57.1t PHZ 3.90.57.80.5 6.90.560.5 5.8 OE B ns t PLZ 3.90.57.80.5 6.90.560.5 5.8over recommended operating free-air temperature range,VCCA=2.5V±0.2V(see Figure10)V CCB=1.5V V CCB=1.8V V CCB=2.5V V CCB=3.3VV CCB=1.2VFROM TO±0.1V±0.15V±0.2V±0.3V PARAMETER UNIT (INPUT)(OUTPUT)TYP MIN MAX MIN MAX MIN MAX MIN MAXt PLH 2.40.5 4.70.5 3.90.5 3.10.5 2.8A B nst PHL 2.40.5 4.70.5 3.90.5 3.10.5 2.8t PLH30.5 4.90.540.5 3.10.5 2.9B A nst PHL30.5 4.90.540.5 3.10.5 2.9t PZH 2.20.5 4.80.5 4.80.5 4.80.5 4.8 OE A ns t PZL 2.20.5 4.80.5 4.80.5 4.80.5 4.8t PZH 4.5 1.17.90.5 6.40.5 4.60.54 OE B ns t PZL 4.5 1.17.90.5 6.40.5 4.60.54t PHZ 1.80.5 5.10.5 5.10.5 5.10.5 5.1 OE A ns t PLZ 1.80.5 5.10.5 5.10.5 5.10.5 5.1t PHZ 3.60.57.10.5 6.30.5 5.10.5 3.9 OE B ns t PLZ 3.60.57.10.5 6.30.5 5.10.5 3.97Submit Documentation FeedbackSwitching CharacteristicsOperating CharacteristicsSN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007over recommended operating free-air temperature range,V CCA =3.3V ±0.3V (see Figure 10)V CCB =1.5V V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =1.2VFROM TO ±0.1V ±0.15V ±0.2V ±0.3V PARAMETERUNIT(INPUT)(OUTPUT)TYP MIN MAX MIN MAX MIN MAX MIN MAX t PLH 2.30.5 4.50.5 3.70.5 2.90.5 2.5A B ns t PHL 2.30.5 4.50.5 3.30.5 2.90.5 2.5t PLH 3.50.5 6.80.5 3.90.5 2.80.5 2.5B A ns t PHL 3.50.5 6.80.5 3.90.5 2.80.5 2.5t PZH 20.540.540.540.54OE A ns t PZL 20.540.540.540.54t PZH 4.5 1.17.80.5 6.20.5 4.50.5 3.9OE B ns t PZL 4.5 1.17.80.5 6.20.5 4.50.5 3.9t PHZ 1.70.540.540.540.54OE A ns t PLZ 1.70.540.540.540.54t PHZ 3.40.5 6.90.560.5 4.80.5 4.2OEBns t PLZ3.40.56.90.560.54.80.54.2T A =25°CV CCA =V CCA =V CCA =V CCA =V CCA =TEST V CCB =1.2VV CCB =1.5VV CCB =1.8VV CCB =2.5VV CCB =3.3VPARAMETERUNITCONDITIONSTYP TYP TYP TYP TYP Outputs 11111enabled A to BOutputs 11111C L =0,disabled C pdA(1)f =10MHz,pFOutputs t r =t f =1ns 1212121314enabled B to AOutputs 11111disabled Outputs 1212121314enabled A to BOutputs 11111C L =0,disabled C pdB (1)f =10MHz,pFOutputs t r =t f =1ns 11111enabled B to AOutputs 11111disabled(1)Power dissipation capacitance per transceiverTable 1.Typical Total Static Power Consumption (I CCA +I CCB )V CCAV CCB UNIT0V 1.2V 1.5V 1.8V 2.5V 3.3V 0V 0<0.5<0.5<0.5<0.5<0.51.2V <0.5<1<1<1<111.5V <0.5<1<1<1<11µA 1.8V <0.5<1<1<1<1<12.5V <0.51<1<1<1<13.3V<0.51<1<1<1<18Submit Documentation FeedbackTYPICAL CHARACTERISTICSTypical Propagation Delay (A to B)vs Load Capacitance 01234561020304050t P D −n s C L −p F Typical Propagation Delay (A to B)vs Load CapacitanceC L −p F 012345610203040t P L H− n s 0123456102030405060t P H L− n s C L −p F SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007T A =25°C,V CCA =1.2VFigure 1.T A =25°C,V CCA =1.5VFigure 2.Figure 3.9Submit Documentation FeedbackTypical Propagation Delay (A to B)vs Load Capacitance C L− p F t P L H− n s 0102001234560123456102030405060t P H L− n s C L− p F Typical Propagation Delay (A to B)vs Load CapacitanceC L− p F t P L H− ns 0123456102030400123456102030405060C L− p F t P H L− n s SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007TYPICAL CHARACTERISTICS (continued)T A =25°C,V CCA =1.8VFigure 4.Figure 5.T A =25°C,V CCA =2.5VFigure 6.Figure 7.10Submit Documentation Feedback Typical Propagation Delay (A to B)vs Load Capacitance t P L H− n s0123456C L − p F 01020*********560102030405060C L− p F t P H L− n s SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES517H–DECEMBER 2003–REVISED FEBRUARY 2007TYPICAL CHARACTERISTICS (continued)T A =25°C,V CCA =3.3VFigure 8.Figure 9.PARAMETER MEASUREMENT INFORMATIONV O H V O L Fr o m O u t p u tU n d e r T e s t(s e e N o t e A )L O A D C I R C U I T CCOu tp u t Co n t r o l (l o w -l e v e l en a b l i n g )O u t p u t W av e f o r S 1 × V C C O (s e e Ou t p u t W a v e f o r S 1 a t (s e e0 0CC 0V I n p u t V C C V C C V O L T A G E W AV E F O R M S P R O P A G A T I O N D E L A YT I M E S V O L T A G E W A V E F O R M S P U L S E D U R A T I O N V O L T A G E W A V E F O R M S E N A B L E A N D D I S A B L E T I M E S O u t p u t I n p u t t p d t P L Z /t P Z L t P H Z /t P Z H O p e n 2 × V C C O GN D T E S T S 1N O T E S :A .C Li n c l u d e s p r o b e a n d j i g c a p a c i t a n c e B .W av e f o r m 1 i s f o r a n o u t p u t w i t h i n t e , e x c e p t w h e n d i s a b l e d b y t h e o u t p u t c o n t r o l .W a v e f o r m 2i s f o r a n o u t p u t w i t h i n t e r n a l c o n d i t i o n s s u C .Al l i n p u t p u l s e s a r e s u p p l i e d b y v 10 M H z , Z O = 50 Ω, d v /d t ≥ 1 V /n s .D .Th e o u t p u t s a r e m e a s u r e d o n e a E .t P L Z a n d t P H Z a r e t h e s a m e a s t d i s .F .t P Z L a n d t PZ H a r e t h e s a m e a s t e n .G .t P L H a n d t P H L a r e t h e s a m e a s t p d .H .V C C I i s t h e V CC a s s o c i a t e d w i t h t h e i n p u t p o r t .I .V C C O i s t h e V C C a s s o c i a t e d w i t h t h e o u t p u t p o r t .1.2 V 1.5 V ±0.1 V 1.8 V ±0.15 V 2.5 V ±0.2 V 3.3 V ± 0.3 V 2 k Ω2 k Ω2 k Ω2 k Ω2 k ΩV CC O R L 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V V T P C L 15 p F 15 p F 15 p F 15 p F 15 p F SN74AVC8T2458-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES517H–DECEMBER 2003–REVISED FEBRUARY 2007Figure 10.Load Circuit and Voltage WaveformsPACKAGING INFORMATION(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Addendum-Page 1Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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常用74系列型号及功能

74LS00 四2输入与非门74LS01 2输入四与非门(oc)74LS02 2输入四或非门74LS03 2输入四与非门(oc)74LS04 六倒相器74LS05 六倒相器(oc)74LS06 六高压输出反相缓冲器/驱动器(oc,30v) 74LS07 六高压输出缓冲器/驱动器(oc,30v)74LS08 2输入四与门74LS09 2输入四与门(oc)74LS10 3输入三与非门74LS11 3输入三与门74LS12 3输入三与非门(oc)74LS13 4输入双与非门(斯密特触发)74LS14 六倒相器(斯密特触发)74LS15 3输入三与门(oc)74LS16 六高压输出反相缓冲器/驱动器(oc,15v) 74LS17 六高压输出缓冲器/驱动器(oc,15v)74LS18 4输入双与非门(斯密特触发)74LS19 六倒相器(斯密特触发)74LS20 4输入双与非门74LS21 4输入双与门74LS22 4输入双与非门(oc)74LS23 双可扩展的输入或非门74LS24 2输入四与非门(斯密特触发)74LS25 4输入双或非门(有选通)74LS26 2输入四高电平接口与非缓冲器(oc,15v) 74LS27 3输入三或非门74LS28 2输入四或非缓冲器74LS30 8输入与非门74LS31 延迟电路74LS32 2输入四或门74LS33 2输入四或非缓冲器(集电极开路输出) 74LS34 六缓冲器74LS35 六缓冲器(oc)74LS36 2输入四或非门(有选通)74LS37 2输入四与非缓冲器74LS38 2输入四或非缓冲器(集电极开路输出) 74LS39 2输入四或非缓冲器(集电极开路输出) 74LS40 4输入双与非缓冲器74LS41 bcd-十进制计数器74LS42 4线-10线译码器(bcd输入)74LS43 4线-10线译码器(余3码输入)74LS44 4线-10线译码器(余3葛莱码输入)74LS45 bcd-十进制译码器/驱动器74LS46 bcd-七段译码器/驱动器74LS47 bcd-七段译码器/驱动器74LS48 bcd-七段译码器/驱动器74LS49 bcd-七段译码器/驱动器(oc) 74LS50 双二路2-2输入与或非门(一门可扩展)74LS51 双二路2-2输入与或非门74LS51 二路3-3输入,二路2-2输入与或非门74LS52 四路2-3-2-2输入与或门(可扩展)74LS53 四路2-2-2-2输入与或非门(可扩展)74LS53 四路2-2-3-2输入与或非门(可扩展)74LS54 四路2-2-2-2输入与或非门74LS54 四路2-3-3-2输入与或非门74LS54 四路2-2-3-2输入与或非门74LS55 二路4-4输入与或非门(可扩展)74LS60 双四输入与扩展74LS61 三3输入与扩展74LS62 四路2-3-3-2输入与或扩展器74LS63 六电流读出接口门74LS64 四路4-2-3-2输入与或非门74LS65 四路4-2-3-2输入与或非门(oc)74LS70 与门输入上升沿jk触发器74LS71 与输入r-s主从触发器74LS72 与门输入主从jk触发器74LS73 双j-k触发器(带清除端)74LS74 正沿触发双d型触发器(带预置端和清除端)74LS75 4位双稳锁存器74LS76 双j-k触发器(带预置端和清除端)74LS77 4位双稳态锁存器74LS78 双j-k触发器(带预置端,公共清除端和公共时钟端)74LS80 门控全加器74LS81 16位随机存取存储器74LS82 2位二进制全加器(快速进位)74LS83 4位二进制全加器(快速进位)74LS84 16位随机存取存储器74LS85 4位数字比较器74LS86 2输入四异或门74LS87 四位二进制原码/反码/oi单元74LS89 64位读/写存储器74LS90 十进制计数器74LS91 八位移位寄存器74LS92 12分频计数器(2分频和6分频)74LS93 4位二进制计数器74LS94 4位移位寄存器(异步)74LS95 4位移位寄存器(并行io)74LS96 5位移位寄存器74LS97 六位同步二进制比率乘法器74LS100 八位双稳锁存器74LS103 负沿触发双j-k主从触发器(带清除端)74LS106 负沿触发双j-k主从触发器(带预置,清除,时钟)74LS107 双j-k主从触发器(带清除端)74LS108 双j-k主从触发器(带预置,清除,时钟)74LS109 双j-k触发器(带置位,清除,正触发)74LS110 与门输入j-k主从触发器(带锁定)74LS111 双j-k主从触发器(带数据锁定)74LS112 负沿触发双j-k触发器(带预置端和清除端)74LS113 负沿触发双j-k触发器(带预置端)74LS114 双j-k触发器(带预置端,共清除端和时钟端)74LS116 双四位锁存器74LS120 双脉冲同步器/驱动器74LS121 单稳态触发器(施密特触发)74LS122 可再触发单稳态多谐振荡器(带清除端)74LS123 可再触发双单稳多谐振荡器74LS125 四总线缓冲门(三态输出)74LS126 四总线缓冲门(三态输出)74LS128 2输入四或非线驱动器74LS131 3-8译码器74LS132 2输入四与非门(斯密特触发)74LS133 13输入端与非门74LS134 12输入端与门(三态输出)74LS135 四异或/异或非门74LS136 2输入四异或门(oc)74LS137 八选1锁存译码器/多路转换器74LS138 3-8线译码器/多路转换器74LS139 双2-4线译码器/多路转换器74LS140 双4输入与非线驱动器74LS141 bcd-十进制译码器/驱动器74LS142 计数器/锁存器/译码器/驱动器74LS145 4-10译码器/驱动器74LS147 10线-4线优先编码器74LS148 8线-3线八进制优先编码器74LS150 16选1数据选择器(反补输出)74LS151 8选1数据选择器(互补输出)74LS152 8选1数据选择器多路开关74LS153 双4选1数据选择器/多路选择器74LS154 4线-16线译码器74LS155 双2-4译码器/分配器(图腾柱输出)74LS156 双2-4译码器/分配器(集电极开路输出)74LS157 四2选1数据选择器/多路选择器74LS158 四2选1数据选择器(反相输出)74LS160 可预置bcd计数器(异步清除)74LS161 可预置四位二进制计数器(并清除异步)74LS162 可预置bcd计数器(异步清除)74LS163 可预置四位二进制计数器(并清除异步)74LS164 8位并行输出串行移位寄存器74LS165 并行输入8位移位寄存器(补码输出)74LS166 8位移位寄存器74LS167 同步十进制比率乘法器74LS168 4位加/减同步计数器(十进制)74LS169 同步二进制可逆计数器74LS170 4*4寄存器堆74LS171 四d触发器(带清除端)74LS172 16位寄存器堆74LS173 4位d型寄存器(带清除端)74LS174 六d触发器74LS175 四d触发器74LS176 十进制可预置计数器74LS177 2-8-16进制可预置计数器74LS178 四位通用移位寄存器74LS179 四位通用移位寄存器74LS180 九位奇偶产生/校验器74LS181 算术逻辑单元/功能发生器74LS182 先行进位发生器74LS183 双保留进位全加器74LS184 bcd-二进制转换器74LS185 二进制-bcd转换器74LS190 同步可逆计数器(bcd,二进制)74LS191 同步可逆计数器(bcd,二进制)74LS192 同步可逆计数器(bcd,二进制)74LS193 同步可逆计数器(bcd,二进制)74LS194 四位双向通用移位寄存器74LS195 四位通用移位寄存器74LS196 可预置计数器/锁存器74LS197 可预置计数器/锁存器(二进制)74LS198 八位双向移位寄存器74LS199 八位移位寄存器74LS210 2-5-10进制计数器74LS213 2-n-10可变进制计数器74LS221 双单稳触发器74LS230 八3态总线驱动器74LS231 八3态总线反向驱动器74LS240 八缓冲器/线驱动器/线接收器(反码三态输出)74LS241 八缓冲器/线驱动器/线接收器(原码三态输出)74LS242 八缓冲器/线驱动器/线接收器74LS243 4同相三态总线收发器74LS244 八缓冲器/线驱动器/线接收器74LS245 八双向总线收发器74LS246 4线-七段译码/驱动器(30v)74LS247 4线-七段译码/驱动器(15v)74LS248 4线-七段译码/驱动器74LS249 4线-七段译码/驱动器74LS251 8选1数据选择器(三态输出)74LS253 双四选1数据选择器(三态输出)74LS256 双四位可寻址锁存器74LS257 四2选1数据选择器(三态输出)74LS258 四2选1数据选择器(反码三态输出)74LS259 8为可寻址锁存器74LS260 双5输入或非门74LS261 4*2并行二进制乘法器74LS265 四互补输出元件74LS266 2输入四异或非门(oc)74LS270 2048位rom (512位四字节,oc)74LS271 2048位rom (256位八字节,oc)74LS273 八d触发器74LS274 4*4并行二进制乘法器74LS275 七位片式华莱士树乘法器74LS276 四jk触发器74LS278 四位可级联优先寄存器74LS279 四s-r锁存器74LS280 9位奇数/偶数奇偶发生器/较验器74LS28174LS283 4位二进制全加器74LS290 十进制计数器74LS291 32位可编程模74LS293 4位二进制计数器74LS294 16位可编程模74LS295 四位双向通用移位寄存器74LS298 四-2输入多路转换器(带选通)74LS299 八位通用移位寄存器(三态输出)74LS348 8-3线优先编码器(三态输出)74LS352 双四选1数据选择器/多路转换器74LS353 双4-1线数据选择器(三态输出)74LS354 8输入端多路转换器/数据选择器/寄存器,三态补码输出74LS355 8输入端多路转换器/数据选择器/寄存器,三态补码输出74LS356 8输入端多路转换器/数据选择器/寄存器,三态补码输出74LS357 8输入端多路转换器/数据选择器/寄存器,三态补码输出74LS365 6总线驱动器74LS366 六反向三态缓冲器/线驱动器74LS367 六同向三态缓冲器/线驱动器74LS368 六反向三态缓冲器/线驱动器74LS373 八d锁存器74LS374 八d触发器(三态同相)74LS375 4位双稳态锁存器74LS377 带使能的八d触发器74LS378 六d触发器74LS379 四d触发器74LS381 算术逻辑单元/函数发生器74LS382 算术逻辑单元/函数发生器74LS384 8位*1位补码乘法器74LS385 四串行加法器/乘法器74LS386 2输入四异或门74LS390 双十进制计数器74LS391 双四位二进制计数器74LS395 4位通用移位寄存器74LS396 八位存储寄存器74LS398 四2输入端多路开关(双路输出) 74LS399 四-2输入多路转换器(带选通)74LS422 单稳态触发器74LS423 双单稳态触发器74LS440 四3方向总线收发器,集电极开路74LS441 四3方向总线收发器,集电极开路74LS442 四3方向总线收发器,三态输出74LS443 四3方向总线收发器,三态输出74LS444 四3方向总线收发器,三态输出74LS445 bcd-十进制译码器/驱动器,三态输出74LS446 有方向控制的双总线收发器74LS448 四3方向总线收发器,三态输出74LS449 有方向控制的双总线收发器74LS465 八三态线缓冲器74LS466 八三态线反向缓冲器74LS467 八三态线缓冲器74LS468 八三态线反向缓冲器74LS490 双十进制计数器74LS540 八位三态总线缓冲器(反向)74LS541 八位三态总线缓冲器74LS589 有输入锁存的并入串出移位寄存器74LS590 带输出寄存器的8位二进制计数器74LS591 带输出寄存器的8位二进制计数器74LS592 带输出寄存器的8位二进制计数器74LS593 带输出寄存器的8位二进制计数器74LS594 带输出锁存的8位串入并出移位寄存器74LS595 8位输出锁存移位寄存器74LS596 带输出锁存的8位串入并出移位寄存器74LS597 8位输出锁存移位寄存器74LS598 带输入锁存的并入串出移位寄存器74LS599 带输出锁存的8位串入并出移位寄存器74LS604 双8位锁存器74LS605 双8位锁存器74LS606 双8位锁存器74LS607 双8位锁存器74LS620 8位三态总线发送接收器(反相)74LS621 8位总线收发器74LS622 8位总线收发器74LS623 8位总线收发器74LS640 反相总线收发器(三态输出)74LS641 同相8总线收发器,集电极开路74LS642 同相8总线收发器,集电极开路74LS643 8位三态总线发送接收器74LS644 真值反相8总线收发器,集电极开路74LS645 三态同相8总线收发器74LS646 八位总线收发器,寄存器74LS647 八位总线收发器,寄存器74LS648 八位总线收发器,寄存器74LS649 八位总线收发器,寄存器74LS651 三态反相8总线收发器74LS652 三态反相8总线收发器74LS653 反相8总线收发器,集电极开路74LS654 同相8总线收发器,集电极开路74LS668 4位同步加/减十进制计数器74LS669 带先行进位的4位同步二进制可逆计数器74LS670 4*4寄存器堆(三态)74LS671 带输出寄存的四位并入并出移位寄存器74LS672 带输出寄存的四位并入并出移位寄存器74LS673 16位并行输出存储器,16位串入串出移位寄存器74LS674 16位并行输入串行输出移位寄存器74LS681 4位并行二进制累加器74LS682 8位数值比较器(图腾柱输出)74LS683 8位数值比较器(集电极开路)74LS684 8位数值比较器(图腾柱输出)74LS685 8位数值比较器(集电极开路)74LS686 8位数值比较器(图腾柱输出)74LS687 8位数值比较器(集电极开路)74LS688 8位数字比较器(oc输出)74LS689 8位数字比较器74LS690 同步十进制计数器/寄存器(带数选,三态输出,直接清除)74LS691 计数器/寄存器(带多转换,三态输出)74LS692 同步十进制计数器(带预置输入,同步清除)74LS693 计数器/寄存器(带多转换,三态输出)74LS696 同步加/减十进制计数器/寄存器(带数选,三态输出,直接清除)74LS697 计数器/寄存器(带多转换,三态输出)74LS698 计数器/寄存器(带多转换,三态输出)74LS699 计数器/寄存器(带多转换,三态输出)74LS716 可编程模n十进制计数器74LS718 可编程模n十进制计数器。

HD74HC444中文资料

IOH = –6 mA IOH = –7.8 mA Vin = VIH or VIL IOL = 20 µA
IOL = 6 mA IOL = 7.8 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout =OUT I OUT ICC, IGND I IK I OK PT Tstg
Rating –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 –65 to +150
Unit V V V mA mA mA mA mW °C
A1 B1 C1 A2 B2 C2 A3 B3 C3
A4
B4
C4
6
元器件交易网
HD74HC442/HD74HC443/HD74HC444
DC Characteristics
Item Input voltage
Output voltage
Off-state output current Input current Quiescent supply current
time
t PHL
VCC (V) 2.0 4.5 6.0
Min Typ Max Min — — 200 — — — 40 — — — 34 —
Max Unit 250 ns 50 43
Output enable
t ZH
time
t ZL
2.0
— — 150 — 190 ns
4.5
— — 30 — 38
Ta = 25°C
Ta = –40 to +85°C

CD74AC32M中文资料

Features
• Buffered Inputs
• Typical Propagation Delay - 4.5ns at VCC = 5V, TA = 25oC, CL = 50pF
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• SCR-Latchup-Resistant CMOS Process and Circuit Design
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA DC VCC or Ground Current, ICC or IGND (Note 3) . . . . . . . . .±100mA
NOTES:
3. For up to 4 outputs per device, add ±25mA for each additional output.
4. Unless otherwise specified, all voltages are referenced to ground.
5. θJA is measured with the component mounted on an evaluation PC board in free air.
175

SN74LS378NSRG4资料

Copyright © 1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.1POST OFFICE BOX 655303 • DALLAS, TEXAS 752652POST OFFICE BOX 655303 • DALLAS, TEXAS 752653 POST OFFICE BOX 655303 • DALLAS, TEXAS 752654POST OFFICE BOX 655303 • DALLAS, TEXAS 75265IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. 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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityLow Power /lpw Telephony /telephonyWirelessVideo&Imaging /videoWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments IncorporatedIMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. 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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityLow Power /lpw Telephony /telephonyWirelessVideo&Imaging /videoWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments IncorporatedIMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. 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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityLow Power /lpw Telephony /telephonyWirelessVideo&Imaging /videoWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments IncorporatedIMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use anynon-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityLow Power /lpw Telephony /telephonyWirelessVideo&Imaging /videoWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments Incorporated。

MC74VHCT574A 高速 CMOS 八路 D 类触发器说明书

MC74VHCT574A Octal D-Type Flip-Flop with 3-State OutputThe MC74VHCT574A is an advanced high speed CMOS octal flip −flop with 3−state output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.This 8−bit D −type flip −flop is controlled by a clock input and an output enable input. When the output enable input is high, the eight outputs are in a high impedance state.The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V , because it has full 5.0 V CMOS level output swings.The VHCT574A input and output (when disabled) structures provide protection when voltages between 0 V and 5.5 V are applied,regardless of the supply voltage. These input and output structures h e l p p r e v e n t d e v i c e d e s t r u c t i o n c a u s e d b y s u p p l y voltage −input/output voltage mismatch, battery backup, hot insertion,etc.Features•High Speed: f max = 140 MHz (Typ) at V CC = 5.0 V•Low Power Dissipation: I CC = 4 m A (Max) at T A = 25°C •TTL −Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V•Power Down Protection Provided on Inputs and Outputs •Balanced Propagation Delays•Designed for 4.5 V to 5.5 V Operating Range •Low Noise: V OLP = 1.6 V (Max)•Pin and Function Compatible with Other Standard Logic Families •Latchup Performance Exceeds 300 mA •ESD Performance:Human Body Model > 2000 V;Machine Model > 200 V•Chip Complexity: 286 FETs or 71.5 Equivalent Gates •These Devices are Pb −Free and are RoHS CompliantSee detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.ORDERING INFORMATIONMARKING DIAGRAMS201−20SUFFIX DT CASE 948E−20WB SUFFIX DWCASE 751DVHCT 574A ALYW GG1A =Assembly Location WL, L =Wafer Lot YY , Y =YearWW, W =Work Week G or G = Pb −Free Package(Note: Microdot may be in either location)FUNCTION TABLEFigure 1. Logic DiagramDATA INPUTSD0D1D2D3D4D5D6D7OEQ0Q1Q2Q3Q4Q5Q6Q7NONINVERTING OUTPUTSCP Figure 2. Pin AssignmentD4D2D1D0OE GNDD7D6D5D3Q3Q2Q1Q0V CC CPQ7Q6Q5Q4MAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage – 0.5 to + 7.0V V in DC Input Voltage– 0.5 to + 7.0V V out DC Output VoltageOutputs in 3−StateHigh or Low State – 0.5 to + 7.0– 0.5 to V CC + 0.5VI IK Input Diode Current− 20mA I OK Output Diode Current (V OUT < GND; V OUT > V CC )±20mA I out DC Output Current, per Pin±25mA I CC DC Supply Current, V CC and GND Pins ±75mA P D Power Dissipation in Still Air,SOIC Package†TSSOP Package†500450mW T stgStorage Temperature– 65 to + 150_CMaximum ratings are those values beyond which device damage can occur. Maximum ratingsapplied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.†Derating −SOIC Packages: – 7 mW/_C from 65_ to 125_CTSSOP Package: − 6.1 mW/_C from 65_ to 125_CRECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC DC Supply Voltage 4.5 5.5V V in DC Input Voltage0 5.5V V out DC Output VoltageOutputs in 3−StateHigh or Low State 05.5V CCVT AOperating Temperature − 40+ 85_Ct r , t fInput Rise and Fall TimeV CC =5.0V ±0.5V20ns/VThis device contains protectioncircuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high −impedance cir-cuit. For proper operation, V in and V out should be constrained to the range GND v (V in or V out ) v V CC .Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ).Unused outputs must be left open.DC ELECTRICAL CHARACTERISTICSSymbol Parameter Test Conditions V CCVT A = 25°C T A = − 40 to 85°CUnit Min Typ Max Min MaxV IH Minimum High−Level Input Voltage 4.5 to 5.5 2.0 2.0V V IL Maximum Low−Level Input Voltage 4.5 to 5.50.80.8VV OH Minimum High−Level OutputVoltage V in = V IH or V IL I OH = − 50m A 4.5 4.4 4.5 4.4V I OH = − 8mA 4.5 3.94 3.80V OL Maximum Low−Level OutputVoltage V in = V IH or V IL I OL = 50m A 4.50.00.10.1V I OL = 8mA 4.50.360.44I in Maximum Input Leakage Current V in = 5.5 V or GND0 to 5.5±0.1±1.0m AI OZ Maximum 3−State Leakage Current V in = V IL or V IHV out = V CC or GND5.5± 0.25± 2.5m AI CC Maximum Quiescent Supply Current V in = V CC or GND 5.5 4.040.0m AI CCT Quiescent Supply Current Per Input: V IN = 3.4VOther Input: V CC or GND5.5 1.35 1.50mAI OPD Output Leakage Current V OUT = 5.5V00.5 5.0m A AC ELECTRICAL CHARACTERISTICS (Input t r = t f= 3.0ns)Symbol Parameter Test ConditionsT A = 25°C T A = − 40 to 85°CUnit Min Typ Max Min Maxf max Maximum Clock Frequency(50% Duty Cycle)V CC = 5.0 ± 0.5V C L = 15pFC L = 50pF90851401308095MHzt PLH, t PHL Maximum Propagation Delay, CP to Q V CC = 5.0 ± 0.5V C L = 15pFC L = 50pF4.15.69.410.41.01.010.511.5nst PZL, t PZH Output Enable Time,OE to QV CC = 5.0 ± 0.5V C L = 15pFR L = 1k W C L = 50pF6.57.310.211.21.01.011.512.5nst PLZ, t PHZ Output Disable Time,OE to QV CC = 5.0 ± 0.5V C L = 50pFR L = 1k W7.011.2 1.012.0nst OSLH, t OSHL Output to Output Skew V CC = 5.0 ± 0.5V C L = 50pF(Note 1)1.0 1.0nsC in Maximum Input Capacitance41010pF C out Maximum Three−State Output Capa-citance, Output in High−ImpedanceState9pFC PD Power Dissipation Capacitance (Note 2)Typical @ 25°C, V CC = 5.0VpF251.Parameter guaranteed by design. t OSLH = |t PLHm− t PLHn|, t OSHL = |t PHLm− t PHLn|.2.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation: I CC(OPR) = C PD V CC f in + I CC/8 (per flip−flop). C PD is used to determine the no−load dynamic power consumption; P D = C PD V CC2 f in + I CC V CC.NOISE CHARACTERISTICS (Input t r = t f = 3.0ns, C L = 50pF, V CC = 5.0V)Symbol ParameterT A = 25°CUnit Typ MaxV OLP Quiet Output Maximum Dynamic V OL 1.2 1.6V V OLV Quiet Output Minimum Dynamic V OL−1.2−1.6V V IHD Minimum High Level Dynamic Input Voltage 2.0V V ILD Maximum Low Level Dynamic Input Voltage0.8VTIMING REQUIREMENTS (Input t r = t f = 3.0ns)Symbol ParameterTest Conditions T A = 25°CT A = − 40 to 85°CUnit TypLimit Limit t su Minimum Setup Time, D to CP V CC = 5.0 ± 0.5 V 6.58.5ns t h Minimum Hold Time, CP to D V CC = 5.0 ± 0.5 V 2.5 2.5ns t wMinimum Pulse Width, CPV CC = 5.0 ± 0.5 V2.52.5nsORDERING INFORMATIONDevicePackage Shipping †MC74VHCT574ADWG SOIC −20WB (Pb −Free)38 Units / Rail MC74VHCT574ADWRG SOIC −20WB (Pb −Free)1000 / Tape & Reel MC74VHCT574ADTG TSSOP −20*75 Units / Rail MC74VHCT574ADTRGTSSOP −20*2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb −Free.Figure 3. Switching Waveform 3VCPQ3VHIGHIMPEDANCEHIGHIMPEDANCEFigure 4. Switching WaveformGNDV OHV OLGND Figure 5. Switching WaveformCP3V GNDGND3VFigure 6. Test Circuit Figure 7. Test CircuitFigure 8. Expanded Logic Diagram*Includes all probe and jig capacitanceC L *TEST POINT*Includes all probe and jig capacitanceTEST POINTCONNECT TO V CC WHEN TESTING t PLZ AND t PZL .CONNECT TO GND WHEN TESTING t PHZ AND t PZH .D0Q0D1Q1D2Q2D3Q3D4Q4D5Q5D6Q6D7Q7SOIC −20 WB CASE 751D −05ISSUE HDATE 22 APR 2015SCALE 1:1DIM MIN MAX MILLIMETERS A 2.35 2.65A10.100.25b 0.350.49c 0.230.32D 12.6512.95E 7.407.60e 1.27 BSC H 10.0510.55h 0.250.75L 0.500.90q0 7 NOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION.__XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot YY = YearWW = Work WeekG= Pb −Free PackageGENERICMARKING DIAGRAM*20XDIMENSIONS: MILLIMETERS*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*RECOMMENDED*This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “G ”, may or may not be present. Some products may not follow the Generic Marking.TSSOP −20 WB CASE 948E ISSUE DDATE 17 FEB 2016SCALE 2:1DIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSCM0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BEDETERMINED AT DATUM PLANE −W −.DETAIL E6.400.252------GENERICMARKING DIAGRAM*XXXX XXXX ALYW G G16X0.360.65PITCHSOLDERING FOOTPRINTA = Assembly Location L = Wafer Lot Y = YearW = Work WeekG = Pb −Free Package*This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “ G ”,may or may not be present.(Note: Microdot may be in either location)ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor thePUBLICATION ORDERING INFORMATIONTECHNICAL SUPPORTNorth American Technical Support:Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910LITERATURE FULFILLMENT :Email Requests to:*******************onsemi Website: Europe, Middle East and Africa Technical Support:Phone: 00421 33 790 2910For additional information, please contact your local Sales Representative。

SN74ALS873BDWR,SN74ALS873BDWRG4,SN74ALS873BNT,SN74ALS873BNTE4,SN74ALS873BDW, 规格书,Datasheet 资料

Addendum-Page 1PACKAGING INFORMATIONOrderable DeviceStatus(1)Package Type PackageDrawingPins Package QtyEco Plan(2)Lead/Ball Finish MSL Peak Temp (3)Samples (Requires Login)84032013A ACTIVE LCCC FK 281TBD Call TI Call TI 8403201KA OBSOLETE CFP W 24TBD Call TI Call TI 8403201LA ACTIVE CDIP JT 241TBDCall TICall TISN74ALS873BDW ACTIVE SOIC DW 2425Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS873BDWE4ACTIVE SOIC DW 2425Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS873BDWG4ACTIVE SOIC DW 2425Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS873BDWR ACTIVE SOIC DW 242000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS873BDWRE4ACTIVE SOIC DW 242000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS873BDWRG4ACTIVE SOIC DW 242000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS873BNT ACTIVE PDIP NT 2415Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS873BNT3OBSOLETE PDIP NT 24TBD Call TI Call TI SN74ALS873BNTE4ACTIVE PDIP NT 2415Pb-Free (RoHS)CU NIPDAU N / A for Pkg TypeSN74AS873ADW OBSOLETE SOIC DW 24TBD Call TI Call TI SN74AS873ADWR OBSOLETE SOIC DW 24TBD Call TI Call TI SN74AS873ANT OBSOLETE PDIP NT 24TBDCall TI Call TISNJ54ALS873BFK ACTIVE LCCC FK 281TBD POST-PLATE N / A for Pkg TypeSNJ54ALS873BJT ACTIVE CDIP JT 241TBD A42N / A for Pkg Type SNJ54AS873AFK OBSOLETE LCCC FK 28TBD Call TI Call TI SNJ54AS873AJT OBSOLETE CDIP JT 24TBD Call TI Call TI SNJ54AS873AWOBSOLETECFPW24TBDCall TICall TI(1)The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.芯天下--/(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A :•Catalog: SN74ALS873B, SN74AS873A•Military: SN54ALS873B, SN54AS873ANOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense ApplicationsAddendum-Page 2芯天下--/TAPE AND REELINFORMATION*All dimensionsare nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74ALS873BDWR SOICDW242000330.024.410.7515.72.712.024.0Q1PACKAGE MATERIALS INFORMATION14-Jul-2012Pack Materials-Page 1芯天下--/*Alldimensions are nominalDevice Package TypePackage DrawingPins SPQ Length (mm)Width (mm)Height (mm)SN74ALS873BDWRSOICDW242000367.0367.045.0PACKAGE MATERIALS INFORMATION14-Jul-2012Pack Materials-Page 2IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components which meet ISO/TS16949requirements,mainly for automotive ponents which have not been so designated are neither designed nor intended for automotive use;and TI will not be responsible for any failure of such components to meet such requirements.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2012,Texas Instruments Incorporated。

DM74ALS03BMX资料

元器件交易网DM74ALS03B Quad 2-Input NAND Gate with Open Collector OutputsDM74ALS03B Quad 2-Input NAND Gate with Open Collector OutputsAbsolute Maximum RatingsStresses exceeding the absolute maximum ratings may damage the device. The device may not function or beoperable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.Recommended Operating ConditionsThe Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.Electrical CharacteristicsOver recommended operating free air temperature range. All typical values are measured at V CC = 5V, T A = 25°C.Switching CharacteristicsOver recommended operating free air temperature range.Symbol ParameterRatingV CC Supply Voltage 7V V I Input Voltage 7V HIGH Level Ouutput7VT A Operating Free Air Temperature Range 0°C to +70°C T STG Storage Temperature Range –65°C to +150°Cθ JATypical Thermal Resistance116.0°C/WSymbolParameterMin.Nom.Max.UnitsV CC Supply Voltage4.555.5V V IH HIGH Level Input Voltage 2V V IL LOW Level Input Voltage 0.8V V OH HIGH Level Output Voltage 5.5V I OL LOW Level Output Current 8mA T AFree Air Operating Temperature070°CSymbolParameterConditionsMin.Typ.Max.UnitsV IK Input Clamp Voltage V CC = 4.5V , I I = –18mA –1.5V I OH HIGH Level Output Current V CC = 4.5V , V OH = 5.5V 100µA V OL LOW Level Output Voltage V CC = 4.5VI OL = 4mA 0.250.4V I OL = 8mA0.350.5I I Input Current @ Max. Input Voltage V CC = 5.5V , V IH = 7V 0.1mA I IH HIGH Level Input Current V CC = 5.5V , V IH = 2.7V 20µA I IL LOW Level Input Current V CC = 5.5V , V IL = 0.4V –0.1mA I CCSupply CurrentV CC = 5.5VOutputs HIGH 0.430.85mAOutputs LOW1.623SymbolParameterConditionsMinMaxUnitst PLH Propagation Delay Time, LOW-to-HIGH Level Output V CC = 4.5V to 5.5V ,R L = 2k Ω ,C L = 50pF2050ns t PHLPropagation Delay Time, HIGH-to-LOW Level Output313ns元器件交易网DM74ALS03B Quad 2-Input NAND Gate with Open Collector OutputsDM74ALS03B Quad 2-Input NAND Gate with Open Collector Outputs authorized to use and The Power Franchise®™TinyBoost™TinyBuck™TinyLogic。

74LCX373BQX资料

Parameter
Value
0.5 to 7.0 0.5 to 7.0 0.5 to 7.0 0.5 to VCC 0.5 50 50 50 r50 r100 r100 65 to 150
Conditions
Units
V V
Output in 3-STATE Output in HIGH or LOW State (Note 5) VI GND VO GND VO ! VCC
Description
Data Inputs Latch Enable Input Output Enable Input 3-STATE Latch Outputs
Truth Table
Inputs LE
X H H L
H L Z X O0
Outputs Dn
X L H X
OE
H L L L
On
Z L H O0
元器件交易网
74LCX373 Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
February 1994 Revised October 2005
74LCX373 Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
Human Body Model ! 2000V Machine Model ! 200V
O Leadless Pb-Free DQFN package
Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver.

MC74AC378中文资料

FACT DATA 5-1
元器件交易网
MC74AC378 MC74ACT378
FUNCTIONAL DESCRIPTION
The MC74AC378/74ACT378 consists of six edgetriggered D-type flip-flops with individual D inputs and Q outputs. The Clock (CP) and Enable (E) inputs are common to all flip-flops. When the E input is LOW, new data is entered into the register on the LOW-to-HIGH transition of the CP input. When the E input is HIGH, the register will retain the present data independent of the CP input.
FACT DATA 5-2
元器件交易网
MC74AC378 MC74ACT378
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current — High Output Current — Low –40 25 VCC @ 4.5 V VCC @ 5.5 V Parameter ′AC ′ACT Min 2.0 4.5 0 150 40 25 10 ns/V 8.0 140 85 –24 24 °C °C mA mA ns/V Typ 5.0 5.0 Max 6.0 5.5 VCC V Unit V