GTO关断特性的SPICE模拟

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开关电源P-SPICE仿真

天津职业技术师范大学Tianjin University of Technology and Education毕业设计专业：电子科学与技术班级学号： 26学生姓名：二○一一年六月天津职业技术师范大学本科生毕业设计开关电源P-SPICE仿真Switch-Mode Power Supplies SPICESimulations专业班级：电科0703班2011年6月摘要变压器的使用在升压和降压电源中很常见，开关电源根据不同的输出要求采用不同的变压器拓扑电路，同样的电源也采用不同的变压器拓扑实现。

在所有拓扑中反激式变压器构成的升压式开关电源具有电路简单、元器件最少的优点，在小功率开关电源中经常采用。

而变压器的设计需要技术人员根据一些经验参数来进行变压器的设计和绕制。

会出现经验设计多于准确的参数设计，而且在高频条件下变压器的设计和制作不同于普通的变压器，更加需要实际经验和理论设计两者相互结合。

本文将针对反激式开关电源变压器漏感较大，易击穿开关器件的特点，通过Pspice仿真来检验在电路中增加RL模或RCD模块的方式对漏感能量的耗散效果，从而达到保护开关器件、稳定电路的目的。

关键词：开关电源；Pspice仿真；反激式变换器；吸收电路ABSTRACTConverter is widely used in boost and buck power. Switch-Mode Power will take different circuits of converter topology depends on different conditions in outputs. And sometimes the same power will choose different converter topologies to achieve the same result.In all kinds of topologies, boost switching power supplier based on the fly-back converter characterized as simple circuit, less components that is the reason to explain why it is commonly used in low power switching power supply. In the process of designing converter , technical staffs usually make the converter with some self-verified parameters .The phenomenon will lead to such a result ,the amount of experience design are more than accurate parameter design. However ,in the area of high-frequency converters ,the design and production of them are different from general converter, we need to combine more practical experiences with theoretical design.For the larger leakage and easy breakdown in switching device of fly-backSwitch-Mode Power Supplies converters, this article will use SPICE Simulations to test the effectiveness of RL and RCD module circuit in dissipating the energy of leakage，so as to meet the purpose of protecting Switching devices and stabling the circuit.Key Words：Switch-Mode Power; SPICE Simulations; Fly-back Converter;Snubber circuit;目录第1章引言 (1)第2章PSPICE软件仿真概述2.1仿真软件的选择 (2)2.2 PSPICE的发展历程和现状 (3)2.3 PSPICE的组成 (3)2.4 PSPICE的特点和模拟功能 (4)第3章开关电源的概述3.1开关电源的分类 (6)3.2开关电源的选用 (7)3.3开关电源的发展动向 (8)第4章五种经典开关电源的拓扑结构4.1开关电源拓扑综述 (9)4.2开关电源的5种拓扑结构 (9)4.2.1非隔离式拓扑结构 (10)4.2.2隔离式拓扑结构 (20)第5章反激式变换器电路5.1 反激式变换器的基本原理 (27)5.2无寄生元件条件下的反激式变换器的电路仿真与分析 (28)结论 (35)参考文献 (36)致谢 (37)天津职业技术师范大学2011届本科生毕业设计第一章引言随着电力电子技术的高速发展，电力电子设备与人们的工作、生活的关系日益密切，而电子设备都离不开可靠的电源，进入80年代计算机电源全面实现了开关电源化，率先完成计算机的电源换代，进入90年代开关电源相继进入各种电子、电器设备领域，程控交换机、通讯、电子检测设备电源、控制设备电源等都已广泛地使用了开关电源，更促进了开关电源技术的迅速发展。

IGBT Model in SPICE

The concept of IGBT modellingand the evaluation of the PSPICE® IGBT modelMaster ThesisbyJoakim Karlssonconducted atALSTOM Power, Växjö2002AbstractThe ability to calculate power losses in the Insulated Gate Bipolar Transistors (IGBTs) embedded in a series resonant converter is of great interest at ALSTOM Power, Växjö. Correctly estimated power losses are valuable in various situations, e.g. when evaluating new types of IGBTs or different control strategies. Therefore, it is desirable to investigate and evaluate the existing computer based IGBT models, where the majority is implemented in various circuit simulators.In this thesis, the MicroSim® PSPICE® IGBT model is evaluated with respect to the application of the series resonant converter. Particularly, this involves the issues of conduction losses and switching losses both at hard and soft switching.To be able to characterise a specific IGBT, a major parameter extraction procedure is performed, adapted from Hefner [7]. The parameters are subsequently used in the simulations and the result is compared with reference values of the measured power losses in the series resonant converter. This procedure is carried out for three different IGBTs from different manufacturers (Eupec, Semikron and Toshiba).The evaluated model failed to comply with the stated specifications, mainly owing to the poor performance at soft switching with a capacitive snubber, and consequently, some possible future alternatives are given.AcknowledgementsFist of all, I sincerely would like to thank my supervisor at the department of Industrial Electrical Engineering and Automation (IEA), Per Karlsson, for his support and advice during this thesis.Secondly, I am also very grateful to Per Ranstad, supervisor at ALSTOM Power, Växjö, for the possibility of conducting my master thesis at ALSTOM and for the continuous assistance and encouragement during my work.I also would like to thank the rest of the staff at ALSTOM for making my time at the company very enjoyable.Contents1 INTRODUCTION (3)1.1 B ACKGROUND (3)1.2 W ORKING PROCESS (3)1.3 T HESIS OUTLINE (4)2 CONVERTER TOPOLOGY (5)2.1 S NUBBER CIRCUITS (5)Hard switching (5)The capacitive snubber (6)The charge-discharge RCD snubber (7)2.2 T HE SERIES RESONANT CONVERTER (7)3 POWER SEMICONDUCTORS (10)3.1 P OWER DIODES (10)Basic structure and i-v characteristics (10)Non-punch-through and punch-through diodes (11)On-state losses and conductivity modulation (11)Switching characteristics (11)Important features of bipolar devices (12)Schottky diodes (12)3.2 B IPOLAR J UNCTION T RANSISTORS (BJT S) (13)Basic structure and i-v characteristics (13)Gain mechanism (14)Switching characteristics (15)Second breakdown (17)Safe Operating Area (SOA) (17)3.3 M ETAL O XIDE S EMICONDUCTOR F IELD E FFECT T RANSISTORS (MOSFET S) (18)Basic structure (18)i-v characteristics (18)Inversion layer and field effect (19)Switching characteristics (20)Conduction losses and breakdown voltages (22)Safe operating Area (SOA) (22)3.4 I NSULATED G ATE B IPOLAR T RANSISTORS (IGBT S) (22)On-state operation (23)Switching characteristics (23)Latchup (24)4 IGBT MODELS (26)4.1 IGBT MODEL CATEGORIES (26)A. Behavioural models (26)B. Semimathematical models (26)C. Mathematical models (27)D. Seminumerical models (27)4.2 T HE M ICRO S IM®PSPICE® MODEL (27)5 PARAMETER EXTRACTION (29)5.1 P ARAMETER EXTRACTION PROCEDURE (29)Measurements (29)1:Tail Decay Rate (29)2: Tail size versus anode current for different anode voltages (30)3: Saturation current versus gate voltage (32)4: On-state voltage versus gate voltage (32)5: Gate and gate-drain charge (32)5.2 I MPLEMENTATION OF PARAMETER EXTRACTION PROCEDURE (34)The clamped inductive load circuit and the constant anode supply circuit (34)The ±15 V gate drive circuit (35)The current generator (35)5.3 R ESULTS OF THE PARAMETER EXTRACTION (35)5.4 D ISCUSSION (36)6 SIMULATION (37)6.1 S IMULATION IN PSPICE (37)6.2 S IMULATION OF THE SERIES RESONANT CONVERTER (37)6.3 R ESULTS (38)6.4 D ISCUSSION (39)7 CONCLUSIONS (40)7.1 R ESULTS (40)7.2 F UTURE WORK (40)REFERENCES (41)APPENDIX A (42)A.1 O PTIMAL VALUE OF SNUBBER CAPACITOR (42)A.2 U NDAMPED SERIES RESONANT CIRCUIT (42)APPENDIX B (43) (43)B.1 D ERIVATION OF βSSB.2 M EASUREMENT INSTRUMENTS (44)APPENDIX C (45)C.1 PSPICE SIMULATION MODEL OF THE SERIES RESONANT CONVERTER (45)C.2 S IMULATION OUTPUT - E UPEC (46)C.3 P OWER LOSSES - P ARAMETER SET: "O PTIMISED1” (47)C.4 P OWER LOSSES - P ARAMETER SET: "O PTIMISED2" (48)C.5P ARAMETER SETS FOR THE PSPICE SIMULATION (49)1 Introduction1.1 BackgroundALSTOM Power Environmental Systems produces and develops high frequency power converters (20 kHz, 100kW), for power supply in industrial applications. The converter includes a full-bridge inverter, Figure 1.1, where Insulated Gate Bipolar Transistors (IGBTs) constitute the switches.When replacing switching devices by different models, or when developing new systems and strategies, switching and conduction losses are essential to know for the evaluation of the system. At ALSTOM today, losses are partly manually measured, which is a very time consuming process. A more efficient way of estimating losses would be to use a computer-model for calculation or simulation, which may also provide a more detailed study of the various components constituting the total losses. The purpose of this thesis is to examine existing models and to evolve and evaluate an appropriate model.The model should be characterised by either information from datasheets or from measured characteristics. The dynamic characteristics and the performance at soft switching are of special interest. Moreover, the model should hold a margin of error of no more than 10 %.1.2 Working processThe starting point of this master thesis is the literary study, which starts with literature of power electronics to get basic background knowledge of converter topologies and semiconductors. To improve the understanding of converter design, the MicroSim® PSPICE® circuit simulator is used for simulations of fundamental converter topologies.The subsequent survey of IGBT models involves a major information retrieval, basically with the Internet and the IEEE database of scientific papers, IEEE Xplore™, as the principal source. After evaluation of the literary study, the conclusion is drawn that no simple model, for loss calculations only, is to be found and that a simulation model within a commercial simulator is the appropriate alternative. The final decision is made to evaluate the MicroSim® PSPICE® model since this is already available at ALSTOM and seems to have the potential of desired accuracy.The literary study also brought forward the importance of a parameter extraction procedure to characterise different devices correctly. Hefner [3]-[8] has done extensive research in the area of modelling semiconductors and since much of his work composes the basis of the PSPICE® model, also the parameter extraction procedure developed by him is adopted. Further simulations are executed to verify the procedures and circuits for the chosen set of parameters. Subsequently, design and construction of the extraction circuits as well as gate drive units are performed.The various measurements of the extraction procedure are logged on a computer, via an oscilloscope, to perform mathematical operations and curve fitting algorithms on the collected data. The processing of data is done in MATLAB® and the resulting parameters logged in an ordinary spreadsheet file.The final part of the evaluation process is to design a simulation model of the series resonant converter, including the IGBTs with adherent parameters, and to simulate the different scenarios in accordance with the reference measurements of the total losses.1.3 Thesis outlineIn Chapter 2 and 3, the series resonant converter, basic snubbers and relevant semiconductors are studied in order to present the fundamental facts to the reader. Some basic circuit- and semiconductor-knowledge is required, however, the important concepts are explained in general and the detailed studies are left to the interested reader.Chapter 4 involves the literary study made and the aspects of the evaluation. The parameter extraction procedure, as well as the designed circuits, is presented in the subsequent chapter, Chapter 5, along with results and comments. In Chapter 6 the simulation tool and the performed simulations are reviewed. Finally, the thesis is concluded in Chapter 7.2 Converter topologyMost electrical systems like computers, battery chargers, television sets etc. are operated at other voltage levels and functions than what is delivered by the line supply voltage. To adapt the voltage to the desired level,different kinds of converters are used and these can be categorised into ac/dc, dc/dc, ac/ac converters. Here ac/dc converters are assumed to have bi-directional flow of power and no distinction is made between conversion from ac to dc (rectifier ) or dc to ac (inverter). Not only the voltage level (amplitude) can be transformed with a converter; frequency and phase may also be altered arbitrarily.Depending on the requirements and prerequisites of the system, there are numerous different topologies for each specific converter category [19], [20]. Nevertheless, there are some factors that are common to all applications;the aim to minimise the losses during conversion and the building blocks of switches (semiconductor devices)and energy storage elements (inductors and capacitors). To enhance the first factor, additionally circuit elements may be added to the basic topologies to minimise overvoltages or the rate of rise of the voltage/current. In the first part of this section, the fundamentals of such elements, referred to as snubbers, are studied. In the subsequent section, the converter of special interest in this thesis, the series resonant converter, is investigated .For a more detailed understanding of different converter topologies and snubber circuits, refer to [19] – [22].2.1 Snubber circuitsSnubber circuits are used to reduce the stresses on semiconductor devices e.g. by minimising overvoltages during turn-off caused by stray inductances, limiting the rate of rise of the current during turn-on or enhance the switching trajectories to reduce the switching losses. There are multiple types of snubber circuits depending on the embedding circuit and type of semiconductor, as well as the purpose of the snubber. Consequently, diodes demand different snubbers than thyristors, turn-on snubbers differ from turn-off snubbers for transistors and additionally snubbers are needed in bridge applications [20].For the series resonant converter, as will be discussed later, the purely capacitive snubber is sufficient enough and is therefore, along with the RCD-snubber, the only snubber studied here.Hard switchingThe step down converter is a fundamental bridge configuration and is shown in Figure 2.1. The current source acts like an inductive load and the current is carried by the power transistor (IGBT in this case) during on-state,and by the freewheeling diode during off-state.Figure 2.1 The step down converter.In Figure 2.2, the collector current and collector-emitter voltage transients during switching of the step down converter are illustrated. The simulation values (in [21]) for the load current and the dc link voltage are I load =0.8I C and V dc = 0.6V CES , where I C is the rated maximum collector current and V CES is the rated maximum collector-emitter voltage. Note that the voltage and current are expressed in per unit of the normalisation values I C and V CES .During turn-on, the semiconductor is exposed to a high current peak as a consequence of the reverse recovery of the freewheeling diode (section 3.1). At the same time the collector-emitter voltage is still high, thus, causing high switching losses. During turn-off, the losses can be even higher due to the long collector current tail (section 3.4). The semiconductor is, under these conditions with simultaneously high current and voltage, said to be operating under hard switching.loadV dcFigure 2.2Normalised transistor current (black) and voltage (grey) during a) turn-on and b) turn-off of the power transistor in the stepdown converter [21].The capacitive snubberExtensive losses can cause critical junction temperatures or force the transistor to operate outside the Safe Operating Area and subsequently cause device failure. To avoid this, a snubber circuit is added to the converter,like in Figure 2.3.Figure 2.3 The step down converter with a capacitive snubber.The purpose of the capacitor, C s , added in parallel with the transistor, is to offer an alternative way for the load current at turn-off and simultaneously raise the collector-emitter voltage as in Figure 2.4b. This is not possible at hard switching, when the only alternative path for the current is through the freewheeling diode, which has to be forward biased to conduct, resulting in that approximately the entire dc link voltage, V dc , is applied across the transistor during the fall time of the current.Figure 2.4 Normalised transistor current (black) and voltage (grey) during a) turn-on and b) turn-off of the power transistor in the stepdown converter with a capacitive snubber. Note the collector current peak at turn-on, and the simultaneously change of thecollector current and collector-emitter voltage at turn-off [21].Switching with snubber circuit embedded is usually referred to as soft switching, or like in this case, zero voltage switching (ZVS), owing to the collector-emitter voltage level at the start of the turn-off switching sequence. Thisactually lowers the turn-off losses, and furthermore, can enhance the electromagnetic compatibility (EMC) byloadV dc C sreducing the derivative of the collector-emitter voltage. However, apparent from Figure 2.4a, the drawback of lower turn-off losses is the higher collector current peak at turn-on, adding stress to the transistor.At the instant of turn-on, the capacitor is fully charged and since the freewheeling diode is still conducting, the capacitor voltage equals the full dc link voltage. The diode becomes reversed biased at the peak of the reverse recovery current and at this moment the capacitor can be discharged through the transistor, causing the peak of the collector current during turn-on, Figure 2.4a.The value of the capacitor should be chosen in a way where the capacitor voltage reaches its off-state level at the same time as the current reaches zero [22], as in Figure 2.4b. If a lower capacitor value is applied, the capacitor voltage reaches the full dc link voltage before the current has reached zero, and if a higher value is chosen the discharge current at turn-on is increased. The mathematical expression for the optimal capacitor value can be found in Appendix A.1.The charge-discharge RCD snubberTo decrease the current stress of the transistor at turn-on, the discharge current has to be limited. This is done by a charge-discharge RCD snubber [21], further on only referred to as RCD snubber, shown in Figure 2.5.Figure 2.5 The step down converter with a RCD snubber.The diode is connected in parallel with the resistor to bypass the current at turn-off when the capacitive snubber is efficient, and the resistor only would cause higher losses. However, at turn-on, the capacitor is discharged through the resistor and the discharge current carried by the transistor is limited. During turn-on at hard switching, the transistor carries both the load current and the reverse recovery current, and at soft switching with a snubber, the transistor carries the sum of the load current and the discharge current when the freewheeling diode has recovered. Consequently, to not increase the stresses on the transistor, caused by the snubber compared to those caused by the freewheeling diode, the resistor value should be chosen in a manner to limit the discharge current to be lower than the reverse recovery current, I rr . This gives a resistor value ofHowever, the resistor value should not be chosen too high, since that would slow down the voltage decline and the capacitor should be fully discharged before the next turn-on to be efficient.2.2 The series resonant converterThe series resonant converter constitute one part of a group called load resonant converters [20]. As the name implies, the converter consist of a resonant part composed by inductors, capacitors and resistors and where usually the latter is part of the load. The purpose of this circuit is to offer soft switching (ZVS or ZCS),according to the resonant behaviour of the converter, resulting in lower switching losses, which in turn may facilitate a higher switching frequency.A series resonant DC to DC full-bridge converter is shown in Figure 2.6, where the resonant LC tank is connected to the load via a rectifier. Without the rectifier, the circuit is referred to as a series resonant DC to AC converter.A transformer may be included before the rectifier to provide an output voltage of desired magnitude as well as electrical isolation between in- and output.rrdcS I V R >V dc R s sFigure 2.6 A series resonant DC-DC full bridge converter.To simplify the analysis of the series resonant converter, only a half-bridge, Figure 2.7, is studied. The operation of the switches and the output waveforms are identical, with the addition of the operation of one switch in the half-bridge converter (e.g. T +) corresponding to the operation of two switches, in antiparallel (T A+ and T B-), in the full-bridge converter. The transistors in the full-bridge are in Figure 2.7a replaced by ideal switches, the resonant tank consists of L r and C r and the capacitance of the output capacitor, C f , is usually large to make the output ripple low.Figure 2.7 Series resonant converter: a) half-bridge b) equivalent circuit[20].The output waveform and the internal state of the converter is depending on the direction of the flow of the current and which device that is conducting. When i L is positive, it flows through the transistor, T +, if it is on and through the diode, D − , otherwise and the output voltage, V o , is reflected across the rectifier so that V B´B =V o .When the current reverses, it commutates to the opposite transistor and diode (T − and D +) and V B´B = -V o .This sequence of operation can be described by an equivalent circuit illustrated in Figure 2.7b, and the different states during one period are:od AB dAB o d AB dAB L o d AB dAB o d AB dAB L V V v V v conducting D V V v V v conducting T i for V V v V v conducting D V V v V v conducting T i for ++=+=+−=−=<−−=−=−+=+=>+−−+½½:½½:0½½:½½:0''''The derivation of the output waveforms for the basic undamped series-resonant circuit is given in Appendix A.2.The resonant converter has a resonance frequency equal toand the converter can be operated in different modes depending on whether the switching frequency is lower or higher than the resonance frequency. In this study, only continuos-conduction mode, with ωs > ω0, is considered.During this mode of operation, the switches turn-on at both zero voltage and zero current but are forced to turn off at a finite current. Starting at ω0t 0 in Figure 2.8, the transistor T + starts conducting the reversing positive current and when T + is gated off, at ω0t 1, T - is gated on. However, the current is still positive and therefore commutates to the diode, D − , but declines quickly towards zero because of the great negative voltage applied over the LC tank (- V d /2 – V o ). When the current becomes negative, it is carried by T − and an identical half-cycle as the first one is started.As mentioned earlier, during this mode of operation, the switches turn on at zero current and also (nearly) zero voltage (because the parallel freewheeling diode is conducting, hence, is forward biased, prior to turn-on). This means the reverse recovery characteristicof the freewheeling diode is not of importance since the current has reached zero at turn-off of the diode. Another advantage of the simultaneously ZVS and ZCS, is that lossless turn-off capacitors in parallel with the transistors can be used as turn-off snubbers.Figure 2.8 Series resonant converter, continuos conduction mode (ωs > ω0)[.20].rr C L f 1200==πω3 Power semiconductorsPower semiconductors are substantially different from ordinary logic-level semiconductors considering structure and characteristics. In this chapter the most important and basic features of the power diode, bipolar junction transistor (BJT), metal oxide semiconductor field effect transistor (MOSFET) and the insulated gate bipolar transistor (IGBT) are studied. The reader is assumed to have some basic knowledge of semiconductor physics and be familiar with common terms like the pn -junction, recombination, lifetime, drift and diffusion.The following subsections are a summary of the more comprehensive texts about semiconductors found in [20]and [22].3.1 Power diodesBasic structure and i-v characteristicsThe basic structure of the power diode is the simplest form of all semiconductors and the fundamental building block for all semiconductor devices. The cross-section of a power diode is illustrated in Figure 3.1a and it is realised by epitaxial growth of a lightly doped n - layer on top a heavily doped n + layer. The thickness of the n -layer, also referred to as the drift region, is dependent on the desired breakdown voltage. To form the pn -junction, a heavily doped p + region is diffused into the drift region.Figure 3.1 a) Cross section of power diode and b) circuit symbol.The feature that distinguishes the power diode from the signal level diode is the drift region, which is specific to all power semiconductors, and enables the depletion layer to grow into the drift region at reverse blocking voltages. Devices with high breakdown voltages, hence, thick drift regions, would logically have a high resistivity on account of its thick, lightly doped layer. However, the conductivity modulation (discussed later) of the drift region reduces this problem in all bipolar devices (i.e. devices utilising minority carrier injection).The typical i-v -characteristic of a power diode is shown in Figure 3.2. It resembles the characteristic of a signal level diode with the difference of an ohmic curvature, instead of an exponential, in forward bias. This is due to the ohmic resistance of the drift region appearing at the high current levels applied to power diodes. At reverse bias only a low leakage current is allowed to flow until the breakdown voltage, BV BD , is reached and avalanche breakdown occurs with device failure as a possible consequence.Figure 3.2 The i-vcharacteristic of the power diode.Anode(a)(b)d +-Non-punch-through and punch-through diodesThere are two different ways of designing the breakdown voltage rating of a diode. The first one is to make the drift region wide enough to maintain the entire depletion region, which is called non-punch-through diodes. The second approach is to have a more lightly doped drift region, where the depletion region extends all the way to the n+substrate, however, not much further into the layer because of the heavy doping in the substrate. Practically, this results in a punch-through diode with half the thickness of the drift region compared to a non-punch-through diode with the same rated breakdown voltage.On-state losses and conductivity modulationThe total losses of semiconductors can principally be divided into on-state losses (or conduction losses) and switching losses, ignoring off-state losses during reverse bias. For the power diode, at least for medium switching frequencies, the on-state losses are predominant and mostly dissipated in the drift region. For signal level diodes, the voltage across the diode under forward bias can be said to be constant and approximately equal to 0.7 V. If the current flowing through the diode is defined as I, the dissipated power would be given by P=0.7*I. Yet, this would lead to an underestimation of the losses in the power diode on account of the ohmic resistance in the drift region.Calculating this resistance on basis of geometry and equilibrium carrier densities, not considering the effect of the carrier injection into the drift region, also referred to as the conductivity modulation, would also lead to false results.When the pn-junction is forward biased, holes are injected from the anode into the drift region. At low-level injection these holes are in minority compared to the thermal equilibrium value of the electron concentration of the lightly doped n- drift region. However, at high-level injection the number of injected holes widely overcomes the quantity of electrons of the drift region, thus, creating a space charge of holes. This space charge attracts electrons from the n+substrate, which start to drift towards the injected holes while recombining along the way. This phenomenon is called double injection and results in a much lower ohmic resistance of the drift region than at thermal equilibrium.Switching characteristicsLosses during the switching period depend both upon the switching times as well as the curvature of the voltage and current during that time. Furthermore, these factors are affected by both the intrinsic properties of the device as well as the interaction with the surrounding circuit. An example of this is the time rate of change, di/dt, which often is controlled by circuit inductances or by the turn-off of a solid-state device where the diode serves as a freewheeling diode.In Figure 3.3 the switching period can be divided into five different time intervals, where t ri and t fr represent the turn-on transient and t fi and t rr the turn-off transient.Turn-on transientDuring t ri, the space charge within the depletion region, upheld by the high reverse bias, is removed and at the end of t ri, the depletion layer has reached its thermal equilibrium level. At the start of the second phase, t fr, the pn-junction is now forward biased and injection of minority carriers commences and the excess-carrier distribution grows towards the steady-state value supported by the current I0. The great voltage overshoot, built up during t ri, is due to the ohmic resistance in the drift region, where the conductivity modulation not yet is fully developed, in addition with the voltage contributed by stray inductances in the wafer and bonding wires. When the current has reached its maximum value, I0, di/dt approaches zero, hence, the voltage caused by stray inductances reduces along with the voltage drop over the drift region, which is shorted out by the vast amount of excess carriers. Nevertheless, the peak voltage during this period may reach several tens of volts and can affect the performance of the circuit.Turn-off transientThe turn-off sequence is basically the reverse of the turn-on sequence. Starting at t fi, the excess charge is removed from the drift region and this carrier sweep out is continued by the negative diode current during t rr1,in addition with the recombination process. When all the excess charge at the ends of the drift region is swept out, the junctions can become reversed biased (t rr2 ) and the depletion regions expand into the drift region from both。

门极可关断GTO晶闸管的

《电力电子技术》论文题目：门极可关断(GTO)晶闸管的工作原理及发展前景班级：姓名：序号：学号：指导教师：郭老师2014年5月20日门极可关断(GTO)晶闸管的工作原理及发展前景引言电力电子技术包括功率半导体器件与IC技术、功率变换技术及控制技术等几个方面,其中电力电子器件是电力电子技术的重要基础,也是电力电子技术发展的“龙头”。

从年美国通用电气公司研制出世界上第一个工业用普通晶闸管开始,电能的变换和控制从旋转的变流机组和静止的离子变流器进入由电力电子器件构成的变流器时代,这标志着电力电子技术的诞生。

到了70 年代,晶闸管开始形成由低压小电流到高压大电流的系列产品。

同时,非对称晶闸管、逆导晶闸管、双向晶闸管、光控晶闸管等晶闸管派生器件相继问世,广泛应用于各种变流装置。

由于它们具有体积小、重量轻、功耗小、效率高、响应快等优点,其研制及应用得到了飞速发展。

由于普通晶闸管不能自关断,属于半控型器件,因而被称作第一代电力电子器件。

在实际需要的推动下,随着理论研究和工艺水平的不断提高,电力电子器件在容量和类型等方面得到了很大发展,先后出现了GTR 、GTO、功率MOSET 等自关断、全控型器件,被称为第二代电力电子器件。

近年来,电力电子器件正朝着复合化、模块化及功率集成的方向发展,如GPT，MCT，HVIC等就是这种发展的产物。

1.什么是门极关断(GTO)晶闸管1964年,美国第一次试制成功了500V/10A 的GTO。

在此后的近10年内,的容量一直停留在较小水平,只在汽车点火装置和电视机行扫描电路中进行试用。

自70 年代中期开始,GTO的研制取得突破,相继出世了1300V/600A 、2500V/1000A 、4500V/2000A的产品,目前已达9KV/25KA/800Hz及6Hz/6KA 的水平。

GTO有对称、非对称和逆导三种类型。

与对称下相比,非对称通态压降小、抗浪涌电流能力强、易于提高耐压能力。

GTO关断特性的SPICE模拟

第19卷第5期半　导　体　学　报 V o l.19,N o.5 1998年5月 CH I N ESE JOU RNAL O F SE M I CONDU CTOR S M ay,1998　GT O关断特性的SP I CE模拟兀　革陈治明(西安理工大学自动化与信息工程学院　西安　710048)张昌利徐南屏(西安电力电子技术研究所　西安　710061)摘要　本文提出了用于模拟GTO关断特性的SP I CE等效电路模型.根据器件的工作特性并结合器件结构提取模型参数.用此模型对1000A 2500V阳极短路型GTO的关断特性进行了模拟,包括关断电流拖尾现象在内的整个关断过程,模拟结果与器件的测试结果吻合较好.PACC:2560L,0260,12101　引言随着GTO晶闸管(Gate T u rn2O ff T hyristo r)性能的不断改进及其电路应用的不断推广,对其工作特性的精确模拟越来越重要.对于只熟悉器件外特性,对器件内部结构及工作机理了解甚少的一般电路设计人员来说,要为复杂器件建立等效电路模型,确有许多困难.以前的工作人员对GTO建立了一系列等效电路模型.其中,以二极管为基本单元的等效电路模型模拟精度高,但是参数提取复杂,对电路设计人员不太实用.以晶体管为基本单元的等效模型,电路参数全部采用外特性提取,对晶体管的内部参数未加提取.所以,整个参数提取过程比较简单,但模拟精度不高.本文从电路应用的角度出发,分析两种模型的优点,以晶体管模型为基础,分析GTO关断过程与晶体管内部结构的关系,考虑电容对动态特性的影响,建立了以晶体管电容(2T23R23C)为基本单元的GTO等效电路模型.采用外特性与内部结构相结合的方法对电路参数和晶体管的内部参数进行提取.根据GTO结构特点,建立多单元并联的GTO等效电路模型.这个模型不但具有模拟精度高的优点,而且模型参数提取比较简单.采用此模型可以完整的模拟出GTO的整个关断过程,其中包括关断后的拖尾过程,以前的模型无法模拟出拖尾过程.模拟结果与实验结果对比,定量模拟误差很小.此模型的建立,为电路设计人员提供了很大的方便.兀　革　女,1971年出生,硕士,研究方向为电力电子器件特性分析与器件设计陈治明　男,1945年出生,教授,博士生导师,从事半导体材料与器件研究张昌利　男,1958年出生,高级工程师,从事电力电子器件研究1997202225收到,1997205210定稿在模型参数提取中,建立了外特性和结构参数的关系.所以可以通过外特性的要求改变结构参数,从而调节设计参数,达到特性要求.为采用外特性来设计器件结构提供了更直接的方法.此模型的建立为GTO 器件设计和电路应用架起了一座桥梁.本文建立的模型主要针对GTO 关断特性的模拟,详细讨论模型参数的提取方法.利用此模型对器件的关断过程进行了模拟,取得了很好的效果.尤其可以模拟出关断后的拖尾过程,模拟结果与实验结果吻合较好.2　模型的建立GTO 的基本结构与晶闸管相似,按其结构特征已提出两种基本的等效电路[1,2],即用三个二极管串联代表晶闸管的等效电路模型和用两个晶体管的组合代表晶闸管的等效电路模型.前者的典型应用是仓田卫的五段二极管等效模型[3],其五段之间采用侧向电导连接,侧向电导代表各段之间的横向效应.此模型的特点是精确度高,但因非线性元件太多,参数提取的难度很大,分析中存在许多困难.相对说来,采用以晶体管为基本单元的等效电路模拟比较简单,只要参数提取准确,模拟精度也比较高.尽管一个四层PN PN 结构可以直接等效为两个晶体管的电流正反馈连接,但要真正能够模拟器件的工作特性,还须在此基础上作些改进,如图1所示.图中,电阻R 1的设置是为了反映门极的触发和关断特性,电阻R 3的设置是为了反映GTO 的正向阻断特性,而R 2只出现在阳极短路型GTO 的等效电路中,用来反映阳极短路结构的特征,其值与短路点的形状、尺寸和分布有关.这就是所谓2T 23R (两晶体管三电阻)模型.采用一个单元2T 23R 模型可以对GTO 的静态特性进行模拟,采用多个这样的单元并联能模拟GTO 的动态特性,并联单元越多,模拟精度就越高.GTO 开关过程中的电荷存贮和释放与PN 结电容有关[4],尤其是中心阻断结J 2的电容对关断特性起着非常重要的作用.导通时J 2结的电容值越大,其两边存贮的载流子数就越多,关断时间就长,拖尾电流也就越大.为了更加精确地模拟出GTO 的关断特性,需要在模型中加设适当的的电容,构成所谓2T 23R 23C 等效电路模型,如图2所示.在关断过程中,这些电容的值要随着GTO 阳极电压的变化而变化.图1　GTO 的2T 23R等效电路模型图2　GTO 的2T 23R 23C 等效电路模型3635期兀　革等:　GTO 关断特性的SP I CE 模拟一个GTO 元件的阴极面由许多小的阴极条组成[5],每个阴极条对应一个GTO 单元,一个GTO 单元用一个2T 23R 23C 模型来等效.这样,在模拟关断特性时,一个完整GTO 元件就需要并联若干个这样的单元模型才能给予准确描述.但一个实际的GTO 元件一般有几百个小单元,采用这么多单元电路并联起来是不现实的.我们采取将特性相近的小单元归类合并,形成几个大原胞的办法来解决.这就是说,要对每个大元胞建立一个单元电路,然后再把这些单元电路并联起来,形成一个完整的GTO 关断特性模型.对阴极条采用同心环规则排列的GTO ,由于同一个环上的各阴极条的特性基本相同,可以把它们合并成一个大的GTO 原胞.不同的环由于至门极的距离不同,其特性有一定的差别,采用不同的单元电路来等效.最后,用横向电阻和电感来反映环与环之间的横向关系,把所有原胞连接起来.一般情况下,GTO 阴极条的排列圈数并不很多,单元电路十分有限.采用这种方法,不仅可以提高模拟精度,而且可以省去大量的参数提取任务,是一种比较合理的方法.图3是我们对西安电力电子技术研究所产品,一种具有4环阴极结构的1000A 2500V 阳极短路型GTO 建立的等效电路.图3　GTO 的四单元2T 23R 23C 模型图中,V S :源电压;C PS :源电容;R L :负载电阻;L T :引线电感;R T :电感中的等效电阻;R TS :吸收回路的引线电阻;L TS ;引线电感;L S :吸收回路的引线电感;R S :吸收电阻;C S :吸收电容;D S :快速软恢复续流二极管.3　模型参数的提取3.1　R 1的提取从基础单元的模型建立过程中分析,R 1主要反映GTO 的门极触发特性.在GTO 门极加上触发电压后,导通前门极电压和电流由电阻R 1来承担,一旦GTO 导通,门极电流通过N PN 晶体管的发射极,在已知最小门极触发电压V gate 2trigger 和门极触发电流I gate 2trigger 的条件下,可以用下式近似计算R 1:R 1=V gate 2trigger I gate 2trigger(1)463 半　导　体　学　报　19卷3.2　R2的提取模型中的R2是阳极短路电阻,其直接影响GTO的维持电流,在测出维持电流I ho ld的条件下,可根据维持电流来调节R2的大小.维持电流与R2存在如下的关系式:I ho ld=G off V BENR1+V BEPR2(2)其中　V BEN为N PN晶体管的发射结的结电压;V BEP为PN P晶体管的发射结的结电压;G off 为GTO的最大关断增益.R2是阳极短路电阻,可以根据器件结构算出R2的大小.对环形短路结构,短路电阻的计算很复杂,只能在做一定近似的条件下,对环形阳极短路图形的短路电阻进行计算.算出一个小的GTO单元的短路电阻,然后再把各个小单元的短路电阻并联求出整个GTO的短路电阻.一个阴极单元的阴极条下面阳极侧对应的阳极短路环,可分成两部分:一部分正对阴极条,另一部分在阴极条外,考虑电流的二维流动,两部分对阳极电流的短路效果不太一样.用短路系数表示其短路效果的话,正对阴极条的短路环短路系数取为1,那么阴极条外的短路环的短路系数设为b:b<1.对阴极条外的短路环部分算出短路电阻后要乘以短路系数.两部分的电阻并联,即可得到一个阴极单元的等效阳极短路电阻.每一圈的所有阴极单元对应的阳极短路电阻并联,求出模型中一个GTO原胞中的阳极短路电阻.3.3　R3的提取从模型的建立过程可以看出,R3的加入,主要是为了反映GTO的正向阻断特性.从GTO的内部工作机理分析,正向阻断时,空间电荷区主要在高阻的N基区扩展,R3主要是这部分的电阻.R3和GTO的正向耐压V A K(M ax)间存在如下的关系:V A K(M ax)=R3I gate2trigger(3) 为了把器件的内部结构考虑进去,先根据N基区的电阻率和厚度对N基区的电阻进行估算,初步确定出R3.在对R1、R2提取的基础上,把R3加入模型中,令门极开路(或加一很小的负门极电压),模拟GTO的正向阻断过程,进一步调节R3的值,使GTO的正向转折电压达到设计值,此时的R3即为模型中精确的参数值.3.4　PN结势垒电容的计算在GTO等效模型中,有PN结的势垒电容,对GTO制造来说,每个PN结两边的浓度都相差两个数量级以上,用单边突变结近似.其势垒电容用C T表示,其与浓度的关系式为:C T=A[qΕ0ΕN2(V D-V A)]1 2(4)V D=kTqlnN A N Dn2i(5)其中　A为PN结的结面积;N为PN结低掺杂一边的杂质浓度;V A为PN结的外加电压;V D为PN结的接触电势;N A,N D分别为PN结两边的杂质的平均浓度;T为工作温度.对模型中心阻断结的电容,在关断过程中,其电容值的大小对GTO的关断过程中的特性影响明显,中心阻断结电容C与拖尾电流i dis的关系如下:i dis=C d u Ad t(6)5635期兀　革等:　GTO关断特性的SP I CE模拟电容值随GTO阳极端电压的变化而变化,是一动态电容,采用非线性电容来表示,其值与阳极端电压的关系为:C=C0+C1V+C2V2(7)其中　C0为零偏势垒电容;C1、C2分别为电容调节系数.3.5　PNP晶体管和NPN晶体管电流放大倍数的计算晶体管的电流放大倍数是电流密度的函数,随电流密度的增加其值要增大,找出电流密度和电流放大倍数间的关系[6],可以算出不同电流密度下的电流放大倍数.利用电荷控制模型可得N PN管的发射效率Χ与电流密度间的关系式为:Χ=1+J L2a[1-Χ(b+1)]sechW BL a-1+2qD n N B W B2qD n D p G E-1(8)其中　G E为N+发射区的Gumm el数;L a为双极扩散长度;b=Λn Λp;D n、D p分别为电子和空穴的扩散系数;J为导通电流密度;W B为N基区宽度.基区输运系数Β3=sech W BL a(9) PN P晶体管的共基极电流放大倍数ΑN PN=Β3Χ.利用共射极电流放大倍数与共基极电流放大倍数的关系就可以算出不同电流密度下的晶体管的共射极电流放大倍数.对PN P晶体管的电流放大倍数,可以根据最大关断增益和两个晶体管的电流放大倍数的关系式求得.GTO的最大关断增益G off与ΑPN P和ΑN PN存在如下的关系:G off=Βnpn+ΒnpnΒpnpΒnpnΒpnp-1(10) 在关断增益G off和N PN晶体管共射极电流放大倍数ΒN PN已知的条件下,可用上式算出PN P晶体管的共射极电流放大倍数ΒPN P.4　模拟结果及分析利用2T23R23C等效电路对研究对象的关断特性进行了模拟,模拟结果如图4(a)所示.为了对模型的精确度进行讨论,我们也采用四单元2T23R等效电路模型对同一研究对象的关断特性进行了模拟,模拟结果如图4(b)所示.同时,我们把这两种模拟结果中的主要关断特性参数同元件的实际测试结果进行了对比,对比结果列于表1.表1　1000A 2500V阳极短路型GT O关断特性模拟结果和测试结果的对比特性参数t S Λs t f Λs V DS V∃V V I tail A t tail Λs-I G Q A实测值7.50.95328965215.21862T23R模型模拟值7.380.93334.2110.2--161相对误差1.6%2%1.9%14.6%--13.44%2T23R23C模型模拟值7.610.96327.8790.4750.516.4160相对误差1.47%1.05%0.4%5.8%2.9%7.9%13.98%663 半　导　体　学　报　19卷图4(a )　用2T 23R 23C 等效电路模型模拟的1000A 2500V GTO 的关断曲线1:I (R J ) A ;2:I (R G ) A ;3:V (s ) V.图4(b )　用2T 23R 等效电路模型模拟的1000A 2500V GTO 的关断曲线1:I (R J ) A ;2:I (R G ) A ;3:V (s ) V . 从模拟结果可以看出:两个模型都可以模拟出GTO 的关断过程,其存贮阶段和下降阶段的特征都很清楚.同时,也可以模拟出GTO 在关断过程中于阳极端产生的尖峰电压.从与测试结果的比较情况看,模拟的准确度都比较高.但是,采用2T 23R 23C 模型可以模拟出关断后期的电流拖尾过程,比较精确的给出拖尾电流的峰值和拖尾时间值,而且对其他参数值的模拟精度也比用2T 23R 等效电路模型得到的高.其原因是:在2T 23R 模型中没有考虑电容对动态特性的影响因素,两个晶体管的结电容都用PSP I CE 中的隐含值(隐含值为0),动态过程电容值与隐含值相差很大,所以造成模拟误差比较大.在2T 23R 23C 模型中,对各个PN 结的实际接触电势和电容值进行了计算.根据GTO 的关断机理,具体分析了关断过程中各个PN 结电容对电流的影响.重点分析了拖尾电流i tail 的组成成分,以及其与J 2结上的电容间的关系,在计算J 2结电容时考虑其随GTO 阳极电压的变化关系,采用非线形电容近似,所以2T 23R 23C 模型的模拟效果比2T 23R 模型好.另外,本次对两个晶体管的放大倍数Β1,Β2进行了估算,计算出不同电流密度下的电流放大倍数.以前的模型中对动态放大倍数的提取比较粗略,只是取一组值,满足设计的关断增益即可,造成关断时间模拟误差大.关断时间与Β1,Β2有密切的关系,精确算出各个电流密度下的电流放大倍数后,最终确定出了符合实际的Β1,Β2的值,这也是模拟精度提高的一个原因.从上面的对比中可以看出,2T 23R 23C 模型相比2T 23R 模型在拖尾阶段的模拟上有了很大地改进.电容的加入,存贮时间和下降时间有所增加,模拟误差比2T 23R 模型小.从模拟结果可以看出,采用2T 23R 23C 模型对拖尾电流和拖尾时间模拟的误差相对较大,其原因是在考虑电容值时,载流子的寿命计算比较粗略.从拖尾电流的成分分析,有很大一部分是N 基区载流子复合消失形成的衰减电流,电流衰减的快慢与少数载流子的寿命密切相关.所以,等效的电容的精确计算有一定的误差,造成对拖尾部分进行精确的计算比较困难,模拟误差较大.表1所列的模拟结果中,门极电流的模拟结果与测试结果相比误差较大,超过10%.其主要原因是,实际测试过程中采用的门极电路比较复杂,而模拟时为了简化模型,采用了一7635期兀　革等:　GTO 关断特性的SP I CE 模拟 863 半　导　体　学　报　19卷个简单的等效门极电路.还有一个原因就是,模型中门极延迟电路的参数提取复杂,精度受到限制,这也是造成门极特性误差较大的一个原因.为了使模型进一步精确化,对上面提到的参数必须精确提取.这些工作还有待深入研究.从模拟结果可以看出,在门极信号和吸收回路参数给定的情况下,两个晶体管的电流放大倍数和结电容对GTO关断时间和拖尾电流的影响最大.5　结论本文在分析GTO基本结构及开关机理的基础上,建立了一种可直接利用电路模拟软件来精确模拟GTO开关特性的等效电路模型,采用此模型不仅可以模拟出GTO关断过程的主要特征,更重要的是可以模拟出关断后期的拖尾过程.模拟结果得到实验结果的验证,表明有较高的精确性.参考文献[1]　R anadeep D utta,Cheanlung T say et a l.,IEEE T ransacti on on Pow er E lectronics,1994,9(6):560～566.[2]　C.L.T say et al.,A H igh Pow er C ircuit M odel fo r the Gate T urn2off T hyristo r,IEEE21st A nnual Pow er E lec2tronics Specialists Conference,1990,390～397.[3]　仓田卫著,张光华译,半导体器件的数值分析,北京:电子工业出版社,1985,213～219.[4]　张立,张昌利,等,天津大学学报,1994,27(3):380～384.[5]　T sutom u Yatsou et al.,IEEE T ransacti on on E lectron D evices,1989,36(6):1196～1202.[6]　孙向阳,高玉民,罗晋生,微电子学与计算机,1995,12(6):52～56.SP I CE Si m ula tion of Turn-off Process i n GT OW u Ge,Chen Zh i m ing(X i’an U niversity of T echnology,X i’an　710048)Zhang Changli,Xu N anp ing(X i’an P o w er E lectron ics Institu te,X i’an　710061)R eceived25February1997,revised m anuscri p t received10M ay1997Abstract　A new m odel fo r SP I CE si m u lati on of the tu rn2off p rocess in GTO is p resen ted to reso lve the p rob lem that the earlier m odels can no t be u sed to si m u late its cu rren t tail p recisely becau se of their defau lt of the functi on to describe the charge tran s m issi on in the tu rn2off p rocess of GTO.T he new m odel is successfu lly u sed to si m u late the tu rn2off p er2 fo rm ance of a1000A 2500V anode2sho rt GTO device.A s a com p arison,si m u lati on w ith the earlier m odel is also carried ou t fo r the sam e device.It is eviden t that the cu rren t tail2 ing is app eared in the p lo t from the new m odel and disapp eared in the p lo t from the earlier m p aring to the test data of the sam e device,the si m u lati on resu lts is p recise e2 nough to en su re a p recise circu it design.EEACC:2560B,0260,1210。

集成电路Spice,Spectre仿真总结

集成电路_Spice,Spectre仿真总结Designers-Guide to Spice and Spectre 1995 USA Designers-Guide to Spice and Spectre — Ken Kundert 11.1 绪论 1. 为什么要读这本书①该书是介于算法和教你如何操作软件之间地一本书可以帮助你更好地使用Simulator地设置. ② Simulator仿出地结果可靠不精确不是否收敛应该如何处理如何设置③读完这本书你应该会 1 Simulator如何计算结果 2 Simulator会产生何种错误如何识别 3 如何提高仿真精度 4 如何克服不收敛地情况 5 对于一些特殊电路会产生什么错误如何识别 6 明白仿真器里设置convergenceerror control地一些重要参数 7 能知道仿真器地错误信息出在什么地方如何解决 2. 电路仿真软件地发展历史①直接方法求出电路地微分方程组用数值积分方法差分化然后用牛顿迭代法求解非线性代数方程组.⇒是最准确可靠最通用地方法② Explicit integration methods ⇒方法问题很多③ relaxiton methods ⇒方法问题很多 3. Spice Options ① Global Options: Abstol控制电流默认为1pA Vntol控制电压默认为1uV Reltol相对误差对于牛顿收敛准则和截断误差准则同时起作用默认10-3对于重要电路这个应该设置小一些比如说10-5或者10-6Gmin防止非线性器件关断后地浮空节点默认为10-12 Ω-1LimptsPivrelPivtol无用处② DC Analysis Options: ltl1DC工作点最大牛顿迭代次数默认100 ltl2DC Sweep最大牛顿迭代次数默认50 ltl6Source Stepping地最大步长数增加以上3个值可以增加DC牛顿迭代收敛但是会降低速度. ③ Transient Analysis Options: 1Designers-Guide to Spice and Spectre 1995 USA maxnnprednQtQtTrtolreltolQChgtolα−lt ⋅⋅⋅ Chgtol控制LTE见上面式子 ltl3瞬态过程最小牛顿迭代次数默认为4 ltl4瞬态过程最大牛顿迭代次数默认为10 ltl5整个瞬态过程总地牛顿迭代次数地最大值默认为5000 lvltim设置时间步长控制算法.lvltim1不使用LTE控制步长lvltim2使用LTE控制步长.默认为2 MaxordGear地阶数默认2最高6.建议不要使用高阶Gear方法. Method可选择Trapezoidal和Gear Tmax默认TmaxTstop−Tstart/50同时Tmax不超过最短传输线地延迟时间. 这个参数一般应该设小一些具体如何设置看本文地傅利叶分析一章. Tstep对傅利叶分析有影响.对结果波形有影响. Trtol默认为7不允许变小只能不变或者变大.见本文瞬态分析一章. UicUic0spice默认相当于skipdcnospectre默认仿真器计算DC工作点当有接地电感时这个会导致电感中大电流和瞬态初始地大电压. Uic1相当于skipdcyes不计算工作点按照规定设置工作点.这个地一般问题是会导致初始不连续. 增加ltl4可以帮助瞬态牛顿迭代过程地收敛. 4. Spectre Options ① Global Options: Approx 允许Cadence对器件地模型公式做小地近似可以加快仿真速度 Diagnose 可以帮助诊断电路默认是关闭地.因此可以显示仿真过程中地一些不寻常地事件帮助收敛.推荐打开. Gmin 防止非线性器件关断后地浮空节点默认为10-12 Ω-1Homotopy 使用连续性方法计算DC工作点或者瞬态仿真地初始值.可以选择nonegminsourceptrandptranall.默认值是all也就是使用任何可以选择地方法实现收敛.一般all是最好地所以这个选项不要动.iabstolvabstol 控制电压和电流和spice一样. Reltol 通用误差控制非常地常用和重要. limit 帮助牛顿迭代收敛地辅助算法.可选择devdeltalog.默认是dev即指定限制地是device.这个一般不要动. Macromodels 默认是no.当仿真宏模型时选择yes可以帮助收敛可以容忍宏模型仿真中出现地一些不连续和怪异地事情. Opptcheck 检查电路中每个器件地一些参数和电压电流是否超过允许范围会报warning. 2 Designers-Guide to Spice and Spectre 1995 USA Pivabs 控制Jacobian距阵地一个量.默认值为0. Pivotdc 控制Jacobian距阵地一个量默认是disable. Pivrel 控制Jacobian距阵地一个量默认是10-3. rforce 用在nodesetsnodeforcesinitial conditions时候.如果rforce地出现引起初始偏置不准确那么可以减小rforce. 注在nodesetsnodeforcesinitial conditions情况下都要使用rforce进行偏置. ② DC Analysis Options: Check 检查器件地工作参数是否超出soft limits地范围和opptcheck基本相同地作用 spectre中地一个新概念类似与tran中地initial conditon强制限定节点电压或者支路电流.目地是给出一个独立地解因此该解一般是不平衡地.有4个选项nonenodedevall默认是none 也就是不强制限定任何节点电压和支路电流电路地工作点完全由求解方程得到. forcenone 不强制限定任何节点电压和支路电流. forcenode 采用Initial conditon中设置地值强制限定节点电压和支路电流. forcedev 采用device 中设置地值强制限定节点电压和支路电流.比如说电容初始电压和电感初始电流. forceall 同时采用Initial conditon中和device中设置地值强制限定节点电压和支路电流. force 这里会有一个问题当选择forceall地时候Initial conditon中和device中设置地值会不会冲突比如说电容电压和节点电压. 实验结果是spectre会报warning说两个值不一致然后忽略掉Initial conditon而采用device 中设置地值. homotopy DC中地homotopy会覆盖Global中地homotopy但作用是一样地. Maxiters DC分析中牛顿迭代地最大次数默认150一般不需要改. Maxsteps DC分析中当采用homotopy时最大步长数默认10000不需要修改. Readforce 采用文件地形式定义nodeforce.可以手动定义也可以采用spectre仿真出地文件. Readns 采用文件地形式定义nodesets.可以手动定义也可以采用spectre仿真出地文件. Restart 默认值是restartyes但当需要进行一系列仿真比如说acdctran等地时候restartno会有用处.一般不要动这个选项.不管是设置restartyes还是nospectre都照样计算初始地工作点唯一不同地是牛顿迭代地初始 3Designers-Guide to Spice and Spectre 1995 USA 起点不一样罢了. 注restart和prevoppointacxfspstbzp等skipdctran是不一样地.ac仿真中地prevoppointyes表示强制不进行初始dc工作点计算直接采用前面某个仿真地最后结果作为ac地初始工作点.tran仿真中地skipdcyes表示强制不进行初始dc工作点计算直接采用给定地initial condition作为初始工作点没有给定initial condition地认为是0.而restartyesno只是影响牛顿迭代地初始起点地取法spectre还是照样计算初始地dc工作点. write dc分析牛顿迭代地初始点存储initial guess writefinal dc分析牛顿迭代地最终值存储final value 注DC分析地write和write final地文件spectre.dicspectre.dfc可以作为readnsreadforcereadic使用. ③ Transient Analysis Options Cmin 指定每个节点地最小电容默认值为0.但当出现收敛问题时候可以把Cmin设为1fF左右帮助收敛. Errpreset 可以选择conservativemoderateliberal.详细说明见后面. 和dc中地force功能相似用于tran中.有4个选项dcnodedevall默认是all这个和dc中地force默认是none是不一样地. Icdc 求解dc地值作为Ic也就是不采用用户设置地初始值 Icnode 采用Initial conditon中设置地值作为初始值 Icdev 采用device中设置地值作为初始值.比如说电容初始电压和电感初始电流. Icall 同时采用Initial conditon中和device中设置地值作为初始值. Ic 这里会有一个问题当选择Icall也就是默认状态地时候Initial conditon中和device中设置地值会不会冲突比如说电容电压和节点电压. 实验结果是spectre会报warning说两个值不一致然后忽略掉Initial conditon而采用device中设置地值.这个和dc中地forceall是一样地Iteratio 和spice中地Trtol功能一样控制LTE默认值取决于errpreset.具体用法见后面. Maxiters 瞬态分析牛顿迭代地最大次数.对于一些连续性较差地电路比如说含有宏模型增加Maxiters可以增加收敛性.默认值为5推荐值为50. Maxstep 指定最大步长.一般来说要得到较好地精度首先得减小reltol然后指定maxstep.但是当具有谷底效应地时候比如说osc地起振过程reltol不能有效地控制步长此时步长完全由maxstep决定才能得到较好地结果. 4 Designers-Guide to Spice and Spectre 1995 USA Method 数值积分方法eulertraptraponlygear2gear2onlytrapgear2 Readic 类似于dc分析中地readforce.采用文件地形式定义ic.可以手动定义也可以采用spectre仿真出地文件. Readns 类似于dc分析中地readns.采用文件地形式定义nodesets.可以手动定义也可以采用spectre仿真出地文件. Relref 默认值由errpreset决定.从强到弱排为pointlocalalllocalsigglobalallglobalRestart 默认是restartyes和dc中地用法一样 Skipdc 默认是no.具体用法见后面.如果需要使用skipdc推荐用autodc. Step 默认值由errpreset决定.主要用途是控制非状态变量信号地精度. write tran分析初始工作点地存储这个和dc地write是不一样地 writefinal tran分析完成后最终值存储final value 注瞬态分析地write和write final地文件spectre.icspectre.fc可以作为readnsreadforcereadic使用. 5Designers-Guide to Spice and Spectre 1995 USA 1.2 DC分析 1. DC解地个数和特性①电路地DC解可能不止一个②仿真器没法自动判断解地稳定性因此得到地解可能是稳定地也可能是不稳定地 2. DC分析中收敛最重要其次是精度因为只要收敛一般精度够 3. 现代电路软件组织方程组地方法modern nodal analysis节点分析方法 4. 求解非线性方程地收敛准则①牛顿更新收敛准则update convergence criteria 1maxkknnnvvreltolvvabstol−−lt⋅这里1maxmaxkknnvvv−n②牛顿残余收敛准则residue convergence criteria maxknnfvreltolfiabstollt⋅一般reltol10-3 vabstol1uV iabstol1pA 这里两个准则都是必需地.如果节点阻抗低则小电压引起大电流因此残余收敛准则处理地是电流起作用如果节点阻抗高则小电流引起大电压因此更新收敛准则处理地是电压起作用. 5. 牛顿迭代收敛地3个条件这3个条件任何一条都可能不满足ƒ⋅连续可微V0充分接近于V×解V×是惟一地 6. 大电路收敛更困难 7. 3大问题解不唯一不止一个解解不收敛找不到解解不精确.后面逐一寻找. ①解不惟一NodesetNodeforceinitial condition被用在nodeforce中这里用到rforce.设置Gmin ②解不收敛使用nodesets增加Gminiabstolvabstolreltol增加迭代次数Maxiters使用homotopy方法. ③解不精确减小Gmin可以设为0减小reltoliabstolvabstol 8. 解不惟一⇒ Jacobi matrix奇异没法迭代由于器件模型或者电路参数造成地解不惟一spectre没办法查出来由于拓扑结构造成地可以查出来. 9. 解不惟一如何解决⇒ NodesetNodeforceinitial condition被用在nodeforce中④ Nodeset对DC 和Transient都有作用Nodeforce仅对DC有作用⑤ Nodeset仅作为收敛辅助用如果电路有惟一解它不影响该解地唯一性.而Nodeforce直接作为解在该节点地值因此直接破坏了解地惟一性.事实上 6 Designers-Guide to Spice and Spectre 1995 USA Nodeforce产生地解是非平衡地.Nodeset产生地是平衡地. 10. gmin地作用将非线性器件地端子上并联gmin 地电阻使得解唯一让Jacobi距阵非奇异.对于浮空节点spectre自动将该节点连接电阻gmin到地.默认情况下gmin1e-12 Ω-1 rforce地作用对于nodeforcenodesetsinitial condition里面设置地电压用一个理想电压源串联rforce然后偏置到该节点.默认情况下rforce1 Ω 11. 当用牛顿方法求解失败不收敛改用homotopy方法continuation方法求解fvλλ0←引入参数让参数从0到1变化几种通用方法source stepping/gmin stepping/pseudo stepping/dptran sourcegmin地方法会受到不连续折回分叉地影响而dptran/ptran地方法虽然连续但是加入地电容有可能使电路振荡. 12. DC不收敛怎么办①解决方法diagnoseyes使用nodeset 增加iabstol和gmin可能会影响精度增加迭代次数maxiters改变rforce看restartyes是否有效果使用tran仿真来寻找DC点请参考后面②一般来说当DC不收敛而且不收敛不是由于拓扑结构元件参数等原因引起地时候采用地方法是逐渐地DC扫描某些参数比如说sourcegminbf等等或者是采用瞬态分析扫描时间.也就是所谓地连续性方法. 13. 如何改善DC地精度①影响地原因2个gmin和收敛准则 1 对于某些电路利用节点上存储地电荷工作节点希望它浮空比如说电荷存储器件不能容忍通过gmin损失地电荷这种情况下应该设置gmin0.不过这样可能导致Jacobi距阵奇异. 2 牛顿残余收敛准则针对地是KCL定律相当于节点电流有一点地误差不守恒.对于高阻抗节点即是小地电流误差会导致很大电压误差②解决方法减小reltol这是通用方法同时保持iabstol和vabstol合理使用nodeset如果gmin影响则设置gmin0 14. restarting from a previous solution关于restart地设置问题仿真A 仿真B 初始值1-------------gt初始值2----------------gt ①如果初始值1是正确合理地而仿真A改变了初始值1比如说瞬态仿真即2≠1那么仿真B应该从1启动因此必需设置restartyes.典型地例子是先仿DC再仿Tran再仿AC.由于Tran 改变了DC地工作点因此AC仿真就不正确了默认从2启动此时再AC中要设置restartyes此时从1启动②如果是扫描过程比如说参数扫描寻找DC工作点那么2才是合理需要地因此仿真应该从2启动因此设置restartno默认是no 7Designers-Guide to Spice and Spectre 1995 USA 15. 极小地浮空电阻使得KCL不满足absolute convergence criteria再spice中没有关于KCL地收敛准则因此极不可靠.spectre两个都有可靠 1.3 AC分析包括XFnoisesppz等 1. DC分析地最大问题convergence Tran分析地最大问题accuracy AC分析由于是线性分析没有上面地问题 2. 谈谈AC和XF地地不同①应该说差别很大. ② AC单个激励源→任何节点和支路 XF多个独立激励源→单个节点或者支路一般是输出③研究表明当AC中存在多个激励源时多个激励源彼此共同作用任何节点和支路都是这些激励源共同作用地结果.而当XF中存在多个激励源时多个激励源彼此是独立地没有共同作用也就是说你想看哪个节点到输出地传输函数那么就只有该节点地激励源起作用产生输出而其它地激励源不起作用. ④上面说地很明显了当有多个激励源需要同时作用时候比如说多个噪声源地贡献那么你只能用AC.但是当需要同时得到电路不同地方地激励源到输出地传输函数地时候相当于电路中有多个激励但要求彼此独立互不影响则只能用XF. 3. AC分析地不足由于是线性分析没法考虑电路地时变、非线性造成地失真、频率转换等特性这些再spectreRF里面考虑了 4. 如何创建有噪声和无噪声地元件①无噪声地电阻用受控源VCCSCCVS来创建将受控源地输入和输出连起来根据IV关系建立②噪声电压和噪声电流用电阻去控制VCVS或者VCCS 得到噪声电压和噪声电流不过是白色地.如果用RC并联去控制VCVS或者VCCS得到噪声电压和噪声电流此时是有色地. 5. noise分析噪声很大地局限性①由于是基于直流工作点地线性展开分析没有考虑非线性和时变性影响得出地噪声非常不准确忽略了很多效应噪声折叠周期平稳效应.比如说对于简单差动运放尾电流地噪声也不能得出正确地结果因为noise分析差动地噪声为0显然不对②改用PSSPnoise分析 6. AC分析应用到实际地反馈放大器电路单个运放采用ideal_balun仿真①刻画反馈环路地4个参数闭环增益A开环增益a环路增益T反馈系数f 8 Designers-Guide to Spice and Spectre 1995 USA ②对于理想反馈系统 ///oioefefASSaSSTSSfSS/o ③对于实际反馈运放由于opamp 和feedback networks具有有限地输入、输出负载以及输入和输出相互耦合导致地前馈和反馈通路使得反馈系统地参数测量非常困难.总结为两条负载效应loading输入输出非单向化unidirectional ④永远要记得除非反馈回路中所有模块都是理想地无负载效应单向化地才能用每个模块地性能参数计算得到反馈系统地4个参数.由于负载效应和非单向化效应实际反馈回路地4个参数只能通过测试得到不能通过每个模块地性能参数计算得到. ⑤断开反馈环路测试4个参数是愚蠢地不可行地因为断开反馈回路意味着破坏了反馈回路地负载效应和直流工作点测得地参数当然不是实际反馈回路真正地性能参数了.真正实践中反馈环路永远不能断开. ⑥某些方法比如说AC Switch方法等等在低频下得到较好地结果.但是在高频下由于寄生电容电感地负载效应和耦合效应非常严重任何对反馈环路做一点点物理上地改变地方法都得到不准确地结果. ⑦最准确地方法作了如下定义运放包含所有前馈通路包括运放、反馈反馈包括所有反馈通路包括运放、反馈 loading effects全部纳入运放地输入输出端中包括运放、反馈导出4个有效参数注意和前面定义地理想参数区别开来 effective open-loop gain/feedback factor/closed-loop gain/loop gain ⑧计算公式对于series-series结构而言2111222112112212112221122112112221zzzzzazzzfzzzzzzTzzAz−−−− 7. 关于反馈地4种结构地讨论①前提反馈地输入要sense电压则必需并联到运放地输出端反馈地输入要sense电流则必需串联到运放地输出端.反馈地输出要feedback电压则必需串联到运放地输入端反馈地输出要feedback电流则必需并联到运放地输入端. ②正是由于电压和电流地sense和feedback地不同要求使得反馈地4种结构如 9Designers-Guide to Spice and Spectre 1995 USA 下 series⎯series输入为电压输出为电流 shunt⎯shunt输入为电流输出为电压 series⎯shunt输入为电压输出为电压 shunt⎯series输入为电流输出为电压很明显我们通常地反馈型OTA运算放大器属于series⎯shunt型地采用G参数描述H参数测试③反馈对输入输出阻抗地影响串联总是使阻抗减小并联总是使阻抗增大.根据这个结论可以得到 series⎯series输入高阻抗输出高阻抗 shunt⎯shunt输入低阻抗输出低阻抗 series⎯shunt输入高阻抗输出低阻抗 shunt⎯series输入低阻抗输出高阻抗 8. 运算跨导放大器性能参数地测试① OTA地性能参数有如下一些总共26个参数 1 工艺电源电压功耗输入失调电压输入共模范围输出摆幅 2 单位增益带宽GBW相位裕度PM共模输入共模输出等效噪声噪声系数差模输入差模输出等效噪声噪声系数 3 差模增益Av共模增益Acm共模到差模地转换增益Acm-dm用Av去除可以导出共模抑制比差模到共模地转换增益Adm-cm电源到输出差模地转换增益用Av去除可以导出电源抑制比PSRR地到输出差模地转换增益用Av去除可以导出电源抑制比PSRR−电源到输出共模地增益地到输出共模地增益 4 输入共模阻抗输入差模阻抗输出共模阻抗输出差模阻抗 5 压摆率SRSR−谐波失真THD线性度IPn 10 Designers-Guide to Spice and Spectre 1995 USA 输入差模输入共模输出共模输出差模AC参数有12个VDDGND 1.4 Transient Analysis 1. 数值积分方法forward Euler backward Euler trapezoidal method梯形方法 backward difference formulasGear’s method ① Forward and backward Eul er是1步1阶方法 Trapezoidal。

集成电路器件及SPICE模型

• 改进的EM模型采用电荷控制观点，增加电容到模型中。
• 进一步考虑到发射极、基极和集电极串联电阻，以及集成电路中集电结对衬底的电容，于是得到EM2模型。
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EM2模型
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EM小信号等效电路
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双极型晶体管SPICE模型参数
参数饱和电流正向电流增益反向电流增益正向欧拉电压反向欧拉电压 B-E结梯度因子 B-C结梯度因子
集成电路器件及SPICE 模型
路漫漫其修远兮, 吾将上下而求索
2020年4月9日星期四
第六章集成电路器件及SPICE模型
6.1 无源器件结构及模型 6.2 二极管电流方程及SPICE模型 6.3 双极晶体管电流方程及SPICE模型 6.4 结型场效应管JFET模型 6.5 MESFET模型 6.6 MOS管电流方程及SPICE模型 6.7 SPICE数模混合仿真程序的设计流程及方法
SPICE中的双极型晶体管常用两种物理模型 • Ebers-Moll（即EM）模型 • Gummel-Poon（即GP）模型模型参数能较好地反映物理本质且易于测量。
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EM直流模型
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NPN
• 将电流增益作为频率的函数来处理，对计算晶体管存贮效应和瞬态特性不方便。
双极型晶体管GP模型
• 1970年由H．K．Gummel和H．C．Poon提出的。 • GP模型对EM2模型在以下几方面作了改进：
1. 直流特性：反映了集电结上电压的变化引起有效基区宽度变化的基区宽度调制效应，改善了输出电导、电流增益和特征频率。反映了共射极电流放大倍数β随电流和电压的变化。

集成电路器件及SPICE模型通用课件

晶体管SPICE模型包括基极、集电极和发射极的电流电压关系，以及不同工作区的特性，用于模拟晶体管在电路中的行为。
场效应管的SPICE模型
场效应管SPICE模型是模拟场效应管特性的数学模型。
场效应管SPICE模型包括沟道电流、阈值电压等参数，用于模拟场效应管在电路中的行为。
集成电路器件SPICE模型的参数提取与优化
异构集成与三维集成中的SPICE模型挑战
随着集成电路技术的发展，异构集成和三维集成已经成为趋势。在异构集成和三维集成中，不同材料和器件之间的相互作用和耦合效应更加复杂，因此需要更加精细的SPICE模型来模拟。
现有的SPICE模型主要是针对单一器件或单一材料的仿真而设计的，因此在异构集成和三维集成中需要进行改进和扩展。这需要研究新的建模方法和参数提取技术，以适应不同材料和器件之间的耦合效应。
电阻器
电阻器是限流元件，用于调节电路中的电流和电压，分为线绕、薄膜和厚膜电阻器等类型。
电容器
电容器是储能元件，用于隔直、滤波和旁路等作用，分为陶瓷、
薄膜和电解电容器等类型。
集成电路器件的工作原理
双极型晶体管工作原理
双极型晶体管利用载流子的扩散与漂移运动控制电流，具有电流放大作用。
二极管工作原理
优化设计
基于SPICE模型的仿真结果，可以对电路设计进行优化，改进电路的性能指标，降低功耗和提高稳定性。
元件匹配与版图布局
元件匹配
SPICE模型可以模拟元件之间的匹配情况，帮助设计者找到元件的最佳配置，以确保电路性能的稳定。
版图布局
利用SPICE模型进行版图布局的模拟，可以预测元件之间的耦合效应和信号干扰，从而优化版图设计。
VS
效率

Spice 模拟电路用户指南

目录一、分析的类型 (3)1.直流分析 (3)2.交流小信号分析 (3)3.瞬态分析 (3)4.温度分析 (3)二、收敛性 (4)三、输入格式 (5)四、电路描述 (5)五、标题卡、结束卡和注释卡 (5)1.标题卡 (5)2.结束卡 (6)3.注释卡 (6)六、元件卡 (6)1.电阻 (6)2.电容和电感 (6)3.耦合电感 (6)4.无损耗传输线 (6)5.独立源 (7)A：脉冲源 (7)B：正弦源 (7)C：指数源 (7)D：分段线形源 (8)E：单频频率调制源 (8)6.线形受控源 (8)A：线形电压控制电流源 (8)B：线形电压控制电压源 (8)C：线形电流控制电流源 (8)D：线形电流控制电压源 (8)7.半导体器件 (9)A：结型二极管 (9)B：双极型晶体管 (9)C：结型场效应晶体管 (9)D：MOS场效应晶体管 (9)E：模型卡 (10)七、子电路 (10)1.子电路卡片 (10)2.终止卡 (10)3.子电路调用 (11)八、控制卡 (11)1.温度卡 (11)2.宽度卡 (11)3.可选项卡 (11)4.工作点卡 (11)5.直流卡 (11)6.节点电压设置卡 (11)7.初始条件卡 (12)8.转移函数卡 (12)9.灵敏度卡 (12)10.交流卡 (12)11.失真卡 (13)12.噪声卡 (13)13.瞬态分析卡 (13)14.傅立叶分析卡 (13)15.打印卡 (14)16.绘图卡 (14)附1：.OPTION可选项 (15)附2：三大分析流程 (16)Spice 通用电路模拟电路用户指南一、分析的类型1. 直流分析SPICE的直流分析用来决定电路的直流工作点，这时，电路中电感短路、电容开路。

在进行瞬态分析之前，SPICE会自动先运行直流分析，用以决定瞬态的初始条件；同样，在交流小信号分析之前，也先自动运行直流分析，以决定非线性器件的线性化小信号模型参数。

也可用直流分析来产生直流转移曲线，即在用户规定的范围内直流输出变量值与某个指定的独立电压源或电流源步进变化之间的对应关系曲线。

实验二 GTO、MOSFET、GTR、IGBT驱动与保护电路实验V1.0版

实验二 GTO、MOSFET、GTR、IGBT驱动与保护电路实验一、实验目的(1)理解各种自关断器件对驱动与保护电路的要求。

(2)熟悉各种自关断器件的驱动与保护电路的结构及特点。

(3)掌握由自关断器件构成PWM直流斩波电路原理与方法。

二、实验所需挂件及附件序号型号备注1 PE-01电源控制屏该控制屏包含“单相自藕调压器”，“整流滤波”等几个模块。

2 PE-14功率器件驱动与保护电路(一) 该挂件包含“IGBT”以及“MOSFET”等。

3 PE-15功率器件驱动与保护电路(二)该挂件包含“GTR”以及“GTO”等。

4 双踪示波器自备5 万用表自备三、实验线路及原理实验接线及实验原理图如图5-2所示，图中直流电源可由控制屏上的直流电压提供(小容量)，或由控制屏上三相交流电源经整流滤波后输出(大容量)，直流电压、电流表及限流电阻R 均从电源控制屏上取，限流电阻将两个900Ω接成并联形式(或使用PE-25上的灯泡)。

控制部分共分为五部分内容，PWM发生电路、IGBT驱动保护电路、MOSFET驱动保护电路、GTO驱动保护电路及GTR驱动保护电路；其中前三个电路在PE-14挂件上，剩下部分在PE-15挂件上。

图5-2 自关断器件的实验接线及原理图四、实验内容(1)GTR的驱动与保护电路实验(2)GTO的驱动与保护电路实验(3)MOSFET的驱动与保护电路实验(4)IGBT的驱动与保护电路实验(5)研究PWM的工作频率对驱动电路的影响五、实验方法(1)GTR的驱动与保护电路实验把PE-14挂件上的PWM发生电路中的频率选择开关拨至“低频档”。

然后调节频率电位器RP1，使PWM波输出频率在“200Hz”左右。

驱动与保护电路接线时，要注意控制电源及接地的正确连接。

对于GTR器件，采用±5V电源驱动；接线时，将PE-14上的PWM波形输出端接PE-15上的GTR驱动模块的输入端，GTR所需的±5V电源也从PE-14取。

跨导运算放大器及其Spice电路模型的构建

2.1 CMOS模拟集成电路基本单元2.1.1 MOS场效应管的基本结构绝缘栅场效应管又叫作MOS场效应管，意为金属-氧化物-半导体场效应管。

图2.1为MOS场效应管的结构和电路符号。

图中的N型硅衬底是杂质浓度低的N型硅薄片。

在它上面再制作两个相距很近的P区，分别引为漏极和源极，而由金属铝构成的栅极则是通过二氧化硅绝缘层与N型衬底及P型区隔离。

这也是绝缘栅MOS场效应管名称的由来。

因为栅极与其它电极隔离，所以栅极是利用感应电荷的多少来改变导电沟道去控制漏源电流的。

MOS场效应管的导电沟道由半导体表面场效应形成。

栅极加有负电压，而N型衬底加有正电压。

由于铝栅极和N型衬底间电场的作用，使绝缘层下面的N型衬底表面的电子被排斥，而带正电的空穴被吸引到表面上来。

于是在N型衬底的表面薄层形成空穴型号的P型层，称为反型层，它把漏源两极的P区连接起来，构成漏源间的导电沟道。

沟道的宽窄由电场强弱控制。

MOS场效应管的栅极与源极绝缘，基本不存在栅极电流，输入电阻非常高。

[20,21]图2.1MOS场效应管的结构和电路符号Fig.2.1 Structure and circuit symbol that MOS Field-Effect Transistor 场效应管有P型和N型之分。

这里的P型或N型，指的是导电沟道是P型还是N 型，即导电沟道中是空穴导电还是电子导电。

因为场效应管中只有一种载流子参加导电，所以又常称为“单极型晶体管”。

P型沟道和N型沟道的MOS场效应管又各分为“耗尽型”和“增强型”两种。

耗尽型指栅极电压为零时，就存在导电沟道，漏源中间有一定电流。

增强型MOS场效应管，则只有在栅极电压大于零的情况下，才存在导电沟道。

2.1.2 MOS场效应管的模型化MOS管的大信号（直流）特性可以用它的电流方程来描述。

以N沟道增强型MOS管为例，特性曲线和电流方程如图2.2所示。

图2.2 特性曲线和电流方程Fig.2.2 Characteristic property curve and electric current equation如果栅源偏置电压GS V 大于MOS 管的阈值电压T V ，则在P 型衬底的表面由于静电感应会产生大量的电子，形成导电沟道。

GTO的基本结构和工作原理

门极可断晶闸管(gate turn-off thyristor,GTO)是一种具有自断能力的晶闸管。

处于断态时，如果有阳极正向电压，在其门极加上正向触发脉冲电流后，GTO 可由断态转入通态，已处于通态时，门极加上足够大的反向脉冲电流，GTO 由通态转入断态。

由于不需用外部电路强迫阳极电流为0而使之关断，仅由门极加脉冲电流去关断它；所以在直流电源供电的DC—DC，DC—AC变换电路中应用时不必设置强迫关断电路。

这就简化了电力变换主电路，提高了工作的可靠性，减少了关断损耗，与SCR相比还可以提高电力电子变换的最高工作频率。

因此，GTO是一种比较理想的大功率开关器件。

一、结构与工作原理1、结构GTO是一种PNPN4层结构的半导体器件，其结构、等效电路及图形符号示于图1中。

图1中A、G和K分别表示GTO的阳极、门极和阴极。

α1为P1N1P2晶体管的共基极电流放大系数，α2为N2P2N1晶体管的共基极电流放大系数，图1中的箭头表示各自的多数载流子运动方向。

通常α1比α2小，即P1N1P2晶体管不灵敏，而N2P2N1晶体管灵敏。

GTO导通时器件总的放大系数α1+α2稍大于1，器件处于临界饱和状态，为用门极负信号去关断阳极电流提供了可能性。

普通晶闸管SCR也是PNPN4层结构，外部引出阳极、门极和阴极，构成一个单元器件。

GTO称为GTO元，它们的门极和阴极分别并联在一起。

与SCR不同，GTO是一种多元的功率集成器件，这是为便于实现门极控制关断所采取的特殊设计。

GTO的开通和关断过程与每一个GTO元密切相关，但GTO元的特性又不等同于整个GTO器件的特性，多元集成使GTO的开关过程产生了一系列新的问题。

2、开通原理由图1（b）所示的等效电路可以看出，当阳极加正向电压，门极同时加正触发信号时，GTO导通，其具体过程如图2所示。

显然这是一个正反馈过程。

当流入的门极电流I G足以使晶体管N2P2N1的发射极电流增加，进而使晶体管P1N1P2的发射极电流也增加时，α1和α2增加。

15全控器件GTR,GTO

off
I ATO I GM
（14-1）
off一般很小，只有5左右，这是GTO的一个主要缺点。
1000A的GTO关断时门极负脉冲电流峰值要200A 。
10
三、电力晶体管
术语用法：
电力晶体管（Giant Transistor——GTR，直译为巨型晶体管）。
耐高电压、大电流的双极结型晶体管（Bipolar Junction Transistor——BJT），英文有时候也称为Power BJT。
13
2. GTR的基本特性
(1) 静态特性共发射极接法时的典型输出特性：截止区Ib、Ube≤0，Ubc＜0，只有漏电流； Ic 放大区Ib、Ube＞0， Ubc ＜0， IC＝ Ib ；饱和区Ib ＞
耗也不大。 Ics/ , Ube ＞0 ， Ubc ＞0饱和时两个PN结都正偏， Uces很小，I即使很大，损
应用
20 世纪 80 年代以来，在中、小功率范围内取代晶闸管，但目前又大多被 IGBT 和电力 MOSFET取代。
11
三、电力晶体管
1. GTR的结构和工作原理
图14-4 GTR的结构、电气图形符号和内部载流子的流动
a) 内部结构断面示意图 b) 电气图形符号 c) 内部载流子的流动
与普通的双极结型晶体管基本原理是一样的。主要特性是耐压高、电流大、开关特性好。通常采用至少由两个晶体管按达林顿接法组成的单元结构。采用集成电路工艺将许多这种单元并联而成。
图14-2
晶闸管的双晶体管模型及其工作原理
由P1N1P2和N1P2N2构成的两个晶体管V1、V2分别具有共
基极电流增益1和2 。
1+2=1是器件临界导通的条件。

电力电子开关器件仿真模型比较

电力电子开关器件仿真模型比较张薇琳张波丘东元褚利丽（广州华南理工大学电力学院，广东广州510640）Modeling of Power Electronic DevicesZhang Wei-lin, Zhang Bo, Qiu Dong-yuan, Chu Li-li(College of Electric Engineering, South China University of Technology, Guangzhou, 510640, China)摘要：电力电子开关器件的模型建立一直是一个研究难点，其真实性和精确性是衡量建模的标准。

本文对基本电力电子开关器件如二极管、GTO、晶闸管、MOSFET和IGBT的现有仿真模型进行了归纳和总结，并比较了各种器件不同模型之间的优缺点和适用场合，由此为电力电子开关器件的分析提供研究基础。

关键字：功率二极管；GTO；晶闸管；MOSFET；IGBT；仿真模型Abstract: There is always a difficulty in modeling of power electronic devices, with the validity and accuracy as its judgment. This paper reviews generic modeling approaches and simulations of some power electronic devices, including power diode, GTO, thyristor, MOSFET and IGBT. Their basic principles are described and their merits and limitations are remarked, which provides a basis for analysis of power electronic devices.Key words: power diode, GTO, thyristor, MOSFET, IGBT, simulation model1引言电力电子技术包括功率半导体器件与IC技术、功率变换技术及控制技术等几个方面，其中电力电子器件是电力电子技术的重要基础，也是电力电子技术发展的“龙头”。