miniIMU Schematic
电力电子仿真SimPowerSystems入门6of10
SimPowerSystems的电机这是个人笔记,如果有不满意或者希望增加的内容,请给我发私信或留言,我会做出相应的修改,或者增加一些内容。
如果有你认为错误的地方,欢迎发私信或留言讨论。
我们来看一下SimPowerSystems里面的电机。
Synchronous machine:同步电机,也就是转子的转速跟电频率同步,倍率取决于极对数,1个磁极对电频跟机械转动频率一致;2个磁极对数电频为机械转动频率的2倍。
Asynchronous machine:异步电机,一般电机都有扭矩输出,异步电机的转子转动频率永远都会比电频率低点,也就是会有滑移率。
一般输出的扭矩越大,滑移率也就越大。
传统的SimPowerSystems里面的模块都是使用Simulink模块搭建起来的,教材上的标准方程。
稳态初始化现在,我们来看一个极其简单的例子,如下图:左边同步电机。
右边的三个电压源简化模拟功率无穷大的节点,不论网路中有功无功功率如何变化,始终保持电压不变。
电机的两个输入Pm,Vf都是pu单位制。
假设电机参数如下,假设初始化参数都是0,除了Vf(field voltage)。
仿真5个周期(仿真时间设置为5/60),可以看到转子转速下降。
给定的输入机械能1PU,相当于187MW。
但这个187MW的系统中还存在着能量损失,我们提供的机械能不足,电频率下降。
三相电流如图,并不稳定:下面我们来看潮流计算load flow calculation,我们需要提供多大的输入以及设置电机正确的稳态运行值。
打开powergui的初始化菜单,得到右侧的窗口:右侧窗口显示模型里所有Machine的信息,我们这里只有一个电机。
可以看到一些信息,比如Nominal power, Nominal voltage,三相电压120度相角差,电流为0等等。
右侧的节点类型Bus type,有三种可以选择:P&V generator设置有功功率和电机的端电压,让潮流算法来确定无功功率是多少;P&Q generator设置有功功率和无功功率,让算法来计算端电压是多少;Swing bus就是在有多个Machine时,比如X个,那么就可以指定X-1个Machine的P 和Q,剩下这个就根据平衡来计算。
测井曲线代号-英文解释-汉语对照
测井曲线代号-英文解释-汉语对照测井符号英文名称中文名称Rt true formation resistivity. 地层真电阻率Rxo flushed zone formation resistivity 冲洗带地层电阻率Ild deep investigate induction log 深探测感应测井Ilm medium investigate induction log 中探测感应测井Ils shallow investigate induction log 浅探测感应测井Rd deep investigate double lateral resistivity log 深双侧向电阻率测井Rs shallow investigate double lateral resistivity log 浅双侧向电阻率测井RMLL micro lateral resistivity log 微侧向电阻率测井CON induction log 感应测井AC acoustic 声波时差DEN density 密度CN neutron 中子GR natural gamma ray 自然伽马SP spontaneous potential 自然电位CAL borehole diameter 井径K potassium 钾TH thorium 钍U uranium 铀KTH gamma ray without uranium 无铀伽马NGR neutron gamma ray 中子伽马5700系列的测井项目及曲线名称Star Imager 微电阻率扫描成像CBIL 井周声波成像MAC 多极阵列声波成像MRIL 核磁共振成像TBRT 薄层电阻率DAC 阵列声波DVRT 数字垂直测井HDIP 六臂倾角MPHI 核磁共振有效孔隙度MBVM 可动流体体积MBVI 束缚流体体积MPERM 核磁共振渗透率Echoes 标准回波数据T2 Dist T2分布数据TPOR 总孔隙度BHTA 声波幅度BHTT 声波返回时间Image DIP 图像的倾角COMP AMP 纵波幅度Shear AMP 横波幅度COMP ATTN 纵波衰减Shear A TTN 横波衰减RADOUTR 井眼的椭圆度Dev 井斜ASN Amplified Short Normal:放大的短常规(标准测井CALI Caliper:井径CLID Deep Induction Standard Processed Conductivity:深感应(深感应标准电导率测井CLIM Medium Induction Standard Processed Conductivity:中感应DPHI Density Porosity:密度(孔隙度DT Delta-T:GR Gamma Ray:自然伽玛ILD Deep Induction Standard Processed Resistivity:深感应电阻率ILM Medium Induction Standard Processed Resistivity:中感应电阻率LAT Lateral:侧向(测井LLD Latero-Log Deep Resistivity):深侧向LLS Latero-Log Shallow Resistivity :浅侧向LN Long Normal:长常规测井(长标准测井NEUT Neutrons:中子(测井NPHI Neutron Porosity:中子孔隙度RHOB Bulk Density:体积密度(测井SFL Spherically Focussed Log:球形聚焦测井SFLA SFL Resistivity Averaged):球形聚焦平均电阻率测井SFLU SFL Resistivity Unaveraged):球形聚焦非平均电阻率测井SN Short Normal:短常规测井(短标准测井SP Spontaneous Potential:自然电位SPHI Sonic Porosity:声波孔隙度TVD 垂深Coaf 煤。
伪随机编码磁性源瞬变电磁发射技术及电磁响应分析
第51卷第5期2020年5月中南大学学报(自然科学版)Journal of Central South University(Science and Technology)V ol.51No.5May2020伪随机编码磁性源瞬变电磁发射技术及电磁响应分析石琦1,2,3,刘丽华1,2,倪志康1,2,3,刘小军1,2,方广有1,2(1.中国科学院空天信息创新研究院,北京,100000;2.电磁辐射与探测技术院重点实验室,北京,100000;3.中国科学院大学电子电气与通信工程学院,北京,100000)摘要:为了设计一种伪随机编码磁性源瞬变电磁系统,从关键技术和电磁理论方面讨论该系统的设计与该系统在均匀半空间大地模型下所使用的正反演方法。
首先对比分析4种伪随机编码的特性,从中选择m序列作为系统的激励信号;然后,基于有源恒压钳位技术设计系统发射电路,正演出实测数据的电磁响应。
根据m序列伪随机编码系统辨识理论,响应波形经预处理后得到大地脉冲响应估计值并与标准值比较。
研究结果表明:该磁性源瞬变电磁系统可以克服感性负载的阻碍作用,发射出波形质量高的伪随机编码电流;若电流波形的自相关性好,即使电流波形出现一定程度失真,仍可以获得与理论值很接近的大地脉冲响应估计值,预处理结果不完全依赖伪随机编码电流波形。
关键词:伪随机编码;磁性源;瞬变电磁;辨识方法;维纳滤波中图分类号:P631文献标志码:A文章编号:1672-7207(2020)05-1268-11Pseudo-random coded magnetic source transient electromagnetic emission technology and electromagnetic response analysisSHI Qi1,2,3,LIU Lihua1,2,NI Zhikang1,2,3,LIU Xiaojun1,2,FANG Guangyou1,2(1.Aerospace Informatory Research Institute,Chinese Academy of Sciences,Beijing100000,China;2.Key Laboratory of Electromagnetic Radiation and Sensing Technology,Beijing100000,China;3.School of Electronic Electrical and Communication Engineering,University of Chinese Academy of Sciences,Beijing100000,China)Abstract:In order to design a pseudo-random coded magnetic source transient electromagnetic system,the design of the system and the forward and inverse methods used by the system in a uniform half-space earth model were discussed from the perspective of key technologies and electromagnetic theory.First,the characteristics of the four kinds of pseudo-random codes were compared and analyzed,and the m sequence was selected as the excitation signal of the system.Then the system transmission circuit was designed based on the active constant voltage clamping technology to perform the electromagnetic response of the measured data.According to the identification DOI:10.11817/j.issn.1672-7207.2020.05.011收稿日期:2019−07−11;修回日期:2019−09−23基金项目(Foundation item):国家重点基础研究发展规划(973计划)项目(2018YFF01013300);国家自然科学基金资助项目(61827803)(Project(2018YFF01013300)supported by the National Basic Research Development Program(973Program)of China;Project(61827803)supported by the National Nature Science Foundation of China)通信作者:刘丽华,博士,副研究员,从事地球物理电磁法探测技术与系统设计研究;E-mail:*************第5期石琦,等:伪随机编码磁性源瞬变电磁发射技术及电磁响应分析theory of the m-sequence pseudo-random coding system,the response waveform was preprocessed to obtain the estimated value of the earth impulse response and compared with the standard value.The results show that the magnetic source transient electromagnetic system can overcome the obstruction of inductive loads and emit a pseudo-random coded current with high waveform quality;if the current waveform has good autocorrelation,and even if the current waveform is distorted to a certain degree,the estimated value of the earth impulse response that is very close to the theoretical value can be obtained,and the preprocessing result does not completely depend on the pseudo-random coding current waveform.Key words:pseudo-random coding;inductive load;transient electromagnetic;identification method;wiener filtering瞬变电磁法是目前广泛应用的重要电磁探测方法之一,根据负载形式不同,可分为接地长导线电性源瞬变电磁系统以及多匝回线磁性源瞬变电磁系统。
内嵌式永磁同步电机转子初始位置检测(英文)
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测井曲线对应英文
测井资料常用英文代码表Microlog 1 Microlog 2 Acousticlog Density Compensated Dual-Spacing Neutron Log Caliper Bit Size Gamma Ray-Natural Radioactivity Spontaneous Potential Deep Investigation Induction Log Midium Investigation Induction Log Laterolog 8 Micro-Sphericlly Focused Log Laterolog Deep Laterolog Shallow Resistivity 4True Formation ResistivityResistivity 2.5 中子伽马 中子伽马 泥质含量 孔隙度 渗透率 含水饱和度 含油饱和度 束缚水饱和度 残余油饱和度 深侧向电阻率 LLD 浅侧向电阻率 LLS 4米梯度电阻率RT 地层真电阻率RT 感应电导率2.5 米梯 度电 阻率 R2.5 微梯度ML1 微电位ML2 声波时差AC 密度DEN 中子孔隙度CNL 井径CAL 钻头大小BS 自然伽马GR 自然电位SP 深感应电阻率ILD 中感应电阻率ILM 八侧向电阻率LL8 COND Conductivity NGR Neutron Gamma RaySH ShalePOR PorosityPERM PermeabilitySW Water SaturationSO Oil Saturation ofSWI Initial Water SaturationSOR Residual Oil Saturation微 球 形 聚 焦 电 阻 率 MSFL NEU Neutron斯仑贝谢 ( Schlumberger ) 常用英文缩写数控测井系统CSU Cyber Service Units 或Computerized Logging Units 声波时差DT Delta T密度RHOB Rho Bulk中子孔隙度NPHI Neutron Phi感应电导率CILD IL-Deep Conductivity井径CALS Caliper Size自然伽马能谱NGS Natural Gamma Ray Spectrolog铀URAN Uranium钍THOR Thorium钾POTA Potassium高分辨率地层倾角仪HDT High Resolution Dipmeter Tool地层学高分辨率地层倾角仪SHDT Stratigraphy High Resolution Dipmeter Tool地层压力RFT Repeat Formation Tester波形WF Wave Form微电阻率成像FMI Fullbore Formation Micro Imager Tool 阵列感应成像AIT Array Induction Imager Tool方位侧向成像ARI Azimuthal Resistivity Imager Tool偶极声波成像DSI Dipole Shear Sonic Image Tool超声波成像USI Ultrasonic Imager Tool核磁共振CMR Combination Magnetic Resonance模块式地层动态测试仪MDT Modular Formation Dynamics Tester测井曲线名称汇总GRSL—能谱自然伽马POR 孔隙度NEWSANDPORW 含水孔隙度NEWSANDPORF 冲洗带含水孔隙度NEWSANDPORT 总孔隙度NEWSANDPORX 流体孔隙度NEWSANDPORH 油气重量NEWSANDBULK 出砂指数NEWSANDPERM 渗透率NEWSANDSW 含水饱和度NEWSANDSH 泥质含量NEWSANDCALO 井径差值NEWSANDCL 粘土含量NEWSANDDHY 残余烃密度NEWSANDSXO 冲洗带含水饱和度NEWSANDDA 第一判别向量的判别函数NEWSAND DB 第二判别向量的判别函数NEWSAND DAB 综合判别函数NEWSANDCI 煤层标志NEWSANDCARB 煤的含量NEWSANDTEMP 地层温度NEWSANDQ 评价泥质砂岩油气层产能的参数NEWSANDPI 评价泥质砂岩油气层产能的参数NEWSAND SH 泥质体积CLASSSW 总含水饱和度CLASSPOR 有效孔隙度CLASSPORG 气指数CLASSCHR 阳离子交换能力与含氢量的比值CLASS CL 粘土体积CLASSPORW 含水孔隙度CLASSPORF 冲洗带饱含泥浆孔隙度CLASSCALC 井径差值CLASSDHYC 烃密度CLASSPERM 绝对渗透率CLASSPIH 油气有效渗透率CLASSPIW 水的有效渗透率CLASSCLD 分散粘土体积CLASSCLL 层状粘土体积CLASSCLS 结构粘土体积CLASSEPOR 有效孔隙度CLASSESW 有效含水饱和度CLASSTPI 钍钾乘积指数CLASSPOTV 10 0%粘土中钾的体积CLASSCEC 阳离子交换能力CLASSQV 阳离子交换容量CLASSBW 粘土中的束缚水含量CLASSEPRW 含水有效孔隙度CLASSUPOR 总孔隙度,UPOR=EPOR+BW CLASS HI 干粘土骨架的含氢指数CLASSBWCL 粘土束缚水含量CLASSTMON 蒙脱石含量CLASSTILL 伊利石含量CLASSTCHK 绿泥石和高岭石含量CLASSVSH 泥质体积CLASSVSW 总含水饱和度CLASSVPOR 有效孔隙度CLASSVPOG 气指数CLASSVCHR 阳离子交换能力与含氢量的比值CLASS VCL 粘土体积CLASSVPOW 含水孔隙度CLASSVPOF 冲洗带饱含泥浆孔隙度CLASSVCAC 井径差值CLASSVDHY 烃密度CLASSVPEM 绝对渗透率CLASSVPIH 油气有效渗透率CLASSVPIW 水的有效渗透率CLASSVCLD 分散粘土体积CLASSVCLL 层状粘土体积CLASSVCLS 结构粘土体积CLASSVEPO 有效孔隙度CLASSVESW 有效含水饱和度CLASSVTPI 钍钾乘积指数CLASSVPOV 100%粘土中钾的体积CLASSVCEC 阳离子交换能力CLASSVQV 阳离子交换容量CLASSVBW 粘土中的束缚水含量CLASSVEPR 含水有效孔隙度CLASSVUPO 总孔隙度CLASSVHI 干粘土骨架的含氢指数CLASSVBWC 粘土束缚水含量CLASSVTMO 蒙脱石含量CLASSVTIL 伊利石含量CLASSVTCH 绿泥石和高岭石含量CLASSQW 井筒水流量PLIQT 井筒总流量PLISK 射孔井段PLIPQW 单层产水量PLIPQT 单层产液量PLIWEQ 相对吸水量ZRPM PEQ 相对吸水强度ZRPM POR 孔隙度PRCO PORW 含水孔隙度PRCO PORF 冲洗带含水孔隙度PRCO PORT 总孔隙度PRCO PORX 流体孔隙度PRCO PORH 油气重量PRCO BULK 出砂指数PRCO HF 累计烃米数PRCO PF 累计孔隙米数PRCO PERM 渗透率PRCO SW 含水饱和度PRCO SH 泥质含量PRCO CALO 井径差值PRCO CL 粘土含量PRCO DHY 残余烃密度PRCO SXO 冲洗带含水饱和度PRCO SWIR 束缚水饱和度PRCO PERW 水的有效渗透率PRCOPERO 油的有效渗透率PRCOKRW 水的相对渗透率PRCOKRO 油的相对渗透率PRCOFW 产水率PRCOSHSI 泥质与粉砂含量PRCOSXOF 199*SXO PRCOSWCO 含水饱和度PRCOWCI 产水率PRCOWOR 水油比PRCOCCCO经过PORT校正后的C/ O值PRCOCCSC经过PORT校正后的SI/CA值PRCOCCCS经过PORT校正后的CA/SI值PRCODCO油水层C/ O差值PRCOXIWA 水线视截距PRCOCOWA 视水线值PRCOCONM 视油线值PRCOCPRW 产水率(C/ O计算)PRCOCOAL 煤层CRAOTHR 重矿物的百分比含量CRASALT 盐岩的百分比含量CRASAND 砂岩的百分比含量CRALIME 石灰岩的百分比含量CRADOLM 白云岩的百分比含量CRAANHY 硬石膏的百分比含量CRA ANDE 安山岩的百分比含量CRA BASD 中性侵入岩百分比含量CRA DIAB 辉长岩的百分比含量CRA CONG 角砾岩的百分比含量CRA TUFF 凝灰岩的百分比含量CRA GRAV 中砾岩的百分比含量CRA BASA 玄武岩的百分比含量CRA常用测井曲线名称A1R1 T1R1 声波幅度A1R2 T1R2 声波幅度A2R1 T2R1 声波幅度A2R2 T2R2 声波幅度AAC 声波附加值AAVG 第一扇区平均值AC 声波时差AF10 阵列感应电阻率AF20 阵列感应电阻率AF30 阵列感应电阻率AF60 阵列感应电阻率AF90 阵列感应电阻率AFRT 阵列感应电阻率AFRX 阵列感应电阻率AIMP 声阻抗AIPD 密度孔隙度AIPN 中子孔隙度AMAV 声幅AMAX 最大声幅AMIN 最小声幅AMP1 第一扇区的声幅值AMP2 第二扇区的声幅值AMP3 第三扇区的声幅值AMP4 第四扇区的声幅值AMP5 第五扇区的声幅值AMP6 第六扇区的声幅值AMVG 平均声幅AO10 阵列感应电阻率AO20 阵列感应电阻率AO30 阵列感应电阻率AO60 阵列感应电阻率AO90 阵列感应电阻率AOFF 截止值AORT 阵列感应电阻率AORX 阵列感应电阻率APLC 补偿中子AR10 方位电阻率AR11 方位电阻率AR12 方位电阻率ARO1 方位电阻率ARO2 方位电阻率ARO3 方位电阻率ARO4 方位电阻率ARO5 方位电阻率ARO6 方位电阻率ARO7 方位电阻率ARO8 方位电阻率ARO9 方位电阻率AT10 阵列感应电阻率AT20 阵列感应电阻率AT30 阵列感应电阻率AT60 阵列感应电阻率AT90 阵列感应电阻率ATAV 平均衰减率ATC1 声波衰减率ATC2 声波衰减率ATC3 声波衰减率ATC4 声波衰减率ATC5 声波衰减率ATC6 声波衰减率ATMN 最小衰减率ATRT 阵列感应电阻率ATRX 阵列感应电阻率AZ 1 号极板方位AZ1 1 号极板方位AZI 1 号极板方位AZIM 井斜方位BGF 远探头背景计数率BGN 近探头背景计数率BHTA 声波传播时间数据BHTT 声波幅度数据BLKC 块数BS 钻头直径BTNS 极板原始数据C1 井径C2 井径C3 井径CAL 井径CAL1 井径CAL2 井径CALI 井径CALS 井径CASI 钙硅比CBL 声波幅度CCL 磁性定位CEMC 水泥图CGR 自然伽马CI 总能谱比CMFF 核磁共振自由流体体积CMRP 核磁共振有效孔隙度CN 补偿中子CNL 补偿中子CO 碳氧比CON1 感应电导率COND 感应电导率CORR 密度校正值D2EC 200 兆赫兹介电常数D4EC 47 兆赫兹介电常数DAZ 井斜方位DCNT 数据计数DEN 补偿密度DEN_1 岩性密度DEPTH 测量深度DEV 井斜DEVI 井斜DFL 数字聚焦电阻率DIA1 井径DIA2 井径DIA3 井径DIFF 核磁差谱DIP1 地层倾角微电导率曲线1 DIP1_1 极板倾角曲线DIP2 地层倾角微电导率曲线2 DIP2_1 极板倾角曲线DIP3 地层倾角微电导率曲线3 DIP3_1 极板倾角曲线DIP4 地层倾角微电导率曲线4DIP4_1 极板倾角曲线DIP5 极板倾角曲线DIP6 极板倾角曲线DRH 密度校正值DRHO 密度校正值DT 声波时差DT1 下偶极横波时差DT2 上偶极横波时差DT4P 纵横波方式单极纵波时差DT4S 纵横波方式单极横波时差DTL 声波时差DTST 斯通利波时差ECHO 回波串ECHOQM 回波串ETIMD 时间FAMP 泥浆幅度FAR 远探头地层计数率FCC 地层校正FDBI 泥浆探测器增益FDEN 流体密度FGAT 泥浆探测器门限FLOW 流量FPLC 补偿中子FTIM 泥浆传播时间GAZF Z 轴加速度数据GG01 屏蔽增益GG02 屏蔽增益GG03 屏蔽增益GG04 屏蔽增益GG05 屏蔽增益GG06 屏蔽增益GR 自然伽马GR2 同位素示踪伽马HAZI 井斜方位HDRS 深感应电阻率HFK 钾HMRS 中感应电阻率HSGR 无铀伽马HTHO 钍HUD 持水率HURA 铀IDPH 深感应电阻率IMPH 中感应电阻率K 钾KCMR 核磁共振渗透率KTH 无铀伽马LCAL 井径LDL 岩性密度LLD 深侧向电阻率LLD3 深三侧向电阻率LLD7 深七侧向电阻率LLHR 高分辨率侧向电阻率LLS 浅侧向电阻率LLS3 浅三侧向电阻率LLS7 浅七侧向电阻率M1R10 高分辨率阵列感应电阻率M1R120 高分辨率阵列感应电阻率M1R20 高分辨率阵列感应电阻率M1R30 高分辨率阵列感应电阻率M1R60 高分辨率阵列感应电阻率M1R90 高分辨率阵列感应电阻率M2R10 高分辨率阵列感应电阻率M2R120 高分辨率阵列感应电阻率M2R20 高分辨率阵列感应电阻率M2R30 高分辨率阵列感应电阻率M2R60 高分辨率阵列感应电阻率M2R90 高分辨率阵列感应电阻率M4R10 高分辨率阵列感应电阻率M4R120 高分辨率阵列感应电阻率M4R20 高分辨率阵列感应电阻率M4R30 高分辨率阵列感应电阻率M4R60 高分辨率阵列感应电阻率M4R90 高分辨率阵列感应电阻率MBVI 核磁共振束缚流体体积MBVM 核磁共振自由流体体积MCBW 核磁共振粘土束缚水ML1 微电位电阻率ML2 微梯度电阻率MPHE 核磁共振有效孔隙度MPHS 核磁共振总孔隙度MPRM 核磁共振渗透率MSFL 微球型聚焦电阻率NCNT 磁北极计数NEAR 近探头地层计数率NGR 中子伽马NPHI 补偿中子P01 第1 组分孔隙度P02 第2 组分孔隙度P03 第3 组分孔隙度P04 第4 组分孔隙度P05 第5 组分孔隙度P06 第6 组分孔隙度P07 第7 组分孔隙度P08 第8 组分孔隙度P09 第9 组分孔隙度P10 第10 组分孔隙度P11 第11 组分孔隙度P12 第12 组分孔隙度P1AZ 1 号极板方位P1AZ_1 2号极板方位P1BTN 极板原始数据P2BTN 极板原始数据P2HS 200 兆赫兹相位角P3BTN 极板原始数据P4BTN 极板原始数据P4HS 47 兆赫兹相位角P5BTN 极板原始数据P6BTN 极板原始数据PAD1 1 号极板电阻率曲线PAD2 2 号极板电阻率曲线PAD3 3 号极板电阻率曲线PAD4 4 号极板电阻率曲线PAD5 5 号极板电阻率曲线PAD6 6 号极板电阻率曲线PADG 极板增益PD6G 屏蔽电压PE 光电吸收截面指数PEF 光电吸收截面指数PEFL 光电吸收截面指数PERM-IND 核磁共振渗透率POTA 钾PPOR 核磁T2 谱PPORB 核磁T2 谱PPORC 核磁T2 谱PR 泊松比PRESSURE 压力QA 加速计质量QB 磁力计质量QRTT 反射波采集质量R04 0.4 米电位电阻率R045 0.45 米电位电阻率R05 0.5 米电位电阻率R1 1米底部梯度电阻率R25 2.5 米底部梯度电阻率R4 4米底部梯度电阻率R4AT 200 兆赫兹幅度比R4AT_1 47 兆赫兹幅度比R4SL 200 兆赫兹电阻率R4SL_1 47 兆赫兹电阻率R6 6米底部梯度电阻率R8 8米底部梯度电阻率RAD1 井径(极板半径)RAD2 井径(极板半径)RAD3 井径(极板半径)RAD4 井径(极板半径)RAD5 井径(极板半径)RAD6 井径(极板半径)RADS 井径(极板半径)RATI 地层比值RB 相对方位RB_1 相对方位角RBOF 相对方位RD 深侧向电阻率RFOC 八侧向电阻率RHOB 岩性密度RHOM 岩性密度RILD 深感应电阻率RILM 中感应电阻率RLML 微梯度电阻率RM 钻井液电阻率RMLL 微侧向电阻率RMSF 微球型聚焦电阻率RNML 微电位电阻率ROT 相对方位RPRX 邻近侧向电阻率RS 浅侧向电阻率SDBI 特征值增益SFL 球型聚焦电阻率SFLU 球型聚焦电阻率SGAT 采样时间SGR 无铀伽马SICA 硅钙比SIG 井周成像特征值SIGC 俘获截面SIGC2 示踪俘获截面SMOD 横波模量SNL 井壁中子SNUM 特征值数量SP 自然电位SPER 特征值周期T2 核磁T2 谱T2-BIN-A 核磁共振区间孔隙度T2-BIN-B 核磁共振区间孔隙度T2-BIN-PR 核磁共振区间孔隙度T2GM T2 分布对数平均值T2LM T2 分布对数平均值TEMP 井温TH 钍THOR 钍TKRA 钍钾比TPOR 核磁共振总孔隙度TRIG 模式标志TS 横波时差TT1 上发射上接受的传播时间TT2 上发射下接受的传播时间TT3 下发射上接受的传播时间TT4 下发射下接受的传播时间TURA 钍铀比U 铀UKRA 铀钾比URAN 铀VAMP 扇区水泥图VDL 声波变密度VMVM 核磁共振自由流体体积VPVS 纵横波速度比WAV1 第一扇区的波列WAV2 第二扇区的波列WAV3 第三扇区的波列WAV4 第四扇区的波列WAV5 第五扇区的波列WAV6 第六扇区的波列WAVE 变密度图WF 全波列波形ZCORR 密度校正值测井曲线代码一览表常用测井曲线名称测井符号英文名称中文名称Rt true formation resistivity. 地层真电阻率Rxo flushed zone formationresistivity 冲洗带地层电阻率lid deep in vestigate in duction log 深探测感应测井Ilm medium investigate induction log 中探测感应测井lls shallow investigate induction log 浅探测感应测井Rd deepinvestigate double lateral resistivity log深双侧向电阻率测井Rs shallow investigate double 浅双侧向电阻率测井lateral resistivity log RMLL micro lateral resistivity log 微侧向电阻率测井CON induction log 感应测井AC acoustic 声波时差DEN density 密度CN neutron 中子常用测井曲线名称测井符号 英文名称 中文名称Rt true formation resistivity. 地层真电阻率Rxo flushed zone formation resistivity 冲洗带地层电阻率Ild deep investigate induction log 深探测感应测井Ilm medium investigate induction log 中探测感应测井Ils shallow investigate induction log 浅探测感应测井Rd deep investigate double lateral resistivity log 深双侧向电阻率测井 Rs shallow investigate double lateral resistivity log 浅双侧向电阻率测井 RMLL micro lateral resistivity log 微侧向电阻率测井CON induction log 感应测井AC acoustic 声波时差DEN density 密度CN neutron 中子 SP spontaneous potential自然电位CALborehole diameter 井径K potassium 钾TH thorium钍Uuranium 铀 KTHgamma ray without uranium 无铀伽马NGR neutron gamma ray中子伽马 GR natural gamma ray自然伽马GR natural gamma ray 自然伽马SP spontan eous pote ntial 自然电位CAL borehole diameter 井径K potassium 钾TH thorium 钍U uranium 铀KTH gamma ray without uranium 无铀伽马NGR neutron gamma ray 中子伽马5700 系列的测井项目及曲线名称Star Imager 微电阻率扫描成像CBIL 井周声波成像多极阵列声波成像MACMRIL 核磁共振成像TBRT 薄层电阻率DAC 阵列声波DVRT 数字垂直测井HDIP 六臂倾角MPHI 核磁共振有效孔隙度MBVM 可动流体体积MBVI 束缚流体体积MPERM 核磁共振渗透率Echoes 标准回波数据T2 Dist T2 分布数据TPOR 总孔隙度BHTA 声波幅度BHTT 声波返回时间Image DIP 图像的倾角COMP AMP 纵波幅度Shear AMP 横波幅度COMP ATTN 纵波衰减Shear ATTN 横波衰减RADOUTR 井眼的椭圆度Dev 井斜。
Ansoft12在工程电磁场中的应用
图20 相对坐标系统的建立
图21 永磁体属性设置
四、激励源与边界条件定义及加载
1.绕组分相,根据电机设计中绕组排列对三相永磁同步电机定 子槽中的绕组进行分相,各相正绕组用“Phase”表示,负绕 组用“Return”表示。按下图22所示进行分相。
图9 单个定子槽绕组模型
9. 执行Edit/Duplicate/Around Axis命令,沿轴复制,在 Axis选择沿z轴复制,相隔10°,进行36次复制。如图10所 示。
图10 定子槽绕组模型
10. 创建电机定子冲片模型。执行Draw/Circle命令,原点为(0, 0),半径为87mm,名字为“stator”。选择“slot”,利用 Modeler/Surface/Cover Lines生成面。 11.选择“stator”和“slot”,执行Modeler/Boolean/Substract 命令。得到定子模型,如图11所示。
图11 电机定子冲片模型
12. 创建永磁体。执行Draw/Line命令,分布输入(0,49), (0,54)。选择该直线,执行Draw/Sweep/Around Axis命令, 在“Sweep Around Axis”对话框中输入旋转角度为80 °,并 改名为“Permant”。 13.执行Edit/Duplicate/Around Axis命令,沿轴复制,在Axis 选择沿z轴复制,相隔90°,进行4次复制。如图12所示。
图12 永磁体模型
14. 创建电机转子冲片模型。执行Draw/Circle命令,原点为 (0,0),半径为49mm和19mm的两个圆,名字分别为 “rotor”和“rotor1”。 15.选择“rotor”和“rotor1”,执行 Modeler/Boolean/Substract命令,得到电机模型,如图13所 示。 16.利用图标 建立求解区域。
Simplex
Individually addressable manual fire alarm stations for releasing applications with:∙Power and data supplied via IDNet or MAPNET II addressable communications using a single wire pair∙Operation that complies with ADA requirements∙Visible LED indicator that flashes duringcommunications and is on steady when the station hasbeen activated∙Pull lever that protrudes when alarmed∙Break-rod supplied (use is optional)∙Dual action push and pull operation∙Label kit provides for six varieties of releasing applications (ordered separately)Compatible with the following Simplex® Releasing System control panels equipped with either IDNet or MAPNET II communications:∙Model Series 4100ES, 4010ES, and 4010∙Installed 4100, 4120, and 4020 systemsCompact construction:∙Electronics module enclosure minimizes dust infiltration ∙Allows mounting in standard electrical boxes∙Screw terminals for wiring connectionsTamper resistant reset key lock∙Locks are keyed the same as Simplex fire alarm cabinets Multiple mounting options:∙Surface or semi-flush with standard boxes or matching Simplex boxes∙Flush mount adapter kit∙Adapters are available for retrofitting to commonly available existing boxesUL listed to Standard 38These 4099 series addressable manual stations combinethe familiar Simplex housing with a compact communication module providing easy installation for releasing applications. The integral individual addressable module (IAM) monitors status and communicates changes to the connected control panel via MAPNET II or IDNet communications wiring.A blank area on the front of the station allows the selection of a label to match the specific releasing application (label kit is ordered separately). (Refer to data sheet S4099-0005 for standard Simplex addressable manual stations.)* This product has been approved by the California State Fire Marshal (CSFM) pursuant to Section 13144.1 of the California Health and Safety Code. See CSFM Listing 7150-0026:224 for allowable values and/or conditions concerning material presented in this document. Additional listings may be applicable; contact your local Simplex product supplier for the latest status. Listings and approvals under Simplex Time Recorder Co. are the property of Tyco Safety Products Westminster.4099-9015 Addressable Manual Station for Releasing Applications (with Manual Release label from4099-9802 Label Kit)Label Kit4099-9802Activation requires that a spring loaded interference plate (marked PUSH) be pushed back to access the station pull lever with a firm downward pull that activates the alarm switch. Completing the action breaks an internal plastic break-rod (visible below the pull lever, use is optional). The use of a break-rod can be a deterrent to vandalism without interfering with the minimum pull requirements needed for easy activation. The pull lever latches into the alarm position and remains extended out of the housing to provide a visible indication.Station reset requires the use of a key to reset the manual station lever and deactivate the alarm switch. (If the break-rod is used, it must be replaced.)Station testing is performed by physical activation of the pull lever. Electrical testing can be also performed by unlocking the station housing to activate the alarm switch.Releasing System PeripheralsUL, ULC, CSFM Listed;IDNet or MAPNET II Communicating Devices; FM Approved *Addressable Manual Stations for Releasing ApplicationsAddressable Manual StationsModelDescription4099-9015 Double action, Push operation, Addressable manual station; red housing with white letters and white pulllever; requires label kit 4099-98024099-9802Label kit, white lettering on red background; select the label required for the specific releasing application; types include: Clean Agent, Extinguishing, Carbon Dioxide, Foam System, Sprinkler, and ManualAccessoriesModelDescriptionReference2975-9178 Surface mount steel box, redRefer to page 3 for dimensions 2975-9022 Cast aluminum surface mount box, red2099-9813 Semi-flush trim plate for double gang switch box, red Typically for retrofit, refer to page 4 2099-9814 Surface trim plate for Wiremold box V5744-2, red 2099-9819 Flush mount adapter kit, black Refer to page 4 for details2099-9820Flush mount adapter kit, beige2099-9804 Replacement break-rodPower and Communications IDNet or MAPNET II communications, 1 address per station, up to 2500 ft (762 m) from fire alarm control panel, up to 10,000 ft (3048 m) total wiring distance (including T-Taps)Address Means Dipswitch, 8 positionWire ConnectionsScrew terminal for in/out wiring, for 18 to 14 AWG wire (0.82 mm 2 to 2.08 mm 2)UL Listed Temperature Range 32° to 120° F (0° to 49° C) intended for indoor operation Humidity Range Up to 93% RH at 100° F (38° F) Housing Color Red with white raised letteringMaterialHousing and pull lever are Lexan polycarbonate or equal Pull Lever ColorWhite with red raised letteringHousing Dimensions 5” H x 3 ¾” W x 1” D (127 mm x 95 mm x 25 mm) Installation Instructions579-11354" (102 mm) square box, 2-1/8" (54 mm) minimum 4" Square Box MountSemi-Flush Mount Side ViewSingle Gang Box MountSingle gang box, 2-1/2" deepPreferred Mounting. For surface mounting of theseaddressable manual stations, the preferred electrical boxes are shown in the illustration to the right.Additional MountingReference. Refer to page 4 for Wiremold box mounting compatibility.2975-9178 Box5-3/16" H x 4" W x 2-3/16" D (132 mm x 102 mm x 56 mm)Knockouts located top and bottom2975-9022 Cast Box 5" H x 3-7/8" W x 2-3/16" D (127 mm x 98 mm x 56 mm)4099-9015 Addressable Manual StationFor retrofit and new installations, additional compatible mounting boxes and the required adapter plates are shown in the illustration to the right.Front ViewFlush mount adapter kit Side ViewTyco Fire Protection Products • Westminster, MA • 01441-0001 • USAS4099-0006 11/2014TYCO, SIMPLEX, and the product names listed in this material are marks and/or registered marks. Unauthorized use is strictly prohibited. Lexan is a trademark of the General Electric Co. Wiremold is a trademark of the Wiremold Company.。
一份关于二维电子气(2DEG)的讲义
where r is the vector in plane of 2DEG. Throughout our considerations we will assume that all the distances are much larger than interatomic distance and thus we will use the effective
Density of States
The density of states g( ) is defined as number of states per the energy interval , + d . It is clear that
g( ) = δ( − α)
α
where α is the set of quantum numbers characterizing the states. In the present case it includes the subband quantum number n, spin quantum number σ, valley quantum number
v (for n-type materials), and in-plane quasimomentum k. If the spectrum is degenerate
with respect to spin and valleys one can define the spin degeneracy νs and valley degeneracy
n-AlGaAs i-GaAs
EC
EF EC
EF
EV
EV
EF
MondrianSchema简介
MondrianSchema简介SchemaSchema 定义了⼀个多维数据库。
包含了⼀个逻辑模型,⽽这个逻辑模型的⽬的是为了书写 MDX 语⾔的查询语句。
这个逻辑模型实际上提供了这⼏个概念:Cubes (⽴⽅体)、维度( Dimensions )、层次( Hierarchies )、级别( Levels )、和成员( Members )。
⽽⼀个 schema ⽂件就是编辑这个 schema 的⼀个 xml ⽂件。
在这个⽂件中形成逻辑模型和数据库物理模型的对应。
Cube⼀个 Cube 是⼀系列维度 (Dimension) 和度量 (Measure) 的集合区域。
在Cube 中, Dimension 和 Measure 的共同地⽅就是共⽤⼀个事实表。
Cube 中的有以下⼏个属性:Cube ⾥⾯有⼀个全局的标签定义了所⽤的事实表的表名Dimension他是⼀个层次( Hierarchies )的集合 , 维度⼀般有其相对应的维度表 . 他的组成是由层次( Hierarchies )⽽层次(Hierarchies )⼜是有级别( Level )组成 . 其属性如下:Hierarchy你⼀定要指定其中的各种关系 , 如果没有指定 , 就默认 Hierarchy ⾥⾯装的是来⾃⽴⽅体中的真实表 . 属性如下:Level级别 , 他是组成 Hierarchy 的部分。
属性很多,并且是 schema 编写的关键,使⽤它可以构成⼀个结构树, Level 的先后顺序决定了 Level 在这棵树上的的位置,最顶层的 Level 位于树的第⼀级,依次类推。
Level 的属性如下:Join对于⼀个 Hierarchy 来说,有两种⽅式为其指定:⼀种是直接通过⼀个 Table 标签指定;⼀种是通过 Join 将若⼲张表连接起来指定。
⼀旦采⽤ Join 的话,那么就要在 Hierarchy ⾥的 primaryKeyTable 属性指定主表。
virtuoso schematic的基本组成
virtuoso schematic的基本组成摘要:1.引言2.Virtuoso Schematic 的定义和作用3.Virtuoso Schematic 的基本组成部分3.1 数据平面3.2 控制平面3.3 物理平面4.结论正文:【引言】随着电子技术的快速发展,电路设计越来越复杂,对于电子设计自动化(EDA)工具的需求也日益增加。
Virtuoso Schematic 是一款广泛应用于电子设计领域的EDA 工具,它以其强大的功能和灵活性而受到广大工程师的青睐。
为了更好地理解和使用Virtuoso Schematic,我们需要了解其基本组成。
【Virtuoso Schematic 的定义和作用】Virtuoso Schematic 是一款用于电路设计和仿真的软件工具,它可以帮助工程师快速、准确地完成复杂的电路设计。
通过Virtuoso Schematic,工程师可以绘制和编辑电路图,进行电路仿真和分析,以及生成电路原理图和布局图等。
【Virtuoso Schematic 的基本组成部分】Virtuoso Schematic 主要由三个部分组成,分别是数据平面、控制平面和物理平面。
【3.1 数据平面】数据平面是Virtuoso Schematic 中最重要的部分,它包含了电路设计中所有的信息,如元器件、连线、电源、地等。
数据平面是电路设计的核心,所有的电路仿真和分析都是基于它进行的。
【3.2 控制平面】控制平面主要用于控制Virtuoso Schematic 的运行,包括电路仿真、分析和生成等操作。
通过控制平面,工程师可以方便地对电路进行各种操作,如添加元器件、修改连线、调整参数等。
【3.3 物理平面】物理平面是Virtuoso Schematic 中用于描述电路物理特性的部分,如元器件的尺寸、形状、材料等。
物理平面对于电路的性能和可靠性有着重要的影响,因此,工程师需要仔细地定义和管理物理平面。
【结论】总的来说,Virtuoso Schematic 的基本组成包括数据平面、控制平面和物理平面。
PCI_Express_Mini_CEM_12_26Oct07_cb
PCI Express®Mini Card ElectromechanicalSpecificationRevision 1.21March 28October 26, 20075Revision RevisionHistory Daterelease. 6/02/031.0 Initial1.1 Incorporated approved Errata and ECNs. 3/28/051.2 Incorporated approved ECNs. 10/26/2007PCI-SIG disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI-SIG make a commitment to update the information contained herein.Contact the PCI-SIG office to obtain the latest revision of the specification.Membership ServicesE-mail: administration@Phone: 503-619-0569Fax: 503-644-6708Technical Supporttechsupp@DISCLAIMERThis PCI Express Mini Card Electromechanical Specification is provided "as is" with nowarranties whatsoever, including any warranty of merchantability, noninfringement, fitnessfor any particular purpose, or any warranty otherwise arising out of any proposal,specification, or sample. PCI-SIG disclaims all liability for infringement of proprietaryrights, relating to use of information in this specification. No license, express or implied, byestoppel or otherwise, to any intellectual property rights is granted herein.PCI, PCI Express, PCIe, and PCI-SIG are trademarks or registered trademarks of PCI-SIG.All other product names are trademarks, registered trademarks, or service marks of their respective owners.Copyright © 2003, 2005,-05 2007 PCI-SIG2Contents1. INTRODUCTION (7)1.1. O VERVIEW (7)1.2. S PECIFICATION R EFERENCES (9)1.3. T ARGETED A PPLICATIONS (9)1.4. F EATURES AND B ENEFITS (10)2. MECHANICAL SPECIFICATION (11)2.1. O VERVIEW (11)2.2. C ARD S PECIFICATIONS (11)2.2.1.Card Form Factor (12)2.2.2.Card and Socket Types (13)2.2.3.Card PCB Details (14)2.3. S YSTEM C ONNECTOR S PECIFICATIONS (23)2.3.1.System Connector (23)2.3.2.System Connector Parametric Specifications (27)C ONNECTOR A REA (28)2.4. I/O2.5. R ECOMMENDED S OCKET C ONFIGURATIONS (29)2.5.1.Single Use Full-Mini and Half-Mini Sockets (29)2.5.2.Dual-Use Sockets (32)2.5.3.Dual Head-to-Head Sockets (35)2.5.4.Side-by-Side Socket Spacing (37)2.6. T HERMAL G UIDELINES (38)2.6.1.Thermal Design Definitions (38)2.6.2.Thermal Guidelines for PCI Express Mini Card Add-in Card Designers (39)2.6.2.1. Implementation Considerations (40)2.6.3.Thermal Guidelines for Integrating Wireless Wide Area Network Mini Card Add-inCards (41)3. ELECTRICAL SPECIFICATIONS (45)3.1. O VERVIEW (45)3.2. S YSTEM I NTERFACE S IGNALS (45)3.2.1.Power Sources and Grounds (47)3.2.2.PCI Express Interface (47)B Interface (48)3.2.4.Auxiliary Signals (48)3.2.4.1. Reference Clock (48)3.2.4.2. CLKREQ# Signal (48)3.2.4.3. PERST# Signal (52)3.2.4.4. WAKE# Signal (52)3.2.4.5. SMBus (52)munications Specific Signals (53)3.2.5.1. Status Indicators (53)3.2.5.2. W_DISABLE# Signal (54)3er Identity Module (UIM) Interface (55)3.2.6.1. UIM_PWR (55)3.2.6.2. UIM_RESET (56)3.2.6.3. UIM_CLK (56)3.2.6.4. UIM_VPP (56)3.2.6.5. UIM_DATA (56)3.3. C ONNECTOR P IN-OUT D EFINITIONS (57)3.3.1.Grounds (58)3.3.2.Coexistence Pins (58)3.3.3.Reserved Pins (58)3.4. E LECTRICAL R EQUIREMENTS (58)3.4.1.Logic Signal Requirements (58)3.4.2.Digital Interfaces (59)3.4.3.Power (62)3.5. C ARD E NUMERATION (62)A. SUPPLEMENTAL GUIDELINES FOR PCI EXPRESS MINI CARD CONNECTORTESTING (63)A.1. T EST B OARDS A SSEMBLY (63)A.1.1.Base Board Assembly (64)A.1.2.Plug-in Cards Assembly (65)A.2. I NSERTION L OSS M EASUREMENT (66)A.3. R ETURN L OSS M EASUREMENT (66)A.4. N EAR E ND C ROSSTALK M EASUREMENT (66)B. I/O CONNECTOR GUIDELINES (69)B.1. W IRE-LINE M ODEMS (69)B.2. IEEE 802.3 W IRED E THERNET (69)W IRELESS E THERNET (69)B.3. IEEE802.114FiguresF IGURE 1-1: PCI E XPRESS M INI C ARD A DD-IN C ARD I NSTALLED IN A M OBILE P LATFORM (8)F IGURE 1-2: L OGICAL R EPRESENTATION OF THE PCI E XPRESS M INI C ARD S PECIFICATION (8)F IGURE 2-1: F ULL-M INI C ARD F ORM F ACTOR (M ODEM E XAMPLE A PPLICATION S HOWN) (12)F IGURE 2-2: H ALF-M INI C ARD F ORM F ACTOR (W IRELESS E XAMPLE A PPLICATION S HOWN) (13)F IGURE 2-3: F ULL-M INI C ARD T OP AND B OTTOM (15)F IGURE 2-4: H ALF-M INI C ARD T OP AND B OTTOM (16)F IGURE 2-5: C ARD T OP AND B OTTOM D ETAILS A AND B (17)F IGURE 2-6: C ARD E DGE (19)F IGURE 2-7: C ARD C OMPONENT K EEP O UT A REAS FOR F ULL-M INI C ARDS (21)F IGURE 2-8: C ARD C OMPONENT K EEP O UT A REAS FOR H ALF-M INI C ARDS (22)F IGURE 2-9: PCI E XPRESS M INI C ARD S YSTEM C ONNECTOR (23)F IGURE 2-13: I/O C ONNECTOR L OCATION A REAS (29)F IGURE 2-14: R ECOMMENDED S YSTEM B OARD L AYOUT FOR F ULL-M INI-O NLY S OCKET (30)F IGURE 2-15: R ECOMMENDED S YSTEM B OARD L AYOUT FOR H ALF-M INI-O NLY S OCKET (31)F IGURE 2-16: R ECOMMENDED S YSTEM B OARD L AYOUT (D ETAIL D) (32)F IGURE 2-17: D UAL-U SE S OCKET (33)F IGURE 2-18: R ECOMMENDED S YSTEM B OARD L AYOUT FOR D UAL-U SE S OCKET (34)F IGURE 2-19: D UAL H EAD-TO-H EAD S OCKET (36)F IGURE 2-20: R ECOMMENDED S YSTEM B OARD L AYOUT FOR D UAL H EAD-TO-H EAD S OCKETS (37)F IGURE 2-21: R ECOMMENDED S YSTEM B OARD L AYOUT (S IDE-BY-S IDE S PACING) (38)F IGURE 2-22: P OWER D ENSITY U NIFORM L OADING AT 80 P ERCENT C OVERAGE (40)F IGURE 3-1: P OWER-U P CLKREQ# T IMING (50)F IGURE 3-2: CLKREQ# C LOCK C ONTROL T IMINGS (51)TablesT ABLE 2-1: C ARD AND S OCKET T YPES C ROSS-C OMPATIBILITY (14)T ABLE 2-2: S YSTEM C ONNECTOR P HYSICAL R EQUIREMENTS (27)T ABLE 2-4: S YSTEM C ONNECTOR M ECHANICAL P ERFORMANCE R EQUIREMENTS (27)T ABLE 2-6: S YSTEM C ONNECTOR E LECTRICAL P ERFORMANCE R EQUIREMENTS (28)T ABLE 2-8: S YSTEM C ONNECTOR E NVIRONMENTAL P ERFORMANCE R EQUIREMENTS (28)T ABLE 2-10: M AXIMUM TDP (41)T ABLE 3-1: PCI E XPRESS M INI C ARD S YSTEM I NTERFACE S IGNALS (45)T ABLE 3-3: P OWER-U P CLKREQ# T IMINGS (50)T ABLE 3-5: CLKREQ# C LOCK C ONTROL T IMINGS (51)T ABLE 3-7: S IMPLE I NDICATOR P ROTOCOL FOR LED S TATES (53)T ABLE 3-10: R ADIO O PERATIONAL S TATES (55)T ABLE 3-11: S YSTEM C ONNECTOR P IN-OUT (57)T ABLE 3-13: DC S PECIFICATION FOR 3.3V L OGIC S IGNALING (59)T ABLE 3-14: S IGNAL I NTEGRITY R EQUIREMENTS AND T EST P ROCEDURES (60)T ABLE 3-16: P OWER R ATINGS (62)5611. Introduction1.1. OverviewThis specification defines an implementation for small form factor PCI Express cards. Thespecification uses a qualified sub-set of the same signal protocol, electrical definitions, andconfiguration definitions as the PCI Express Base Specification, Revision 1.0a1.1. Where this5specification does not explicitly define PCI Express characteristics, the PCI Express Base Specification governs.The primary differences between a PCI Express add-in card (as defined by the PCI Express Card Electromechanical Specification) and a PCI Express Mini Card add-in card is a unique card form factoroptimized for mobile computing platforms and a card-system interconnection optimized for10communication applications. Specifically, PCI Express Mini Card add-in cards are smaller and have smaller connectors than standard PCI Express add-in cards.Figure 1-1 shows a conceptual drawing of this form factor as it may be installed in a mobileplatform. Figure 1-1 does not reflect the actual dimensions and physical characteristics as thosedetails are specified elsewhere in this specification. However, it is representative of the general15concept of this specification to use a single system connector to support all necessary systeminterfaces by means of a common edge connector. Communications media interfaces may beprovided via separate I/O connectors and RF connectors each with independent cables as illustrated in Figure 1-1.78A-0381Figure 1-1: PCI Express Mini Card Add-in Card Installed in a Mobile Platform PCI Express Mini Card supports two primary system bus interfaces: PCI Express and USB as shown in Figure 1-2.S y s t e m B u s e s A-0339A PCI Express Mini CardModemEthernet WirelessSystem Interface Function I/O InterfaceFigure 1-2: Logical Representation of the PCI Express Mini Card Specification1.2. SpecificationReferencesThis specification requires references to other specifications or documents that will form the basis for some of the requirements stated herein.PCI Express Base Specification, Revision 1.0a1.1PCI Express Card Electromechanical Specification, Revision 1.0a1.15PCI Local Bus Specification, Revision 2.3Mini PCI Specification, Revision 1.0PCI Bus Power Management Interface Specification, Revision 1.11.2Advanced Configuration and Power Interface Specification, Revision 2.0bUniversal Serial Bus Specification, Revision 2.010SMBus Specification, Revision 2.0EIA-364-1000.01: Environmental Test Methodology for Assessing the Performance of Electrical Connectors and Sockets Used in Business Office ApplicationsEIA-364: Electrical Connector/Socket Test Procedures Including Environmental ClassificationsIS0/IEC 7816-2, 19992007-3-1, Information Technology - I I dentification Cards – -Integrated Circuit(s)15Cards – Part 2: Cards with Contacts – - Part 2: Dimensions and Location of the ContactsISO/IEC 7816-3, 1997-12-15, Second Addition, Information Technology - Identification Cards - IntegratedCircuit(s) Cards With Contacts - Part 3: Electronic Signals and Transmission Protocols IS0/IEC 7816-3, 2006, Identification Cards – Integrated Circuit Cards – Part 3: Cards with Contacts –Electrical Interface and Transmission Protocols ISO/IEC 7816-3, Amendment 1 2002-06-01, Amendment 1: 20Electrical Characteristics and Class Indication for Integrated Circuit(s) Cards Operating at 5 V, 3 V and 1,8VApplications1.3. TargetedAlthough the PCI Express Mini Card is originally intended for both wired and wirelesscommunication applications, it is not limited to such applications. Communications-specific25applications may include:Wired data communication:Local Area Network (LAN): 10/100/1000 Mbps EthernetWide Area Network (WAN): V.90/V.92 modemWireless data communication:30Wireless-LAN (W-LAN): 802.11b/g/a (2.4 GHz and 5.2 GHz bands)Wireless-WAN (W-WAN): Cellular data (e.g., GSM/GPRS, UMTS, and CDMA-2000)Wireless-Personal Area Network (W-PAN): Bluetooth9PCI Express Mini Card is targeted toward addressing system manufacturers’ needs for build-to-order and configure-to-order rather than providing a general end-user-replaceable module. Inspecific applications such as wireless, there are worldwide regulatory implications in providing end-user access to items such as antenna connections and frequency-determining components. It is up to the system manufacturer to limit access to appropriate trained service personnel and provide such 5notification to the user.Although not specifically considered, other applications that may also find their way to this form factor include advanced wired WAN technologies (xDSL and cable modem), location services using GPS, and audio functions.1.4. Features and Benefits10The performance characteristics of PCI Express make PCI Express Mini Card add-in cards desirable in a wide range of mobile systems. This mobile computer optimized form factor provides a number of benefits, including:Upgradeability – PCI Express Mini Card add-in cards are removable and upgradeable withavailable “new technology” cards. This allows upgrades to the newest technologies. System15manufacturers are responsible for providing sufficient notification in the accompanying manualwhen a qualified technician should perform the upgrade service.Flexibility – A single PCI Express Mini Card interface can accommodate various types of communications devices. Therefore, the OEM manufacturer can supply build-to-order systems(for example, a network interface card instead of a modem or Token Ring instead of Ethernet).20Reduced Cost – A standard form factor for small form factor add-in cards makes them more manufacturable, which may lead to reduced costs and provide an economy-of-scale advantageover custom manufactured form factors.Serviceability – PCI Express Mini Card add-in cards can be removed and easily serviced if theyfail.25Reliability – PCI Express Mini Card add-in cards will be mass-produced cards with higher quality than low-volume custom boards.Software Compatibility – PCI Express Mini Card add-in cards are intended to be fully compatible with software drivers and applications that will be developed for standard PCIExpress add-in cards.30Reduced Size – PCI Express Mini Card add-in cards are smaller than PC Cards, PCI Express add-in cards, Mini PCI add-in cards, and other add-in card form factors. This reduced sizepermits a higher level of integration of data communications devices into notebook PCs.Regulatory Agency Accepted Form Factor – Standardization of the PCI Express Mini Cardform factor will permit world wide regulatory agencies to approve PCI Express Mini Card35communications devices independent of the system. This significantly reduces cost and risk onthe part of systems manufacturers.Power Management – PCI Express Mini Card is designed to be truly mobile friendly for current and future mobile specific power management features.1022. MechanicalSpecification2.1. OverviewThis specification defines a two small form factor card s for systems in which a PCI Express add-in card cannot be used due to mechanical system design constraints. The specification defines asmaller card s based on a single 52-pin card-edge type connector for system interfaces. The5specification also defines the PCI Express Mini Card system board connector. In this document Mini Card refers to either form-factor. As the two form-factors primarily differ in length, they will be individually identified as the Full-Mini Card and the Half-Mini Card for the full length and half-length versions of the cards, respectively.2.2. CardSpecifications10There is one are two PCI Express Mini Card add-in card size s: Full-Mini Card and Half-Mini Card.For purposes of the drawings in this specification, the following notes apply:All dimensions are in millimeters, unless otherwise specified.All dimension tolerances are ± 0.15 mm, unless otherwise specified.Dimensions marked with an asterisk (*) are overall envelope dimensions and include space15allowances for insulation to comply with regulatory and safety requirements.Insulating material shall not interfere with or obstruct mounting holes or grounding pads.2.2.1. Card Form FactorThe card form factor s is are specified by Figure 2-1 and Figure 2-2. The se figure s illustrate s amodem example application s . The hatched area s shown in this these figure s represent s the available component volume for the card’s circuitry.A-03405.00 REFPIN 1Figure 2-1: Full-Mini Card Form Factor (Modem Example Application Shown)A-07295.00 REFFigure 2-2: Half-Mini Card Form Factor (Wireless Example Application Shown)2.2.2. Card and Socket TypesGiven the multiple card sizes defined for Mini Card, host platforms have options with regard to socket configurations implemented to support each of the card sizes and potentially the mixing of the two card sizes within a common socket arrangement.Single socket arrangements include those specific to Full-Mini Card (F1) and Half-Mini Card (H1) 5only usages. These sockets specifically have the card retention features for only one size card and are further defined in Section 2.5.1.Additionally, a single socket that optionally supports either a Full-Mini Card (F2) or a Half-Mini Card (H1 or H2) is possible to implement, this type being referred to as a dual-use socket and supports card retention for both size cards. See Section 2.5.2 for more details on this socket 10definition.A dual head-to-head socket is defined as an optional way to incorporate two socket connectors (identified as A and B) into a space that most closely replaces a single Full-Mini socket. Thisarrangement offers the choice of installing two Half-Mini Cards (one of which has to be a H2 type) or one Full-Mini Card (F2) enabling some additional flexibility for a selection of BTO options. See 15Section 2.5.3for more details on this socket definition.Table 2-1 defines cross-compatibility for a series of defined card and socket types. It is important to notice that the dual head-to-head socket arrangement has special limitations with regard to card compatibility.Table 2-1: Card and Socket Types Cross-CompatibilityFull-Mini-Only Socket* Half-Mini-OnlySocketDual-UseSocketDual Head-to-Head SocketCard TypesConnectorA ConnectorAConnectorAConnectorAConnectorBF1 Full-Mini1Yes No No No NoF2 Full-Mini withbottom-sidekeep outsYes No Yes Yes NoH1 Half-Mini No Yes Yes Yes NoH2 Half-Mini withbottom-sidekeep outsNo Yes Yes Yes Yes* Equivalent to the original Mini Card defined card and socket in Revision 1.1 of this specification.Mini Cards that were developed prior to this type definition are by default identified as Type F1.Given that the existing design meets the bottom-side keep out definition for Type F2, thensubsequently identifying the product as Type F2 is acceptable.2.2.2.2.2.3. Card PCB Details5Figure 2-3, Figure 2-4Figure 2-3, Figure 2-5Figure 2-4, and Figure 2-6Figure 2-5 provide the printed circuit board (PCB) details required to fabricate the card. The PCB for this application is expected to be 1.0 mm thick.A-0341A+0.2x R 0.80 M A XP i n n u m b e r i n g r e f e r e n c e :O d d p i n s – T o p S i d e E v e n p i n s – B o t t o m S i d eM A B C0.10x 2.15 R E F I NFigure 2-3: Full-Mini Card Top and BottomA-0728+0.2x R 0.80 M A XP i n n u m b e r i n g r e f e r e n c e :O d d p i n s – T o p S i d e E v e n p i n s – B o t t o m S i d eM A B C0.10x 2.15 R E F I NFigure 2-4: Half-Mini Card Top and BottomA-0342AD e t a i l B (B o t t o m S i d e )(T o p S i d e ).054.0Figure 2-5: Card Top and Bottom Details A and B1.35 MAXA-0343AA-0343BFigure 2-6: Card EdgeFigure 2-7and Figure 2-8 provide details regarding the component keep out areas on Full-Mini (Types F1 and F2) and Half-Mini Cards (Types H1 and H2), respectively.Component and routing (all layers)keep out area for hold down solutionsA-0344AA-0727B o t t o m S i d e (T y p e F 1)B o t t o m S i d e (T y p e F 2)2x 5.80C o m p o n e n t a n d r o u t i n g (a l l l a y e r s )k e e p o u t a r e a f o r h o l d d ow n s o l u t i o n s5T o p S i d e (T y p e s F 1 a n d F 2)4x 5.80Figure 2-7: Card Component Keep Out Areas for Full-Mini CardsA-0730B o t t o m S i d e (T y p e H 1)B o t t o m S i d e (T y p e H 2)2x 5.80C o m p o n e n t a n d r o u t i n g (a l l l a y e r s )T o p S i d e (T y p e s H 1 a n d H 2)Figure 2-8: Card Component Keep Out Areas for Half-Mini Cards2.3. System Connector SpecificationsThe PCI Express Mini Card system connector is similar to the SO-DIMM connector and is modeledafter the Mini PCI Type III connector without side retaining clips.Note: All dimensions are in millimeters, unless otherwise specified. All dimension tolerances are ± 0.15 mm, unless otherwise specified.5Connector2.3.1. SystemThe system connector is 52-pin card edge type connector. Detailed dimensions should be obtained from the connector manufacturer. Figure 2-9 shows the system connector. Figure 2-7, Figure 2-8, and Figure 2-9 show the recommended locations of the PCI Express Mini Card system connectoron the system board.10A-0345AFigure 2-9: PCI Express Mini Card System ConnectorA-0346AThe horizontal axis for the pattern is established by a line through the center of the Ø 1.60 and Ø 1.10holes. The vertical axis is 90˚ to the horizontal axis, through the center of datum E.Location of inserted card edge is aligned with of holes.Figure 2-7: Recommended System Board Layout (Single Socket)7 spacesA-0347 Figure 2-8: Recommended System Board Layout (Detail D)A-0348 Figure 2-9: Recommended System Board Layout (Dual Socket)2.3.2. SystemConnectorParametric SpecificationsTable 2-2, Table 2-4, Table 2-6, and Table 2-8 specify the requirements for physical, mechanical, electrical, and environmental performance for the system connector.Table 2-22-1: System Connector Physical RequirementsParameter SpecificationConnector Housing U.L. rated 94-V-1 (minimum) Must be compatible with lead-free soldering processContacts: Receptacle Copper alloyContact Finish: Receptacle Must be compatible with lead-free soldering processTable 2-42-2: System Connector Mechanical Performance RequirementsParameter SpecificationDurability EIA-364-9 50 cyclesTotal mating/unmating force* EIA-364-132.3 kgf maximumShock EIA-364-27, Test condition AAdd to EIA-364-1000 test group 3 with LLCR before vibration sequence.Note: Shock specifications assume that an effective card retention feature is used.* Card mating/unmating sequence:1. Insert the card at the angle specified by the manufacturer.2. Rotate the card into position.3. Reverse the installation sequence to unmate.Table 2-62-3: System Connector Electrical Performance RequirementsParameter SpecificationLow Level Contact Resistance EIA-364-2355 milliohms mΩmaximum (initial) per contact;20 mΩmilliohms maximum change allowedInsulation Resistance EIA-364-21> 5 x 108 @ 500 V DCDielectric Withstanding Voltage EIA-364-20> 300 V AC (RMS) @ sea levelCurrent Rating 0.50 amp A/power contact (continuous) The temperature rise above ambient shall not exceed 30 °C. The ambient condition is still air at 25 °C.EIA-364-70 method 2Voltage Rating 50 V AC per contactTable 2-82-4: System Connector Environmental Performance RequirementsParameter Specification Operating Temperature -40 °C to +80 °CEnvironmental Test Methodology EIA-364-1000.01Test Group, 1, 2, 3, and 4Useful Field Life 5 yearsTo ensure that the environmental tests measure the stability of the connector, the add-in cards used shall have edge finger tabs with a minimum plating thickness of 30 micro-inches of gold over50 micro-inches of nickel (for environmental test purposes only). Furthermore, it is highly desirablethat testing gives an indication of the stability of the connector when add-in cards at the lower and 5upper limit of the card thickness requirement are used. In any case, both the edge tab platingthickness and the card thickness shall be recorded in the environmental test report.2.3.3.2.4. I/O Connector AreaThe placement of I/O connectors on a PCI Express Mini Card add-in card is recommended to be atthe end opposite of the system connector as shown in Figure 2-13. The recommended area applies 10to both sides of the card, though typical placement will be on the top of the card due to theadditional height available. Depending on the application, one or more connectors may be required to provide for cabled access between the card and media interfaces such as LAN and modem line interfaces and/or RF antennas. This area is not restricted to I/O connectors only and can be usedfor circuitry if not needed for connectors.15A-0349A-0349AFigure 2-13: I/O Connector Location Areas2.5. Recommended Socket ConfigurationsThe following subsections address various recommended footprints for the system connector covering single-use sockets, dual-use sockets and multi-socket configurations.2.5.1. Single Use Full-Mini and Half-Mini SocketsFigure 2-14, Figure 2-15, and Figure 2-16 show the recommended system board layouts for single-5use sockets.A-0346AThe horizontal axis for the pattern is established by a line through the center of the Ø 1.60 and Ø 1.10holes. The vertical axis is 90˚ to the horizontal axis, through the center of datum E.Location of inserted card edge is aligned with of holes.Figure 2-14: Recommended System Board Layout for Full-Mini-Only SocketA-0731The horizontal axis for the pattern is established by a line through the center of the Ø 1.60 and Ø 1.10holes. The vertical axis is 90˚ to the horizontal axis, through the center of datum E.Location of inserted card edge is aligned with of holes.Figure 2-15: Recommended System Board Layout for Half-Mini-Only SocketA-03477 spacesFigure 2-16: Recommended System Board Layout (Detail D)2.5.2. Dual-Use SocketsFigure 2-17 illustrates the concept of a dual-use socket that can accept either a Full-Mini Card or a Half-Mini Card. This socket differs from the Full-Mini-only socket in that consideration is given to support hold down support for the installation of a Half-Mini Card into the same socket. All Mini Cards with the exception of the Type F1 Full-Mini Card are compatible with this socket. 5Figure 2-18 shows the recommended system board layout for the dual-use socket.A-0725H a l f -M i n i C a r d i n s t a l l e dD u a l -U s e S o c k e t w i t h n o M i n i C a r d s i n s t a l l e dF u l l -M i n i C a r d i n s t a l l e dC o n n e c t o r AC o n n e c t o r AFigure 2-17: Dual-Use SocketA-0726The horizontal axis for the pattern is established by a line through the center of the Ø 1.60 and Ø 1.10holes. The vertical axis is 90˚ to the horizontal axis, through the center of datum E.Location of inserted card edge is aligned with of holes.Figure 2-18: Recommended System Board Layout for Dual-Use Socket2.5.3. Dual Head-to-Head SocketsFigure 2-19 illustrates the concept of a dual head-to-head socket configuration. This optionalconfiguration defines a two connector (A and B) solution that is intended to allow installation foreither one Full-Mini Card or two Half-Mini Cards. Figure 2-20shows the recommended system board layout for this configuration based on overlaying the defined dual-use and Half-Mini-only5sockets (see Figure 2-15 and Figure 2-18 for additional dimensional details).It is important to note the limitations regarding card compatibility with this socket configuration.Connector A can accept all but the Type F1 Full-Mini Card. Connector B can only accept Type H2 Half-Mini Cards. When using two Half-Mini Cards in this configuration, care must be taken that atleast one of those cards be Type H2.10A-0724T w o H a l f -M i n i C a r d s i n s t a l l e dD u a l H e a d -t o -H e a d S o c k e t w i t h n o M i n i C a r d s i n s t a l l e dO n e F u l l -M i n i C a r d i n s t a l l e dC o n n e c t o r B (o n l y c o m p a t i b l e w i t h H 2 c a r d s )C o n n e c t o r AC o n n e c t o r AC o n n e c t o r B (o n l y c o m p a t i b l e w i t h H 2 c a r d s )C o n n e c t o r B (u n u s e d )Figure 2-19: Dual Head-to-Head Socket。
电路基础 英文教学 1
4. Power
p = ui
p = − ui
•Emphasis重点 1.current and voltage reference direction
Active elements (有源元件)
dependent source 受控源
Summary: 1. Current 2. Voltage 3. Potential
dq i = L ( A) dt
dw u = L (V ) dq
u a − u b = u ab L (V ) let
a I
u b = 0 L b 点为参考点
from EQ (1-1),the energy absorbing or supplied by an element from time t0 to t is
w =
∫
t
t0
pdt = ∫ vidt
t0
t
Unit is joules(J) 1Wh=3600J
Example:The electron beam in a TV picture tube carries 1015 electrons per second. As a design engineer, determine the voltage U0 needed to accelerate the electron beam to achieve 4W. Solution: dq −19 15 −4 i = = (−1.6×10 )(10 ) =−1.6×10 A dt
(c): P= -UI,
In a source set, the current reference direction is directed out of the + polarity marking (or the first subscript) of the voltage.
schematic
79
单芯片JTAG配置电路
80
JTAG配置时,专用配置信号接法
存放在已有库中,或另建立新的元件库。
例子
13
新建元件
新建元件的步骤:
命名 类别 确定或调整其大小 添加引脚 添加外框或图形 保存
例子 元件的主要内容是其引脚,体现其电气连接的数量和 属性。
14
引脚的属性
名称
号码
电气特性
形状、位置
15
引脚名称
传统的:
51
驱动能力
一般驱动能力,扇出系数
地址/数据总线,CPU模块等需要增加驱动能力
总线驱动器
3态和双向信号
52
不使用的输入和总线保持
不允许悬空的输入
CMOS输入结构和特性
TTL和关门电阻
总线的保持和上/下拉
53
工作电压和匹配
各种工作电压产生的输入/输出电平不同,可能
23
常规元件和标准库
24
常规元件
来源:
软件自带 常规元件种类:
分立元件(discrete) 中小规模集成电路 接插件(连接器) 电源模块
用于原理图绘制的特殊符号
25
分立元件
电阻: 阻值、功率
精度,E24, E96等
电容: 容量、极性、材质 二/三极管/FET: 种类很多,注意伏安特性 LED: 亮度和电流 按键、拨动开关和跳线 电阻排 LED排
检查 电源
一般原则: 有限地使用软件自带的元件库,尽可能减少 使用的库文件的数量,一组相关设计只使用一个新元 件库
极简设计理念英文怎么说
极简设计理念英文怎么说Title: The Essence of Minimalist Design。
In today's fast-paced and cluttered world, the concept of minimalist design has become increasingly popular. With its focus on simplicity, functionality, and clean lines, minimalist design has the power to create a sense of calm and order in our everyday lives.At its core, minimalist design is about stripping away the unnecessary and focusing on what truly matters. This means using only essential elements and avoiding unnecessary embellishments. By doing so, minimalist design can create a sense of spaciousness and tranquility in any space.One of the key principles of minimalist design is the use of neutral colors and natural materials. This creates a sense of harmony and balance, allowing the focus to be on the form and function of the design rather than on distracting elements.In addition, minimalist design often emphasizes the importance of negative space. By leaving areas of a design empty, it allows the eye to rest and creates a sense of openness and simplicity.Another important aspect of minimalist design is the idea of "less is more." This means choosing quality over quantity and prioritizing the essential over the excessive. By doing so, minimalist design can help to reduce visual clutter and create a sense of ease and clarity.Ultimately, minimalist design is about creating a sense of calm and balance in our surroundings. By embracing simplicity and focusing on what truly matters, minimalist design has the power to transform our lives and bring a sense of peace and order to our hectic world.。
schematic 总线命名方式
schematic 总线命名方式
在原理图编辑过程中,总线的命名方式通常遵循一定的规则,例如名称[最小分支线标号..最大分支标号]。
此外,在某些软件中,如使用Ctrl+Shift+v 可以实现智能粘贴功能,类如总线智能粘贴,可以节省大量工作量。
另外,一些软件中提供了解决原理中导线接点丢失问题的工具或选项,例如在“tools->schematic preferences”中的“schematic-general-convert cross-juctions”。
如需了解更多总线命名方式的规则,建议查阅相关的原理图编辑软件的用户手册或在线帮助文档,或咨询专业的技术人员。
内部线性:钻孔考虑说明书
Internal Threading: Pilot Hole ConsiderationsPilot Hole Diameter Calculations:A hole must be created prior to making an internal thread. A pilot hole that is too small will result in greater expense caused by damaged tools and extra time expended creating the threads.A pilot hole that is too large will reduce the strength and effectiveness of the threads. The designer needs to understand the interplay and relationship of the variables determining the choice of pilot hole diameters. A pilot hole is made with a tap drill when a tap is used to create the internal threads.Terminology: The Pilot_Dia is the size of the pilot hole allowing internal threads to be made. %_of_Thread is the percentage of full thread form allowed by the pilot hole being used.Maj_Dia is the major diameter of the screw thread under consideration. TPI is the number of threads per inch used to define Unified National threads. Pitch is the measure of the thread’s crest-to-crest distance used most commonly with metric threads. So long as units are consistent, TPI = 1/Pitch and Pitch = 1/TPI. %_of_Load is the percentage of full thread load carrying capacity left in an internal thread when a pilot hole creating less than 100% of full thread is used. T_Factor is a numeric value accounting for differences in manufacturing processes.There are two ways to make internal threads: cutting and forming. Cutting involves the removal of material leaving the threadform. Forming involves moving material to shape the threadform.A formed thread causes the metal’s grain to flow along the contour of the threadform and, generally, work-hardens the material – both of which act to create a stronger and tougher thread. Forming a thread requires a rigid set-up, greater torque, care in lubrication, and close control of the pilot hole diameter to be successful. Cutting a thread has more allowance for error. A cut-thread T_Factor is 76.98. A formed-thread T_Factor is 147.1.Unified National:Pilot_Dia = Maj_Dia – (%_of_Thread / (T_Factor * TPI))Metric:Pilot_Dia = Maj_Dia – ((%_of_Thread * Pitch) / T_Factor)While these equations are differentiated as Unified National and Metric, the equations will work with either so long as TPI = 1/Pitch and units are not mixed. The distinction is made to use definitions where Unified National threads are denoted by Maj_Dia, TPI, and class of fit while Metric threads are denoted by Maj_Dia, Pitch, and class of fit. The equations are set to use common thread definitions. These equations may be solved for %_of_Thread as:Unified National:%_of_Thread = (Maj_Dia – Pilot_Dia)(T_Factor * TPI)Metric:%_of_Thread = (Maj_Dia – Pilot_Dia)(T_Factor / Pitch)The advantage of this format of the equations is that they may be used with a measured value for the pilot hole diameter so long as the units are consistent. Measurement-based calculations always use the cut-thread T_Factor value (76.98). The form-thread T_Factor value (147.1) allows for material that will have moved during the threading process. It is also recommended that you make several measurements of the inside diameter of a thread and average them to create the Pilot_Dia value as metal will often not flow evenly during the forming process. When you have found the %_of_Thread, the %_of_Load value may be calculated as:%_of_Load = 100 * [1 – (1 - %_of_Thread/100)²]²The table below shows the effect of %_of_Thread on the %_of_Load value for cut threads. Formed threads will have higher values based on (A) the Poisson’s ratio of the material beingthreaded and (B) the ability of the material to accept work hardening (also called strain hardening). Note that a pilot hole sized for 75% of full thread will reduce the strength of the connection by a mere 12.1%. Using a pilot hole sized for 75% thread will typically double tap life when compared to a pilot hole sized for 100% thread.Application:A quick comparison of pilot hole values for a ¼-20 nominal cut-thread gives us:A recommended exercise is to tap each of these pilot hole diameters using a ¼-20 tap and compare the torque and speed of operation. This will give you an intimate feel regarding the value of maximizing the pilot hole’s size. Another worthwhile exercise is to tap a given pilot hole size using different lubricants to understand their effect on the process.Taking data from the Unified National Thread Data charts (see TBD), the Nut Shear Area per unit length of engagement values for a ¼-20 nominal thread are:Thus, if we had a 1.000 inch long engagement of a .2500-20UNC-1B hole with 100% of full threads, we would have .4740 in² of shear area carrying the load. If the material into which these threads were created had a minimum shear strength of 28,000 psi (i.e. ASTM A-36 steel), then the threads would have a minimum load carrying capacity of (28,000 psi * .4740 in²/in * 1.000 in =) 13,272 lbs.That same interface using a 75% pilot hole will have (87.9/100 * 28,000 psi * .4740 in²/in *1.000 in =) 11,666 lb minimum load carrying capacity – 87.9% of the value calculated for a 100% thread. If the engagement is reduced to .250 inches, the load carrying capacity would be reduced to 25% of the values cited here.Warning: Screws have an allowance of up to 3 imperfect threads on their end and screw lengths are toleranced such that they will be shorter than their nominal values. Also, nuts may have up to 3 imperfect threads allowing for the chamfers that make them easier to start. These conditions must be taken into account when calculating engagement lengths for load carrying values! Traditional 60° Sharp Threads:The information in this article is designed for use with modified crest and root threads as defined in modern thread standards. Traditional (American Standard) sharp threads do not fit these definitions. While such threads are still in common use, they do not meet the Unified National, ANSI, ISO, BS, DIN, or JIC threadform specifications and should be noted as being more susceptible to failure by fatigue or stress concentrations. Good mechanical design practice avoids their use. However, when required, information on applying such threads may be found in Machinery’s Handbook, Shigley’s Standard Handbook of Machine Design, The American Machinist’s Handbook, and other sources.The traditional formula for the Pilot_Dia for a 60° sharp internal thread is:Pilot_Dia = Maj_Dia - .975/TPIThis will provide an approximate 75% thread.Pilot Hole Depth Considerations for Cut-Thread Taps:A blind pilot hole must provide the necessary length for thread engagement, allow for the tap's imperfect lead threads, allow for the point of the tap, provide clearance for chips that are not cleared by the tap during use, and allow “over-twist” to insure that a full threadform is cut in higher shear strength materials. This requires that the designer know what type of tap will be used and what the impact of that choice is on manufacturing cost.For cut-thread type taps, there are three basic types of taps: taper taps, plug taps, and bottoming taps. A taper tap is allowed to have 7-10 imperfect threads to distribute the cutting force. A plug tap is allowed to have 3-5 imperfect threads to distribute the cutting force. A bottoming tap is allowed to have 1-2 imperfect threads to distribute the cutting force. The general rule is that the greater the number of threads over which the cutting force is spread, the longer the taps will last. The downside is that a deeper pilot hole is required to clear the non-full-thread end of the tap. The tip of a tap protrudes beyond the flutes no more than the minor diameter of the thread being cut.As the tap is driven into the pilot hole, some of the chips will be pushed forward of the tap and pose the danger of jamming and breaking the tap. This situation may be avoided by removing the tap and blowing the chips from the hole – at added expense. It is better to allow for this and avoid jamming the tap. If the material has small granular-type chips (such as cast iron), you need to add an additional depth of 12.5% of the major diameter for each major diameter of depth to be threaded. If the material has medium sized, non-stringy chips (such as 12L14), you need to add an additional depth of 25% of the major diameter for each major diameter of depth to be threaded. If the material has long stringy chips (such as merchant steel), you need to add an additional depth of 40% of the major diameter for each major diameter of depth to be threaded. It is best to allow a minimum of 150% of the major diameter depth for clearance whenever such an allowance is possible.The higher the shear strength of the material being tapped, the more likely it is that some of the material will reform when the tap is removed. An additional turn or partial turn of the tap is used to account for this. This becomes more important as the pitch of the thread increases. If the material to be tapped has relatively low shear strength, no additional allowance is required. If the material to be tapped has moderate shear strength, an additional ¼ turn of the tap should be allowed. If the material to be tapped has high shear strength, an additional full turn of the tap should be allowed.Putting all this together gives us: Type of tap (taper, plug, or bottoming) which determines the imperfect thread clearances required. A taper tap needs to allow for 10 imperfect threads which gives us 11*Pitch as the additional depth of the pilot hole. A plug tap needs to allow for 5 im-perfect threads which gives us 6*Pitch as the additional depth of the pilot hole. A bottoming tap needs to allow for 2 imperfect threads which gives us 3*Pitch as the additional depth of the pilot hole. We add to this value the minor diameter of the screwthread to allow for the point of the tap and this gives us the total tap allowance required.Next, we need to figure out the Major_Depth of the threads in the hole. This is defined as being the nominal threaded depth divided by the major diameter of the screwthread. This is multipliedfor small granular chip materials, ¼ for medium chip materials, or times the chip allowance (1/82/5 for long stringy chip material). Thus, Major_Depth * chip_allowance_factor gives us the total chip allowance required.Finally, we find the shear-reform allowance value. We start by finding the shear-reform-factor For low shear strength materials, this value is 0. For medium shear strength materials, this value is ¼. For high shear strength materials, this value is 1. Multiplying this value by the pitch of the screwthread (shear-reform-factor*Pitch) gives us the total shear-reform allowance required.The nominal pilot hole depth for a cut-thread tap is the sum of these parts. I.E.:Nominal_Pilot_Depth = required_thread_depth + total_tap_allowance + total_chip_allowance +total_shear-reform_allowance.Violation of this rule-set will result in extra expense in handling or a higher probability of tap breakage – which adds additional costs too.Tips & Tricks When Shallow Pilot Holes Must Be Used: OK, we know that this is, shall we say, less than optimum practice, but what do you do when you are forced into a corner and have to tap a hole using a shallow pilot hole? The answer is that you punt – but what are the punts available to you? They are:e a form-thread tap. If the material is ductile enough, this is the best possible solutionto this problem.l the thread. This is a good solution if it can be done.e a spiral tap set to maximize chip ejection. This usually requires that you start with aplug tap and finish with a bottoming tap.4.Fill the hole with a wax compound (paraffin and beeswax usually work quite well) suchthat the wax will extrude back out the hole carrying away the chips.5.Backfill and plug the hole after tapping. Crude, rude, but this is sometimes the only realsolution to the requirement of a shallow pilot hole.Please, be polite, note on the drawing that you acknowledge that this is a punt and let the shop know that you understand that you have thrown a monkey on their back!Pilot Hole Depth Considerations for Form-Thread Taps:A form-thread tap requires much less depth clearance in a blind pilot hole than cut-thread taps. Form-thread taps come in plug and bottoming styles. A plug-thread tap has a forming lead of 4 threads. A bottoming-thread tap has a forming lead of 2 threads. The tip of the tap is usually either flat or concave and requires no special clearance. The factor people forget when forming threads in a blind pilot hole is to allow a clearance volume for the lubricant that may be pushed ahead of the form-thread tap. Compressed pockets of lubricant can often blow out the part or fatally jam the tap!An allowance of 3*Pitch for bottoming taps or 5*Pitch for plug taps provides the total tap allowance for form-thread taps.the major for each major diameter of thread depth An allowance of ¼ the major diameter plus 1/8is usually sufficient to prevent hydraulic damage. The ¼ major diameter allowance provides clearance for the drops of lubricant that tend to form at the tip of the tap. Careful application of the lubricant and cleaning the tip of the tap can allow this factor to be avoided – at extra cost and danger of tap breakage. Using the Major_Depth definition above, we can restate this as: total* Major_Depth.hydraulic allowance = ¼ * Major_Dia + 1/8This gives us:Nominal_Pilot_Depth = required_thread_depth + total_tap_allowance +total_hydraulic_allowance.Conclusion:The diligent designer understands how their decision affect the price and performance of the product they are creating. This chapter provides the basic rules necessary to optimize the use of taps to create internally threaded holes. Following these rules will help make your designs more cost effective. However, this is only an introductory chapter. Many people have spent their lives developing detailed analysis of screwthread application, cost, and failure modes. This chapter is not intended to provide analysis tools for every application. It is up to the reader to assure them-selves of the appropriateness and rigor of these rules to their application.Internal Threading: Standard Drill ChartsStandard tap drill charts are common. They are based on having a nominal 75% of full thread in the tapped hole. The previous statement is both true and false. The tap drill recommendations in these charts are standard (American) drill bit sizes and do not necessarily provide an actual 75% of full thread. More importantly, drill bits tend to create holes slightly larger than their nominal diameter in most materials. This is something the astute designer will recognize.The following charts are based on this assumption set. Please note that a % Thd value is given as reference to the theoretical percentage of full thread based on the nominal drill size. While the reader should be aware of this value, they should also be aware of the inherent error underlying the analysis.Caveat: The Formed Thread Tap Drill Chart provides book values. They are only a general guide. The actual value needed is dependent upon: form tap geometry; the Poisson's ratio of the material being tapped; the Tangent or Secant modulus of the material being tapped; and the type and amount of lubricant used in the process. The best recommendations for preparing holes for formed thread tapping will come from the manufacturer of the tap you intend to use. It should be understood that such information trumps generalized calculations.。
Mechanica模块
Mechanica模块(力学分析)Materials一、各功能命令1、新建力/力矩负荷2、New Pressure load(新建压力负荷)3、New Gravity Load(新建重力负荷)4、New Centrifugal Load新建离心负荷5、New Global Temperature Load新建球状温度负荷6、New Structural Temperature Load新建结构温度负荷7、新建位移约束8、New Along Surface Constraint新建侧面约束9、New Shell新建外壳10、New Shell Pair新建外壳对11、New Beam 新建梁12、New spring 新建弹簧13、New Mass 新建质量(重)14、New Interface新建界面15、New Weld 新建焊缝16、New Rigid Link新建刚性连接17、New Weighted Link新建加权链接18、New Gap新建间隙19、Define Materials 定义材料20、New Material Assignment to a model /volume新建材料分配模型/体积21、Create a Mesh Control创建一个网格控制22、Create a simulation surface region创建一个模拟的表面区域23、Create a simulation volume region创建一个模拟量区域24、create the mesh of finite elements representing the model建立有限元模型的网格25、run a finite element model 运行有限元模型26、review results of a design or finite element analysis审查设计的结果或有限元分析27、设置模拟显示28、mesh no display 网格无显示29、mesh wireframe网格线框30、mesh hidden line网格隐藏线31、mesh no hidden网格无隐藏32、mesh shading网格阴影33、invoke mechanica process guide调用力学过程指南无法获得所需的力学许可证请联系您的销售代表mechanica model setup(力学模型设置)、structure结构、thermal热、advanced 高级、Default interface默认界面、bonded粘结、adiabatic隔热的、2D Plane stress 平面应力(Thin plate薄板)2D plane strain平面应变(infinitely thick无限厚)2D Axisymmetric 轴对称Coordinate system坐标系Surfaces 、Edges 、Curves表面、边缘、曲线Default interface默认界面bonded粘结Free 自由Contact 联接thermal热unit depth单位厚度adiabatic隔热的、thermal resistance热阻properties属性merge coincident nodes合并重合节点二、force /moment load 力/力矩、load负载、Member of set设置构件、loadset1负载设置1、references引用、surfaces表面、edges、curves边缘、曲线,points点。
电法测井讲座2
第二部分
FMI 质量控制
微电阻率扫描成像测井
1)测前要检查电极的灵敏度,要对井径刻度。 2)无特殊情况,应在套管中做井径的测前测后刻度,并且其读值与实际套 管内径值误差不超过±0.50in(1.27cm)。 3)仪器旋转周期不得小于10m(在6〃井眼的直井段旋转周期不得小于7m)。
4)测井时应同时监视六条电导率曲线,不得保持在零或饱和值,出现饱和 现象时一次不超过5m。
Ib/If In
Rt/Rm
1 1 1
10 0.45 0.4
100 0.27 0.17
1000 0.09 0.045
6 8
10
12
1
1
0.33
0.3
0.12
0.1
0.04
0.03
第二部分
电扣几何形状、分辨率、采样率之间关系
微电阻率扫描成像测井
基于阵列电扣电极的井壁微电阻率扫描成像 测井仪器的分辨率是指将仪器测量的微电导率映 射地层特征的能力。比仪器分辨率大的地层特征 可用几个分辨率单位像素来表示,而比仪器分辨 率小的地层特征只能表示成一个分辨率单位。仪 器的分辨率与极板电扣的几何结构密切相关,图 中示出了极板的阵列电扣电极结构。 a.电扣越小,分辨率愈高,井壁微电阻率扫描图象越清晰;
阵列侧向
HRLA
AIT、HDIL、HARI
第二部分 电法测井技术介绍
◆侧向测井( LateroLog)
1.双侧向(Dual LateroLog) 2.微侧向(Micro LateroLog) 3.方位侧向(Azimuthal Resistivity Imager ARI)
◆感应测井(Induction log)
微电阻率扫描成像仪的测量原理和地层倾角测量相似,由推靠器极板发射 一交变电流,使电流通井内泥浆柱和地层构成的回路而回到仪器上部的回路电 极。推靠器、极板体金属连接等电位起到使处于极板中部的阵列电扣流出的电 流垂直于极板外表面(即井壁)进人地层的聚焦作用。测量的阵列电扣上的电 流强度反映出电扣正对着的地层邻域由于岩 石结构或电化学上的非均 质性引起的微电阻率的变 化。 阵列电扣电流经适当处 理可刻度为彩色或灰度等 级图象,反映地层微电阻 率的变化。
继电保护专业英语词汇
end effect endurance energizing energizing current envelope equal area criterion equal area method equal area stability criterion equipotential surface event logging event record events/fault or disturbance records excessive start time excitation reactance excitation system excitation winding excitation-loss relay exciter existing exit relay external devices external initiation extra high voltage system extremely inverse current relay
I ideal transformer identification IED immunity to eraledciatrtoesdtaetliecctdriosmchaagrngetic energy impedance impedance relay impedance earthed impedance grounded impulse voltage inductance induction motor inductive inductor industrial substations and co-generation infinite bus inhibition time initialize instantaneous instantaneous instantaneous power instantaneous phase overcurrent instantaneous trip instantaneous trip instrument transformer insulated insulating property insulating string insulating transformer insulation insulation level insulator integrate