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HY27UF081G2A_NAND_Flash数据手册

HY27UF081G2A_NAND_Flash数据手册

This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied.Rev 0.4 / Jun. 2007 1HY27UF(08/16)1G2A Series1Gbit (128Mx8bit / 64Mx16bit) NAND Flash1Gb NAND FLASHHY27UF081G2A HY27UF161G2ARev 0.4 / Jun. 200721Gbit (128Mx8bit / 64Mx16bit) NAND FlashDocument Title1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory Revision HistoryRevision No.History Draft DateRemark0.01Initial Draft.Dec. 28. 2005Preliminary0.11) Change NOP2) Change AC CharacteristicsMay. 18. 2006Preliminary0.21) Delete Memory array map 2) Change AC Characteristics3) Correct copy back function Oct. 02. 2006Preliminary0.31) Change 1Gb Package Type- FBGA package is added - Figure & dimension are changed 2) Delet PreliminaryNov. 23. 20060.41) Correct figure 19Jun. 11. 2007tOH Before 12After10tCStCEA tREA Before 253525After202520Rev 0.4 / Jun. 200731Gbit (128Mx8bit / 64Mx16bit) NAND FlashFEATURES SUMMARYHIGH DENSITY NAND FLASH MEMORIES - Cost effective solutions for mass storage applications NAND INTERFACE - x8 or x16 bus width.- Multiplexed Address/ Data- Pinout compatibility for all densitiesSUPPLY VOLTAGE- VCC = 2.7 to 3.6V : HY27UFxx1G2A Memory Cell Array= (2K+64) Bytes x 64 Pages x 1,024 Blocks = (1K+32) Bytes x 64 Pages x 1,024 BlocksPAGE SIZE- x8 device : (2K+64 spare) Bytes : HY27UF081G2A - x16 device : (1K+32 spare) Bytes : HY27UF161G2ABLOCK SIZE- x8 device: (128K + 4K spare) Bytes - x16 device: (64K + 2K spare) Words PAGE READ / PROGRAM - Random access: 25us (max.) - Sequential access: 30ns (min.) - Page program time: 200us (typ.)COPY BACK PROGRAM MODE- Fast page copy without external bufferingCACHE PROGRAM- Internal (2048+64) Byte buffer to improve the program throughputFAST BLOCK ERASE- Block erase time: 2ms (Typ.)STATUS REGISTER ELECTRONIC SIGNATURE - 1st cycle: Manufacturer Code - 2nd cycle: Device Code- 3rd cycle: Internal chip number , Cell Type, Number of Simultaneously Programmed Pages.- 4th cycle: Page size, Block size, Organization, Spare sizeSERIAL NUMBER OPTION CHIP ENABLE DON’T CARE - Simple interface sith microcontrollerDATA RETENTION- 100,000 Program/Erase cycles (with 1bit/528byte ECC) - 10 years Data RetentionPACKAGE- HY27UF(08/16)1G2A-T(P): 48-Pin TSOP1 (12 x 20 x 1.2 mm)- HY27UF(08/16)1G2A-T (Lead)- HY27UF(08/16)1G2A-TP (Lead Free)- HY27UF081G2A-S(P): 48-Pin USOP1 (12 x 17 x 0.65 mm)- HY27UF081G2A-S (Lead)- HY27UF081G2A-SP (Lead Free) - HY27UF081G2A-F(P): 63-Ball FBGA (9 x 11 x 1.0 mm)- HY27UF081G2A-F (Lead)- HY27UF081G2A-FP (Lead Free)Rev 0.4 / Jun. 200741Gbit (128Mx8bit / 64Mx16bit) NAND Flash1. SUMMARY DESCRIPTIONThe Hynix HY27UF(08/16)1G2A series is a 128Mx8bit with spare 4Mx8 bit capacity. The device is offered in 3.3V Vcc Power Supply.Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased.The device contains 1024 blocks, composed by 64 pages consisting in two NAND structures of 32 series connected Flash cells.A program operation allows to write the 2112-byte page in typical 200us and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device) block.Data in the page can be read out at 30ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command input. This interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of footprint.Commands, Data and Addresses are synchronously introduced using CE, WE, ALE and CLE input pin. The on-chip Pro-gram/Erase Controller automates all program and erase functions including pulse repetition, where required, and inter-nal verification and margining of data.The modify operations can be locked using the WP input pin or using the extended lock block feature described later .The output pin R/B (open drain buffer) signals the status of the device during each operation. In a system with multi-ple memories the R/B pins can be connected all together to provide a global status signal.Even the write-intensive systems can take advantage of the HY27UF(08/16)1G2A extended reliability of 100K pro-gram/erase cycles by providing ECC (Error Correcting Code) with real time mapping-out algorithm.The chip could be offered with the CE don’t care function. This function allows the direct download of the code from the NAND Flash memory device by a microcontroller , since the CE transitions do not stop the read operation.The copy back function allows the optimization of defective blocks management: when a page program operation fails the data can be directly programmed in another page inside the same array section without the time consuming serial data insertion phase.The cache program feature allows the data insertion in the cache register while the data register is copied into the flash array. This pipelined program operation improves the program throughput when long files are written inside the memory. A cache read feature is also implemented. This feature allows to dramatically improve the read throughput when consecutive pages have to be streamed out.The HYNIX HY27UF(08/16)1G2A series is available in 48 - TSOP1 12 x 20 mm, 48 - USOP 12 x 17 mmm, FBGA 9 x 11 mm.1.1 Product ListPART NUMBER ORIZATIONVCC RANGE PACKAGEHY27UF081G2A x8 2.7V - 3.6 Volt63FBGA / 48TSOP1 / 48USOP1HY27UF161G2Ax1648TSOP1Rev 0.4 / Jun. 200751Gbit (128Mx8bit / 64Mx16bit) NAND FlashIO15 - IO8Data Input / Outputs (x16 only)IO7 - IO0Data Inputs / Outputs CLE Command latch enable ALE Address latch enable CE Chip Enable RE Read Enable WE Write Enable WP Write Protect R/B Ready / Busy Vcc Power Supply Vss Ground NCNo ConnectionTable 1: Signal NamesRev 0.4 / Jun. 200761Gbit (128Mx8bit / 64Mx16bit) NAND FlashFigure 2. 48TSOP1 Contactions, x8 and x16 DeviceFigure 3. 48USOP1 Contactions, x8Rev 0.4 / Jun. 200771Gbit (128Mx8bit / 64Mx16bit) NAND FlashFigure 4. 63FBGA Contactions, x8 Device (Top view through package)Rev 0.4 / Jun. 200781Gbit (128Mx8bit / 64Mx16bit) NAND Flash1.2 PIN DESCRIPTIONPin Name DescriptionIO0-IO7IO8-IO15(1)DATA INPUTS/OUTPUTSThe IO pins allow to input command, address and data and to output data during read / program operations. The inputs are latched on the rising edge of Write Enable (WE). The I/O buffer float to High-Z when the device is deselected or the outputs are disabled.CLECOMMAND LATCH ENABLEThis input activates the latching of the IO inputs inside the Command Register on the Rising edge of Write Enable (WE).ALEADDRESS LATCH ENABLEThis input activates the latching of the IO inputs inside the Address Register on the Rising edge of Write Enable (WE).CECHIP ENABLEThis input controls the selection of the device. When the device is busy CE low does not deselect the memory.WEWRITE ENABLEThis input acts as clock to latch Command, Address and Data. The IO inputs are latched on the rise edge of WE.REREAD ENABLEThe RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid tREA after the falling edge of RE which also increments the internal column address counter by one.WP WRITE PROTECTThe WP pin, when Low, provides an Hardware protection against undesired modify (program / erase)operations.R/B READY BUSYThe Ready/Busy output is an Open Drain pin that signals the state of the memory.VCC SUPPLY VOLTAGEThe VCC supplies the power for all the operations (Read, Write, Erase). VSS GROUNDNCNO CONNECTIONTable 2: Pin DescriptionNOTE:1. A 0.1uF capacitor should be connected between the Vcc Supply Voltage pin and the Vss Ground pin to decouple the current surges from the power supply. The PCB track widths must be sufficient to carry the currents required during program and erase operations.Rev 0.4 / Jun. 200791Gbit (128Mx8bit / 64Mx16bit) NAND FlashIO0IO1IO2IO3IO4IO5IO6IO71st Cycle A0A1A2A3A4A5A6A72nd Cycle A8A9A10A11L (1)L (1)L (1)L (1)3rd Cycle A12A13A14A15A16A17A18A194th CycleA20A21A22A23A24A25A26A27Table 3: Address Cycle Map(x8)NOTE:1. L must be set to Low.IO0IO1IO2IO3IO4IO5IO6IO7IO8-IO151st Cycle A0A1A2A3A4A5A6A7L (1)2nd Cycle A8A9A10L (1)L (1)L (1)L (1)L (1)L (1)3rd Cycle A11A12A13A14A15A16A17A18L (1)4th CycleA19A20A21A22A23A24A25A26L (1)Table 4: Address Cycle Map(x16)NOTE:1. L must be set to Low.FUNCTION1st CYCLE2nd CYCLE3rd CYCLE4th CYCLEAcceptable commandduring busyREAD 100h 30h --READ FOR COPY-BACK 00h 35h --READ ID 90h ---RESETFFh ---YesPAGE PROGRAM 80h 10h --COPY BACK PGM 85h 10h --BLOCK ERASE60h D0h --READ STATUS REGISTER 70h ---YesCACHE PROGRAM 80h 15h --RANDOM DATA INPUT 85h ---RAMDOM DATA OUTPUT 05h E0h --CACHE READ START 00h 31h --CACHE READ EXIT34h---Table 5: Command SetRev 0.4 / Jun. 2007101Gbit (128Mx8bit / 64Mx16bit) NAND FlashCLE ALE CE WE RE WP MODE H L L Rising H X Read ModeCommand Input L H L Rising H X Address Input(4 cycles)H L L Rising H H Write ModeCommand Input L H L Rising H HAddress Input(4 cycles)L L L Rising H H Data Input L L L (1)H Falling X Sequential Read and Data Output L L L H H X During Read (Busy)X X X X X H During Program (Busy)X X X X X HDuring Erase (Busy)X X X X X L Write Protect XXHXX0V/Vcc Stand ByTable 6: Mode SelectionNOTE:1. With the CE high during latency time does not stop the read operationRev 0.4 / Jun. 2007111Gbit (128Mx8bit / 64Mx16bit) NAND Flash2. BUS OPERATIONThere are six standard bus operations that control the device. These are Command Input, Address Input, Data Input, Data Output, Write Protect, and Standby.Typically glitches less than 5 ns on Chip Enable, Write Enable and Read Enable are ignored by the memory and do not affect bus operations.2.1 Command Input.Command Input bus operation is used to give a command to the memory device. Command are accepted with Chip Enable low, Command Latch Enable High, Address Latch Enable low and Read Enable High and latched on the rising edge of Write Enable. Moreover for commands that starts a modify operation (write/erase) the Write Protect pin must be high. See figure 6 and table 13 for details of the timings requirements. Command codes are always applied on IO7:0, disregarding the bus configuration (X8/X16).2.2 Address Input.Address Input bus operation allows the insertion of the memory address. To insert the 28 addresses needed to access the 1Gbit 4 clock cycles (x8 version) are needed. Addresses are accepted with Chip Enable low, Address Latch Enable High, Command Latch Enable low and Read Enable High and latched on the rising edge of Write Enable. Moreover for commands that starts a modify operation (write/erase) the Write Protect pin must be high. See figure 7 and table 16 for details of the timings requirements. Addresses are always applied on IO7:0, disregarding the bus configuration (X8/X16).2.3 Data Input.Data Input bus operation allows to feed to the device the data to be programmed. The data insertion is serially and timed by the Write Enable cycles. Data are accepted only with Chip Enable low, Address Latch Enable low, Command Latch Enable low, Read Enable High, and Write Protect High and latched on the rising edge of Write Enable. See figure 8 and table 13 for details of the timings requirements.2.4 Data Output.Data Output bus operation allows to read data from the memory array and to check the status register content, the lock status and the ID data. Data can be serially shifted out toggling the Read Enable pin with Chip Enable low, Write Enable High, Address Latch Enable low, and Command Latch Enable low. See figures 9,10,12,13 and table 13 for details of the timings requirements.2.5 Write Protect.Hardware Write Protection is activated when the Write Protect pin is low. In this condition modify operation do not start and the content of the memory is not altered. Write Protect pin is not latched by Write Enable to ensure the pro-tection even during the power up.2.6 Standby.In Standby mode the device is deselected, outputs are disabled and Power Consumption is reduced.Rev 0.4 / Jun. 2007121Gbit (128Mx8bit / 64Mx16bit) NAND Flash3. DEVICE OPERATION3.1 Page Read.Upon initial device power up, the device defaults to Read mode. This operation is also initiated by writing 00h and 30h to the command register along with four address cycles. In two consecutive read operations, the second one does need 00h command, which four address cycles and 30h command initiates that operation. Second read operation always requires setup command if first read operation was executed using also random data out command.Two types of operations are available: random read. The random read mode is enabled when the page address is changed. The 2112 bytes (X8 device) or 1056 words (X16 device) of data within the selected page are transferred to the data registers in less than 25us(tR). The system controller may detect the completion of this data transfer (tR) by analyzing the output of R/B pin. Once the data in a page is loaded into the data registers, they may be read out in 30ns cycle time (3.3V device) by sequentially pulsing RE. The repetitive high to low transitions of the RE clock make the device output the data starting from the selected column address up to the last column address.The device may output random data in a page instead of the consecutive sequential data by writing randomdata output command. The column address of next data, which is going to be out, may be changed to the address which follows random data output command.Random data output can be operated multiple times regardless of how many times it is done in a page.Random data output is not available in cache read.3.2 Page Program.The device is programmed basically by page, but it does allow multiple partial page programming of a word or consec-utive bytes up to 2112 (X8 device) or words up to 1056 (X16 device), in a single page program cycle.The number of consecutive partial page programming operation within the same page without an intervening erase operation must not exceed 8; for example, 4 times for main array (X8 device:1time/512byte, X16 device:1time 256word) and 4 times for spare array (X8 device:1time/16byte ,X16 device:1time/8word).The addressing should be done in sequential order in a block. A page program cycle consists of a serial data loading period in which up to 2112 bytes (X8 device) or 1056 words (X16 device) of data may be loaded into the data register , followed by a non-volatile programming period where the loaded data is programmed into the appropriate cell.The serial data loading period begins by inputting the Serial Data Input command (80h), followed by the four cycle address inputs and then serial data. The words other than those to be programmed do not need to be loaded. The device supports random data input in a page. The column address of next data, which will be entered, may bechanged to the address which follows random data input command (85h). Random data input may be operated multi-ple times regardless of how many times it is done in a page.The Page Program confirm command (10h) initiates the programming process. Writing 10h alone without previously entering the serial data will not initiate the programming process. The P/E/R controller automatically executes the algorithms and timings necessary for program and verify, thereby freeing the system controller for other tasks. Once . The system controller can detect the completion of a program cycle by monitoring the R/B output, or the Status bit (I/O 6) of the Status Register . Only the Read Status command and Reset command are valid while programming is in progress. When the Page Program is complete, the Write Status Bit (I/O 0) may be checked. The internal write verify detects only errors for "1"s that are not successfully programmed to "0"s. The command register remains in Read Status command mode until another valid command is written to the command register . Figure 14 details the sequence.Rev 0.4 / Jun. 2007131Gbit (128Mx8bit / 64Mx16bit) NAND Flash3.3 Block Erase.The Erase operation is done on a block basis. Block address loading is accomplished in two cycles initiated by an Erase Setup command (60h). Only address A18 to A27 (X8) or A17 to A26 (X16) is valid while A12 to A17 (X8) or A11 to A16 (X16) are ignored. The Erase Confirm command (D0h) following the block address loading initiates the internal erasing process. This two-step sequence of setup followed by execution command ensures that memory contents are not acci-dentally erased due to external noise conditions. At the rising edge of WE after the erase confirm command input, the P/E/R controller handles erase and erase-verify. Once the erase process starts, the Read Status Register command may be entered to read the status register . The system controller can detect the completion of an erase by monitoring the R/B output, or the Status bit (I/O 6) of the Status Register . Only the Read Status command and Reset command are valid while erasing is in progress. When the erase operation is completed, the Write Status Bit (I/O 0) may be checked. Figure 18 details the sequence.3.4 Copy-Back Program.The copy-back program is configured to quickly and efficiently rewrite data stored in one page without utilizing an exter-nal memory. Since the time-consuming cycles of serial access and re-loading cycles are removed, the system perfor-mance is improved. The benefit is especially obvious when a portion of a block is updated and the rest of the block also need to be copied to the newly assigned free block. The operation for performing a copy-back program is a sequential execution of page-read without serial access and copyingprogram with the address of destination page. A read opera-tion with "35h" command and the address of the source page moves the whole 2112byte (X8 device) or 1056word (X16 device) data into the internal data buffer .As soon as the device returns to Ready state, Copy Back command (85h) with the address cycles of destination page may be written. The Program Confirm command (10h) is required to actually begin the programming operation. Data input cycle for modifying a portion or multiple distant portions of the source page is allowed as shown in Figure 16."When there is a program-failure at Copy-Back operation, error is reported by pass/fail status. But, if Copy-Back operations are accumulated over time, bit error due to charge loss is not checked by external error detection/correction scheme. For this reason, two bit error correction is recommended for the use of Copy-Back operation."Figure 16 shows the command sequence for the copy-back operation.The Copy Back Program operation requires three steps:1. The source page must be read using the Read A command (one bus write cycle to setup the command and then 4 bus write cycles to input the source page address). This operation copies all 2KBytes from the page into the Page Buffer .2. When the device returns to the ready state (Ready/Busy High), the second bus write cycle of the command is given with the 4bus cycles to input the target page address.3. Then the confirm command is issued to start the P/E/R Controller .Note:1. On the same plane.2. It’s prohibited to operate copy-back program from an odd address page (source page) to an even address page (target page) or from an even address page (source page) to an odd address page (target page). Therefore, the copy-back program is permitted just between odd address pages or even address pages.Rev 0.4 / Jun. 2007141Gbit (128Mx8bit / 64Mx16bit) NAND Flash3.5 Read Status Register.The device contains a Status Register which may be read to find out whether read, program or erase operation is com-pleted, and whether the program or erase operation is completed successfully. After writing 70h command to the com-mand register , a read cycle outputs the content of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE does not need to be toggled for updated status. Refer to Table 14 for specific Status Register definitions, and Figure 10 for specific timings requirements . The command reg-ister remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read dur-ing a random read cycle, the read command (00h) should be given before starting read cycles.3.6 Read ID.The device contains a product identification mode, initiated by writing 90h to the command register , followed by an address input of 00h. Four read cycles sequentially output the 1st cycle (ADh), and 2nd cycle (the device code) and 3rd cycle ID, 4th cycle ID, respectively. The command register remains in Read ID mode until further commands are issued to it. Figure 19 shows the operation sequence, while Tables 16 explain the byte meaning.3.7 Reset.The device offers a reset feature, executed by writing FFh to the command register . When the device is in Busy state during random read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no longer valid, as the data will be partially programmed or erased.The command register is cleared to wait for the next command, and the Status Register is cleared to value E0h when WP is high. Refer to table 14 for device status after reset operation. If the device is already in reset state a new reset command will not be accepted by the command register . The R/B pin transitions to low for tRST after the Reset com-mand is written.Rev 0.4 / Jun. 2007151Gbit (128Mx8bit / 64Mx16bit) NAND Flash3.8 Cache programCache Program is an extension of Page Program, which is executed with 2112byte (X8 device) or 1056word (X16 device) data registers, and is available only within a block. Since the device has 1 page of cache memory, serial data input may be executed while data stored in data register are programmed into memory cell. After writing the first set of data up to 2112byte (X8 device) or 1056word (X16 device) into the selected cache registers, Cache Program com-mand (15h) instead of actual Page Program (10h) is input to make cache registers free and to start internal program operation. To transfer data from cache registers to data registers, the device remains in Busy state for a short period of time (tCBSY) and has its cache registers ready for the next data-input while the internal programming gets started with the data loaded into data registers. Read Status command (70h) may be issued to find out when cache registers become ready by polling the Cache- Busy status bit (I/O 6). Pass/fail status of only the previous page is available upon the return to Ready state.When the next set of data is input with the Cache Program command, tCBSY is affected by the progress of pending internal programming. The programming of the cache registers is initiated only when the pending program cycle is finished and the data registers are available for the transfer of data from cache registers. The status bit (I/O5) for internal Ready/Busy may be polled to identify the completion of internal programming.If the system monitors the progress of programming only with R/B, the last page of the target programming sequence must be programmed with actual Page Program command (10h). If the Cache Program command (15h) is used instead, status bit (I/O5) must be polled to find out when the last programming is actually finished before starting other operations such as read. Pass/fail status is available in two steps. I/O 1 returns with the status of the previous page upon Ready or I/O6 status bit changing to "1", and later I/O 0 with the status of current page upon true Ready (returning from internal programming) or I/O 5 status bit changing to "1". I/O 1 may be read together when I/O 0 is checked. See Fig. 18 for more details.NOTE : Since programming the last page does not employ caching, the program time has to be that of Page Program. However , if the previous program cycle with the cache data has not finished, the actual program cycle of the last page is initiated only after completion of the previous cycle, which can be expressed as the following formula.tPROG=Program time for the last page + Program time for the (last-1)page - (Program command cycle time + Last page data loading time)Rev 0.4 / Jun. 2007161Gbit (128Mx8bit / 64Mx16bit) NAND Flash3.9 Cache ReadCache read operation allows automatic download of consecutive pages, up to the whole device. Immediately after 1st latency end, while user can start reading out data, device internally starts reading following page.Start address of 1st page must be at page start (A<10:0>=00h) : in this way after 1st latency time (tr) , automatic data download will be uninterrupted. In fact latency time is 25us, while download of a page require at least 100us for x8 device (50us for x16 device).Cache read operation command is like standard read, except for confirm code (30h for standard read, 31h for cache read) user can check operation status using :- R/B ( ‘0’ means latency ongoing, download not possible, ‘1’ means download of n page possible, even if device in ternally is active on n+1 page- Status register (SR<6> behave like R/B, SR<5> is ‘0’ when device is internally reading and ‘1’ when device is idle)To exit cache read operation, a cache read exit command (34h) must be issued. This command can be given any time (both device idle and reading).If device is active (SR<5>=0) it will go idle within 5us, while if it is not active, device itself will go busy for a time shorter then tCBSY before becoming again idle and ready to accept any further commands. Figure 17 describes how to handle Cache Read through Status register .If user reads last byte/word of the memory array, then he has to stop by giving a cache read exit command. In general,if user wants to terminate a cache read, then he must give a cache read exit command (or reset command) before starting any new operation.Random data output is not available in cache read.Cache read operation must be done only block by block if system needs to avoid reading also from invalid blocks.Rev 0.4 / Jun. 2007171Gbit (128Mx8bit / 64Mx16bit) NAND Flash4. OTHER FEATURES4.1 Data Protection for Power on/off SequenceThe device is designed to offer protection from any involuntary program/erase during power-transitions. An internal voltage detector disables all functions whenever Vcc is below about 2.0V (3.3V version). WP pin provides hardware protection and is recommended to be kept at VIL during power-up and power-down. A recovery time of minimum 10us is required before internal circuit gets ready for any command sequences as shown in Figure 24. The two-step com-mand sequence for program/erase provides additional software protection.If the power is dropped during the ready read/write/erase operation, Power protection function may not guaranteed the data. Power protection function is only available during the power on/off sequence.4.2 Ready/Busy.The device has a Ready/Busy output that provides method of indicating the completion of a page program, erase, copy-back, cache program and random read completion. The R/B pin is normally high and goes to low when the device is busy (after a reset, read, program, erase operation). It returns to high when the P/E/R controller has finished the operation. The pin is an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B) and current drain during busy (Ibusy), an appropriate value can be obtained with the following reference chart (Figure 25). Its value can be determined by the following guidance.。

过渡金属催化醇的空气氧气氧化反应的研究进展

过渡金属催化醇的空气氧气氧化反应的研究进展

[收稿日期]20150626 [基金项目]科技部国际合作中新联合课题(JRP10,S2014GR0448/1418324001);福建省海洋中心课题(14GYY023NF23);龙岩学院国家基金培育计划(LG2014010)㊂[作者简介]刘金仙(1982),男,博士,讲师,现主要从事精细有机合成方面的教学与研究工作;E -mail :j xliu@l y un .edu .cn ㊂[引著格式]刘金仙,吴德武,吴粦华,等.过渡金属催化醇的空气/氧气氧化反应的研究进展[J ].长江大学学报(自科版),2015,12(31):9~19.过渡金属催化醇的空气/氧气氧化反应的研究进展刘金仙 (龙岩学院化学与材料学院,福建龙岩364012;厦门大学药学院,福建厦门361102)吴德武,吴粦华 (龙岩学院化学与材料学院,福建龙岩364012)曾锦章 (厦门大学药学院,福建厦门361102)[摘要]醛酮是重要的化工原料,由醇氧化生成醛或酮是一类重要的化学反应㊂在诸多关于醇的氧化反应研究中,以环境友好的氧化剂替代传统氧化剂的研究尤为引人注目,特别是以空气/氧气为最终氧化剂的过渡金属催化的氧化反应由于具有价廉㊁清洁等优点而备受人们青睐㊂介绍了包括钯㊁钌㊁金㊁锇等贵金属以及钴㊁钒㊁铜㊁铁等廉价金属催化的空气/氧气氧化反应在醇的氧化及动力学拆分领域的应用㊂[关键词]醇;过渡金属;催化反应;氧化反应;醛;酮[中图分类号]O643.32[文献标志码]A [文章编号]16731409(2015)31000911醛酮类化合物具有重要的用途,在有机合成中被广泛应用㊂醇的氧化是一种常见的化学转化,也是醛/酮类化合物的主要制备方法㊂传统上常使用当量的化学氧化剂,如重金属氧化物㊁高价碘化物或二甲亚砜等,原子经济性差,后处理操作往往较为麻烦且会产生大量对环境有害的副产物,不符合绿色化学的发展方向㊂氧气是一种安全的氧化剂,来源广泛㊁价格低廉㊁安全有效㊁环境友好,因此以氧气/空气为最终氧化剂的催化反应具有较大发展潜力㊂近几十年来,多种基于过渡金属催化的醇的氧化反应陆续被报道,包括钯㊁钴㊁钌㊁钒㊁金㊁锇㊁铜以及铁等多种过渡金属化合物催化的醇氧化反应[1]㊂为此,笔者就上述几种重要过渡金属特别是铜㊁铁等廉价金属催化体系的研究状况进行了综述㊂1 以钯作为催化剂的空气氧化反应钯是一种具有优异催化特性的重要过渡金属元素,Schwartz 等早在1977年就发现其在醇催化氧化方面的特殊作用㊂他们以PdCl 2为催化剂,以价廉易得的氧气为最终氧化剂,在相对温和的条件下即可实现对活泼醇及二级脂肪醇的选择性氧化:尽管反应时间较长且底物的适用范围有限,但在醇类化合物的氧化领域这一发现仍然具有重要的意义[2]㊂1998年,Larock 小组在Schwartz 小组工作的基础上对这一体系进行优化,以Pd (OAc )2替代PdCl 2,以NaHCO 3替代NaOAc ,从而将氧化谱扩展至烯丙醇以及苄醇类化合物[3]㊂Uemura 等将碱的用量降低到催化量并进一步扩大了底物适用范围,此外该小组将单一溶剂改为多氟取代的两相溶剂体系,容易实现溶剂及催化剂的回收利用;他们还将钯催化剂固载于水滑石上,实现了烯丙醇的选择性及立体专一性氧化[4]㊂Sheldon 等以Pd (OAc )2为催化剂,以菲咯啉二磺酸盐为配体,在水相条件下实现了脂肪醇㊁苄醇以及烯丙醇的选择性空气氧化[5]:㊃9㊃长江大学学报(自科版) 2015年11月第12卷第31期(理工上旬刊)Journal of Yan g tze Universit y (Natural Science Edition ) Nov .2015,Vol .12No .31Tsu j i 等利用大分子吡啶与醋酸钯配位,有效的避免钯黑(即零价钯)的生成,从而大大降低了金属催化剂的用量,实现了醇的高效空气催化氧化[6]㊂Si g man 小组在这一领域也做了大量的卓有成效的工作,2002年该组报道了一例在催化量Pd (OAc )2和催化量三乙胺作用下,在室温条件即可完成的醇的氧气氧化反应,可以实现苄醇㊁烯丙醇以及烷基醇的选择性氧化[7]:该小组于2003年报道了另一例氮杂卡宾修饰的钯催化的醇的氧化反应,催化剂用量可降低到0.5%的水平[8]:2005年,该小组在其原有研究基础上对催化剂结构进行修饰,发展了一种以空气为最终氧化剂,在室温下即可进行的醇的氧化反应,但该反应的底物适用范围并没有得到明显扩展[9]:Karimi 等将纳米钯负载于官能团化的SBA -15上并用于醇的催化氧化反应,容易实现介孔分子筛催化剂的回收利用㊂其后该小组还将钯催化剂负载于碳纳米纤维离子液体上,并将其用于醇的催化氧化,实现了水相反应,且催化剂可以回收利用[10]㊂2013年,Beller 小组报道了以Pd (O H )2为催化剂的氧化反应,他们以三叔丁基氧磷为配体,不仅实现了苄醇㊁烯丙醇的氧化,而且在长碳链一级及二级烷基醇的氧化方面也取得了良好效果[11]:除了上述反应以外,钯催化的空气氧化反应可用于醇类化合物的动力学拆分㊂Stoltz 等报道了首例Pd (nbd )Cl 2-(-)-s p arteine 催化的醇类化合物的氧化动力学拆分,可以在相对温和的条件下高效的实现多种醇类底物的氧化动力学拆分[12]:施敏等以轴手性的双氮杂卡宾配位的钯作为催化剂实现了苄醇的氧化动力学拆分[13]:㊃01㊃ 理工上旬刊*化学工程与技术2015年11月2 以钴作为催化剂的反应由于价格相对便宜且具有一定的催化能力,钴在空气氧化领域的应用也受到人们的关注㊂早在20世纪80年代初,Tovro g 等就首次报道了钴在醇的催化氧化中的应用,他们通过Lewis 酸对钴进行活化,实现了对活泼醇类化合物的催化氧化[14]:1994年,I q bal 等以Co -Schiff 碱为催化剂在室温条件下实现了活泼醇类化合物的催化氧化[15],Sain 等则以钴酞花菁为催化剂实现醇的氧气/空气氧化反应,并将底物适用范围扩展到α-羟基酮和炔丙醇[16]㊂最近,Jain 将钴酞花菁掺杂到聚苯胺中,以氧气为氧化剂,实现了对醇类化合物的选择性氧化且催化剂可回收利用[17]㊂2007年,Pedro 等以Co (Ⅲ)为催化剂在室温条件下实现了炔丙醇的高效合成[18]:除了金属钴络合物以外,直接以无机钴化合物为催化剂的反应也得到了一定的发展㊂2000年,Ishii 等直接以Co (OAc )2作为催化剂,在室温条件下实现了活泼醇的催化氧化:不足的是这种氧化方法不能适用于一级脂肪醇[19]㊂TEMPO 的加入可对一级醇的氧化选择性产生明显的影响,杨贯羽等以Co (NO 3)2㊁TEMPO 以及丁二酮肟作为催化剂,通过金属/非金属的协同催化作用,不仅实现了二级醇的氧化还可选择性的将一级醇氧化成相应的醛类化合物[20]:2014年,Sekar 小组报道了一例Co (OAc )2催化的二级醇的氧化反应,能够以中等到优秀的产率选择性的对2-吡啶苄醇进行氧化,得到相应的酮类产物[21]:钴催化的空气氧化反应可用于醇类化合物的动力学拆分㊂Sekar 等以Co (OAc )2为催化剂,以(R )-BINAM -Schiff 碱为配体,以较高的ee 值实现了α-羟基酯和安息香的动力学拆分[22]:㊃11㊃第12卷第31期刘金仙等:过渡金属催化醇的空气/氧气氧化反应的研究进展3 以钌作为催化剂的反应钌是一种具有良好催化性能的过渡金属元素,1997年,Mark ó[23]和Le y [24]同时发现以RuO -4为催化剂,不仅实现活泼二级醇及α-羟基酮的催化氧化,而且还可选择性的将一级醇氧化成相应的醛:1998年,Ishii 等以Ru (PPh 3)3Cl 2为催化剂,以羟基喹啉酮为配体,实现了活泼醇㊁一级醇的选择性氧化,但这种方法对二级脂肪醇的活性较差[25]㊂Sheldon 等以Ru (PPh 3)3Cl 2和TEMP 为共同催化剂,以空气作为最终氧化剂,利用Ru -TEMPO 双催化循环实现活泼醇及脂肪醇的选择性氧化[26]㊂Chan g 等以RuCl 2(p -c y mene )为催化剂,以无机碱Cs 2CO 3替代羟基喹啉酮实现醇的催化氧化反应[27]㊂与Ishii 报道的方法不同的是,该方法对一级脂肪醇的氧化没有取得较好的结果㊂Katsuki 等人在一级醇与二级醇的选择性氧化方面做了一定的研究,他们以(NO )Ru (salen )为催化剂,实现了在活泼二级醇存在的条件下,优先对一级脂肪醇的选择性氧化[28]㊂2003年,Mizuno 等以Al 2O 3固载的Ru 做催化剂,以三氟甲苯为溶剂,实现了活化㊁非活化及杂环醇的氧气氧化,催化剂可回收利用[29]:2007年,Koba y ashi 小组以聚合物封闭的Ru (PI Ru )为催化剂实现了苄醇㊁烯丙醇及杂环醇的选择性氧化,催化剂可回收利用[30]:2012年,Karimi 小组将RuO -4固定于离子液体型介孔有机硅材料上进行醇的氧气氧化反应,可实现苄醇㊁烯丙醇及普通醇的氧化[31]:此外,Katsuki 等以Ru (Salen )为催化剂实现了对活泼二级醇的动力学拆分及内消旋二醇的去对称化反应[32]:4 以钒作为催化剂的反应1999年,Nemoto 等以VOCl 3为催化剂,室温条件下以良好到优秀的产率实现α-羟基酮的催化氧㊃21㊃ 理工上旬刊*化学工程与技术2015年11月化[33]:Uemura 等以VO (acac )2为催化剂实现了烯丙醇㊁炔丙醇等α,β不饱和醇的选择性氧化,但这种方法对非α,β不饱和醇的效果较差[34]㊂Punni y amurth y 等以V 2O 5作为催化剂不仅实现了活泼醇的氧化,而且还可以中等产率将一级脂肪醇选择性的氧化成相应的醛[35]㊂2011年,Hanson 小组报道了一例钒催化的醇的空气氧化反应,他们以(HQ )2V V (O )(O i Pr )为催化剂,以空气为氧化剂,实现了苄醇㊁烯丙醇㊁炔丙醇的空气氧化[36]:在氧化动力学拆分方面,Toste 等于2005年报道了一例以VO (O i Pr )3为催化剂㊁手性烯胺为配体的动力学拆分反应,实现了α-羟基酯的动力学拆分:该法对活泼的烯丙醇㊁苄醇以及不活泼的二级脂肪醇类底物具有良好的分离效果,但对于炔丙醇类底物则不能实现有效拆分[37]㊂5 以金作为催化剂的反应2005年,施章杰等以AuCl 为催化剂,以β-双烯酮亚胺基负离子为配体,实现了活泼醇类化合物的选择性氧化[38]:2007年,Koba y ashi 小组报道了一种聚苯乙烯固定的纳米金催化的醇的氧化反应,室温条件下可以实现苄醇㊁烯丙醇及杂环醇的氧化[39]:2009年,Karimi 小组以NaAuCl 4为催化剂进行醇的氧化反应,在室温条件下可以实现苄醇及烯丙醇的氧化[40]:㊃31㊃第12卷第31期刘金仙等:过渡金属催化醇的空气/氧气氧化反应的研究进展㊃41㊃理工上旬刊*化学工程与技术2015年11月过渡金属锇由于毒性较大,作为催化剂在醇的空气氧化反应中的应用相对较少㊂Beller等以K2[OsO2 (OH)4]和DABCO作为共催化剂,在水相中实现了活泼醇类化合物的选择性氧化,当底物规模增大时锇的用量可以降低到十万分之五以下[41]:7以铜作为催化剂的反应铜是一种廉价易得的金属元素,在过去的几十年里人们陆续报道了一系列以铜作为催化剂的反应㊂Semmelhack等人最早发现铜在醇的催化氧化中的应用,早在1984年,他们通过以CuCl和TEMPO为共同催化剂,在温和条件下实现了首例基于过渡金属-氮氧自由基催化的醇类化合物的氧化反应,但这种催化方法对二级脂肪醇的氧化并没有取得预期效果[42]:徐新光等以菲咯啉配体对铜进行修饰,发展了一种新型的Cu-TEMPO催化方法,有效的降低了催化剂用量,且底物适用范围扩展到二级脂肪醇类化合物[43]:Markó等以CuCl和DBAD为共同催化剂,以氟苯为溶剂,实现了醇类化合物的催化氧化,该方法不仅适用活泼醇的催化氧化,而且对于Semmelhack方法所不能实现的二级脂肪醇也有较高的反应活性[44]:Gree等在Semmelhack的基础上进行改进,采用离子液体[bmim][PF6]为介质,实现了醇的催化氧化且其反应溶剂可以回收利用[45]㊂Wei等人对Gree的方法做了一些的优化,他们通过碱或者分子筛的加入提高了反应的效率[46]㊂Ra g auskas等也对Gree方法进行改进,他们以二价的Cu(ClO4)2替代CuCl,在室温下就可以实现活泼醇的选择性氧化[47]㊂Knochel等以CuBr㊃Me2S/TEMPO为催化剂,以联吡啶为碱,实现了醇的氟两相催化氧气氧化反应,催化剂及氟相容易实现循环利用[48]㊂Sheldon小组进一步发现以CuBr2/TEMPO/联吡啶为催化剂,以空气为氧化剂,在室温条件下就可以实现醇的氧化[49]㊂此后,该小组还将联吡啶和TEMPO通过三嗪类化合物进行联结与CuBr2作为共催化剂,实现了二级脂肪醇的催化氧化[50]㊂Punni y amurth y等以Cu(Ⅱ)-salen/TEMPO实现了一级脂肪醇的氧气催化氧化反应,催化剂可循环利用且具有良好的官能团兼容性[51]㊂Re p o等设计了一种Cu-bisSalen催化剂并将其用于醇的空气氧化,反应效率明显提高[52];以一价的CuBr替代二价的Cu(ClO4)2作为催化剂可提高官能团兼容性[53]㊂Garcia等于2010年报道了一例基于金属有机骨架-TEMPO类型的醇的催化氧化反应,实现了部分活泼醇的选择性氧气氧化,且催化剂可回收利用[54]㊂2011年,Stahl 小组报道了一例Cu (I )/TEMPO 催化的醇的氧化反应,该反应以b py -CuX /TEMPO 为催化剂,以空气为氧化剂,在室温条件下可以将一级烯丙醇㊁苄醇以及脂肪醇选择性的氧化成相应的醛类化合物[55]:其后,该小组以ABNO 替代TEMPO ,进一步扩展了底物适用范围[56]㊂2014年,Li p shutz 在Stahl 工作的基础上通过表面活性剂的添加,发展了一种以水为反应溶剂的氧化方法,适用于烯丙醇以及苄醇等活化醇底物[57]:麻生明小组长期致力于联烯相关的各类反应的研究,他们在前人工作的基础上发展了一种基于铜催化的联烯醇的空气氧化方法㊂用CuCl 为催化剂,等当量的菲咯啉和联吡啶为配体,以良好到优秀的产率实现联烯醛/酮的高效合成[58]:在动力学拆分方面,Sekar 小组于通过以Cu (OTf )2/(R )-BINAM /TEMPO 为催化剂,实现了安息香类化合物的氧化动力学拆分[59]:8 以铁作为催化剂的反应铁是一种价廉㊁低毒的过渡金属元素,也是近年来金属催化领域的研究热点之一,在醇类化合物的选择性催化氧化中的应用越来越广泛㊂Martin 等发现催化量的Fe (NO 3)3㊃9H 2O /FeBr 3可以在室温条件下实现苄醇及二级脂肪醇的空气催化氧化,遗憾的是这种方法不能适用于一级脂肪醇[60]:梁鑫淼等发展了一种更为方便的催化氧化方法,他们以FeCl 3㊃6H 2O /TEMPO /NaNO 2为催化剂,三氟甲苯作为溶剂,在温和条件下就可以实现活泼醇的空气氧化反应[61];通过氮氧自由基的修饰并以1,2-二氯乙烷替代三氟甲苯作为反应溶剂,催化效率得到明显提高[62]:㊃51㊃第12卷第31期刘金仙等:过渡金属催化醇的空气/氧气氧化反应的研究进展其后,该小组还发现以Fe (NO 3)3㊃9H 2O /4-O H -TEMPO 为催化剂,以空气为氧化剂,也可以实现活泼醇的空气氧化反应[63]:双磁性离子液体也可用于醇的催化氧化㊂张锁江等成功地合成了[Imin -TEMPO ][FeCl 4]并将其用于活泼醇的催化氧化反应,取得良好的反应效果[64]㊂2011年麻生明㊁刘金仙等报道了一种基于Fe (NO 3)3/TEMPO /NaCl 的醇的高效催化氧化反应,通过NaCl 的添加,大大提高了反应的效率[65],可用于包括苄醇㊁烯丙醇㊁联烯醇㊁炔丙醇[66]㊁吲哚甲醇[67]等不饱和醇以及普通醇,反应条件极其温和,产物的分离纯化相当方便,催化剂价廉易得,底物普适性良好,应用范围很广㊂对于高炔丙醇类底物,通过这一高效催化体系可以直接生成联烯酮[68];对于烯丙醇类底物,通过底物控制可实现立体选择性氧化[69]㊂值得一提的是,这种方便的催化方法很容易实现较大规模的合成,显示其良好的工业化应用前景[70]:Sekar 等采用手性铁复合物为催化剂实现了安息香的氧化动力学拆分,在温和的条件下得到手性的安息香化合物:Katsuki 等实现了基于Fe -Salan 复合物催化的氧化动力学拆分[71]㊂㊃61㊃ 理工上旬刊*化学工程与技术2015年11月9 结语尽管近年来过渡金属催化的㊁以空气/氧气为最终氧化剂的催化氧化方法取得了相当的进展,特别是基于廉价金属催化的氧化反应由于具备价廉㊁安全㊁经济等诸多优势受到化学工作者的普遍欢迎,一些催化体系已经被应用于工业生产过程,并展现出良好的应用前景,然而过渡金属催化醇的空气氧化反应仍有一些问题如催化效率㊁底物适用性㊁官能团兼容性及催化剂的回收利用等还有待化学工作者进一步的探索㊂[参考文献][1]Parme gg iani C ,Cardona F .T ransition metal based catal y sts in the aerobic oxidation of alcohols [J ].Green Chemistr y ,2012,14:547~564.[2]Blackburn T ,Schwartz J .Homo g eneous catal y tic oxidation of secondar y alcohols to ketones b y molecular ox yg en under mild conditions [J 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,2011,353:1005~1017.[66]Liu J ,Xie X ,Ma S .Aerobic oxidation of p ro p ar gy lic alcohols to α,β-unsaturated alk y nals or alk y nones catal y zed b y Fe (NO 3)3㊃9H 2O ,TEMPO and sodium chloride in toluene [J ].S y nthesis ,2012,44:1569~1576.[67]Liu J ,Ma S .Aerobic oxidation of indole carbinols usin g Fe (NO 3)3㊃9H 2O /TEMPO /NaCl as catal y sts [J ].Or g anic &Biomolecular Chemistr y ,2013,11:4186~4193.[68]Liu J ,Ma S .Room tem p erature Fe (NO 3)3㊃9H 2O /TEMPO /NaCl -catal y zed aerobic oxidation of homo p ro p ar gy lic alcohols [J ].Tetrahedron ,2013,69:10161~10167.[69]Liu J ,Ma S .Iron -catal y zed aerobic oxidation of all y lic alcohols :the issue of C ═C bond isomerization [J ].Or g anic Letters ,2013,15:5150~5153.[70]Liu J ,Ma S .Aerobic oxidation of p ro p ar gy l alcohol :a convenient method for the s y nthesis of p ro p iolaldeh y de [J ].S y nthesis ,2013,45:1624~1626.[71]Kunisu T ,O g uma T ,Katsuki T .Aerobic oxidative kinetic resolution of secondar y alcohols with na p hthoxide -bound iron (salan )com p lex [J ].Journal of the American Chemical Societ y ,2011,133:12937~12939.[编辑] 计飞翔㊃91㊃第12卷第31期刘金仙等:过渡金属催化醇的空气/氧气氧化反应的研究进展过渡金属催化醇的空气/氧气氧化反应的研究进展作者:刘金仙, 吴德武, 吴粦华, 曾锦章作者单位:刘金仙,吴粦华(龙岩学院化学与材料学院,福建 龙岩,364012), 吴德武,曾锦章(厦门大学药学院,福建 厦门,361102)刊名:长江大学学报(自科版)英文刊名:Journal of Yangtze University (Natural Science Edition)年,卷(期):2015(31)引用本文格式:刘金仙.吴德武.吴粦华.曾锦章过渡金属催化醇的空气/氧气氧化反应的研究进展[期刊论文]-长江大学学报(自科版) 2015(31)。

“杂家”鲁迅及其“杂学”

“杂家”鲁迅及其“杂学”

第29卷第6期 唐山师范学院学报 2007年11月 Vol. 29 No.6 Journal of Tangshan Teachers College Nov. 2007────────── 收稿日期:2007-06-05作者简介:赵献涛(1975-),男,河北邯郸人,中国社会科学院研究生院博士生。

- 14 -“杂家”鲁迅及其“杂学”赵献涛(中国社会科学院 研究生院,北京 100102)摘 要:鲁迅,在不同的历史时期,被赋予了各种各样的名目:文学家、思想家、革命家、翻译家、教育家、美术家、编辑家、国学家等等。

这些名目仅仅能概括鲁迅思想肖像的一个侧面,而不足以包举鲁迅整个的思想地图。

鲁迅,只有“杂家”这一个名目才足以囊括其全部风貌。

之所以给鲁迅杂家的定位,是与其杂学的知识结构紧密相关的。

其杂学,一言以蔽之曰“三四之学”:四库之学、四野之学和四洋之学。

关键词:鲁迅;杂家;杂学中图分类号:I210 文献标识码:A 文章编号:1009-9115(2007)06-0014-04一、问题的提出在不同的历史时期,鲁迅,总是人们回顾的对象,通过对鲁迅的反思性回顾,找到解决现实思想文化问题的路径。

为此,人们赠予了鲁迅各种各样的徽号或谥号。

其中尤其以毛泽东的论述具有较大影响:“鲁迅是中国文化革命的主将,他不但是伟大的文学家,而且是伟大的思想家和伟大的革命家。

”[1]这种观念因为毛泽东的政治权威和特殊的历史境遇曾强有力地支配着人们对鲁迅的认识。

新时期以来,人们解放思想,冲出牢笼,开始了对鲁迅新的思考。

“鲁迅逝世时,正值抗战前夕,于是他的葬礼便成了民族团结的标志;而他的精神,也就适时地成了鼓舞民族斗志的伟大象征。

应当说,这是对于鲁迅的最大范围的一次集体利用。

从此,鲁迅的名字,作为文化的一个符码,便开始被广泛使用了。

毛泽东在延安,以及以后发表的有关鲁迅的评论,都是在这一意义上进行的。

对鲁迅的这种肯定,是一种名义上的肯定,抽象的肯定,整体象征性的肯定。

VSM价值流分析

VSM价值流分析

精工咨询 James Tian 田文璋

“How To” - The Path“怎么做”-途径
Operations Strategic Planning 操作的策略性规划
Executive Education 管理层培训
Organizational Education
内部组织培训
Foundations(基础):• 7S - Workplace Organization(7s-整理工作场所)
• Structured Problem Solving(系统化的解决问题方案)
精工咨询 James Tian 田文璋

目录
• 两种VSM! [区分价值流管理(VSM:Value Stream Management) 与价值流图(VSM:Value stream Mapping)]

价值流管理 (VSM:Value Stream Management)
• 历史:在美国代表创新,是源自日本的一种计划方法。 • 定义:它是从TPS演变来的8步综合工具和技术方法,是一套完
整的计划系统。 • 作用:使你容易计划精益活动,以获得更大程度上的成功和
应用速度,是管理层(指标和报告)与执行层(精益工具应 用)的有机联接! • 关键点:
连续流动阶段 – 理解并满足客户需求:内部通过连续流动策划,促使在正确的时间提交
模块7: Kaizen改善计划
第4步: 当前价值流图绘制; 第5步: 识别 Lean指标 第6步: 未来价值流图的绘制;
客户需求阶段 第6步: 未来价值流图的绘制;
连续流动阶段 第6步: 未来价值流图的绘制;
平衡(适物/时/量)阶段 第7步: 定义Kaizen改善计划 第8 步: 执行Kaizen改善计划

periodical__xnjy__xnjy2010__1003pdf__100357

periodical__xnjy__xnjy2010__1003pdf__100357

从V—hTERT—TRAIL的研究结果显示,其可以介导肿瘤细胞
特异性基因表达与杀伤作用,同时对正常细胞无毒性。目前, 该载体的主要局限是难以大量生产和载体容量有限,但新的复 制模型有望解决这些问题。 1.4单纯疱疹病毒载体单纯疱疹病毒(herps
特异性不理想,体内环境中纳米载体难以检测等系列问题,尚 待深入研究。 2.4阳离子脂质体脂质体(1iposome)载体为脂质双分子层 组成的环形封闭囊泡,它可通过被宿主细胞融合、内吞等方式 将其所携带的核酸分子送人细胞。脂质体转染无插入突变的 危险,而且无毒、无免疫原性,是近年发展起来的非常有前途的 非病毒载体。但普通脂质体作为药物载体,仍存在靶分布特性 不理想、贮存中稳定性欠佳等缺点,因而限制了脂质体在肿瘤 化疗中的应用¨“。 2.5活菌载体基于实体瘤微环境缺氧的特性构建的重组厌 氧菌载体,能特异性定居于肿瘤,通过产生细胞因子、毒素、酶 类等活性物质或表达其所携带的目的基因起到治疗作用,现已 初步显示出应用潜力。用于肿瘤基因治疗的厌氧茵载体具有 以下特点:(1)易于生产,便于储存,使用更加方便;(2)可以作 用于问质细胞,比病毒更易于从循环中清除,安全性高,其本身 的抗瘤效果优于病毒;(3)治疗基因整合、发生遗传突变的可能 性也减少;(4)靶向性优于病毒载体和脂质体载体。但厌氧菌 载体也有其局限性:溶瘤治疗仅作用于厌氧区,这将阻碍专性

病毒不具致病性;在逆转录病毒感染细胞后,整合至细胞染色 体上,从而实现其携带外源目的基因的作用;具有转染效率高, 靶向性差,体内病毒滴度较低的特点。Barzon等L11将白细胞介 素一2基因和单纯疱疹病毒的胸苷激酶基因同时插入反转录 病毒载体治疗甲状腺癌,可使瘤体比单独利用白细胞介素一2 基因进行治疗时缩小3—4倍。但逆转录病毒只能转染处于分 裂增殖期的细胞,且与受染细胞的整和具有随机性,故具有潜 在的危险性。因担忧其安全性问题,故目前逆转录病毒载体多 用于体外转染拉J。现阶段国内外学者们仍在寻求开发新的更 为高效安全稳定的逆转录病毒载体,如已报道的复制缺陷型泡 沫病毒载体Ho等。 1.2腺病毒载体腺病毒(adenoviru,Ad)为双链DNA病毒, 它能感染各时相的细胞,以其高效转染和高效表达而成为应用 广泛的病毒载体HJ。常树建等∞’构建腺病毒载体介导抗一 VEGF发状核酶的实验结果显示:腺病毒可高效感染HT一29 细胞,有效抑制VEGF的表达及移植瘤组织内血管的生成。但 腺病毒作为载体也有自身的局限性:(1)表达时间短,容量小 (4.5kb),免疫原性强;(2)缺乏理想的动物模型来进行临床前 毒性研究;(3)对肝细胞的天然嗜性容易造成腺病毒颗粒在肝

射频基本概念

射频基本概念

RF Power Basic Training Nov, 20, 20072COMPANY CONFIDENTIAL射频子系统位于整个基站的最前端,是整个NodeB 系统正常运行的关键环节之一。

通常来说,一个射频子系统包括发射器和接收器,其中发射器主要包括调制部分、混频部分和放大部分。

放大部分电路包含一级或几级预放(Driver Stage )和末级功放(Final Stage )前言3COMPANY CONFIDENTIAL第一章无线通信的基本概念第一节概述第二节无线通信使用的频率和波段第三节常用无线通信频段4COMPANY CONFIDENTIAL第一节概述利用电磁波的辐射和传播,经过空间传送信息的通信方式称之为无线电通信(Wireless Communication ),也称之为无线通信。

利用无线通信可以传送电报、电话、传真、数据、图像以及广播和电视节目等通信业务。

5COMPANY CONFIDENTIAL第二节无线通信使用的频率和波段目前无线通信使用的频率从超长波波段到亚毫米波段(包括亚毫米波以下),以至光波。

无线通信使用的频率范围和波段见下表1-1。

表1-1无线通信使用的电磁波的频率范围和波段6COMPANY CONFIDENTIAL表1-1无线通信使用的电磁波的频率范围和波段(续)7COMPANY CONFIDENTIAL表1-2无线通信中所使用的部分微波波段的名称8COMPANY CONFIDENTIAL第三节常用无线通信频段136MHz ~174MHzVHF450MHz ~950MHzUHF,SCDMA450,CDMA450800MHz ~1GHzGSM800,GSM900,CDMA8001.61GHz ~1.626.5GHzCompass Navigation Satellite System (uplink)1.7GHz ~2GHzGSM1800,GSM1900,PHS,CDMA1900,WCDMA9COMPANY CONFIDENTIAL2GHz ~2.2GHzTDSCDMA,WCDMA 2.4GHz ~2.5GHzWLAN 802.11b/g, Compass Navigation Satellite System (Downlink)2.5GHz ~2.7GHz LTE ,Wimax 3.4GHz ~3.8GHzWimax 5.6GHz ~5.8GHz WLAN 802.11a10COMPANY CONFIDENTIALRadarL band ,S band ,C band ,X band ,Ku band……应用:机载radar 、舰载radar 、电子对抗(DC ~18GHz )……11COMPANY CONFIDENTIAL 第二章功放基本概念辨析第一节功率单位简介第二节功率相关概念第三节线性相关概念第四节匹配相关概念第五节功放基本指标12COMPANY CONFIDENTIAL 第一节功率单位简介13 COMPANY CONFIDENTIAL14COMPANY CONFIDENTIAL 第二节功率相关概念15COMPANY CONFIDENTIAL16 COMPANY CONFIDENTIAL17COMPANY CONFIDENTIAL18COMPANY CONFIDENTIAL 第三节线性相关概念19COMPANY CONFIDENTIAL20COMPANY CONFIDENTIAL21COMPANY CONFIDENTIAL22COMPANY CONFIDENTIAL23COMPANY CONFIDENTIAL24COMPANY CONFIDENTIAL25COMPANY CONFIDENTIAL26COMPANY CONFIDENTIAL 第四节匹配相关概念在做射频PCB 板设计时,一定要考虑匹配问题,考虑信号线的特征阻抗是否等于所连接前后级部件的阻抗。

EVQ-QXS01W;EVQ-QXK01W;EVQ-QXM01W;EVQ-QXN01W;EVQ-QXK02W;中文规格书,Datasheet资料

EVQ-QXS01W;EVQ-QXK01W;EVQ-QXM01W;EVQ-QXN01W;EVQ-QXK02W;中文规格书,Datasheet资料

Ground Terminal Operating Force Without Without Without Without Without Without Without Without Without With With With With With With With With With 1.3 N 1.3 N 1.3 N 1.6 N 1.6 N 1.6 N 2.6 N 2.6 N 2.6 N 1.3 N 1.3 N 1.3 N 1.6 N 1.6 N 1.6 N 2.6 N 2.6 N 2.6 N
T
E C B
Item
A
B
C
D φ21.0±1.0 r 1.0±0.5
E 2.0±0.5
Rate (mm) φ370.0±2.0 φ50.0 min. φ13.0±0.5 Item W T — t 1.0 to 3.0
r
D
Rate (mm) 14.0±1.5
A
W
t
■ Recommended Shape of Test Pole
Snap action / Push-on type SPST 10 µA 2 Vdc to 20 mA 15 Vdc (Resistive load) 50 mȑ max. 50 M ȑ min. (at 100 Vdc) 250 Vac for 1 minute 3 ms max. (ON) 8 ms max. (OFF) 1.3 N±0.4 N 1.6 N±0.5 N 0.25 mm±0.10 mm 1000000 cycles min. –20 °C to +70 °C –40 °C to +85 °C (Bulk) –20 °C to +60 °C (Taping) H=2.0 mm H=2.5 mm, 3.1 mm H=2.0 mm H=2.5 mm, 3.1 mm 4000 pcs. Embossed Taping (Reel Pack) 2000 pcs. Embossed Taping (Reel Pack) 20000 pcs. 10000 pcs. 100000 cycles min. 2.6 N± 0.6 N

R1-MFG-DIFF生产课简介-20071108-NEW教程

R1-MFG-DIFF生产课简介-20071108-NEW教程

Side dummy
代产品
Dummy Dummy
Batch 1 17 25 2 25 3
Monitor Product Product
8pcs
5+25+20
Manual 补Dummy (下)代产品机台 解决方案:Multi lot in FOUP( 节省 、增加产 一定会 Idle !! 能、畸零片Wait time较长 )
Wafer transfer
Transfer stage
9.Boat elevator :程载Boat出.入Heater chamber 的传输 10.Shutter :隔离Heater chamber内部的热气散 发 Load port 11.Scavenger :排放Heater chamber外部热气的 装置 Depo 12.Notch aligner :用于芯片方向导正的装置
Page 4/48
IMP Purpose
半导体的离子植入的目的,是要将原本不导电的本质半导体(例如:纯硅)转 成可提供电子(N型,施体)或可提供电洞(P型,受体)的半导体. 对纯硅(Si), B元素的杂质能阶是很靠近硅的价带(valence band)顶端 , 而 P与As元素的杂质能阶是很靠近硅的导电带(conduction band)底端,所 以植入这些元素后,只要给予很少的热能,就能够产生游离(ionization)甚 至是全部游离,提供足够的电子或电洞。
Side dummy
Batch 1
Batch 2
Monitor Product Product
17 25 8
Monitor Product Product
8pcs 33+17
Page 27/48

apio2007

apio2007

如果你只移走围栏 13 中的动物,Ka-Shu 将高兴,因为有一个他害怕的动物 被移走。Alex, Polly, Chaitanya 和 Hwan 也会高兴,因为他们都可以看到至少一 个他们喜欢的动物。所以有 5 个小朋友会高兴。这种方法使得最多的小朋友高兴。
输入 输入的第一行包含两个整数 N, C,用空格分隔。N 是围栏数(10≤N≤10 000),
li和ri,描述杆i的左右两端悬挂的东西。如果挂的是一个玩具,则对应的值为-1, 否则为挂在下面的杆的编号。
如果杆位于风铃的 顶部。
输出 输出仅包含一个整数。表示最少需要多少次交换能使风铃满足 Ike 的条件。
如果不可能满足,输出-1。
样例输入 6 23 -1 4 56 -1 -1 -1 -1 -1 -1
4
第3题 动物园(Zoo)
输入文件:zoo.in 输出文件:zoo.out
时间限制:1 秒 内存限制:32M
新建的圆形动物园是亚太地区的骄傲。圆形动物园坐落于太平洋的一个小岛 上,它包含一大圈围栏,每个围栏里有一种富有异国风情的动物。如下图所示:
你是动物园的公关主管。你要做的是,让每个参观动物园的游客都尽可能高 兴。今天有一群小朋友来到动物园参观,你希望能让他们在动物园度过一段美好 的时光。但这并不是一件容易的事——有些小朋友喜欢某些动物,而有些小朋友 则害怕某些动物。例如,Alex 喜欢可爱的猴子和考拉,而害怕拥有锋利牙齿的 狮子。而 Polly 会因狮子有美丽的鬃毛而喜欢它,但害怕有臭味的考拉。
样例输出 2
说明 上面的样例输入给出了前面描述的示例情形。
评分 对于每一个测试点,如果你得到了正确的结果,得到该测试点 100%的分数,
否则得 0 分。
2

P1常见问题

P1常见问题

问题一.进入路由器界面默认的IP,用户名和密码答:两种方式:1、默认IP:http://192.168.0.1,2、。

在未设置路由前登录界面不需要用户名和密码即可登录。

问题二.如何复位答:复位方法有两种:1)软件复位:进路由器的配置界面点击导航栏第三项“路由器设置”—点击“恢复出厂设置”确定即可。

2)找到路由器外壳上的RESET按钮,通电情况下按1秒后松开。

路由器的灯会全闪一次然后重启,重启以后路由器就恢复到缺省状态。

问题三.如何升级答:1、在360官网下载相同型号最新固件,网址为:/thread-5193696-1-1.html,若为压缩文件,需要先解压,进路由器的配置界面点击导航栏第三项“路由器设置”—点击“系统升级”,然后点击“选择升级文件”,浏览选中升级文件,点击确定。

2、开启自动升级。

可手动点击版本检测,若检测到新版本,直接升级即可。

升级注意事项:路由器进行软件升级过程中,路由器不能断电,不能刷新升级界面将电脑和路由器用有线连接。

问题四.关于辐射问题答:在100mw以内,完全符合国家标准。

问题五.无线信号受哪些因素的影响及如何在现有的环境中改善信号传输质量答:无线信号传输主要受以下几个因素影响:1)家庭的空间都比较拥挤,空间不够开阔,其中房间中的墙壁是最主要的障碍物。

由于无线局域网采用的是无线微波频段,微波的最大特点就是近乎直线传播,绕射能力非常弱,因此身处在障碍物后面的无线接收设备会接到很微弱的信号,或没有收到信号。

2)物理的障碍物,不仅阻挡微波无线信号,它还能把电磁的能量给吸收掉,生成弱电流泄流掉,因此,无线信号在家庭环境中最大的金属物体的障碍物是内有钢筋网的楼板,这个方向的信号几乎没有穿透的可能,要能穿透,信号也是非常的弱。

3)IEEE 802.11b/g/n标准的工作频段为2.4GHz,而工业上许多设备也正好工作在这一频段如:微波炉、蓝牙设备、无线电话、电冰箱等。

如果附近有较强的磁场存在,那么无线网络肯定会受到影响。

全球多分辨率六边形网格剖分及地址编码规则

全球多分辨率六边形网格剖分及地址编码规则
若将不同层次上的编码隶属图形拼接可以清晰地看到六边形和梯形随着网格层次的深入被无限递归性分解中心处的六边形可以分解为梯形1个菱形和1个三角形图10球面h4i23网格的地址编码空间由于球的特殊拓扑特性使得六边形网格无法完全覆盖球体表面在采用二十面体作为剖分基础时其十二个顶点上必然会出现五边形对照这个规律发现所有三角面的角点正好是球体上出现五边形的位置图3采用中心部分和角点分开编码的方式避免了一套编码体系要同时处理五边形和六边形的问题降低了编码的复杂度
Abstract : Firstly , t he paper introduces t he application requirement of Global Grid System , discusses t he basic ele2 ment of regular polyhedron subdivision. On t he basis of t hem , t he new designing steps and creating algorit hm of storing2convenient , multi2resolution level index , potential management in icosahedrons dividing , hexagon unit global grid system are proposed. Then , shortcomings of existing hexagonal index mechanism are analyzed and a new com2 posing means is developed for spherical hierarchical structure , on t hose bases , an address coding means of spherical hierarchical structure is designed , we succeeded constructing t he grid coding space , discussing conversion problem from geodetic coordinates system to grid coding , proposing and realizing conversion algorit hm based on hierarchical recursive discrete grid coordinate system , t he veracity and reliability of computation can be assured. This structure can express and process multi2resolution global grid spatial data seamlessly. Key words : Global Grid System ; resolution ; coding space ; hierarchical structure

国际空运物流业务操作技巧讲课文档

国际空运物流业务操作技巧讲课文档
此外,航空公司不得接受货主指定装运某一特定飞机,或经由某一特定航线或指 定某一时间在某一指定机场办理转运,亦不得承诺在某一时间内完成运输。
第十二页,共42页。
可以向航空公司提出索赔之种类
A: DAMAGE: 1. VISIBLE DAMAGE (破损) 2. INVISIBLE DAMAGE 3. 受潮(雨淋) 4. 倒放
P1P_PAG PALLET Type: P1P、PAG PALLET Size - Base: 88〞x 125〞 - Hight: #64〞、x *96〞、**118〞 Weight Limitation Inc. ULD Tare Weight: 4,626 kg (LD),6,033kg (MD) Loadable Aircraft Type: 747,747F, 777, Airbus
由于航空公司费率皆以重量为计算单位,所谓收费重量(Chargeable Weight),所以对于体
积大而重量轻的货物,且将体积拆算为重量来收费。
其拆算标准如下: (1)英制 366 m3立方寸=1kg
即长×宽×高 ÷366=1kg ( 2 ) 公制6000CM3=1kg
即长×宽×高 ÷ 6000CM3=1kg 英吋×2.45= 公分
第九页,共42页。
航空货运物包装之基本要求
一、保护性:货物之包装状、数量等要适合搬运作业及保管,可使用垫 板(Pallets)或航空货柜(Igloo)包装,以配合机械操作。
三、经济性:依货品之品质选择强度合适而最轻的包装材料,以节省重量。 (1) 完全利用包装空间,使体积愈小愈好。 (2) 件数愈少愈好,尽量将多件货品归并为一个单位。
PMC_PQP_P6P PALLET Type: PMC, PQP, P6P PALLET Size - Base: 96” x 125”

6000米AUV深海试验研究

6000米AUV深海试验研究

达到减少位置偏差的目的。在文献[ 1] 中, 定性地研究了小襟翼对 AUV 潜浮运动的影响。在 AUV 深海试验
中, 采用这种方法经过计算后进行实际测量。 小襟翼力 T YJ 可以表示为[ 1] :
T YJ = 2RJcos cos45! = 2/ 2 U2JSJcos CJ
( 1)
式中: 为海水密度, UJ 为小襟翼来流速度, CJ 为小襟翼的水动力系数, SJ 为小襟翼的迎流面积, 为小襟 翼的安装角。
自治水下机器人( autonomous underwater vehicle) 自带能源, 与母船没有直接的物理连接, 具有水下作业期 间不依赖于母船、活动范围大、作业时间长和机动性好等优点, 已经广泛地应用在海底地形地貌勘察、海洋资 源调查、水文参数测量和生物考察等很多领域。由于海洋环境的复杂性和相关技术发展的局限性, 自治水下 机器人在水下作业仍存在一定的风险。通过深海试验研究不仅能够实际检验系统性能, 而且可以提高整机 系统的可靠性和作业的安全性, 丰富海上试验经验。
由悬浮状态, 记录单位时间内载体深度变化值, 来计算载体的浮力。在深海试验中, 根据单位时间内的深度 变化值, 计算深度变化率, 从而得到载体在某一深度下浮力的方向和大小。如果计算的浮力值超过一定的范 围, 应急处理程序可以终止当前的使命, 以降低 AUV 水下航行风险。
在深海环境中, 海流很小, 对载体产生的运动可以忽略不计。当 AUV 处于悬停状态时, 载体在一定深度 的垂直面上运动状态只与载体所受浮力和重力差值的大小、方向以及重心与浮心的位置有关, 故 AUV 在垂 直面上的运动方程[ 2] 可简化为:
AUV 在深海下潜的过程中, 不仅要考虑载体下潜时的深度变化率和纵倾角, 还要设法减小 AUV 入水点 与设定的水下开始工作点的水平位置偏差, 减小不必要的水下运动, 提高 AUV 作业效率。通过在艉部稳定

SAFE LAUNCH

SAFE LAUNCH
8
Purpose 目的
This procedure to establish a commodity safe launch process that will provide a phased approach towards process validation, a means of fine-tuning a process before volume ramp, process for building in quality and development of supplier processes that will help the Supplier to meet Lite-On’s quality expectations.
R&D :Product review for each gate; define the CTQ of individual part diagram , solve the critical design issue when it be found in safe launch process . 本程序之產品審查; 定義產品重要功能特性(CTQ)、並描述於零件承認書圖面中;解 決本程序中供應商生產所發現之設計面重大問題。
6
•DM: Demand of Market
Safe Launch Flow Chart 流程圖
NPI Phase
Flow Chart
EVT
Sample verification
R&D新零件開發: P1(G1,G2)供應商,
R&D new part development : P(G1,G2)
supplier
Plastic Injection, Metal Stamping, PCB) of G1(high risk, high spend) and G2(high risk, low spend) level key suppliers’ Safe Launch requirement, the key suppliers definition combined with spend and quality risk elements, the key supplier list integrated both 2 factors by SQM department. 本程序適用本公司供應商管理部所定義的P1( Lite-On Design Parts: Plastic Injection, Metal Stamping, PCB) 供應商之 G1(high risk, high spend)與G2(high risk, low spend)類型廠商 之管理要求,重點供應商名冊會依照營業額與品質風險綜合評比 後定義。

不确定证据下的后验概率集结

不确定证据下的后验概率集结

第7卷第21期2007年11月167121819 ( 2007) 2125553205 科学技术与工程Science Techno log y and EngineeringVo l. 7 No. 21 Nov. 2007Ζ2007 S ci. Tech. Eng ng.计算机技术不确定证据下的后验概率集结李玉玲1, 2 吴祈宗13 王伟平1 郑恒1(北京理工大学管理与经济学院1 ,北京100081;河南大学数据与知识工程研究所2 ,开封475001)摘要仸何变量的后验概率计算都假定证据变量E是确定的,无法处理不确定证据下的后验概率。

针对这个问题,提出在贝叶斯网络及其扩展的Credal网络中应用证据出现的概率对后验概率迚行折中处理,幵用不确定的Credal集表达其结果,从一定程度上为决策人员提供有意义的决策依据。

最后,结合G eN Ie软件,应用实例说明了该方法的有效性和合理性。

关键词贝叶斯网络Credal网络概率集结Credal set中图法分类号TP181; 文献标识码 A贝叶斯网络具有强大的表达不确定性知识和迚行不确定性推理的能力, 可融入先验知识、有效避免数据过度拟合等优点,幵且已在各行业中得到广泛的应用[ 1 ] 。

然而, 在参数建模上, 有时很难得到精确的条件概率表。

当多个专家共同估计一个节点上的概率表时,难以达成共识[ 2 ] 。

贝叶斯网络不能精确地表达这种不确定性,也不能处理这种不确定性。

Credal网络是贝叶斯网络的扩展,通过概率集合在概率值上引入不确定性,来表示参数概率上的不完备和模糊知识。

Credal网络的本质是将局部概率“放宽”的贝叶斯网络[ 3 ] 。

所谓“放宽”,是指不必为每个节点指定在其父节点一定配置下的唯一的概率分布,可以用概率区间、不等式等不同的概率测度表达专家的不确定性。

这样,就可得到一个与该节点相关的概率测度的集合。

概率测度的闭环凸集称为Credal集(Credal set) [ 4 ] 。

bandgap仿真

bandgap仿真
21/32
Vout VS Vdd
2007-4-27
22/32
目前性能较好的几种电路
2007-4-27
23/32
高阶温度补偿的带隙基准电路1
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VBE1 VBE2 R3
VT R3
ln
IC1 A2 A1I C 2
VT R3
ln
NI PTAT I NL ICons tant
工艺:Bipolar
Reference: G.M.Meijer et. Al., “A New CurvatureCorrected Bandgap Reference,” IEEE Journal of Solid-State Circuits, vol.17, NO.6, PP. 1139-1143, DEC,1982.
VX VY
VY VX
VX VY
VY VZ
VZ VX
dVZ
M2
M3
VX
gM4,5,6
VY
Vout=VZ
AV
VZ Vdd
VZ VX
VX Vdd
1
VX VY
VY VX
VX VY
VY VZ
VZ VX
CC
Rs
gM1
rX
rY
Bias
三支路bias电路: 存在VX-VZ-VY-VX负反馈支路
gM4,5,6
dVZ
VZ Vdd
dVdd
VZ VX
dVX
VZ Vdd
VZ VX VX Vdd
VZ VX VY VX VY Vdd
VX VY VZ VY VX Vdd
dVdd
VX VY
VY VX
VY VZ
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This document consists of 11 printed pages and 1 blank page.IB07 11_0455_01/3RP© UCLES 2007[Turn over*5018888412*UNIVERSITY OF CAMBRIDGE INTERNATIONAL EXAMINATIONS International General Certificate of Secondary EducationECONOMICS 0455/01Paper 1 Multiple Choice (Core) October/November 20071 hourAdditional Materials: Multiple Choice Answer Sheet Soft clean eraserSoft pencil (type B or HB is recommended)READ THESE INSTRUCTIONS FIRSTWrite in soft pencil.Do not use staples, paper clips, highlighters, glue or correction fluid.Write your name, Centre number and candidate number on the Answer Sheet in the spaces provided unless this has been done for you.There are forty questions on this paper. Answer all questions. For each question there are four possible answers A , B , C and D .Choose the one you con sider correct an d record your choice in soft pencil on the separate An swer Sheet.Read the instructions on the Answer Sheet very carefully.Each correct answer will score one mark. A mark will not be deducted for a wrong answer. Any rough working should be done in this booklet.21What is found in a command economy but not a market economy?A banksB division of labourC price controlsD profit motive2Commercial companies are reclaiming marsh land to construct golf courses.What is the opportunity cost to society?A the expense of installing drainageB the natural environment that is lostC the profits of the companiesD the value of the land cleared3There are more people in developing countries who cannot read or write than in developed countries.What can be concluded from this?A Developed countries will use more labour than capital as it is skilled.B In developing countries, factors of production are not used to their maximum potential.C Less money needs to be spent on education in developed countries than in developingcountries.D Production in developing countries is likely to rely more on capital than labour.4In wartime conditions, cigarettes have been used as money.What disadvantage do cigarettes have for trading compared with notes and coins?A They cannot act as a medium of exchange.B They have no intrinsic value.C They lack durability.D They make a double coincidence of wants necessary.© UCLES 2007 0455/01/O/N/0735 A farmer employs one man to plough a large field.As well as labour, which factors of production are involved in this activity?A land and capital onlyB land and enterprise onlyC capital and enterprise onlyD land, capital and enterprise6In most countries which organisation controls the banking system?A central bankB commercial bankC investment bankD World Bank7In 2001 some countries, including India and Pakistan, criticised the European Union for continuing to protect European farmers with a subsidy while expecting poorer African countries not to restrict trade.What are not involved in this situation?A developing and developed economiesB free trade and protectionC market prices and official interventionD multi-nationals and public corporations8Which type of business organisation has its shares quoted on a stock exchange?A private companyB public companyC co-operativeD public corporation9What is the main purpose of a trade union?A to achieve profit maximisationB to encourage free tradeC to promote private ownership of industryD to protect the interests of its members© UCLES 2007 0455/01/O/N/07[Turn over© UCLES 20070455/01/O/N/0710 The graph shows changes in house prices in a developed country.% change in house pricesF eb r u a r y M a rc hA p r i lMa yJ u neJ ul y2002What might have caused these changes in prices? A an increase in government subsidies to house builders B an increase in incomeC an increase in the supply of housesD an increase in unemployment11 Sometimes travel companies advertise holidays at prices below cost.What might be a reason for this?A an excess demand for holidaysB an excess supply of holidaysC a price inelastic demand for holidaysD insufficient competition in the holiday market12 The table shows demand and supply schedules for a commodity.price ($ per tonne)quantity demanded (tonnes per month)quantity supplied (tonnes per month)20 400 1600 18 480 1200 16 600 600 14 800 480 12 1200320What is the equilibrium price? A $20 B $18 C $16 D $14© UCLES 2007 0455/01/O/N/07[Turn over13 A country imports oil which is used in the production and distribution of goods. The country hasalso experienced a rise in incomes which has resulted in a large increase in the demand for goods, some of which it imports.What is likely to happen to the country’s balance of trade in goods and to the price of oil?balance of trade ingoodsprice of oilA worsens fallsB improves fallsC worsens rises Dimproves rises14 X is the equilibrium point for a company that sells advertising space. During the year, the demandfor advertising decreased and the company’s labour cost increased.What would be the new equilibrium?quantity of advertising spaceprice of advertisingspace15 In developed economies, as a person’s real income rises, a lower proportion of that income isusually spent onA food.B holidays.C leisure activities.D personal transport.16What would cause disposable incomes to become less equal?A increased employmentB increased welfare benefitsC more progressive taxesD more regressive taxes17Which occupation would suit a person who wanted to work in the public sector?A a journalist for an independent newspaperB a nurse in a government hospitalC a sales manager for a multi-national food businessD a teacher in a private fee-paying school18Male workers on average get paid more than female workers.What might explain this?A Male workers have better qualifications.B Female workers are more likely to be in trade unions.C Male workers live nearer to their place of work.D Female workers are less likely to take time off work.19 A firm manufactures toys.Which cost will vary least as output and sales increase?A distribution to retailersB insurance payments on the factoryC wages of production workersD raw materials20In 2005, world oil prices increased significantly.What effect would an increase in oil prices have on a firm that transports products for other firms?A average fixed costs would increaseB profits would increaseC total fixed costs would increaseD variable costs would increase© UCLES 2007 0455/01/O/N/0721Which statement is correct?A Average revenue is total revenue divided by output.B Fixed cost is total cost plus variable cost.C Total cost is variable cost multiplied by fixed cost.D Total revenue is fixed revenue minus variable revenue.22What is a firm seeking profit maximisation trying to achieve?A the fastest rate of profit growthB the highest level of profit per unit producedC the highest level of total profitD the lowest level of total cost23The table shows earnings and total income tax paid per annum.earnings $ total income tax paid $5000 10008000 20009000 3000Which type of tax system does this illustrate?A indirectB progressiveC proportionalD regressive24Which policy would best enable a government to encourage greater specialisation in the use of its country’s resources?A encouraging diversification in industryB protecting small businessesC reducing tariffs on importsD subsidising job creation in rural areas© UCLES 2007 0455/01/O/N/07[Turn over25What could a government in a developed economy do to increase demand?A create a budget surplusB increase taxesC reduce government spendingD reduce interest rates26 What is not an aim of government economic policy?A economic growthB full employmentC interest ratesD stable prices27Which situation would definitely cause a fall in real incomes?price level money income levelA falls risesB falls unchangedC rises risesD rises unchanged28 What would not be required in the construction of an index of consumer prices (retail priceindex)?A the selection of a base yearB the selection of a representative range of itemsC the calculation of average wage levelsD the weighting of each item in the index© UCLES 2007 0455/01/O/N/07© UCLES 2007 0455/01/O/N/07[Turn over29 The graph shows the annual percentage changes in Mexico’s GDP between 1994 and 1999.1050–5–10annual %change in GDP199419951996199719981999yearWhich conclusion may be drawn from the graph? A GDP fell between 1998 and 1999. B GDP rose between 1997 and 1998. C GDP was highest in 1997. D Prices fell in 1995.30 What is likely to lead to a decrease in structural unemployment?A reducing the interest rateB increasing the rate of unemployment benefitC reducing the rate of income taxD increasing labour mobility31 The diagram shows China’s trade with Brazil for 1999 and 2003 in billions of dollars.Exports Imports19992003What happened to China’s trade balance with Brazil between 1999 and 2003?A It experienced a falling surplus.B It experienced a rising deficit.C It moved from deficit to surplus.D It moved from surplus to deficit.32What might explain the high population growth in some developing countries?A high birth rates and falling death ratesB high immigration and low emigrationC falling birth rates and rising death ratesD falling life expectancy33Turkey’s agricultural sector employs 48% of the country’s workforce compared with 17% in the US and 3.9% in France.What could be concluded from this?A France is likely to import more agricultural produce than the US.B The workers in France are not as productive as those in Turkey.C Total agricultural production is likely to be higher in Turkey than in the US.D Turkey is likely to be less developed than France.34Changes in the standard of living of a country are best measured by changes inA national income.B national income per head.C real national income.D real national income per head.35As a country develops, what is most likely to happen?A A greater proportion of the workforce will be employed in the service sector.B The average age will decrease.C The birth rate will increase.D There will be reduced occupational mobility of labour.36Firms often advertise saying that they specialise in providing a certain product or service.What is an advantage of such specialisation?A Employees become experts in that area.B Employees can easily switch to other jobs.C Firms can quickly adapt production if their service is no longer required.D Production is dependent on other firms supplying components.© UCLES 2007 0455/01/O/N/0737What directly sets a fixed limit on the quantity of goods which can be imported?A administrative regulationsB foreign exchange controlsC quotasD tariffs38 A water pump has been invented which is operated when people play on a roundabout in thevillage. The roundabout provides the power to pump water from the well.Of what is this an example?A conserving labour and conserving natural resourcesB conserving labour and using natural resourcesC using labour and conserving natural resourcesD using labour and using natural resources39The governments of developing countries often allow multi-nationals to mine minerals in their territory.Which conflict between possible benefit and cost does this present to the developing country?benefit costA improved balance of trade increased training by the companiesB higher employment loss of finite resourceC increased profits for the companies more efficient productionD more sustainable development faster economic growth40The introduction of a tariff on imported goods is likely toA ensure that the domestic industry becomes more efficient.B increase the demand for domestically produced goods.C reduce the price of domestically produced goods.D reduce the price of imported goods into a country.© UCLES 2007 0455/01/O/N/07BLANK PAGEPer mission to r epr oduce items wher e thir d-par ty owned mater ial pr otected by copyr ight is included has been sought and clear ed wher e possible. Ever y reasonable effort has been made by the publisher (UCLES) to trace copyright holders, but if any items requiring clearance have unwittingly been included, the publisher will be pleased to make amends at the earliest possible opportunity.University of Cambridge International Examinations is part of the Cambridge Assessment Group. Cambridge Assessment is the brand name of University of Cambridge Local Examinations Syndicate (UCLES), which is itself a department of the University of Cambridge.0455/01/O/N/07。

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