AnalogtoDigitalConversion

( )( ) n =
Vin − V−ref
2N −1 +1/ 2
V+ref − V−ref
int
( ) n = (Vin ) 2N −1 +1/ 2
V+ref
int
if V-ref = 0v
( ) n = 3.30v 210 −1 +1/ 2 = 675
5v
int
Embedded Systems
8-4
0011
Missing Code
significantly less than the
0010
range of the analog input of 0001
the A/D.
0000
-10 V
Input Voltage
10 V
Embedded Systems
8-5
A/D – Flash Conversion
Embedded Systems
8-2
From Analog to Digital
Embedded systems often need to measure values of physical parameters These parameters are usually continuous (analog) and not in a digital form which
Integrator
Comparator -
+
+ -
Control Logic Counter
Comparator output
Clock
Embedded Systems
8-8
ADC - Successive Approximation Conversion
Successively approximate input voltage by using a binary search and a DAC
computers (which operate on discrete data values) can process A Comparator is a circuit which compares an analog input voltage with a
reference voltage and determines which is larger, returning a 1-bit number An Analog to Digital converter [AD or ADC] is a circuit which accepts an analog
A multi-level voltage divider is used to set voltage levels over the complete range of conversion.
A comparator is used at each level to determine whether the voltage is lower or higher than the level.
Analog Input (Va)
Digital Output Start of Conversion
Status
Integrator
+
Comparator
-
-
+
VF
+
-
Decimation
Digital FБайду номын сангаасlter
Control Logic
Comparator output Bit stream
Encoder 3 8-6
ADC - Dual Slope Integrating
Operation
– Input signal is integrated for a fixed time
– Input is switched to the negative reference and the negative reference is then integrated until the integrator output is zero
– This A/D does not work well if switched from channel to channel because of the delay until a valid result
Embedded Systems
8-11
A/D - Sigma / Delta
Sigma / Delta
input signal (usually a voltage) and produces a corresponding multi-bit number at the output.
Embedded Systems
8-3
ADC Basic Functionality
n = converted code Vin = sampled input voltage V+ref = upper end of input voltage range V-ref = lower end of input voltage range N = number of bits of resolution in ADC
– The time required to integrate the signal back to zero is used to compute the value of the signal
– Accuracy dependent on Vref and timing
Characteristics
Embedded Systems
8-12
ADC Performance Metrics
Linearity measures how well the transition voltages lie on a straight line.
Differential linearity measure the equality of the step size.
Test voltage (DAC output)
Analog Input
Voltage
1xxxxx 10xxxx 100xxx 1001xx 10011x 100110
111111
100110 100100 100000
T1 T2 T3 T4 T5 T6
Start of
Time
EmbedCdeodnSveysrtseimons
Analog to Digital Conversion
Lecture 8
Embedded Systems
8-1
In These Notes . . .
Analog to Digital Converters
– ADC architectures – Sampling/Aliasing – Quantization – Inputs – M30262 ADC Peripheral
Conversion time:between start of conversion and generation of result
Conversion rate = inverse of conversion time
Embedded Systems
8-13
Waveform Sampling and Quantization
000000
8-9
A/D - Successive Approximation
Converter Schematic
Analog Input
+
Converter Schematic
-
Comparator output D/A Converter
Digital Output
Start of Conversion Status
– The average value of VF is forced to equal Va.
– VF is a digital pulse stream whose duty cycle is proportional to Va
– This pulse stream is sampled digitally and averaged numerically (decimation) giving a numerical representation of Va
– Noise tolerant (Integrates variations in the input signal during the T1 phase)
– Typically slow conversion rates (Hz to few kHz)
Slope proportional to input voltage
1 C
T1
Vin dt
0
=
−
1 C
T2
Vref
0
dt
Vin
= Vref
T2 T1
Embedded Systems
8-7
ADC - Dual Slope Integrating
Analog Input (Va)
Start of Conversion Status
Digital Output
-Vreference 12
Digital value
time
A waveform is sampled at a constant rate – every ∆t
Nominal Quantized value + 1/2 LSB
– Missing codes or the
1100
imperfections where
1011
increasing voltage does not 1010
Output Code Output Code
result in the next step being 1001
The series of comparator outputs are encoded to a binary number in digital logic (an encoder)
1V 3R 2R
2R
2R
2R
2R
2R
R
Vin Embedded Systems
Comparators
+ + + + + + + -
SA Register holds current approximation of result
Repeat
– Set next bit input bit for DAC to 1
– Wait for DAC and comparator to stabilize
– If the DAC output (test voltage) is larger than the input then set the current bit to 1, else clear the current bit to 0
– The error in the average or
mean is:
σµ
=
σ
n
– The greater the number of
samples averaged, the greater
the accuracy
– The greater the number of
samples averaged, the greater the time between the start of gathering samples and the output of the mean (group delay)
12
Successive
Approximation
Register
Clock
Embedded Systems
8-10
A/D - Sigma / Delta
Operation
– Comparator feedback signal is subtracted from analog input and the difference is integrated.
output are described as non- 1000
monotonicity.
0111
1 LSB
– Errors in A/D conversion
0110
may be significant
0101
particularly if the full range of 0100
the analog signal is
ADC Transfer Function
The ideal output from an A/D converter is a stair-step function (see right)
– Ideal worst case error in
conversion is ± 1/2 bit.
1101