SNC549中文资料

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运算放大器(AD549)应用中文技术资料

极低偏置电流运算放大器AD5491 概述AD549是具有极低输入偏置电流的单片电路静电计型运算放大器。

为达到高精度的目的，输入偏置电压和输入偏置电压漂移均通过激光调节。

这种极低输入电流性能由ADI公司专有的topgate工艺技术完成。

该技术可以制造与具有极低输入电流的JFET并与双极性电路隔离的集成运放。

输入级具有1015Ω的共模阻抗，其输入电流与共模电压无关。

AD549适用于低输入电流和低输入偏置电压的场合。

它特别适合用作各种电流输出的传感器，如光电二极管、光电倍增管以及氧气传感器等的前置放大器。

该产品也可用作精密积分器或低衰减采样保持器。

AD549的封装与标准FET和静电计运算放大器兼容，因此用户花少量成本即可对系统升级，提高已有系统的性能。

AD549有TO-99密封封装。

金属外壳与8管脚相连，使得金属外壳与同样电压的输入终端独立连接，达到降低外壳泄漏的目的。

AD549具有四种性能等级。

其中J、K和L型号的温度范围是0℃到70℃。

S型号专用于军事，其温度范围：-55℃到125℃。

AD549的输入电流在整个共模输入电压范围内都得到保证，其输入失调电压和漂移由激光分别调节到0.25mV和5μV/℃(AD549K)；1mV和20μV/℃(AD549J)。

700μA的最大静态电流使输入电流和偏置电压的热效应降到最低。

模拟性能包括1MHz的均匀增益带宽和3V/μs的压摆率。

当输入为10V时，建立时间是5μs 到0.01%。

2 AD549的引脚及特性参数图一所示是AD549的引脚图，表一所示是其特性参数。

图一AD549引脚图表一AD549的主要特性nV/ nV/ nV/ nV/3 AD549的工作原理3.1 最小化输入电流AD549具有很小的输入电流和失调电压。

在实际应用中应谨慎考虑如何使用放大器可以减小输入电流。

为减小输入电流，该放大器的工作温度应尽可能低。

像其他JFET输入放大器一样，AD549的输入电流对芯片温度很敏感，上升斜率因子为每10℃的2.3。

基于TLC549的温度采集系统

基于TLC549的温度采集系统摘要关键词：温度采集、AD转换、AT89C51、四段七位数码管静态显示本次课程设计主要是用AD590、AT89C51、TLC549和四段七位静态数码管设计一个简易温度采集系统。

用AD590采集温度信号，输出一个模拟电压信号，输入到TLC549模拟信号输入端，用单片机控制TLC549转换，转换成的数字信号利用单片机存入累加器A中，在累加器A中对该数字信号进行操作，转换成十进制后，经过74LS164将段码送到四位七位数码管中，并显示该十进制数（带小数点），即温度值。

该系统的主要功能是采集一个温度信号，经过一系列转换后，将该温度显示出来，采集的温度范围为0到67度，误差在5%左右，显示的最大值为63.75度。

在编写程序之前，首先要了解实验台上各各模块的电路图及原理，然后再学会用程序控制它。

用Keil C软件装载、下载、编译程序，并与伟福仿真器联用调试，逐步改正错误，最后实现实验要求。

然后再改进程序，添加注释，使程序条理清晰，明白易懂。

最后的最后，答辩，写报告。

目录第一章系统方案 (3)1.1设计内容 (3)1.2设计要求 (3)1.3设备及工作环境 (3)第二章理论分析与计算 (4)2.1设计思路 (4)2.2硬件结构及原理电路图 (4)2.3重要硬件元件功效阐明 (6)第三章程序设计 (7)3.1分析论证 (7)3.2程序流程图 (8)3.3程序清单： (9)第四章结果分析 (15)第五章总结 (15)参考文献 (16)第一章系统方案1. 1设计内容利用温度传感器AD590采集温度信号，并调理放大采集到的电压信号，用TLC549进行电压转换，实现温度采集，并将采集温度显示出来。

1. 2设计要求（1）在综合单片机实验台的硬件结构上编写软件完成设计。

（2）程序的首地址应使目标机可以直接运行，即从0000H开端。

（3）四位显示器数码管从右到左分辨显示，显示xx.xx（最高温度为63.75度）。

芯片TLC549介绍(中文的)

8位串行模数转换器TLC548、TLC549的应用1. 概述TLC548，TLC549是美国德州仪器公司生产的8位串行A/D转换器芯片，可与通用微处理器、控制器通过CLK、CS、DATA OUT三条口线进行串行接口。

具有4MHz片内系统时钟和软、硬件控制电路，转换时间最长17μs，TLC548允许的最高转换速率为45 500次/s，TLC549为40 000次/s。

总失调误差最大为±0.5LSB，典型功耗值为6mW。

采用差分参考电压高阻输入，抗干扰，可按比例量程校准转换范围，V REF-接地，V REF+－V REF-≥1V，可用于较小信号的采样。

2. 芯片简介2.1 TLC548、TLC549的内部框图和管脚名称TLC548、TLC549的内部框图和引脚名称如图1所示。

2.2 极限参数TLC548/549的极限参数如下：●电源电压：6.5V；●输入电压范围：0.3V～V CC＋0.3V；●输出电压范围：0.3V～V CC＋0.3V；●峰值输入电流(任一输入端)：±10mA；●总峰值输入电流(所有输入端)：±30mA；●工作温度：TLC548C、TLC549C：0℃～70℃TLC548I、TLC549I：－40℃～85℃TLC548M、TLC549M：－55℃～125℃3. 工作原理TLC548、TLC549均有片内系统时钟，该时钟与I/O CLOCK是独立工作的，无须特殊的速度或相位匹配。

其工作时序如图2所示。

当CS为高时，数据输出(DATA OUT)端处于高阻状态，此时I/O CLOCK 不起作用。

这种CS控制作用允许在同时使用多片TLC548、TLC549时，共用I/O CLOCK，以减少多路(片)A/D并用时的I/O控制端口。

一组通常的控制时序为：(1)将CS置低。

内部电路在测得CS下降沿后，再等待两个内部时钟上升沿和一个下降沿后，然后确认这一变化，最后自动将前一次转换结果的最高位(D7)位输出到DATA OUT端上。

LC549中文资料

LC549/LV549/LD549 DATA SHEETHigh Power Class BOutput StageFEATURES•40dB of electrical gain• 1.0 to 1.6 VDC supply operating range •current trim capability (R T )•high efficiency class B output stage•may be used with a linear or compression preamplfier STANDARD PACKAGING •8 pin MICROpac (LC549)•8 pin MINIpac•8 pin PLID ® (LC549, LD549)•Chip (47 x 40 mils) (LC549, LD549)DESCRIPTIONThe LC/LV/LD549 is an 8 pin, low voltage, push-pull audio frequency output stage amplifier with a single unbalanced input. The circuit utilizes two internal negative feedback loops to stabilize the DC operating point for temperature stability and to linearize the transfer function over a wide dynamic range. The circuit operates near ideal class B conditions resulting in low distortion and very low quiescent current, required for extended battery life.The LC549, LV549 and LD549 differ in only one respect;the LV549 and LD549 are selected devices which are capable of delivering from 10 mA to 41 mA and from 36 mA to 75 mA of output current respectively. These values are the maximum current drawn with both output stage transistors in saturation. Thus the LD549 is capable of producing a high output in a low impedance load, the LV549 is selected to have lower peak currents, extending the life of the battery.U.S. Patent No. 4,085,382Patented in other countriesBLOCK DIAGRAMR T V BINPUTDEC 1 DEC 2GNDGENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946Japan Branch: A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168, Japan tel. (03) 3334-7700 fax: (03) 3247-8839Document No. 500 - 25 - 09Revision Date: January 20012500 - 25 - 09SEQUENCE CONDITIONS COMMENTS 1 Power Supply Off 2S1Closed Removes V IN3S2 / S3Closed Discharges C2 and C34 S1Open Applies V IN (V IN level is determined from Gain Test) 5S2 / S3Open Removes short from C2 and C36Power SupplyOn7Gain must be within specification, within 3 seconds after power supply is turned onABSOLUTE MAXIMUM RATINGSPARAMETER VALUE & UNITSSupply Voltage 3 VDC Power dissipation 60 mWOperating Temperature -10 to + 40 °C Storage Temperature-20 to + 70 °CPIN CONNECTIONR T I/P DEC2V B GNDOUT1OUT2ELECTRICAL CHARACTERISTICSConditions: Temperature 25 o C, Supply Voltage V B = 1.3 VDCAll switches and parameters remain as shown in test circuit unless stated in condition columnPARAMETER SYMBOL CONDITION MIN TYP MAX UNITSGainA CL V OUT = 0.707 V RMS384042dB Quiescent CurrentI AMP 100-400µA I TRANS 170-370µA I TOT-500770µAMaximum Drive CurrentV1 = 0V (S2, S3 closed)V4 = 0V LC549103575mA LV54910-41mA LD549365075mA Input Impedance182736k ΩTotal Harmonic Distortion & NoiseTHDV OUT = 0.707 V RMS -0.5-%V OUT = 1.3 V RMS- 2.5 5.2%Input Referred Noise IRN NFB 0.2 to 10 kHz at 12 dB/oct (S1 closed)- 1.2 2.5µV Start Up Time--3secSTART-UP TIME TEST (Refer to Test Circuit)3500 - 25 - 09Fig. 1 Test CircuitAll resistors in ohms, all capacitors in farads unless otherwise stated U.S. Patent No. 4,085,382 - Patented in other countriesFig. 2 Equivalent CircuitV = R T = 600Ω1kHzAll resistors in ohms, all capacitors in µF unless otherwise statedGain = 20 Log 10( ) +40 dB VOUT VIN=∞4500 - 25 - 09V B=1.3VDCMICTEMPERATURE °CFig. 4 Volume Gain vs Battery VoltageFig. 5 Quiescent Current vs Battery VoltageFig. 6 Quiescent Current vs TemperatureFig. 7 Gain vs Temperature-20 -10 0 10 20 30 40 50 60 7041.040.239.438.637.837.0464442403836A V (dB )V B (V)V B (V)I Q (µA )I Q (µA )-20 -10 0 10 20 30 40 50 60 70TEMPERATURE (°C)A V (dB )8007006005004003000.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.85325245165085004920.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.85500 - 25 - 09R E L A T I V E V O L T A G E G A I N (d B )Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.© Copyright January 1981 Gennum Corporation. All rights reserved. Printed in Canada.P O W E R O U T P U T (m V )I Q (µA )A V (d B)0 4 8 12 16 20 24 260.01 0.1 1.0 10 10012108642LDLC-0 200 400 600 800 1k41403938373640.440.240.039.839.6550500450400350300250200LOAD R L (Ω)FREQUENCY (kHZ)Fig. 9 Voltage Gain vs FrequencyFig. 8 Power Output vs Load Resistance at 7% Distortion R B = 0Ω1 10 100 1KSUPPLY VOLTAGE (V)Fig. 11 Voltage Gain vs Battery ResistanceFig. 10 Quiescent Current vs Current Trim Resistor R T(k Ω)DOCUMENT IDENTIFICATIONPRODUCT PROPOSALThis data has been compiled for market investigation purposes only, and does not constitute an offer for sale.ADVANCE INFORMATION NOTEThe product is in a development phase and specifications are subject to change without notice. Gennum reserves the right to remove the product at any time. Listing the product does not constitute an offer for sale.PRELIMINARY DATA SHEETThe product is in preproduction phase and specifications are subject to change without notice.DATA SHEETThe product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible.。

目前常用的AD芯片（TI公司）

⽬前常⽤的AD芯⽚（TI公司）⽬前AD/DA的常⽤芯⽚介绍：TI公司AD/DA器件：1)TLC548/549TLC548和TLC549是以8位开关电容逐次逼近A/D转换器为基础⽽构造的CMOSA/D转换器。

它们设计成能通过3态数据输出与微处理器或外围设备串⾏接⼝。

TLC548和TLC549仅⽤输⼊/输出时钟和芯⽚选择输⼊作数据控制。

TLC548的最⾼I/OCLOCK 输⼊频率为2.048MHz,⽽TLC549的I/OCLOCK输⼊频率最⾼可达1.1MHz。

TLC548和TLC549的使⽤与较复杂的TLC540和TLC541⾮常相似；不过，TLC548和TLC549提供了⽚内系统时钟，它通常⼯作在4MHz且不需要外部元件。

⽚内系统时钟使内部器件的操作独⽴于串⾏输⼊/输出端的时序并允许TLC548和TLC549象许多软件和硬件所要求的那样⼯作。

I/OCLOCK和内部系统时钟⼀起可以实现⾼速数据传送，对于TLC548为每秒45,500次转换，对于TLC549为每秒40,000次的转换速度。

TLC548和TLC549的其他特点包括通⽤控制逻辑，可⾃动⼯作或在微处理器控制下⼯作的⽚内采样-保持电路，具有差分⾼阻抗基准电压输⼊端，易于实现⽐率转换(ratiometricconversion).定标(scaling)以及与逻辑和电源噪声隔离的电路。

整个开关电容逐次逼近转换器电路的设计允许在⼩于17µs的时间内以最⼤总误差为±0.5最低有效位(LSB)的精度实现转换。

2)TLV5616TLV5616是⼀个12位电压输出数模转换器(DAC),带有灵活的4线串⾏接⼝，可以⽆缝连接TMS320.SPI.QSPI和Microwire串⾏⼝。

数字电源和模拟电源分别供电，电压范围2.7～5.5V。

输出缓冲是2倍增益rail-to-rail输出放⼤器，输出放⼤器是AB类以提⾼稳定性和减少建⽴时间。

rail-to-rail输出和关电⽅式⾮常适宜单电源。

TLC1549中文资料

TLC1549中文资料2009-08-14 21:52TLC1549C ， TLC1549I ， TLC1549M 10位模拟数字转换器(A/D)串行控制＃10位分辨率A / D转换器＃固有的采样保持＃未经调整的总误差........± 1 LSB的最大值＃片上系统时钟＃终端兼容TLC549和TLV1549＃CMOS工艺描述该TLC1549C ， TLC1549I ，并TLC1549M 有10位，开关电容，successiveapproximation 模拟数字转换器。

这些器件有两个数字输入和一个3态输出[片选（ CS ）的，输入输出时钟（ I / O时钟）和数据输出（数据） ]的提供三线接口，串口主机处理器。

该采样保持功能是自动的。

那个转换纳入这些设备的特点差分高阻抗基准投入便利比率转换，缩放，和隔离模拟电路的逻辑和供应噪音。

开关电容设计，让lowerror 转换的整个经营自由空气温度范围。

该TLC1549C运作的特点是从0 ° C至70 °角该TLC1549I的特点是操作从-40 ° C 至85 ° C该TLC1549M特点是操作，在整个军事温度范围 -55 ℃至125 ℃之间。

管脚说明:ANALOG IN (2):模拟信号输入。

驱动源阻抗应该是3月1日千瓦。

外部驱动源的模拟,应该有一个电流能力。

一十毫安。

CS (5):芯片选择。

高向低过渡的政务司司长重置内部计数器和控制，使数据和I / O时钟内最大的一个设置时间加上两个属于边缘内部系统时钟。

低到高过渡禁用I / O时钟设置时间内下降的边缘加两国的内部系统时钟。

DATA OUT (6):这3态串行输出的A / D转换结果是在高阻抗状态时，政务司司长高，积极当政务司司长低。

以有效的芯片选择，数据是从高阻抗状态，并驱车前往相应的逻辑电平的最高有效位价值先前的转换结果。

下一个下降沿的I / O 时钟驱动器DATAOUT的逻辑水平相应的下一个最重要的一点，其余位转移，以便与LSB的出现在第九届下降沿的I / O时钟。

芯片TLC549,TLC548介绍_中文的_

具有4MHz片内系统时钟和软、硬件控制电路，转换时间最长17μs，TLC548允许的最高转换速率为45 500次/s，TLC549为40 000次/s。

总失调误差最大为±0.5LSB，典型功耗值为6mW。

采用差分参考电压高阻输入，抗干扰，可按比例量程校准转换范围，V REF-接地，V REF+－V REF-≥1V，可用于较小信号的采样。

2. 芯片简介2.1 TLC548、TLC549的内部框图和管脚名称TLC548、TLC549的内部框图和引脚名称如图1所示。

其工作时序如图2所示。

当CS为高时，数据输出(DATA OUT)端处于高阻状态，此时I/O CLOCK 不起作用。

这种CS控制作用允许在同时使用多片TLC548、TLC549时，共用I/O CLOCK，以减少多路(片)A/D并用时的I/O控制端口。

一组通常的控制时序为：(1)将CS置低。

EN549中文版

英国标准规范于燃气器具、设备密封件和膜片用橡胶材料欧洲标准EN549 ：1994年以来的英国标准未经BSI允许不得拷贝此英国标准责任委员会此英国标准委托GSE/22技术委员会进行编辑，燃气具的安全与控制如下所诉：控制器制造商协会（TAMCA(BEAMA有限公司英国电器制造厂商协会)）;英国燃气公司(英国)贸工部（消费者安全协会，加利福利亚分部）液化石油气协会英国燃气工业协会修订后出版发行委员会指导编辑，标准委员会权威发行，于1995年5月15日实施。

此后BSI条款涉及工作标准：GSE/22 标准委员会92/82881 DC 征求意见稿前言此英国标准委托GSE/22技术委员会进行编辑，EN 549：1994为英文版，燃气器具、设备密封件和膜片用橡胶材料，由欧洲标准化委员会(CEN)出版。

此标准替代BS 6505。

EN549是由英国积极参加国际讨论后所出版。

互相参照出版物对应英国标准BS(英国国家标准)903 橡胶物性测试ISO48 A26. 硬度确定ISO188 A19. 耐热性与加速老化试验ISO247 BS 7164 原材料与硫化橡胶的化学测试5. 灰分含量的确定方法BS 903 橡胶物性ISO471 A35. 试验片的测试时间、温度、湿度的调节ISO815 A6. 压缩变形的环境、高低温的确定方法ISO1400 A26. 硬度确定ISO1407 BS 1673 橡胶原材料及未加硫复合橡胶的测试方法2.橡胶原材料的化学分析BS 903 橡胶物性测试ISO1431-1 A43. 抗臭氧开裂性确定方法（静态应变测试）ISO1817:1985 A16.1987 液体中效果确定BS 903 橡胶物性测试ISO4648 A38. 用于测试的试验片及产品的尺寸确定方法ISO4650 BS 4181 橡胶红外光谱鉴定1.碳化氢、氯丁二烯、丁腈及氯磺化聚乙烯橡胶的确定方法遵守英国标准，本身并不赋予法律义务的豁免权。

tcl549翻译

tcl549翻译TLC549 8bit 模数转换和串行控制●微处理器外设和独立操作●8bit分辨率A/D转换●差分参考输入电压●转化时间最大…17us●每秒访问总次数和转换周期：TCL549 (40000)●片上软件控制器，采样和保持●最大误差…±0.5LSB●4M内部系统时钟●电源电压范围…3-6V●低功耗…最大15mW●理想的高性价比，高性能的应用，包括电池供电的便携式仪表。

●引脚和控制信号与TLC540和TLC545 8位A / D转换器以及TLC1540 10位A / D转换器兼容描述TLC548和TLC549是围绕8位开关电容逐次逼近型ADC构建的CMOS模数转换器(ADC)集成电路。

这个器件设计用于通过3态数据输出和模拟输入与微处理器或外设进行串行接口。

TLC548和TLC549使用I/O CLOCK以及片选(CS)输入进行数据控制。

TLC548的最大I/O CLOCK输入频率为2.048 MHz，TLC549的I/O CLOCK输入频率为1.1 MHz。

TLC548和TLC549的操作与更复杂的TLC540和TLC541设备的操作非常相似；然而，TLC548和TLC549提供片上系统时钟，通常工作在4 MHz，无需外部元件。

片内系统时钟允许内部器件操作独立于串行输入/输出数据定时进行，并允许按照所需的软件和硬件要求操作TLC548和TLC549。

I/O CLOCK 与内部系统时钟允许TLC548的高速数据传输和每秒45500次转换的转换速率，以及TLC549的每秒40000次转换。

另外TLC548和TLC549的特征包括多功能控制逻辑，可在微处理器控制下工作的片上采样保持电路，以及具有差分高阻参考电压输入的高速转换器用来简化比例转换，缩放，独立的逻辑电路抑制噪声。

完全开关电容逐次逼近型转换器电路的设计允许在小于17μs 的时间内实现±0.5最低有效位（LSB ）的最大总误差转换。

TLC549IP;TLC549CP;TLC549CD;TLC548CP;TLC549ID;中文规格书,Datasheet资料

TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19961POST OFFICE BOX 655303 •DALLAS, TEXAS 75265D Microprocessor Peripheral or Standalone OperationD 8-Bit Resolution A/D ConverterD Differential Reference Input Voltages D Conversion Time ...17 µs MaxDTotal Access and Conversion Cycles Per Second– TLC548...up to 45500– TLC549...up to 40000D On-Chip Software-Controllable Sample-and-Hold FunctionD Total Unadjusted Error ...±0.5 LSB Max D 4-MHz Typical Internal System Clock D Wide Supply Range ...3V to 6VD Low Power Consumption ...15mW Max D Ideal for Cost-Effective, High-Performance Applications including Battery-Operated Portable InstrumentationDPinout and Control Signals Compatible With the TLC540 and TLC545 8-Bit A/D Converters and with the TLC1540 10-Bit A/D ConverterDCMOS TechnologydescriptionThe TLC548 and TLC549 are CMOS analog-to-digital converter (ADC) integrated circuits built around an 8-bit switched-capacitor successive-approximation ADC. These devices are designed for serial interface with a microprocessor or peripheral through a 3-state data output and an analog input. The TLC548 and TLC549 use only the input/output clock (I/O CLOCK) input along with the chip select (CS) input for data control. The maximum I/O CLOCK input frequency of the TLC548 is 2.048 MHz, and the I/O CLOCK input frequency of the TLC549 is specified up to 1.1 MHz.AVAILABLE OPTIONSPACKAGET A SMALL OUTLINE(D)PLASTIC DIP(P)0°C to 70°C TLC548CD TLC549CD TLC548CP TLC549CP –40°C to 85°CTLC548ID TLC549IDTLC548IP TLC549IPCopyright © 1996, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.12348765REF+ANALOG INREF–GNDV CCI/O CLOCK DATA OUT CSD OR P PACKAGE(TOP VIEW)TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19962POST OFFICE BOX 655303 •DALLAS, TEXAS 75265description (continued)Operation of the TLC548 and the TLC549 is very similar to that of the more complex TLC540 and TLC541devices; however, the TLC548 and TLC549 provide an on-chip system clock that operates typically at 4 MHz and requires no external components. The on-chip system clock allows internal device operation to proceed independently of serial input/output data timing and permits manipulation of the TLC548 and TLC549 as desired for a wide range of software and hardware requirements. The I/O CLOCK together with the internal system clock allow high-speed data transfer and conversion rates of 45500 conversions per second for the TLC548, and 40000 conversions per second for the TLC549.Additional TLC548 and TLC549 features include versatile control logic, an on-chip sample-and-hold circuit that can operate automatically or under microprocessor control, and a high-speed converter with differential high-impedance reference voltage inputs that ease ratiometric conversion, scaling, and circuit isolation from logic and supply noises. Design of the totally switched-capacitor successive-approximation converter circuit allows conversion with a maximum total error of ±0.5 least significant bit (LSB) in less than 17 µs.The TLC548C and TLC549C are characterized for operation from 0°C to 70°C. The TLC548I and TLC549I are characterized for operation from –40°C to 85°C.functional block diagramREF –6488DATAOUT8-Bit Analog-to Digital Converter (Switched-Capacitors)8-to-1 Data Selector and DriverOutput Data RegiserInternal System ClockSample and Hold75231ANALOG INREF +CSI/O CLOCKControl Logic and Output Countertypical equivalent inputsINPUT CIRCUIT IMPEDANCE DURING SAMPLING MODEINPUT CIRCUIT IMPEDANCE DURING HOLD MODE1 k Ω TYPC i = 60 pF TYP (equivalent input capacitance)5 M Ω TYPANALOG INANALOG INTLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19963POST OFFICE BOX 655303 •DALLAS, TEXAS 75265operating sequencet ent ent su(CS)B7B0B1B2B3B4B5B6B7Conversion Data BMSB MSB LSBHi-Z StateMSBLSB (see Note B)MSB Previous Conversion Data AA7A7A6A5A4A3A2A1A0Hi-Z StateDon’t11(see Note A)t conv t su(CS)Access Cycle B88765432765432CLOCK I/O CSOUTDATA CareSample Cycle BAccess Cycle CSample Cycle Ct wH(CS)NOTES: A.The conversion cycle, which requires 36 internal system clock periods (17 µs maximum), is initiated with the eighth I/O clock pulsetrailing edge after CS goes low for the channel whose address exists in memory at the time.B.The most significant bit (A7) is automatically placed on the DATA OUT bus after CS is brought low. The remaining seven bits (A6–A0)are clocked out on the first seven I/O clock falling edges. B7–B0 follows in the same manner.absolute maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V CC (see Note 1) 6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range at any input –0.3 V to V CC + 0.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range –0.3 V to V CC + 0.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak input current range (any input) ±10 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak total input current range (all inputs) ±30 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, T A (see Note 2): TLC548C, TLC549C 0°C to 70°C. . . . . . . . . . . . . TLC548I, TLC549I –40°C to 85°C. . . . . . . . . . . . Storage temperature range, T stg –65°C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOTES: 1.All voltage values are with respect to the network ground terminal with the REF– and GND terminals connected together, unlessotherwise noted.2.The D package is not recommended below –40°C.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19964POST OFFICE BOX 655303 •DALLAS, TEXAS 75265recommended operating conditionsTLC548TLC549MINNOMMAXMIN NOMMAXUNIT Supply voltage, V CC356356V Positive reference voltage, V ref+ (see Note 3) 2.5V CC V CC +0.12.5V CC V CC +0.1V Negative reference voltage, V ref – (see Note 3)–0.10 2.5–0.10 2.5V Differential reference voltage, V ref+, V ref – (see Note 3)1V CC V CC +0.21V CC V CC +0.2V Analog input voltage (see Note 3)0V CC0V CCV High-level control input voltage, V IH (for V CC = 4.75 V to 5.5 V)22V Low-level control input voltage, V IL (for V CC = 4.75 V to 5.5 V)0.80.8V Input/output clock frequency, f clock(I/O) (for V CC = 4.75 V to 5.5 V)0 2.0480 1.1MHz Input/output clock high, t wH(I/O) (for V CC = 4.75 V to 5.5 V)200404ns Input/output clock low, t wL(I/O) (for V CC = 4.75 V to 5.5 V)200404ns Input/output clock transition time, t t(I/O)(for V CC = 4.75 V to 5.5 V) (see Note 4 and Operating Sequence)100100ns Duration of CS input high state during conversion, t wH(CS)(for V CC = 4.75 V to 5.5 V) (see Operating Sequence)1717µs Setup time, CS low before first I/O CLOCK, t su(CS) (for V CC = 4.75 V to 5.5 V) (see Note 5) 1.4 1.4µs TLC548C, TLC549C 070070CTLC548I, TLC549I–4085–4085°NOTES: 3.Analog input voltages greater than that applied to REF+ convert to all ones (11111111), while input voltages less than that appliedto REF– convert to all zeros (00000000). For proper operation, the positive reference voltage V ref+, must be at least 1 V greater than the negative reference voltage, V ref–. In addition, unadjusted errors may increase as the differential reference voltage, V ref+ – V ref–,falls below 4.75 V.4.This is the time required for the I/O CLOCK input signal to fall from V IH min to V IL max or to rise from V IL max to V IH min. In the vicinityof normal room temperature, the devices function with input clock transition time as slow as 2 µs for remote data acquisition applications in which the sensor and the ADC are placed several feet away from the controlling microprocessor.5.To minimize errors caused by noise at the CS input, the internal circuitry waits for two rising edges and one falling edge of internalsystem clock after CS ↓ before responding to control input signals. This CS setup time is given by the t en and t su(CS) specifications.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19965POST OFFICE BOX 655303 •DALLAS, TEXAS 75265electrical characteristics over recommended operating free-air temperature range,V CC = V ref+ = 4.75 V to 5.5 V, f clock(I/O) = 2.048 MHz for TLC548 or 1.1 MHz for TLC549 (unless otherwise noted)PARAMETERTEST CONDITIONS MIN TYP †MAXUNIT V OH High-level output voltage V CC = 4.75 V,I OH = –360 µA 2.4V V OL Low-level output voltageV CC = 4.75 V,I OL = 3.2 mA 0.4V I OZ High impedance off state output current V O = V CC ,CS at V CC 10High-impedance off-state output current V O = 0,CS at V CC–10µA I IH High-level input current, control inputs V I = V CC 0.005 2.5µA I IL Low-level input current, control inputsV I = 0–0.005–2.5µA I I()Analog channel on-state input current during sample Analog input at V CC 0.41I(on)g g cycleAnalog input at 0 V –0.4–1µA I CCOperating supply current CS at 0 V 1.8 2.5mA I CC + I ref Supply and reference current V ref+ = V CC1.93mA Input capacitance Analog inputs 755C iInput capacitanceControl inputs515pFoperating characteristics over recommended operating free-air temperature range, V CC = V ref+ = 4.75 V to 5.5 V, f clock(I/O) = 2.048 MHz for TLC548 or 1.1 MHz for TLC549 (unless otherwise noted)TEST CONDITIONS TLC548TLC549PARAMETERTEST CONDITIONS MINTYP †MAX MIN TYP †MAX UNIT E L Linearity error See Note 6±0.5±0.5LSB E ZS Zero-scale error See Note 7±0.5±0.5LSB E FS Full-scale error See Note 7±0.5±0.5LSB Total unadjusted error See Note 8±0.5±0.5LSB t convConversion timeSee Operating Sequence 8171217µs Total access and conversion timeSee Operating Sequence 12221925µs t a Channel acquisition time (sample cycle)See Operating Sequence44I/O clock cycles t v Time output data remains valid after I/O CLOCK ↓1010nst d Delay time to data output valid I/O CLOCK ↓200400ns t en Output enable time 1.4 1.4µs t dis Output disable time 150150ns t r(bus)Data bus rise timeSee Figure 1300300nst f(bus)Data bus fall time 300300ns †All typicals are at V CC = 5 V, T A = 25°C.NOTES: 6.Linearity error is the deviation from the best straight line through the A/D transfer characteristics.7.Zero-scale error is the difference between 00000000 and the converted output for zero input voltage; full-scale error is the differencebetween 11111111 and the converted output for full-scale input voltage.8.Total unadjusted error is the sum of linearity, zero-scale, and full-scale errors.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19966POST OFFICE BOX 655303 •DALLAS, TEXAS 75265PARAMETER MEASUREMENT INFORMATIONSee Note B0.4 V2.4 V t f(bus)Outputt r(bus)0.8 V2.4 V 0.8 Vt dDATA OUTVOLTAGE WAVEFORMS FOR RISE AND FALL TIMESVOLTAGE WAVEFORMS FOR DELAY TIMEV CC3 k Ω3 k ΩV CCSee Note B 50%50%0 V0 Vt PLZI/O CLOCKVOLTAGE WAVEFORMS FOR ENABLE AND DISABLE TIMESOutput Waveform 1(see Note C)t PHZV OH 90%10%t PZL0 VV CC 50%CSLOAD CIRCUIT FOR t PZL AND t PLZLOAD CIRCUIT FOR t PZH AND t PHZLOAD CIRCUIT FORt d , t r , AND t fSee Note BOutput Under Test Test Point3 k Ω1.4 VOutput Waveform 2(see Note C)C L(see Note A)Output Under Test Test Point C L(see Note A)Output Under Test Test PointC L(see Note A)t PZH50%NOTES: A.C L = 50 pF for TLC548 and 100 pF for TLC549; C L includes jig capacitance.B.t en = t PZH or t PZL , t dis = t PHZ or t PLZ .C.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.Figure 1. Load Circuits and Voltage WaveformsTLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19967POST OFFICE BOX 655303 •DALLAS, TEXAS 75265APPLICATIONS INFORMATIONsimplified analog input analysisUsing the equivalent circuit in Figure 2, the time required to charge the analog input capacitance from 0 to V S within 1/2 LSB can be derived as follows:The capacitance charging voltage is given byV C = V S 1–e–t c /R t C i ( )(1)whereR t = R s + r iThe final voltage to 1/2 LSB is given by(2)V C (1/2 LSB) = V S – (V S /512)Equating equation 1 to equation 2 and solving for time t c givesV S –(V S /512) = V S 1–e(3)–t c /R t C i( )andt c (1/2 LSB) = R t × C i × ln(512)(4)Therefore, with the values given the time for the analog input signal to settle ist c (1/2 LSB) = (R s + 1 k Ω) × 60 pF × ln(512)(5)This time must be less than the converter sample time shown in the timing diagrams.R sr i V SV C 1 k Ω MAXDriving Source †TLC548/9V IV I = Input Voltage at ANALOG IN V S = External Driving Source Voltage R s = Source Resistance r i = Input Resistance C i = Input Capacitance†Driving source requirements:•Noise and distortion for the source must be equivalent to the resolution of the converter.•R s must be real at the input frequency.C i55 pF MAX Figure 2. Equivalent Input Circuit Including the Driving SourceTLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19968POST OFFICE BOX 655303 •DALLAS, TEXAS 75265PRINCIPLES OF OPERATIONThe TLC548 and TLC549 are each complete data acquisition systems on a single chip. Each contains an internal system clock, sample-and-hold function, 8-bit A/D converter, data register, and control logic circuitry. For flexibility and access speed, there are two control inputs: I/O CLOCK and chip select (CS). These control inputs and a TTL-compatible 3-state output facilitate serial communications with a microprocessor or minicomputer. A conversion can be completed in 17 µs or less, while complete input-conversion-output cycles can be repeated in 22 µs for the TLC548 and in 25 µs for the TLC549.The internal system clock and I/O CLOCK are used independently and do not require any special speed or phase relationships between them. This independence simplifies the hardware and software control tasks for the device.Due to this independence and the internal generation of the system clock, the control hardware and software need only be concerned with reading the previous conversion result and starting the conversion by using the I/O clock. In this manner, the internal system clock drives the “conversion crunching” circuitry so that the control hardware and software need not be concerned with this task.When CS is high, DATA OUT is in a high-impedance condition and I/O CLOCK is disabled. This CS control function allows I/O CLOCK to share the same control logic point with its counterpart terminal when additional TLC548 and TLC549 devices are used. This also serves to minimize the required control logic terminals when using multiple TLC548 and TLC549 devices.The control sequence has been designed to minimize the time and effort required to initiate conversion and obtain the conversion result. A normal control sequence is:1.CS is brought low. To minimize errors caused by noise at CS, the internal circuitry waits for two rising edgesand then a falling edge of the internal system clock after a CS ↓ before the transition is recognized. However,upon a CS rising edge, DATA OUT goes to a high-impedance state within the specified t dis even though the rest of the integrated circuitry does not recognize the transition until the specified t su(CS) has elapsed. This technique protects the device against noise when used in a noisy environment. The most significant bit (MSB)of the previous conversion result initially appears on DATA OUT when CS goes low.2.The falling edges of the first four I/O CLOCK cycles shift out the second, third, fourth, and fifth most significantbits of the previous conversion result. The on-chip sample-and-hold function begins sampling the analog input after the fourth high-to-low transition of I/O CLOCK. The sampling operation basically involves the charging of internal capacitors to the level of the analog input voltage.3.Three more I/O CLOCK cycles are then applied to the I/O CLOCK terminal and the sixth, seventh, and eighthconversion bits are shifted out on the falling edges of these clock cycles.4.The final (the eighth) clock cycle is applied to I/O CLOCK. The on-chip sample-and-hold function begins thehold operation upon the high-to-low transition of this clock cycle. The hold function continues for the next four internal system clock cycles, after which the holding function terminates and the conversion is performed during the next 32 system clock cycles, giving a total of 36 cycles. After the eighth I/O CLOCK cycle, CS must go high or the I/O clock must remain low for at least 36 internal system clock cycles to allow for the completion of the hold and conversion functions. CS can be kept low during periods of multiple conversion. When keeping CS low during periods of multiple conversion, special care must be exercised to prevent noise glitches on the I/O CLOCK line. If glitches occur on I/O CLOCK, the I/O sequence between the microprocessor/controller and the device loses synchronization. When CS is taken high, it must remain high until the end of conversion. Otherwise, a valid high-to-low transition of CS causes a reset condition, which aborts the conversion in progress.A new conversion may be started and the ongoing conversion simultaneously aborted by performing steps 1 through 4 before the 36 internal system clock cycles occur. Such action yields the conversion result of the previous conversion and not the ongoing conversion.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19969POST OFFICE BOX 655303 •DALLAS, TEXAS 75265PRINCIPLES OF OPERATIONFor certain applications, such as strobing applications, it is necessary to start conversion at a specific point in time.This device accommodates these applications. Although the on-chip sample-and-hold function begins sampling upon the high-to-low transition of the fourth I/O CLOCK cycle, the hold function does not begin until the high-to-low transition of the eighth I/O CLOCK cycle, which should occur at the moment when the analog signal must be converted. The TLC548 and TLC549 continue sampling the analog input until the high-to-low transition of the eighth I/O CLOCK pulse. The control circuitry or software then immediately lowers I/O CLOCK and starts the holding function to hold the analog signal at the desired point in time and starts the conversion.PACKAGING INFORMATIONOrderableDeviceStatus (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)TLC548CD ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC548CPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC548ID ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC548IPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549CD ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549CPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549ID ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549IPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549IPSACTIVESOPS880Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIMPACKAGE OPTION ADDENDUM6-Nov-2006Addendum-Page 1分销商库存信息:TITLC549IP TLC549CP TLC549CD TLC548CP TLC549ID TLC548IP TLC548ID TLC548CD TLC549CDR TLC549CDRG4TLC549IDR TLC549IDRG4 TLC548CDR TLC548CDRG4TLC549IPSR TLC549IPSRG4TLC548IDR TLC548IDRG4 TLC549CPE4TLC549IPE4TLC549CDG4 TLC548CPE4TLC549IDG4TLC548IPE4 TLC549IPS TLC549IPSG4TLC548CDG4 TLC548IDG4。

芯片TLC549介绍(中文的)

具有4MHz片内系统时钟和软、硬件控制电路，转换时间最长17μs，TLC548允许的最高转换速率为45 500次/s，TLC549为40 000次/s。

总失调误差最大为±0.5LSB，典型功耗值为6mW。

采用差分参考电压高阻输入，抗干扰，可按比例量程校准转换范围，V REF-接地，V REF+－V REF-≥1V，可用于较小信号的采样。

2. 芯片简介2.1 TLC548、TLC549的内部框图和管脚名称TLC548、TLC549的内部框图和引脚名称如图1所示。

其工作时序如图2所示。

当CS为高时，数据输出(DATA OUT)端处于高阻状态，此时I/O CLOCK 不起作用。

这种CS控制作用允许在同时使用多片TLC548、TLC549时，共用I/O CLOCK，以减少多路(片)A/D并用时的I/O控制端口。

一组通常的控制时序为：(1)将CS置低。

SN5496资料

SDLS946 –IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1999, Texas Instruments Incorporated。

TLC549中文介绍

TLC549中文介绍
TLC549是一款模拟到数字转换器(ADC)，由德州仪器公司(Texas Instruments)开发和生产。

这款芯片是一种单通道、低功耗、高精度的
12位ADC。

它被广泛应用于工业自动化、仪器仪表、通信设备和消费类电
子产品等领域。

TLC549还具有自动电源关闭(PS)功能，其中在转换完成后，芯片会
自动从待机模式切换到关闭模式，从而降低功耗并延长电池寿命。

此外，
它还具有多通道选择功能，使用户能够选择要转换的输入通道。

这些功能
可通过串行外设控制简化系统设计，降低成本和复杂度。

在实际应用中，TLC549可以用于测量和监测温度、压力、湿度、流
量等环境参数。

它还可以用于采集音频和视频信号，用于语音和图像处理。

由于其高精度和低功耗特性，TLC549也可以用于精密仪器和仪表，如电
压表和多用途测试仪。

总的来说，TLC549是一款功能强大的模拟到数字转换器，适用于多
种应用场景。

它具有高精度、低功耗、可编程的参考电压和内部时钟发生
器等特点，使其成为众多电子产品中不可或缺的一部分。

金属材料对照表

T10
SK3,SK4
W2-91/2, W1-91/2
BW1B
T11 T12 T13
SK3 SK2 SK1
W1-101/2 W1-111/2 W2-13, W1-121/2 BW1C
T7A T8A C80W1(1.152 5) (VDEh) T8MnA C85WS(1.183 0) (VDEh) T9A T10A C105W1(1.15 45) (VDEh) T11A T12A T13A
(3)锰钒钢组 (4)铬钢组
42Mn2V 15Cr 20Cr
40Cr
SCr440 （SCr4）
5140
5140
5140
530A40,
530M40 45Cr SCr445 （SCr5） 5147, 5145 50Cr (5)铬硅钢组 (6)铬锰钢组 38CrSi 40CrSi 38CrMn 5150 5147, 5145 5150 5147, 5145 5150
60
S58C
080A62
65
1065
1065
1065
060A67,
080A67 70 1070 1070 1070 060A72, 070A72, 080A72 75 1074 1074 1074 060A78, 070A78, 080A78 80 1080 1080 1080 060A82, 080A83 85 1084 1084 1084 060A86, 080A86 项目中国 GB,YB (2)较高含锰量钢组 20Mn 15Mn 日本 JIS 德国 DIN(W-Nr.) 17Mn4(1.804 4) ASTM 1016, 1019 1021, 1022 25Mn 30Mn S28C S30C 1026 1030 美国 AISI 1016, 1019 1021, 1022 1026 1030 SAE 1016, 1019 1021, 1022 1026 1030 英国 BS 080A15, 080A17 080A20, 070M20 070M26 080A30, 080A32 35Mn 40Mn S35C S40C 40Mn4(1.503 8) 1037 1039, 1040 45Mn S45C 1043, 1046 50Mn S53C 1050, 1053 60Mn 65Mn 1561 1566 1037 1039, 1040 1043, 1046 1050, 1053 1037 1039, 1040 1043, 1046 1050, 1053 1561 1566 -1066 70Mn 1572 1572 080A52, 080M50 080A64 080A47 080A35 080A40

ch549芯片工作原理

ch549芯片工作原理
CH549是一款芯片，它采用了一些特殊的工作原理。

首先，每只CH549出厂时都具有唯一ID号，即芯片身份识别号。

这个ID数据及其校验和共8个字节，存储于只读信息区域的偏移地址为10h的区域中。

只读信息区域存放在0xF000~0xF3FF共1KB的Data Flash空间，而CH549的只读信息区域只占32字节。

在操作时，需要设置地址寄存器ROM_ADDR，写入按4字节对齐的目标地址（00h～3Fh），实际仅低6位有效。

接着，设置操作控制寄存器ROM_CTRL为08Dh，执行读操作，操作期间程序自动暂停运行。

操作完成后程序恢复运行，此时查询状态寄存器ROM_STATUS可以查看此次操作状态。

最后，从flash-ROM 数据寄存器ROM_DATA_HI和ROM_DATA_LO中获得4字节数据。

至于更多关于ch549芯片的工作原理细节，建议咨询电子工程专家或查阅电子工程文献，以获取更准确的信息。

BC549中文资料

CONDITIONS note 1
VALUE 250
UNIT K/W
CHARACTERISTICS Tj = 25 °C unless otherwise speciﬁed.
SYMBOL ICBO
IEBO hFE
VCEsat
VBEsat
VBE
Cc Ce fT F
PARAMETER collector cut-off current
emitter cut-off current DC current gain
BC549C; BC550C
collector-emitter saturation voltage
base-emitter saturation voltage
base-emitter voltage
collector capacitance emitter capacitance transition frequency
Product speciﬁcation
BC549; BC550
DEFINITIONS
Data Sheet Status
Objective speciﬁcation Preliminary speciﬁcation Product speciﬁcation
This data sheet contains target or goal speciﬁcations for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains ﬁnal product speciﬁcations.

TLC549中文介绍与参考程序

TLC549中文介绍与参考程序TLC549使用单电源供电，工作电压范围为2.7V至5.5V。

它采用内部运算放大器和参考电压，具有高共模抑制比和低失调电压，提供准确的测量结果。

通过SPI接口，可以轻松地将数据传输到微控制器或其他数字设备。

以下是TLC549的主要特性：1.高精度：TLC549是一款12位的ADC，可以实现精确的模拟信号转换。

2.内部参考电压：TLC549已集成内部参考电压和运算放大器，可消除外部参考电压的需求，并提供更好的测量精度。

3.低功耗：TLC549在工作模式下的功耗非常低，适合各种低功率应用。

4.SPI接口：TLC549采用串行外围接口（SPI）进行数据传输，与微控制器和其他数字设备兼容。

5.可编程的采样率：TLC549的采样率可以通过控制输入引脚进行编程，以满足不同应用的要求。

下面是一个使用TLC549的参考程序，该程序可以读取模拟信号并将其转换为数字值：```#include <SPI.h>const int chipSelectPin = 10; // SPI芯片选择引脚int val = 0; // 储存读取到的模拟值void setuSerial.begin(9600);SPI.begin(;pinMode(chipSelectPin, OUTPUT);digitalWrite(chipSelectPin, HIGH); // 初始化SPI芯片选择引脚void loodigitalWrite(chipSelectPin, LOW); // 选中TLC549芯片delayMicroseconds(10);SPI.transfer(0x00); // 发送开始转换命令delayMicroseconds(10);val = SPI.transfer(0x00); // 读取转换结果的高8位val = (val << 8) + SPI.transfer(0x00); // 读取转换结果的低4位digitalWrite(chipSelectPin, HIGH); // 取消选中TLC549芯片Serial.println(val); // 打印转换结果delay(1000);```上述程序使用了SPI库，首先在`setup(`函数中初始化SPI通信，并设置芯片选择引脚为输出模式。

EN549中文版

此标准替代BS 6505。

EN549是由英国积极参加国际讨论后所出版。

SN54AHCT14中文资料

PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-9680101Q2A ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC 5962-9680101QCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC 5962-9680101QDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NC 5962-9680101VCA ACTIVE CDIP J141TBD Call TI Call TI5962-9680101VDA ACTIVE CFP W141TBD Call TI Call TISN74AHCT14D ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DBLE OBSOLETE SSOP DB14TBD Call TI Call TISN74AHCT14DBR ACTIVE SSOP DB142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DBRE4ACTIVE SSOP DB142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DG4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DGVR ACTIVE TVSOP DGV142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DGVRE4ACTIVE TVSOP DGV142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14DRG4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14N ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74AHCT14NSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14NSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14NSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14PW ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14PWE4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14PWG4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AHCT14PWLE OBSOLETE TSSOP PW14TBD Call TI Call TISN74AHCT14PWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14PWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AHCT14PWRG4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AHCT14RGYR ACTIVE QFN RGY141000Green(RoHS&CU NIPDAU Level-2-260C-1YEAROrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)no Sb/Br)SNJ54AHCT14FK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54AHCT14J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SNJ54AHCT14W ACTIVE CFP W141TBD Call TI Level-NC-NC-NC(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The 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Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. T o minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. 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EN549中文版

英国标准规于燃气器具、设备密封件和膜片用橡胶材料欧洲标准EN549 ：1994年以来的英国标准未经BSI允许不得拷贝此英国标准责任委员会此英国标准委托GSE/22技术委员会进行编辑，燃气具的安全与控制如下所诉：控制器制造商协会（TAMCA(BEAMA英国电器制造厂商协会)）;英国燃气公司(英国)贸工部（消费者安全协会，加利福利亚分部）液化石油气协会英国燃气工业协会修订后出版发行委员会指导编辑，标准委员会权威发行，于1995年5月15日实施。

此标准替代BS 6505。

EN549是由英国积极参加国际讨论后所出版。

EUROPEAN STANDARD EN 549 NORME EUROPÉENNEEUROPÄISCHE NORM November 1994 ICs 21.140; 83.060描述：家用电器、燃气用具、调整系统、膜片、密封圈；橡胶制品、类别、规、机械性能、测试燃气器具、设备密封件和膜片用橡胶材料欧洲标准于1994-11-08，由CEN(欧洲标准化委员会)批准。