Full On-Chip CMOS Low-Dropout Voltage Regulator

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MILLIKEN et al.:FULL ON-CHIP CMOS LOW-DROPOUT VOLTAGE REGULATOR 1889

TABLE IV

C OMPARISON OF R

ESULTS

to verify the PSRR results.A sinusoidal waveform of 1kHz

was applied

to

and the supply voltage gain was measured around 53dB.The equivalent output noise was measured for different load currents,as shown in Fig.21.The worst case spot

noise at 10kHz was roughly 720nV/Hz

and was mainly due to 1/f noise.The error ampli fier contributed to most of the noise and has to be optimized to reduce the equivalent output noise if required.

VI.C ONCLUSION

Experimental results show that the proposed LDO voltage regulator exceeds current work in the area of external capacitor-less LDO regulators in both transient response and ac stability while consuming only

65A of quiescent current;the internal compensating capacitors are as small as 7pF only while the load capacitor can be as large as 100pF.

Stability is not compromised by the load capacitance value,provided

that does not exceed some limits de fined by the location of the second pole.A comparison is made among other output capacitorless designs [2],[10],[11],shown in Table IV,illustrating the signi ficance of the proposed external capacitor-less LDO regulator.Not only does the proposed regulator con-sume low power,but it provides a low dropout voltage and fast settling time.SoC designs would bene fit from the reduced board real estate,pin count,and cost achievable with the proposed off-chip capacitorless full CMOS LDO regulator.

A CKNOWLEDGMENT

The authors would like to thank MOSIS for chip fabrication,and M.Rojas for root locus simulations and discussions on sta-bility.

R EFERENCES

[1]G.Patounakis,Y.W.Li,and K.Shepard,“A fully integrated on-chip

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[2]K.N.Leung and P.K.T.Mok,“A capacitor-free CMOS low-dropout

regulator with damping-factor-control frequency,”IEEE J.Solid-State Circuits ,vol.37,no.10,pp.1691–1701,Oct.2003.

[3]R.K.Dokaniz and G.A.Rincon-Mora,“Cancellation of load regu-lation in low drop-out regulators,”Electron.Lett.,vol.38,no.22,pp.1300–1302,Oct.24,2002.

[4]V.Gupta,G.Rincon-Mora,and P.Raha,“Analysis and design of

monolithic,high PSR,linear regulators for SoC applications,”in Proc.IEEE Int.Syst.Chip Conf.,Santa Clara,CA,Sep.2004,pp.311–315.[5]C.K.Chava and J.Silva-Martinez,“A robust frequency compensation

scheme for LDO voltage regulators,”IEEE Trans.Circuits Syst.I,Reg.Papers ,vol.51,no.6,pp.1041–1050,Jun.2004.

[6]P.R.Gray and R.G.Meyer,“MOS operational ampli fier design —A

tutorial overview,”IEEE J.Solid-State Circuits ,vol.SC-17,no.6,pp.969–982,Dec.1982.

[7]B.K.Ahuja ’s,“An improved frequency compensation technique

for CMOS operational ampli fiers,”IEEE J.Solid-State Circuits ,vol.SC-18,no.6,pp.629–633,Dec.1983.

[8]R.W.D.Nickalls,“A new approach to solving the cubic:Cardan ’s

solution revealed,”Math.Gazette ,vol.77,pp.354–359,1993.

[9]G.F.Franklin,J.D.Powell,and A.Emami-Naeini ,Feedback Control

of Dynamic Systems .Upper Saddle River,NJ:Prentice-Hall,2002.[10]P.Hazucha,T.Karnik,B.A.Bloechel,C.Parsons,D.Finan,and S.

Borkar,“Area-ef ficient linear regulator with ultra-fast load regulation,”IEEE J.Solid-State Circuits ,vol.40,no.4,pp.933–940,Apr.2005.[11]Texas Instruments,Cap-free,NMOS,150mA low dropout regulator

with reverse current protection.(Sep.2004)[Online].Available:

Robert liken was born in Marshalltown,IA,on September 5,1979.He received the B.S.degree in electrical engineering from Iowa State University,Ames,in 2002and the M.S.degree in electrical en-gineering from Texas A&M University,College Sta-tion,in 2005.

In summer 2005,he joined Linear Technology,Colorado Springs,CO,where he is currently de-signing BiCMOS mixed-signal ICs for switch-mode power converters.

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