ZMM55C8V2中文资料

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EP2C8Q208C8中文资料(Altera)中文数据手册「EasyDatasheet - 矽搜」

EP2C8Q208C8中文资料(Altera)中文数据手册「EasyDatasheet - 矽搜」

Cyclone II器件手册,第1卷ii内容章修订日期............................................... ............................喜关于本手册............................................... .............................十三如何触点Altera ..........................................................................................................................十三印刷约定....................................................................................................................十三第一节Cyclone II器件系列数据表修订记录.................................................................................................................................... 1-1第1章简介简介............................................................................................................................................低成本嵌入式处理解决方案............................................ ......................................低成本DSP解决方案.................................................................................................................特征...................................................................................................................................................参考文献.........................................................................................................................文档修订历史记录.................................................................................................................1–1 1–1 1–1 1–2 1–9 1–9第2章Cyclone II架构功能说明.......................................................................................................................... 2-1逻辑元件....................................................................................................................................... 2-2LE操作模式........................................................................................................................ 2-4逻辑阵列模块................................................................................................................................ 2-7LAB互连............................................................................................................................ 2-8LAB控制信号......................................................................................................................... 2-8MultiTrack互联..................................................................................................................... 2-10行互连.......................................................................................................................... 2-10列互连.................................................................................................................... 2-12设备路由............................................................................................................................... 2-15全局时钟网络和锁相环.......................................... ..................................... 2-16专用时钟管脚..................................................................................................................... 2-20双用时钟引脚.............................................................................................................. 2-20全局时钟网络................................................................................................................... 2-21全局时钟网络分布.............................................. .............................................. 2-23锁相环.................................................................................................................................................. 2-25嵌入式存储器............................................................................................................................. 2-27内存模式............................................................................................................................... 2-30时钟模式.................................................................................................................................... 2-31M4K路由接口.................................................................................................................. 2-31iii内容嵌入式乘法器........................................................................................................................乘法器模式............................................................................................................................嵌入式乘法器路由接口.............................................. .......................................I / O结构及特点....................................................................................................................外部存储器接口.......................................................................................................可编程驱动强度.....................................................................................................漏极开路输出........................................................................................................................摆率控制...........................................................................................................................总线防护持..........................................................................................................................................可编程上拉电阻............................................. .................................................. ...高级I / O标准支持............................................ .................................................. ..高速差分接口............................................. .................................................系列片上端接.........................................................................................................I / O组........................................................................................................................................多电压I / O接口.................................................................................................................2–32 2–35 2–36 2–37 2–44 2–49 2–50 2–51 2–51 2–51 2–52 2–53 2–55 2–57 2–60第3章配置与测试IEEE标准. 1149.1(JTAG)边界扫描支持........................................... ..................................构造.........................................................................................................................................操作模式...................................................................................................................................配置计划......................................................................................................................... Cyclone II自动单粒子翻转检测........................................... ...........................定制电路....................................................................................................................软件界面.............................................................................................................................文档修订历史记录.................................................................................................................3–1 3–5 3–5 3–6 3–7 3–7 3–7 3–8第4章热插拔和上电复位简介............................................................................................................................................旋风II热插拔规格............................................ ................................................设备可以在电源时会驱动.......................................... ...........................................I / O引脚防护持三态电期间...................................... ......................................在Cyclone II器件热插拔功能实现......................................... ..............上电复位电路...................................................................................................................."唤醒"时间Cyclone II器件........................................ ...............................................结论..............................................................................................................................................文档修订历史记录.................................................................................................................4–1 4–1 4–2 4–2 4–3 4–5 4–5 4–7 4–7第5章直流特性和时序规范运行条件........................................................................................................................... 5-1单端I / O标准.......................................................................................................... 5-5差分I / O标准.............................................................................................................. 5-7DC特性不同针类型............................................ ......................................... 5-11片上端接规格............................................. .............................................. 5-12能量消耗........................................................................................................................... 5-13时序规格.......................................................................................................................... 5-14预,决赛时序规范............................................. ................................ 5-14演出.................................................................................................................................... 5-15 ivCyclone II器件手册,第1卷内容内部时序...............................................................................................................................Cyclone II时钟时序参数............................................. ..............................................时钟网络偏移加法器.......................................................................................................IOE可编程延迟.............................................................................................................不同I默认容性负载/ O标准......................................... .................I / O延迟.......................................................................................................................................最大输入和输出时钟频率............................................ ........................................高速I / O时序规格........................................... ............................................外部存储器接口规范.............................................. ....................................JTAG时序规范..........................................................................................................PLL时序规范............................................................................................................占空比失真.........................................................................................................................DCD测量技术............................................... .................................................. ..参考文献.......................................................................................................................文档修订历史记录...............................................................................................................5–18 5–23 5–29 5–30 5–31 5–33 5–46 5–55 5–63 5–64 5–66 5–67 5–68 5–74 5–74第6章参考和订购信息软体..................................................................................................................................................器件引脚输出.....................................................................................................................................订购信息...........................................................................................................................文档修订历史记录.................................................................................................................6–1 6–1 6–1 6–2第二节.时钟管理修订记录.................................................................................................................................... 6-1第7章锁相环在Cyclone II器件简介............................................................................................................................................ 7-1Cyclone II PLL硬件概述............................................. .................................................. ... 7-2PLL参考时钟产生.............................................. .................................................. ... 7-6时钟反馈模式....................................................................................................................... 7-10正常模式.................................................................................................................................. 7-10零延迟缓冲器模式................................................................................................................ 7-11无补偿模式............................................................................................................... 7-12源同步模式........................................................................................................... 7-13硬件特性.............................................................................................................................. 7-14时钟倍频和科.............................................. .................................................. .. 7-14可编程占空比........................................................................................................... 7-15移相实施.............................................. .................................................. .... 7-16控制信号................................................................................................................................ 7-17手动时钟切换............................................................................................................. 7-20时钟................................................................................................................................................ 7-21全局时钟网络................................................................................................................... 7-21时钟控制模块....................................................................................................................... 7-24全局时钟网络时钟源产生............................................ .......................... 7-26全局时钟网络掉电............................................. .............................................. 7-28vCyclone II器件手册,第1卷。

MFRC522中文

MFRC522中文
MFRC522
非非接接触触式式读读卡卡器器 IICCLeabharlann 广州周立功单片机发展有限公司
目录
目录
1.简介 ................................................................................................................................................... 1 1.1 范围............................................................................................................................................1 1.2 概述............................................................................................................................................1 1.3 特性............................................................................................................................................1 1.4 简化MFRC522 框图..................................................................................................................2

SMC 55-CQ2-Z Series II 2GD 轨迹遥控器说明书

SMC 55-CQ2-Z Series II 2GD 轨迹遥控器说明书

Instruction ManualCompact Cylinder 55-CQ2-Z SeriesProduct marking shown above is for the standard product.II 2potential energy provided by compressed air into a force which causes mechanical linear motion. subject to “Special Conditions of Use”, please see Section 2.3.1 Safety InstructionsThese safety instructions are intended to prevent hazardous situations and/or equipment damage. These instructions indicate the level of potential hazard with the labels of “Caution,” “Warning” or “Danger.” They are all important notes for safety and must be followed in addition to International Standards (ISO/IEC) *1), and other safety regulations. *1)ISO 4414: Pneumatic fluid power - General rules relating to systems. ISO 4413: Hydraulic fluid power - General rules relating to systems.IEC 60204-1: Safety of machinery - Electrical equipment of machines. (Part 1: General requirements)ISO 10218-1: Manipulating industrial robots -Safety. etc.∙ Refer to product catalogue, Operation Manual and Handling Precautions for SMC Products for additional information. ∙ Keep this manual in a safe place for future reference.not avoided, will result in death or serious injury.Warning∙ Always ensure compliance with relevant safety laws and standards.∙ All work must be carried out in a safe manner by a qualified person in compliance with applicable national regulations.2 SpecificationsThis product is certified to ATEX Category 2GD and therefore is suitable for use in Zones 1, 2, 21 and 22 only. 2.1 Product Specifications:Refer to the operation manual for this product;The batch code printed on the label indicates the month and the year of production as per the following table;2.3 Special Conditions of Use:∙ Products are suitable for sub-divisions IIC & IIIC. ∙ Products are suitable for Zones 1, 2, 21 & 22 only. 2.3.1 Temperature Marking: 2.3.1.1 Standard Product:∙ In the normal ambient temperature range (-10°C to +40°C) the product is rated to temperature class T5 and has a maximum surface temperature of 92°C.∙ In the special ambient temperature range (+40°C to +60°C) the product is rated to temperature class T4 and has a maximum surface temperature of 112°C.3 Installation3.1 InstallationWarning∙ Do not install the product unless the safety instructions have been read and understood.∙ Do not twist or bend the cylinder, or mount the product when subject to tension.∙ Do not use in an application where the product is stopped mid-stroke, via an external stop.∙ Do not use where cylinders are being synchronised to move a single load.∙ In order to install the product, use one of the brackets available found in the standard product catalogue;represents the Bore Size (e.g. Ø40 is 040), see catalogue for more details.∙ When replacing brackets use the hexagon wrench and torques shownSketchSee the product catalogue for the exact code to order which relates to the bore size of your product.∙ Tighten these accessories with a suitable wrench using the flat surfaces provided. Ensure that they are tightened against the rod end 3.2 EnvironmentWarning∙ Do not use in an environment where corrosive gases, chemicals, water, salt water or steam are present.∙ Do not use in an explosive atmosphere except within the specified rating.∙ Do not expose to direct sunlight. Use a suitable protective cover.∙ Do not install in a location subject to vibration or impact in excess of the product’s specifications .∙ Do not use in a place subject to heavy vibration and/or shock.∙ Do not use in wet environments, where water can remove the presence of the lubrication.∙ Do not use in case of heavy dusty environments where dust can penetrate into the cylinder and dry the grease.∙ Do not allow dust layers to build up on the cylinder surface and insulate the product.3.3 PipingCaution∙ Before connecting piping make sure to clean up chips, cutting oil, dust etc.∙ When installing piping or fittings, ensure sealant material does not enter inside the port. When using seal tape, leave 1 thread exposed on the end of the pipe/fitting.∙ Tighten fittings to the specified tightening torque.CQ2-Z [Nil]CQ2-Z [TF option]Note 4: In the case without autoswitch, M5 x 0.8 is used for 5mm stroke only.3.4 LubricationCaution∙ SMC products have been lubricated for life at manufacture, and do not require lubrication in service.∙ If a lubricant is used in the system, refer to catalogue for details.3.5 Basic Circuit∙ Plugging one of the ports on the actuator is considered a non-intended use, and could relate to an increase in maximum surface temperature above what the product specification declares.3.6 Electrical Connection∙ The product should be grounded by the piston rod and the body in order to create an electrically conductive path to the system/application. ∙ Ground the product in accordance with applicable regulations. ∙ Do not pass an electrical current through the product.4 SettingsRefer to the standard product operation manual for settings.ORIGINAL INSTRUCTIONSRefer to Declaration of Conformity for relevant DirectivesRefer to the standard product catalogue for ‘How to Order’. Refer to the standard product catalogue for general dimensions.7.1 General MaintenanceCaution∙Not following proper maintenance procedures could cause the product to malfunction and lead to equipment damage.∙If handled improperly, compressed air can be dangerous.∙Maintenance of pneumatic systems should be performed only by qualified personnel.∙Before performing maintenance, turn off the power supply and be sureto cut off the supply pressure. Confirm that the air is released to atmosphere.∙After installation and maintenance, apply operating pressure and power to the equipment and perform appropriate functional and leakage tests to make sure the equipment is installed correctly.∙If any electrical connections are disturbed during maintenance, ensure they are reconnected correctly and safety checks are carried out as required to ensure continued compliance with applicable national regulations.∙Do not make any modification to the product.∙Do not disassemble the product, unless required by installation or maintenance instructions.∙Do not use a product which looks or contains damage, this will invalidate the certification. If damage is seen, please replace the product immediately.∙Periodically check the product for any damage or rust appearing. This could result in an increase in friction and lead to dangerous conditions. Replace the whole actuator if any of these conditions appear.∙Periodically check the condition of the rod seal and for the presence of lubrication, where possible. If these areas appear to be dry, please follow the lubrication procedure.∙Replace the seals, when air leakage is above the allowable value given in the table below;7.2 Disassembly Procedure∙Disassemble the cylinder, remove the old grease and place all the parts on a clean cloth in a clean environment. Use a set of snap ring pliers to remove the snap ring. Remove the old tube gaskets, rod seal, piston seal, wear ring using a fine screwdriver where necessary.Caution∙If a magnet is present on the piston do not remove it. The magnet is not replaceable.7.2.1 Model: C(D)Q2* 12~100(TF)-*D(C)(M)Z7.2.2 Models: C(D)Q2B 125~200(TF)-*DC(M)Z, C(D)Q2* 32~100(TF)-7.2.3 Model: C(D)Q2W* 12~200(TF)-*D(C)(M)Z / Double Rod type7.2.4 Model: C(D)Q2BS 32~100(TF)-*DC(M) / Anti-Lateral Load type7.3 Seal Replacement Part NumbersWarningOnly use SMC seal kits as listed in the table below;7.4 Lubrication Procedure∙Apply lubricant to:• The rod seal and the rod seal groove on the rod cover.• The piston outer surface and piston seal groove.• The piston seal and tube gaskets.• The piston rod surface and cylinder tube internal surface.∙Lubricate the parts with the grease packs provided with the seal kit.7.5 Reassembly Procedure∙Inserting the collar assembly into the piston rod assembly.Apply grease to the end of the piston rod, especially on the 30° chamferand on the flats. Insert with care the piston rod into the collar assemblyto prevent any damage to the rod seal.∙Inserting piston rod assembly and collar assembly into the cylindertube.Insert slowly with care the piston assembly and the collar assembly intothe cylinder tube to prevent any damage of the piston seal and tubegasket.∙Installing snap ring.Use appropriate pliers (tool for C-shape snap ring) for installation.CautionWhen installing the snap ring, be aware that the snap ring may come offthe pliers and could result in operator injury or equipment damage. Alsomake sure ring is firmly seated in ring groove.∙Checking assembly.Make sure that no air is leaking from packing seals and that the cylinderoperates smoothly at minimum operating pressure. Check for cylindersmooth movement and for air leakage.8 Limitations of Use8.1 Limited warranty and Disclaimer/Compliance RequirementsRefer to Handling Precautions for SMC Products located on .8.2 Obligations of the end-user∙Ensure the product is used within the specification outlined.∙Ensure that the maintenance periods are suitable for the application.∙Ensure any cleaning processes to remove dust layers are made withthe atmosphere in mind (e.g. using a damp cloth to avoid static buildup).∙Ensure that the application does not introduce additional hazards bymounting, loading, impacts or other methods.∙Ensure that there is sufficient ventilation and air circulation around theproduct.∙If the product is subject to direct heat sources in the application, theyshould be shielded so that the actuator temperature stays within thestated operating range.Caution∙SMC products are not intended for use as instruments for legalmetrology.Measurement instruments that SMC manufactures or sells have notbeen qualified by type approval tests relevant to the metrology(measurement) laws of each country.Danger∙Do not exceed any of the specifications listed in Section 2 of thisdocument as this will be deemed improper use.∙Air equipment has an air leakage during operation within certain limits.Do not use this equipment when the air itself introduces additionalhazards and could lead to an explosion.∙Use only ATEX certified auto switches. These should be orderedseparately.∙Do not use this product in the presence of strong magnetic fields thatcould generate a surface temperature higher than the productspecification.∙Avoid applications where the piston rod end and the adjoining part inthe application can create a possible ignition source.∙Do not install or use these actuators where there is the possibility forthe piston rod to impact foreign objects.∙In the event of damage or failure of any parts located in the vicinitywhere this product has been installed, it is the responsibility of the userto determine whether or not this has compromised the safety andcondition of this product and/or the application.∙External impact on the cylinder body could result in a spark and/orcylinder damage. Avoid any application where foreign objects can hitor impact the cylinder. In such situations the application should installa suitable guard to prevent this occurrence.∙Do not use this equipment where vibration could lead to failure.9 ContactsRefer to Declaration of Conformity and for contacts.URL : http// (Global) http// (Europe)'SMC Corporation, Akihabara UDX15F, 4-14-1, Sotokanda, Chiyoda-ku, Tokyo 1010021Specifications are subject to change without prior notice from the manufacturer.© 2018 SMC Corporation All Rights Reserved.Template DKP50047-F-085H。

DM556-CAN 两相步进驱动器说明书

DM556-CAN 两相步进驱动器说明书

上海分公司地址:上海市淞江区九亭镇涞寅路1881号10栋电话:************传真:************深圳市雷赛智能控制股份有限公司地址:深圳市南山区学苑大道1001号南山智园A3栋9~11楼邮编:518000电话:400-885-5521传真:*************Email :********************网址:北京办事处地址:北京市朝阳区北苑路13号院领地office1号楼A 单元606号电话:************传真:************DM556-CAN两相步进驱动器使用说明书版权所有不得翻印【使用前请仔细阅读本手册,以免损坏驱动器】◆非常感谢您购买雷赛的产品◆使用前请详细阅读此说明书,正确使用该产品◆请妥善保管此说明书版本更新说明创建/修改日期修改者版本号备注2016-05-18Max V1.02016-06-22Max V1.1对象列表修改,删2025H与2026H,增2003H 2016-08-09PC V1.2修改终端电阻设置方式(水晶头)2016-08-26PC V1.3修改保存参数增加恢复出厂值参数,去掉参数6091前言感谢您选用深圳市雷赛智能控制股份有限公司的DM556-CAN步进电机驱动系统,本手册提供了使用该系统的所需知识及注意事项。

操作不当可能引起意外事故,在使用本产品之前,请务必仔细阅读本说明书由于产品的改进,手册内容可能变更,恕不另行通知。

用户对产品的任何改动我厂将不承担任何责任,产品的保修单将因此作废。

阅读本手册时,请特别注意以下提示:警告●只有技术人员才能安装,调试或维护本产品●确保线路连接正确,方可通电测试●错误的电压或电源极性可能会损坏驱动器或造成其他事故目录一、产品简介 (2)1.1概述 (2)1.2特点 (2)1.3应用领域 (2)二、电气、机械和环境指标 (2)2.1电气指标 (2)2.2使用环境及参数 (2)2.3机械安装图 (3)2.4散热方式 (3)三、驱动器接口描述和拨码说明 (3)3.1接口描述 (3)3.1.1输入输出信号接口 (3)3.1.2强电接口 (4)3.1.3CAN通讯接口 (4)3.2拨码开关说明 (4)3.2.1CAN地址设置说明 (4)3.2.2CAN通讯波特率设置说明 (5)3.2.3CAN终端电阻选择 (5)四、DM556-CAN应用说明 (5)4.1配线说明 (5)4.2驱动器接线 (6)4.3电机选配 (7)4.4供电电源选择 (7)4.4.1供电电压的设定 (8)4.4.2输出电流的设定值 (8)4.5PC软件参数设置 (8)4.5.1常用对象列表 (8)五、CANopen通讯概述 (11)5.1DM556-CAN遵循的通讯规范 (11)5.2名词解释 (11)5.2.1对象字典 (11)5.2.2过程数据对象PDO (11)5.2.3服务数据对象SDO (12)5.2.4回零方式 (13)5.3换算规则 (15)六、常见问题 (16)雷赛产品保修条款 (18)DM556-CAN 数字式两相步进驱动器一、产品简介1.1概述DM556-CAN 是雷赛公司推出的一款基于CANopen 协议的高性能步进电机驱动器,采用最新32位DSP 技术,可通过CANopen 指令设置驱动器的参数和控制电机实时运行,在多轴联动的应用场合,可以极大地减少布线,增强驱动器运行的可靠性。

ZMM55-C62中文资料(Pan Jit)中文数据手册「EasyDatasheet - 矽搜」

ZMM55-C62中文资料(Pan Jit)中文数据手册「EasyDatasheet - 矽搜」

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MC55 设备维护

MC55 设备维护
• 新的EDA使用前必须充电24小时 • 充电期间禁止取下主电池 • 使用期间取下主电池的时间不能超过30分钟 • 使用过程中充电过程需3.5小时。 • 备注:正常充电时,指示灯显示为红色,充满电后指示灯显示为绿色。
常见故障排除 3-1
• 不能启动 •
• 电池没电 • 电池安装不正确 • 系统错误
医惠科技集团 护理信息系统 硬件设备维护
MOTOROLA MC55 (PDA)
Байду номын сангаас
MC55结构示意图 2-1
MC55结构示意图 2-2
MC55 系统版面说明
MC55 功能键说明 4-1
MC55 功能键说明 4-2
MC55 功能键说明 4-3
MC55 功能键说明 4-4
MC50使用维护 2-1
MC55保管建议
• 将MC55进行编号管理 • 日间护士按编号将MC55分人使用及随身保管 • 夜班护士将MC55放在专用的充电站进行加锁管理 • 核对及清点工作与科室贵重物品一样处理
医疗创新应用、惠泽服务民生!
• 屏幕不能显示
• 电池没电 • 电池安装不正确 • 没开机 • 屏幕损坏
充电 正确安装 重启 执行软复位(MC50使用维护 2-1)
充电 正确安装 开机 用背光键来判断
常见故障排除 3-2
• 自动关机
• 电池没电 • 电池安装不正确 • 电池寿命已尽 • 处于非激活状态
充电 正确安装 更换电池 设置自动关闭功能电池没电
• 自动关机不能激活相应功能
• 功能锁定 • 系统没有相应 • 屏幕定标不正确 • 键盘锁定
激活相应功能 软复位 重新定标 解锁
常见故障排除 3-3
• 不能扫描
• 扫描距离不正确 • 条码是不可读取得 • 低电池

ZMM55C3V0中文资料

ZMM55C3V0中文资料

This is a complete series of zener diodes with limits and excellent operating characteristics that reflect thethe superior capabilities of silicon-oxide passivated junctions. It is designed for use in hybrid thick and thinfilm circuits.Maximum RatingsUnit Characteristics SymbolMaxTotal Device Dissipation @T A=25℃P tot 500 mWStorage Temperature Tstg -65 to +175 °CJunction Temperature Tj 175 °CElectrical Characteristics (T L=30℃, unless otherwise noted, V F=1.0V Max @I F=100mA for all types.)Test Current Maximum ZenerImpedance(Note 2)Maximum ReverseLeakage CurrentDevice NominalZenerVoltageVz at Iz T(V)(Note1)I ZT(mA)Z ZT atI ZT(Ω)Z ZK atI ZK=1mA(Ω)TypicalTemperatureCoefficient(%/℃) I R(μA)TestVoltage(V)MaximumRegulationCurrentI ZM(mA)(Note 3)ZMM55C2V4 2.28-2.56 5 85 600 -0.070 50 1.0 150 ZMM55C2V7 2.5-2.9 5 85 600 -0.070 10 1.0 135 ZMM55C3V0 2.8-3.2 5 85 600 -0.070 4 1.0 125 ZMM55C3V3 3.1-3.5 585 600 -0.065 2 1.0115ZMM55C3V6 3.4-3.8 585 600 -0.060 2 1.0105ZMM55C3V9 3.7-4.1 585 600 -0.050 2 1.095ZMM55C4V3 4.0-4.6 575 600 -0.025 1 1.090ZMM55C4V7 4.4-5.0 560 600 -0.010 0.5 1.085ZMM55C5V1 4.8-5.4 535 550 +0.015 0.1 1.080ZMM55C5V6 5.2-6.0 525 450 +0.025 0.1 1.070ZMM55C6V2 5.8-6.6 510 200 +0.035 0.1 2.0 64 ZMM55C6V8 6.4-7.2 58 150 +0.045 0.1 3.0 58 ZMM55C7V5 7.0-7.9 5 7 50 +0.050 0.1 5.0 53 ZMM55C8V2 7.7-8.7 5 7 50 +0.050 0.1 6.0 47 ZMM55C9V1 8.5-9.6 5 10 50 +0.060 0.1 7.0 43 ZMM55C10 9.4-10.6 5 15 70 +0.070 0.1 7.5 40 ZMM55C1110.4-11.6 5 20 70 +0.070 0.1 8.5 36 ZMM55C1211.4-12.7 5 20 90 +0.070 0.19.0 32 ZMM55C1312.4-14.1 526 110 +0.0700.110 29 ZMM55C1513.8-15.6 530 110 +0.0700.111 27 ZMM55C1615.3-17.1 540 170 +0.0700.112 24 ZMM55C1816.8-19.1 550 170 +0.0700.114 21 ZMM55C2018.8-21.2 555 220 +0.070 0.115 20 ZMM55C2220.8-23.3 5 55 220 +0.070 0.1 17 18 ZMM55C2422.8-25.6 5 80 220 +0.080 0.118 16 ZMM55C2725.1-28.9 580 220 +0.0800.120 14 ZMM55C3028-32 580 220 +0.0800.122 13 ZMM55C3331-35 580 220 +0.0800.124 12 ZMM55C3634-38 580 220 +0.0800.127 11 ZMM55C3937-41 2.5 90 500 +0.0800.130 10 ZMM55C4340-46 2.590 600 +0.0800.133 9.2 ZMM55C4744-50 2.5110 700 +0.0800.136 8.5 Note: 1.The type numbers listed have zener voltage min/max as shown. Device tolerance of ±2% are indicated by a “B”instead of a “C”. Zener voltage is measured with the device junction in thermal equilibrium at the lead temperatureof 30℃±1℃.2.Z ZT and Z ZK are measured by dividing the ac voltage drop across the device by the ac current applied. The specifiedlimits are for I Z(ac) =0.1I Z(dc) with the ac frequency = 1k Hz.3.This data was calculated using nominal voltages. The maximum current handling capability on a worse case basis islimited by the actual zener voltage at the operating point and the powered derating curve.Mini- Melf (SOD-80C) Dimension*:Typical Inches Millimeters Inches MillimetersDIMMin. Max. Min. Max. DIMMin. Max. Min. Max.A 0.0512 0.0591 1.30 1.50 C 0.0118 0.0197 0.30 0.50B 0.0118 0.0197 0.30 0.50 D 0.1260 0.1417 3.2 3.6Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.Important Notice:• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.• CYStek reserves the right to make changes to its products without notice.• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.ABCDCathode MarkLL-34 Mini-Melf SOD-80CCYStek package code:SM。

中微半导体CMS32M55xx ARM Cortex-M0 32位电机微控制器数据手册说明书

中微半导体CMS32M55xx ARM Cortex-M0 32位电机微控制器数据手册说明书

CMS32M55xx 数据手册ARM ® Cortex ® -M0 32位电机微控制器 Rev. 1.08请注意以下有关CMS 知识产权政策*中微半导体(深圳)股份有限公司(以下简称本公司)已申请了专利,享有绝对的合法权益。

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1. 产品特性1.1 MCU功能特性◆内核ARM Cortex™-M0,**********~5.5V- 单周期32位硬件乘法器◆32位硬件除法器(HWDIV)- 有/无符号模式,6个HCLK完成运算◆存储器- 最大32K字节程序FLASH(APROM+BOOT)- 1K字节的FLASH数据区(独立空间)- 最大8K字节SRAM(支持分区写保护功能)- 支持BOOT功能,BOOT区可设置大小0-4K- 支持硬件CRC校验FLASH空间代码- 支持FLASH分区保护(最小单位为2K)◆系统时钟- 内部高速振荡48MHz/64MHz(HSI)- 内部低速振荡40KHz(LSI)◆GPIO(最多24 I/Os)◆LVR(1.9V/2.1V/2.6V)◆LVD(2.0V/2.2V/2.4V/2.7V/3.0V/3.7V)◆系统定时器- 24位SysTick定时器- 看门狗定时器(WDT)- 窗口看门狗定时器(WWDT)◆正常模式/睡眠模式/深度睡眠模式/停止模式◆通用循环冗余校验单元(CRC)◆定时器(32bit/16bit-TIMER0/1)◆捕获/比较/脉宽调制(CCP0/1)- 支持4通道同时捕捉可连接到霍尔传感器接口◆通信接口- 1个I2C模块(通信速度最快可达1Mb/s)- 1个SSP/SPI模块(4-16位数据格式可调)- 最多2个UART:UART0/1(共32个收/发FIFO)(UART1的TXD1与RXD1可分配到任意端口)◆串行调试接口SWD(2-Wire)◆96bit唯一ID(UID)◆128bit用户UID(USRUID)- 用户可设置,可加密(可作为安全密钥)◆增强型PWM(EPWM)- 6路通道且通道可重映射- 支持独立/互补/同步/成组输出模式- 支持边沿/中心对齐计数模式- 支持单次/连续/间隔加载更新模式- 支持互补模式插入死区延时- 支持掩码及掩码预设(共8个掩码状态缓存)- 支持霍尔传感器接口(硬件控制PWM输出)- 支持硬件刹车及6种刹车信号源◆ADC0(12bit,100Ksps)- 最多24个输入通道- 每个转换通道有独立的结果寄存器- 支持单次/连续模式- 支持2种硬件触发方式共7个触发源- 1个转换结果比较器,可产生中断◆ADC1(12bit,1.2Msps)- 最多24个输入通道- 每个转换通道有独立的结果寄存器- 支持单次/连续模式/插入模式- 支持外部触发方式- 1个转换结果比较器,可产生中断◆模拟比较器(ACMP0/1)- 正端4路选择,负端可选内部1.2V/VDD分压- 支持迟滞电压选择:10mV/20mV/60mV- 支持比较器输出触发EPWM刹车◆可编程增益放大器(PGA0/1)- 正端4路选择- 输出可接内部ADC通道与模拟比较器的输入- 内部增益可选择:4倍~32倍◆运算放大器(OP0/1)- 输入可接内部1.2V基准- 输出可接内部ADC通道与模拟比较器的输入- 可设置为比较器模式◆支持安全相关的功能与应用- 满足IEC60730 CLASS B 标准1.2 产品对比以下是CMS32M55XX芯片的产品对比注:1) 通过系统配置寄存器设置APROM和BOOT空间大小,APROM与BOOT空间总共最大为32K;2) 表示模拟模块个数,模拟功能并非通过管脚的输入/输出实现,输入/输出管脚以实际产品为准。

单片机89C52中英文对照翻译(经典版)

单片机89C52中英文对照翻译(经典版)

AT89C52 internal structure analysis DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8Kbytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the programmemory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash ona monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,and clock circuitry. In addition, the AT89S52 is designed with static logic for operationdown to zero frequency and supports two software selectable power saving modes.The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, andinterrupt system to continue functioning. The Power-down mode saves the RAM contentsbut freezes the oscillator, disabling all other chip functions until the next interruptor hardware reset.Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As anoutput port, eachpin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as highimpedanceinputs.Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification.External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, asshown in the following table.Port 1 also receives the low-order address bytes duringFlash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins, they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will sourcecurrent (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetchesfrom external program memory and during accesses toexternal data memory that use 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3pins, they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out.The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO,the RESET HIGH out feature is enabled.ALE/PROGAddress Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has noeffect if the microcontroller is in external execution mode.PSENProgram Store Enable (PSEN) is the read strobe to externalprogram memory.When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000Hup to FFFFH.Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Special Function RegistersA map of the on-chip memory area called the Special FunctionRegister (SFR) space is shown in Table 1.Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip.Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate er software should not write 1s to these unlisted locations,since they may be used in future products to invokenew features. In that case, the reset or inactive values of the new bits will always be 0.Timer 2 Registers:Control and status bits are contained in registers T2CON (shown in Table 2) and T2MOD (shown in Table 3) for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.Interrupt Registers:The individual interrupt enable bits are in the IE register. Two priorities can be set for each ofthe six interrupt sources in the IP register.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.Program MemoryIf the EA pin is connected to GND, all program fetches are directed toexternal memory.On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location aboveaddress 7FH, the address mode used in the instructionspecifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the SFR space.For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 cont ains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirectaddressing, so the upper 128 bytes of data RAM are availableas stack space.Watchdog Timer(One-time Enabled with Reset-out)The WDT is intended as a recovery method in situationswhere the CPU may be subjected to software upsets. The WDT consists of a 13-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive anoutput RESET HIGH pulse at the RST pin.Using the WDTTo enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H).When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow.The 13-bit counter overflows when it reaches 8191(1FFFH), and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 8191 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse duration is 96xTOSC, where TOSC=1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.WDT During Power-down and IdleIn Power-down mode the oscillator stops, which means the WDT also stops. While in Power-down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt which is enabled prior toentering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode.To ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether theWDT continues tocount if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.UARTThe UART in the AT89S52 operates the same way as the UART in the AT89C51 and AT89C52. For further information on the UART operation, refer to the ATMEL Web site (). From the home page, select ‘Products’,then ‘8051-Architecture Flash Microcontroller’, then‘Product Overview’.Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same wayas Timer 0 and Timer 1 in the AT89C51 and AT89C52. Forfurther information on the timers’ operation, refer to the ATMEL Web site (). From the home page, select ‘Products’, then ‘8051-Architecture Flash Microcontroller’, then ‘Product Overview’.Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.In the Counter function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samplesshow a high in one cycle and a low in the next cycle, thecount is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Sin ce two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency.To ensure that a given level is sampled at least once before it changes, the level should be held for at leastone full machine cycle.Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON.This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt. The capture mode is illustrated in Figure 5.Auto-reload (Up or Down Counter)Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD (see Table 4). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.Figure 6 shows Timer 2 automatically counting up when DCEN=0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down,as shown in Figure 6. In thismode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers,TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.译文:89C52的内部结构分析功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器,具有8K 在系统可编程Flash 存储器。

ZMM5V6中文资料

ZMM5V6中文资料
0 4 8 12 16 20
30
40
20
20
10
0
0
VZ, ZENER VOLTAGE (V) Fig. 1, Zener Current vs Zener Voltage
15
600
NOT FOR NEW DESIGN, 1000 USE BZT52C2V4 - BZT52C51
DIFFERENTIAL ZENER IMPEDANCE (W)
VR = 2V Tj = 25°C
5
25
200
Cj, JUNCTION CAPACITANCE (pF)
150
100
50
0
0
5
10
15
20
25
VZ, ZENER VOLTAGE (V) Fig. 5, Junction Capacitance vs Zener Voltage
DS18005 Rev. H-3
Characteristic Forward Voltage @ IF = 200mA Thermal Resistance, Junction to Ambient Air (Note 2) Operating and Storage Temperature Range Notes:
1. Tested with Pulses, tp = 20ms. 2. Valid provided that Electrodes are kept at Ambient Temperature.
DS18005 Rev. H-3
2 of 3
ZMM2V4-ZMM75
元器件交易网
100
50
Ptot = 500mW TA = 25°C

ZMM5252B中文资料(WILLAS ELECTRONIC)中文数据手册「EasyDatasheet - 矽搜」

ZMM5252B中文资料(WILLAS ELECTRONIC)中文数据手册「EasyDatasheet - 矽搜」

5264
ZMM5265B
62.0
58.90
65.10
185
2.0
1400
0.25
0.1
47.0
5265
ZMM5266B
68.0
64.60
71.40
230
1.8
1600
0.25
0.1
52.0
5266
ZMM5267B
75.0
71.25
78.75
270
1.7
1700
0.25
0.1
56.0
5267
1)基于直流测量达到热平衡;引线长度=9.5毫米(3/8");散热器= 30K / W热阻
5244
ZMM5245B
15.0
14.25
15.75
16
8.5
600
0.25
0.1
11.0
5245
ZMM5246B
16.0
15.20
16.80
17
7.8
600
0.25
0.1
12.0
5246
ZMM5247B
17.0
16.15
17.85
19
7.4
600
0.25
0.1
13.0
5247
ZMM5248B
18.0
类型
max. .006 (0.15)
符号
PTOT IZ Tj Tstg

500
PV/V Z -65到+175 –65 至 +175
单元
mW
mA °C °C
.010 (0.25) min.
Marking Code: 测JV o试r 4条件

ZMM5V1中文资料

ZMM5V1中文资料

Type Number
Temperature Coefficient (%/K) -0.09 to -0.06 -0.09 to -0.06 -0.08 to -0.05 -0.08 to -0.05 -0.08 to -0.05 -0.08 to -0.05 -0.06 to -0.03 -0.05 to +0.02 -0.02 to +0.02 -0.05 to +0.05 0.03 to 0.06 0.03 to 0.07 0.03 to 0.07 0.03 to 0.08 0.03 to 0.09 0.03 to 0.10 0.03 to 0.11 0.03 to 0.11 0.03 to 0.11 0.03 to 0.11 0.03 to 0.11 0.03 to 0.11 0.03 to 0.11 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12 0.04 to 0.12
Characteristic Forward Voltage @ IF = 200mA Thermal Resistance, Junction to Ambient Air (Note 2) Operating and Storage Temperature Range Notes:
1. Tested with Pulses, tp = 20ms. 2. Valid provided that Electrodes are kept at Ambient Temperature.

ZMM55C6V2中文资料(secos)中文数据手册「EasyDatasheet - 矽搜」

ZMM55C6V2中文资料(secos)中文数据手册「EasyDatasheet - 矽搜」

5.8 6.2 6.6
6.4 6.8 7.2
7.0 7.5 7.9
7.7 8.2 8.7
8.5 9.1 9.6
9.4 10 10.6
10.4 11 11.6
11.4 12 12.7
12.4 13 14.1
13.8 15 15.8
15.3 16 17.1
16.8 18 19.1
18.8 20 21.2
5
15
70
1.0
5
20
70
1.0
5
20
90
1.0
5
26
110
1.0
5
30
110
1.0
5
40
170
1.0
5
50
170
1.0
5
55
220
1.0
5
55
220
1.0
5
80
220
1.0
5
80
220
1.0
5
80
220
1.0
5
80
220
1.0
5
80
220
1.0
2.5
90
500
1.0
2.5
90
600
1.0
2.5
110
符号
Min.
热阻Junctiobn到环境空气
RθJA
-
正向电压@I
F=200mA
VF
-
*有效规定,导致在从情况下,距离为10mm防护持在环境温度下
Typ. Max. Unit
-
0.3 * K /毫瓦
-
1.0

MSM80C154资料

MSM80C154资料

GENERAL DESCRIPTION
The MSM80C154S/MSM83C154S, designed for the high speed version of the existing MSM80C154/MSM83C154, is a higher performance 8-bit microcontroller providing low-power consumption. The MSM80C154S/MSM83C154S covers the functions and operating range of the existing MSM80C154/83C154/80C51F/80C31F. The MSM80C154S is identical to the MSM83C154S except it does not contain the internal program memory (ROM).
NC 6 P3.1/TXD 7 P3.2/INT0 8 P3.3/INT1 9
P3.4/T0 10 P3.5/T1/HPDI 11
33 P0.4 32 P0.5 31 P0.6 30 P0.7 29 EA 28 NC 27 ALE 26 PSEN 25 P2.7 24 P2.6 23 P2.5
P3.6/WR 12 P3.7/RD 13
44-pin plastic QFP (QFP44-P-910-0.80-2K) :
44-pin QFJ (QFJ44-P-S650-1.27)
:
44-pin TQFP (TQFP44-P-1010-0.80-K) :
(Product name: MSM80C154SRS/ MSM83C154S-xxxRS)

MPC82x5x

MPC82x5x

MPC82x5x 用户指南V1.00目录1特性 (3)2引脚 (4)3特殊功能寄存器 (6)4存储器 (7)4.1RAM (7)MPC82x52 RAM空间 (7)MPC82x54 RAM空间 (7)4.2FLASH (8)MPC82x52 FlASH空间 (8)MPC82x54 FlASH空间 (8)5I/O口 (9)5.1相关特殊寄存器 (9)5.2I/O口模式配置 (10)6定时/计数器 (12)6.1相关特殊寄存器 (12)6.2定时/计数器的四种模式 (13)7中断 (15)7.1相关特殊寄存器 (15)7.2中断入口定义 (17)汇编语言 (17)C语言 (18)8IAP/ISP应用 (20)8.1相关特殊寄存器 (20)8.2IAP/ISP基本操作(汇编) (21)8.3IAP/ISP操作实例(C语言) (22)9串口(UART)的使用 (31)9.1相关特殊寄存器 (31)9.2波特率的设置 (31)9.3串口应用实例(C语言) (32)10ADC的使用 (36)10.1相关特殊寄存器 (36)10.2ADC应用实例—按键输入(C语言) (37)11PCA的使用 (42)11.1相关特殊寄存器 (42)11.2PCA的四种模式 (44)PCA 捕捉模式 (44)16位软件定时器模式 (48)16位高速输出模式 (48)8位PWM输出模式 (51)12SPI接口 (55)12.1相关特殊寄存器 (55)12.2SPI示例(C语言) (56)SPI_MASTER (56)SPI_SLAVER (61)13看门狗 (64)13.1相关特殊寄存器 (64)13.2看门狗时间计算 (65)13.3看门狗示例 (65)汇编语言 (65)C语言 (65)14电源控制 (66)14.1相关特殊寄存器 (66)14.2IDLE模式 (66)14.3睡眠模式 (66)14.4睡眠和IDLE模式示例(C语言) (67)15程序启动入口 (71)从ISP程序切换到AP应用程序 (71)从AP应用程序切换到ISP程序 (71)16程序烧录 (72)16.1使用ISP PROGRAMMER烧录程序 (72)预备 (72)从PC下载程序到ISP Programmer (72)从ISP Programmer烧录到MPC82x5x (74)16.2使用8051WRITER U1烧录程序 (75)预备 (75)从PC下载程序到MPC82x5x (75)17附录 (80)17.1指令集 (80)1特性●增强型80C51内核●8KB (MPC82x52),15.5KB(MPC82x54)FLASH 空间(AP/IAP/ISP 共享),超过20,000次的烧写寿命,室温下数据可保存超过100年。

海尔 LU55C8 55英寸4K超高清平板电视 使用说明书

海尔 LU55C8 55英寸4K超高清平板电视 使用说明书
本产品含有开机推送广告
智能家电操控 智慧场景定制 智家商城购物 家电报装报修
55R3 LU55C7 LU55C8 LU55G71 LS55Z51Z 55R1(PRO) LU55C61(PRO) LU55D31(PRO) LU55G61(PRO) LS55Z51Z(PRO)
安全注意事项 ........................ 1 安装和设备连接 .................... 4
无线网络连接
通过无线路由器连接至互联网。 * 本机已内置无线网络适配器,可以通过无线路由 器直接接收网络信号,无需外接。
墙上的LAN端口
无线路由器
2. 环保标识的说明: 本产品根据国家法规《电器电子产品有害物质限制使用管理办法》的相关规 定,采用了行业标准《SJ/T 11364电子电气产品有害物质限制使用标识要 求》中电子电气产品污染控制标志。
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×





○:表示该有害物质在该部件所有均质材料中的含量均在GB/T 26572 规定的限量要求以下。 ×:表示该有害物质至少在该部件的某一均质材料中的含量超出GB/T 26572规定的限量要求。 注:本产品中所含有的有害物质皆由于全球的技术和工艺水平限制而无法实现完全替代,但本产品中的 有害物质含量极其微少,长期使用不会对人体产生危害,请放心使用。
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插座中拔下电源插头,并 及时联系授权的专业维修 人员检修。
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单片机89C52中英文对照翻译[经典版]

单片机89C52中英文对照翻译[经典版]

AT89C52 internal structure analysis DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8Kbytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the programmemory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash ona monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,and clock circuitry. In addition, the AT89S52 is designed with static logic for operationdown to zero frequency and supports two software selectable power saving modes.The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, andinterrupt system to continue functioning. The Power-down mode saves the RAM contentsbut freezes the oscillator, disabling all other chip functions until the next interruptor hardware reset.Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as highimpedanceinputs.Port 0 can also be configured to be the multiplexedloworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification.External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups.ThePort 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current <IIL> because of the internal pullups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input <P1.0/T2> and the timer/counter 2 trigger input <P1.1/T2EX>, respectively, asshown in the following table.Port 1 also receives the low-order address bytes duringFlash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pullups.ThePort 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins, they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will sourcecurrent <IIL> because of the internal pullups.Port 2 emits the high-order address byte during fetchesfrom external program memory and during accesses toexternal data memory that use 16-bit addresses <MOVX @DPTR>. In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses <MOVX @ RI>, Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups.ThePort 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. Asinputs,Port 3 pins that are externally being pulled low will source current <IIL> because of the pullups.Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out.The DISRTO bit in SFR AUXR <address 8EH> can be used to disable this feature. In the default state of bit DISRTO,the RESET HIGH out feature is enabled.ALE/PROGAddress Latch Enable <ALE> is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input <PROG> during Flash programming.In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has noeffect if the microcontroller is in external execution mode.PSENProgram Store Enable <PSEN> is the read strobe to externalprogram memory.When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA will beinternally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage <VPP> during Flash programming.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Special Function RegistersA map of the on-chip memory area called the Special FunctionRegister <SFR> space is shown in Table 1.Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip.Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate er software should not write 1s to these unlisted locations,since they may be used in future products to invokenew features. In that case, the reset or inactive values of the new bits will always be 0.Timer 2 Registers:Control and status bits are contained in registers T2CON <shown in Table 2> and T2MOD <shown in Table 3> for Timer 2. The register pair <RCAP2H, RCAP2L> are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.Interrupt Registers:The individual interrupt enable bits are in the IE register. Two priorities can be set for each ofthe six interrupt sources in the IP register.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.Program MemoryIf the EA pin is connected to GND, all program fetches are directed toexternal memory.On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location aboveaddress 7FH, the address mode used in the instructionspecifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space.Instructions which use direct addressing access of the SFR space.For example, the following direct addressing instruction accesses the SFR at location 0A0H <which is P2>. MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 <whose address is 0A0H>.MOV @R0, #dataNote that stack operations are examples of indirectaddressing, so the upper 128 bytes of data RAM are availableas stack space.Watchdog Timer<One-time Enabled with Reset-out>The WDT is intended as a recovery method in situationswhere the CPU may be subjected to software upsets. The WDT consists of a 13-bit counter and the Watchdog Timer Reset <WDTRST> SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write01EH and 0E1H in sequence to the WDTRST register <SFR location 0A6H>. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset<either hardware reset or WDT overflow reset>. When WDT overflows, it will drive an output RESET HIGH pulse at the RST pin.Using the WDTTo enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register <SFR location 0A6H>.When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow.The 13-bit counter overflows when it reaches 8191<1FFFH>, and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 8191 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse duration is 96xTOSC, where TOSC=1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.WDT During Power-down and IdleIn Power-down mode the oscillator stops, which means the WDT also stops. While in Power-down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt which is enabled prior toentering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It issuggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode.To ensure that the WDT does not overflow within a few states of exiting Power-down, it is bestto reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues tocount if enabled. The WDT keeps counting during IDLE <WDIDLE bit = 0> as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.UARTThe UART in the AT89S52 operates the same way as the UART in the AT89C51 and AT89C52. For further information on the UART operation, refer to the ATMEL Web site <>. From the home page, select ‘Products’,then ‘8051-Architecture Flash Microcontroller’, then‘Product Overview’.Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same wayas Timer 0 and Timer 1 in the AT89C51 and AT89C52. Forfurther information on the timers’ operation, refer to the ATMEL Web site <>. From the home page, select ‘Products’, then ‘8051-Architecture Flash Microcontroller’, then ‘Product Overview’.Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON <shown in Table 2>. Timer 2 has three operating modes: capture, auto-reload <up or down counting>, and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.In the Counter function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, thecount is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles <24 oscillator periods> are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency.To ensure that a given level is sampled at least once before it changes, the level should be held for at leastone full machine cycle.Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON.This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H andRCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt. The capture mode is illustrated in Figure 5.Auto-reload <Up or Down Counter>Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN <Down Counter Enable> bit located in the SFR T2MOD <see Table 4>. Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.Figure 6 shows Timer 2 automatically counting up when DCEN=0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software.If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down,as shown in Figure 6. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers,TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.译文:89C52的内部结构分析功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器,具有8K 在系统可编程Flash 存储器。

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This is a complete series of zener diodes with limits and excellent operating characteristics that reflect the
the superior capabilities of silicon-oxide passivated junctions. It is designed for use in hybrid thick and thin
film circuits.
Maximum Ratings
Unit Characteristics Symbol
Max
Total Device Dissipation @T A=25℃P tot 500 mW
Storage Temperature Tstg -65 to +175 °C
Junction Temperature Tj 175 °C
Electrical Characteristics (T L=30℃, unless otherwise noted, V F=1.0V Max @I F=100mA for all types.)
Test Current Maximum Zener
Impedance(Note 2)
Maximum Reverse
Leakage Current
Device Nominal
Zener
Voltage
Vz at Iz T
(V)(Note1)
I ZT(mA)
Z ZT at
I ZT
(Ω)
Z ZK at
I ZK=1mA
(Ω)
Typical
Temperature
Coefficient
(%/℃) I R
(μA)
Test
Voltage
(V)
Maximum
Regulation
Current
I ZM(mA)
(Note 3)
ZMM55C2V4 2.28-2.56 5 85 600 -0.070 50 1.0 150 ZMM55C2V7 2.5-2.9 5 85 600 -0.070 10 1.0 135 ZMM55C3V0 2.8-3.2 5 85 600 -0.070 4 1.0 125 ZMM55C3V3 3.1-3.5 585 600 -0.065 2 1.0115
ZMM55C3V6 3.4-3.8 585 600 -0.060 2 1.0105
ZMM55C3V9 3.7-4.1 585 600 -0.050 2 1.095
ZMM55C4V3 4.0-4.6 575 600 -0.025 1 1.090
ZMM55C4V7 4.4-5.0 560 600 -0.010 0.5 1.085
ZMM55C5V1 4.8-5.4 535 550 +0.015 0.1 1.080
ZMM55C5V6 5.2-6.0 525 450 +0.025 0.1 1.070
ZMM55C6V2 5.8-6.6 510 200 +0.035 0.1 2.0 64 ZMM55C6V8 6.4-7.2 58 150 +0.045 0.1 3.0 58 ZMM55C7V5 7.0-7.9 5 7 50 +0.050 0.1 5.0 53 ZMM55C8V2 7.7-8.7 5 7 50 +0.050 0.1 6.0 47 ZMM55C9V1 8.5-9.6 5 10 50 +0.060 0.1 7.0 43 ZMM55C10 9.4-10.6 5 15 70 +0.070 0.1 7.5 40 ZMM55C1110.4-11.6 5 20 70 +0.070 0.1 8.5 36 ZMM55C1211.4-12.7 5 20 90 +0.070 0.19.0 32 ZMM55C1312.4-14.1 526 110 +0.0700.110 29 ZMM55C1513.8-15.6 530 110 +0.0700.111 27 ZMM55C1615.3-17.1 540 170 +0.0700.112 24 ZMM55C1816.8-19.1 550 170 +0.0700.114 21 ZMM55C2018.8-21.2 555 220 +0.070 0.115 20 ZMM55C2220.8-23.3 5 55 220 +0.070 0.1 17 18 ZMM55C2422.8-25.6 5 80 220 +0.080 0.118 16 ZMM55C2725.1-28.9 580 220 +0.0800.120 14 ZMM55C3028-32 580 220 +0.0800.122 13 ZMM55C3331-35 580 220 +0.0800.124 12 ZMM55C3634-38 580 220 +0.0800.127 11 ZMM55C3937-41 2.5 90 500 +0.0800.130 10 ZMM55C4340-46 2.590 600 +0.0800.133 9.2 ZMM55C4744-50 2.5110 700 +0.0800.136 8.5 Note: 1.The type numbers listed have zener voltage min/max as shown. Device tolerance of ±2% are indicated by a “B”
instead of a “C”. Zener voltage is measured with the device junction in thermal equilibrium at the lead temperature
of 30℃±1℃.
2.Z ZT and Z ZK are measured by dividing the ac voltage drop across the device by the ac current applied. The specified
limits are for I Z(ac) =0.1I Z(dc) with the ac frequency = 1k Hz.
3.This data was calculated using nominal voltages. The maximum current handling capability on a worse case basis is
limited by the actual zener voltage at the operating point and the powered derating curve.
Mini- Melf (SOD-80C) Dimension
*:Typical Inches Millimeters Inches Millimeters
DIM
Min. Max. Min. Max. DIM
Min. Max. Min. Max.
A 0.0512 0.0591 1.30 1.50 C 0.0118 0.0197 0.30 0.50
B 0.0118 0.0197 0.30 0.50 D 0.1260 0.1417 3.2 3.6
Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
A
B
C
D
Cathode Mark
LL-34 Mini-Melf SOD-80C
CYStek package code:SM。

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