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SpagoBI开源BI平台_安装配置及使用说明v15
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SpagoBI-开源 BI 平台软件安装配置与使用说明
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【 SpagoBI 开源 BI 平台软件 】 【安装配置与使用说明】
2012 年 09 月
SpagoBI-开源 BI 平台软件安装配置与使用说明
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【最新试题库含答案】电路分析基础第一章答案
电路分析基础第一章答案:篇一:电路分析基础(周围主编)第一章答案1-9.各元件的情况如图所示。
(1)若元件A吸收功率10W,求:Ua=? 解:电压电流为关联参考方向,吸收功率:P?UaI?Ua?PI?10W1A?10V(2)若元件B吸收功率10W,求:Ib=? 解:电压电流为非关联参考方向,吸收功率:P??UIb?Ib??PU??10W10V??1A(3)若元件C吸收功率-10W,求:Ic=? 解:电压电流为关联参考方向,吸收功率:P?UIc?Ic?PU??10W10V??1A(4)求元件D吸收功率:P=?解:电压电流为非关联参考方向,吸收功率:P??UI??10mV?2mA??20?10?6W(5)若元件E输出的功率为10W,求:Ie=? 解:电压电流为关联参考方向,吸收功率:P?UIe?Ie?PU??10W10V??1A(6)若元件F输出功率为-10W,求:Uf=? 解:电压电流为非关联参考方向,吸收功率:P??UfI?Uf??PI??10W1A??10V(7)若元件G输出功率为10mW,求:Ig=? 解:电压电流为关联参考方向,吸收功率:P?UIg?Ig?PU??10mW10V??1mA(8)试求元件H输出的功率。
解:电压电流为非关联参考方向,吸收功率:P??UI??2V?2mA??4mW故输出功率为4mW。
1-11.已知电路中需要一个阻值为390欧姆的电阻,该电阻在电路中需承受100V的端电压,现可供选择的电阻有两种,一种是散热1/4瓦,阻值390欧姆;另一种是散热1/2瓦,阻值390欧姆,试问那一个满足要求?解:该电阻在电路中吸收电能的功率为:P?U2R?1003902?25.64W显然,两种电阻都不能满足要求。
1-14.求下列图中电源的功率,并指出是吸收还是输出功率。
3V3V3V3V(a)(b)题图1-14(c)(d)解:(a)电压电流为关联参考方向,吸收功率为:P?UI?3V?2A?6W;(b)电压电流为非关联参考方向,吸收功率为:P??UI??3V?2A??6W,实际是输出功率6瓦特;(c)电压电流为非关联参考方向,吸收功率为:P??UI??3V?2A??6W, 实际是输出功率6瓦特; (d)电压电流为关联参考方向,吸收功率为:P?UI?3V?2A?6W.1-19.电路如图示,求图中电流I,电压源电压US,以及电阻R。
Juniper Networks SRX5400、SRX5600和SRX5800服务网关产品描述说明
The SRX5400, SRX5600, and SRX5800 are supported by Juniper Networks Junos®Space Security Director, which enables distributed security policy management through an intuitive, centralized interface that enables enforcement across emerging and traditional risk vectors. Using intuitive dashboards and reporting features, administrators gain insight into threats, compromised devices, risky applications, and more.Based on Juniper’s Dynamic Services Architecture, the SRX5000 line provides unrivaled scalability and performance. Each services gateway can support near linear scalability with the addition of Services Processing Cards (SPCs) and I/O cards (IOCs), enabling a fully equipped SRX5800 to support up to 1.2 Tbps firewall throughput. The SPCs are designed to support a wide range of services, enabling future support of new capabilities without the need for service-specific hardware. Using SPCs on all services ensures that there are no idle resources based on specific services being used—maximizing hardware utilization.The scalability and flexibility of the SRX5000 line is supported by equally robust interfaces. The SRX5000 line employs a modular approach, where each platform can be equipped with a flexible number of IOCs that offer a wide range of connectivity options, including 1GbE, 10GbE, 40GbE, and 100GbE interfaces. With the IOCs sharing the same interface slot as the SPCs, the gateway can be configured as needed to support the ideal balance of processing and I/O. Hence, each deployment of the SRX Series can be tailored to specific network requirements. The scalability of both SPCs and IOCs in the SRX5000 line is enabled by the custom-designed switch fabric. Supporting up to 960 Gbps of data transfer, the fabric enables realizationof maximum processing and I/O capability available in any particular configuration. This level of scalability and flexibility enables future expansion and growth of the network infrastructure, providing unrivaled investment protection.The tight service integration on the SRX Series is enabled by Juniper Networks Junos® operating system. The SRX Seriesis equipped with a robust set of services that include stateful firewall, intrusion prevention system (IPS), denial of service (DoS), application security, VPN (IPsec), Network Address Translation (NAT), unified threat management (UTM), and quality of service (QoS). In addition to the benefit of individual services, the SRX5000 line provides a low latency solution.Junos OS also delivers carrier-class reliability with six nines system availability, the first in the industry to achieve independent verification by Telcordia. Furthermore, the SRX Series enjoys the benefit of a single source OS, and single integrated architecture traditionally available on Juniper’s carrier-class routers and switches.SRX5800The SRX5800 Services Gateway is the market-leading security solution supporting up to 1.2 Tbps firewall throughput and latency as low as 32 microseconds for stateful firewall. The SRX5800 also supports 1 Tbps IPS and 390 million concurrent sessions. Equipped with the full range of advanced security services, the SRX5800 is ideally suited for securing large enterprise, hosted, or colocated data centers, service provider core and cloud provider infrastructures, and mobile operator environments. The massive performance, scalability, and flexibility of the SRX5800 make it ideal for densely consolidated processing environments, and the service density makes it ideal for cloud and managed service providers.SRX5600The SRX5600 Services Gateway uses the same SPCs and IOCsas the SRX5800 and can support up to 570 IMIX Gbps firewall throughput, 460 million concurrent sessions, and 460 Gbps IPS. The SRX5600 is ideally suited for securing enterprise data centers as well as aggregation of various security solutions. The capability to support unique security policies per zone and its ability to scale with the growth of the network infrastructure make the SRX5600 an ideal deployment for consolidation of services in large enterprise, service provider, or mobile operator environments. SRX5400The SRX5400 Services Gateway uses the same SPCs and IOCs as the SRX5800 and can support up to 285 Gbps IMIX firewall, 90 million concurrent sessions, and 230 Gbps IPS. The SRX5400 is a small footprint, high-performance gateway ideally suited for securing large enterprise campuses as well as data centers, either for edge or core security deployments. The ability to support unique security policies per zone and a compelling price/performance/footprint ratio make the SRX5400 an optimal solution for edge or data center services in large enterprise, service provider, or mobile operator environments. Service Processing Cards (SPC)As the “brains” behind the SRX5000 line, SPCs are designedto process all available services on the platform. Without the need for dedicated hardware for specific services or capabilities, there are no instances in which a piece of hardware is taxedto the limit while other hardware is sitting idle. SPCs are designed to be pooled together, allowing the SRX5000 line to expand performance and capacities with the introduction of additional SPCs, drastically reducing management overhead and complexity. The high-performance SPC3 cards are supported on the SRX5400, SRX5600, and SRX5800 Services Gateways.I/O Cards (IOCs)To provide the most flexible solution, the SRX5000 line employs the same modular architecture for SPCs and IOCs. The SRX5000 line can be equipped with one or several IOCs, supporting the ideal mix of interfaces. With the flexibility to install an IOC or an SPC on any available slot, the SRX5000 line can be equipped to support the perfect blend of interfaces and processing capabilities, meeting the needs of the most demanding environments while ensuring investment protection. Juniper offers the IOC2, a second-generation card with superior connectivity options. The IOC2 offers the industry’s first100GbE as well as 40GbE and high-density 10GbE and 1GbE connectivity options. These options reduce the need for link aggregation when connecting high throughput switches to the firewall, as well as enabling increased throughput in the firewall itself. The IOC2 is supported on all three platforms in theSRX5000 line of services gateways.The third generation of IOCs from Juniper, the IOC3, delivers the highest throughput levels yet, along with superior connectivity options including 100GbE, 40GbE, and high-density 10GbE interfaces. The IOC2 or IOC3 operates with the Express Path optimization capability, delivering higher levels of throughput—up to an industry-leading 2 Tbps on the SRX5800. The IOC3 cards are supported on the SRX5400, SRX5600, and SRX5800.Routing Engine (RE2) and Enhanced System Control Board (SCB3)The SRX5K-RE-1800X4 Routing Engine (RE2) is the latest in the family of REs for the SRX5000 line with a multicore processor running at 1800 MHz. It delivers improved performance, scalability, and reliability with 16 GB DRAM and 128 GB solid-state drive (SSD). The SRX5K-SCB3 Enhanced System Control Board (SCB3) enables 240 Gbps per slot throughput with intra as well as interchassis high availability and redundancy.Features and BenefitsNetworking and SecurityThe Juniper Networks SRX5000 line of Services Gateways has been designed from the ground up to offer robust networking andsecurity services.*Requires Junos OS 15.1x49-D10 or greater.**Requires Junos OS 18.2R1-S1 or greater.IPS CapabilitiesJuniper Networks IPS capabilities offer several unique features that assure the highest level of network security.Content Security UTM CapabilitiesThe UTM services offered on the SRX5000 line of Services Gateways include industry-leading antivirus, antispam, content filtering,and additional content security services.Advanced Threat PreventionAdvanced threat prevention (ATP) solutions that defend against sophisticated malware, persistent threats, and ransomware are available for the SRX5000 line. Two versions are available: Juniper Sky ATP, a SaaS-based service, and the Juniper ATP Appliance, anon-premises solution.More information about Juniper Sky ATP can be found at /us/en/products-services/security/sky-advanced-threat-prevention/. Additional information about the Juniper ATP Appliance can be found at /us/en/products-services/ security/advanced-threat-prevention-appliance/.Centralized ManagementJuniper Networks Junos Space Security Director delivers scalable and responsive security management that improves the reach, ease, and accuracy of security policy administration. It lets administrators manage all phases of the security policy life cycle through a single web-based interface, accessible via standard browsers. Junos Space Security Director centralizes application identification, firewall, IPS, NAT, and VPN security management for intuitive and quick policy administration. Security Director runs on the Junos Space Network Management Platform for highly extensible, network-wide management functionality, including ongoing access to Juniper and third-party Junos Space ecosystem innovations.Specifications1FirewallSRX5600Services GatewaySRX5800Services GatewaySRX5400Services Gateway Performance, capacity and features listed are based on systems running Junos OS 15.1x49 and are measured under ideal testing conditions. Actual results may vary based on Junos OS releases and by deployments. Maximum concurrent sessions and new sessions/second improvements are a result of Junos 15.1X49-D30.* Session capacity differs based on UTM/AppSecure/IPS features enabled.Please consult the technical publication documents and release notes for a list of compatible ISSU features.T o enable dual control links on the SRX5000 line, two SRX5K-RE-1800X4 modules must be installed on each cluster member.SRX5000 line of gateways operating with Junos OS release 10.0 and later are compliant with the R6, R7, and R8 releases of 3GPP TS 20.060 with the following exceptions (not supported on the SRX5000 line): - Section 7.5A Multimedia Broadcast and Multicast Services (MBMS) messages- Section 7.5B Mobile Station (MS) info change messages- Section 7.3.12 Initiate secondary PDP context from GGSNShort term is not greater than 96 consecutive hours, and not greater than 15 days in 1 year.WarrantyFor warranty information, please visit /support/warranty/.Juniper Networks Services and SupportJuniper Networks is the leader in performance-enabling services that are designed to accelerate, extend, and optimize yourhigh-performance network. Our services allow you to maximize operational efficiency while reducing costs and minimizing risk, achieving a faster time to value for your network. Juniper Networks ensures operational excellence by optimizing the network to maintain required levels of performance, reliability, and availability. For more details, please visit /us/en/products-services .Ordering Information*These products require Junos OS 12.1X47-D15 or greater.**Requires Junos OS 15.1X49-D10 or greater.Corporate and Sales Headquarters Juniper Networks, Inc. 1133 Innovation Way Sunnyvale, CA 94089 USAPhone: 888.JUNIPER (888.586.4737)or +Copyright 2018 Juniper Networks, Inc. All rights reserved. Juniper Networks, the Juniper Networks logo, Juniper, and Junos are registered trademarks of Juniper Networks, Inc. in the United States and other countries. All other trademarks, service marks, registered marks, or registered service marks are the property of their respective owners. Juniper Networks assumes no responsibility for any inaccuracies in this document. Juniper Networks reserves the right to change, modify, transfer, or otherwise revise this publication without notice.APAC and EMEA Headquarters Juniper Networks International B.V.Boeing Avenue 2401119 PZ Schiphol-Rijk Amsterdam, The Netherlands Phone: +31.0.207.125.700EXPLORE JUNIPERAbout Juniper NetworksJuniper Networks brings simplicity to networking with products, solutions and services that connect the world. Through engineering innovation, we remove the constraints and complexities of networking in the cloud era to solve the toughest challenges our customers and partners face daily. At Juniper Networks, we believe that the network is a resource for sharing knowledge and human advancement that changes the world. We are committed to imagining groundbreaking ways to deliver automated, scalable and secure networks to move at the speed of business.* I n 12.3X48-D10, the Services Offload feature was renamed Express Path and is included withoutrequiring a license for Junos OS X48 releases and beyond. With the X48 release, the Express Path feature is supported on all SRX5000 Services Gateways including the SRX5400. For versions prior to the X48 release, the Services Offload license is still required and supports only SRX5600 and SRX5800 products. Express Path is available on the SRX5400, SRX5600, and SRX5800 Services Gateways. No separate license required.。
电路分析课后习题答案
(3)回路①③②①:u5=-u3-u2=-10V;
回路③①⑤③:u6=u5+u1=-8V;
回路②③④②:u7=u3+u4=14V;
电路分析课后习题答案
练习题015:
求图示电路中两个独立电源各自发出的功率。
电路分析课后习题答案
练习题015解答:
由回路l1及l2的KVL方程求得
由节点①的KCL方程求得流过电压源的电流 所以电压源发出的功率为: 电流源发出的功率为:
电路分析课后习题答案
练习题016:
求出图示电路中各独立电源和受控电源分别输出的 功率及两个电阻消耗的功率。
电路分析课后习题答案
补充: 解得:
练习题040:
电路分析课后习题答案
求出图示电路的节点电压。
练习题040解答:
电路分析课后习题答案
为简便,在下列方程中省去单位 。 节点①: 节点②:
联立解得:
回路④③⑤④:u8=-u4+u6=-16V;
(4)u5=un3-un1=u’n3-u‘n1=-10V;u6=un3-un5=u’n3u‘n5=-8V;u7=un2-un4=u’n2-u‘n4=14V;u8=un4un5=u’n4-u‘n5=-16V;
练习题004:
电路分析课后习题答案
电路如图所示,已知部分电流值和部分电压值。
电路分析课后习题答案
图示电路已知,试列出支路电流法方程。
练习题031解答:
电路分析课后习题答案
2021年数学人教版必修5优化练习:第2章2.3第1课时等差数列的前项和公式版含解析
[课时作业]页[A 组 根底稳固]1.等差数列{a n }中 ,d =2 ,a n =11 ,S n =35 ,那么a 1等于( )A .5或7B .3或5C .7或-1D .3或-1解析:由题意 ,得⎩⎪⎨⎪⎧a n =11 S n =35 即⎩⎨⎧ a 1+2(n -1)=11 na 1+n (n -1)2×2=35. 解得⎩⎪⎨⎪⎧n =5 a 1=3 或⎩⎪⎨⎪⎧ n =7a 1=-1. 答案:D2.等差数列{a n }的前n 项和为S n ,假设S 2=4 ,S 4=20 ,那么该数列的公差d 为( )A .7B .6C .3D .2 解析:由S 2=4 ,S 4=20 ,得2a 1+d =4,4a 1+6d =20 ,解得d =3.答案:C3.等差数列{a n }满足a 2+a 4=4 ,a 3+a 5=10 ,那么它的前10项的和S 10等于( )A .138B .135C .95D .23解析:由a 2+a 4=4 ,a 3+a 5=10 ,可知d =3 ,a 1=-4.∴S 10=-40+10×92×3=95. 答案:C4.假设等差数列{a n }的前5项和S 5=25 ,且a 2=3 ,那么a 7等于( )A .12B .13C .14D .15解析:由S 5=5a 3=25 ,∴a 3=5.∴d =a 3-a 2=5-3=2.∴a 7=a 2+5d =3+10=13.答案:B5.数列{a n }的前n 项和S n =n 2-9n ,第k 项满足5<a k <8 ,那么k 等于( )A .9B .8C .7D .6解析:当n =1时 ,a 1=S 1=-8; 当n ≥2时 ,a n =S n -S n -1=(n 2-9n )-[(n -1) 2-9(n -1)]=2n -10. 综上可得数列{a n }的通项公式a n =2n -10.所以a k =2k -10.令5<2k -10<8 ,解得k =8.答案:B6.数列{a n }中 ,a 1=1 ,a n =a n -1+12(n ≥2) ,那么数列{a n }的前9项和等于________. 解析:∵n ≥2时 ,a n =a n -1+12 ,且a 1=1 ,所以数列{a n }是以1为首||项 ,以12为公差的等差数列 ,所以S 9=9×1+9×82×12=9+18=27. 答案:277.等差数列{a n }中 ,假设a 10=10 ,a 19=100 ,前n 项和S n =0 ,那么n =________.解析:⎩⎪⎨⎪⎧a 1+9d =10a 1+18d =100,∴d =10 ,a 1=-80. ∴S n =-80n +n (n -1)2×10=0 , ∴-80n +5n (n -1)=0 ,n =17.答案:178.等差数列{a n }中 ,a 2+a 7+a 12=24 ,那么S 13=________.解析:因为a 1+a 13=a 2+a 12=2a 7 ,又a 2+a 7+a 12=24 ,所以a 7=8.所以S 13=13(a 1+a 13)2=13×8=104. 答案:1049.在等差数列{a n }中:(1)a 5+a 10=58 ,a 4+a 9=50 ,求S 10;(2)S 7=42 ,S n =510 ,a n -3=45 ,求n .解析:(1)由条件得⎩⎪⎨⎪⎧ a 5+a 10=2a 1+13d =58a 4+a 9=2a 1+11d =50 解得⎩⎪⎨⎪⎧a 1=3 d =4. ∴S 10=10a 1+10×(10-1)2d =10×3+10×92×4=210. (2)S 7=7(a 1+a 7)2=7a 4=42 , ∴a 4=6.∴S n =n (a 1+a n )2=n (a 4+a n -3)2=n (6+45)2=510. ∴n =20.10.在等差数列{a n }中 ,a 10=18 ,前5项的和S 5=-15 ,(1)求数列{a n }的通项公式;(2)求数列{a n }的前n 项和的最||小值 ,并指出何时取得最||小值.解析:(1)设{a n }的首||项 ,公差分别为a 1 ,d .那么⎩⎨⎧ a 1+9d =185a 1+52×4×d =-15解得a 1=-9 ,d =3 ,∴a n =3n -12.(2)S n =n (a 1+a n )2=12(3n 2-21n ) =32⎝⎛⎭⎫n -722-1478, ∴当n =3或4时 ,前n 项的和取得最||小值为-18.[B 组 能力提升]1.S n 是等差数列{a n }的前n 项和 ,a 3+a 6+a 12为一个常数 ,那么以下也是常数的是( )A .S 17B .S 15C .S 13D .S 7解析:∵a 3+a 6+a 12为常数 ,∴a 2+a 7+a 12=3a 7为常数 ,∴a 7为常数.又S 13=13a 7 ,∴S 13为常数.答案:C2.设等差数列{a n }的前n 项和为S n ,S m -1=-2 ,S m =0 ,S m +1=3 ,那么m =( )A .3B .4C .5D .6解析:a m =S m -S m -1=2 ,a m +1=S m +1-S m =3 ,∴d =a m +1-a m =1 ,由S m =(a 1+a m )m 2=0 , 知a 1=-a m =-2 ,a m =-2+(m -1)=2 ,解得m =5.答案:C3.设S n 是等差数列{a n }的前n 项和 ,假设a 5a 3=59 ,那么S 9S 5等于________. 解析:由等差数列的性质 ,a 5a 3=2a 52a 3=a 1+a 9a 1+a 5=59, ∴S 9S 5=92(a 1+a 9)52(a 1+a 5)=95×59=1. 答案:14.设等差数列{a n }的前n 项和为S n ,前6项和为36 ,最||后6项和为180 ,S n =324(n >6) ,那么数列的项数n =________ ,a 9+a 10=________.解析:由题意 ,可知a 1+a 2+…+a 6=36 ① ,a n +a n -1+a n -2+…+a n -5=180 ② ,由①+② ,得(a 1+a n )+(a 2+a n -1)+…+(a 6+a n -5)=6(a 1+a n )=216 ,∴a 1+a n S n =n (a 1+a n )2=324 ,∴18n =324 ,∴n =18 ,∴a 1+a 18=36 ,∴a 9+a 10=a 1+a 18=36.答案:18 365.等差数列{a n }的前n 项和S n =-32n 2+2052n ,求数列{|a n |}的前n 项和T n . 解析:a 1=S 1=101 ,当n ≥2时 ,a n =S n -S n -1=-32n 2+2052n -⎣⎡ -32(n -1)2+ ⎦⎤2052(n -1)=-3n +104 ,a 1=S 1=101也适合上式 ,所以a n =-3n +104 ,令a n =0 ,n =3423,故n ≥35时 ,a n <0 ,n ≤34时 ,a n >0 ,所以对数列{|a n |} ,n ≤34时 ,T n =|a 1|+|a 2|+…+|a n |=a 1+a 2+…+a n =-32n 2+2052n ,当n ≥35时 ,T n =|a 1|+|a 2|+…+|a 34|+|a 35|+…+|a n |=a 1+a 2+…+a 34-a 35-…-a n=2(a 1+a 2+…+a 34)-(a 1+a 2+…+a n )=2S 34-S n =32n 2-2052n +3 502 , 所以T n =⎩⎪⎨⎪⎧ -32n 2+2052n (n ≤34) 32n 2-2052n +3 502(n ≥35).6.设{a n }为等差数列 ,S n 为数列{a n }的前n 项和 ,S 7=7 ,S 15=75 ,T n 为数列⎩⎨⎧⎭⎬⎫S n n 的前n 项和 ,求T n .解析:设等差数列{a n }的公差为d ,那么S n =na 1+12n (n -1)d , ∵S 7=7 ,S 15=75 ,∴⎩⎪⎨⎪⎧ 7a 1+21d =715a 1+105d =75 即⎩⎪⎨⎪⎧ a 1+3d =1 a 1+7d =5 解得⎩⎪⎨⎪⎧ a 1=-2d =1 ∴S n n =a 1+12(n -1)d =-2+12(n -1) , ∵S n +1n +1-S n n =12, ∴数列⎩⎨⎧⎭⎬⎫S n n 是等差数列 ,其首||项为-2 ,公差为12 , ∴T n =n ×(-2)+n ·(n -1)2×12=14n 2-94n .。
数据库课后答案71737
数据库课后答案71737(总95页)--本页仅作为文档封面,使用时请直接删除即可----内页可以根据需求调整合适字体及大小--目录第1部分课程的教与学第2部分各章习题解答及自测题第1章数据库概论基本内容分析教材中习题1的解答自测题自测题答案第2章关系模型和关系运算理论基本内容分析教材中习题2的解答自测题自测题答案第3章关系数据库语言SQL基本内容分析教材中习题3的解答自测题自测题答案第4章关系数据库的规范化设计基本内容分析教材中习题4的解答自测题自测题答案第5章数据库设计与ER模型基本内容分析教材中习题5的解答自测题自测题答案第6章数据库的存储结构基本内容分析教材中习题6的解答第7章系统实现技术基本内容分析教材中习题7的解答自测题自测题答案第8章对象数据库系统基本内容分析教材中习题8的解答自测题自测题答案第9章分布式数据库系统基本内容分析教材中习题9的解答自测题自测题答案第10章中间件技术基本内容分析教材中习题10的解答自测题及答案第11章数据库与WWW基本内容分析教材中习题11的解答第12章 XML技术基本内容分析教材中习题12的解答第2部分各章习题解答及自测题第1章数据库概论基本内容分析本章的重要概念(1)DB、DBMS和DBS的定义(2)数据管理技术的发展阶段人工管理阶段、文件系统阶段、数据库系统阶段和高级数据库技术阶段等各阶段的特点。
(3)数据描述概念设计、逻辑设计和物理设计等各阶段中数据描述的术语,概念设计中实体间二元联系的描述(1:1,1:N,M:N)。
(4)数据模型数据模型的定义,两类数据模型,逻辑模型的形式定义,ER模型,层次模型、网状模型、关系模型和面向对象模型的数据结构以及联系的实现方式。
(5)DB的体系结构三级结构,两级映像,两级数据独立性,体系结构各个层次中记录的联系。
(6)DBMSDBMS的工作模式、主要功能和模块组成。
(7)DBSDBS的组成,DBA,DBS的全局结构,DBS结构的分类。
模拟电路考试试题10套及答案
卷号 01⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯⋯一、填空〔本共20分,每空1分〕:1.整流路的任是__________;波路的任是__________。
2.在PN的形成程中,流子的散运是由于 __________而生的,漂移运是__________作用下生的。
3.放大器有两种不同性的失真,分是__________失真和__________失真。
4.在共射阻容耦合放大路中,使低区增益下降的主要原因是__________的影响;使高区增益下降的主要原因是__________的影响。
5.在交流放大路中,引入直流反的作用是__________;引入交流反的作用是___________。
6.正弦波振路一般由__________、__________、__________、__________四个局部成。
7.某多放大器中各增益:第一25dB、第二15dB、第三60dB,放大器的增益__________,的放大倍数__________。
8.在双端入、端出的差放大路中,射极公共阻Re__________信号的放大无影响,__________信号的放大具有很的抑制作用。
共模抑制比K CMR__________之比。
9.某放大路的数幅特性如1〔在第三上〕所示,当信号率恰好上限率,的增益_________ _dB。
二、判断〔本共10分,每小1分,正确的打√,的打×〕:1、〔〕构成各种半体器件的基是PN,它具有向和反向穿特性。
2、〔〕定静工作点的常用方法主要是反法和参数法。
3、〔〕在三极管的三种根本中,只有流放大能力而无放大能力的是根本共集。
4、〔〕假设放大路的放大倍数,引入的一定是反。
5、〔〕通常,甲功放路的效率最大只有40%,而乙和甲乙功放路的效率比甲功放路的效率要高。
6、〔〕一般情况下,差路的共模放大倍数越大越好,而差模放大倍数越小越好。
7、〕根据反自原理,交流反可以消除噪声、干和非性失真。
Intuos5 (PTH-450, PTH-650, PTH-850) Intuos5 (PTK-4
Intuos5 touch (PTH-450, PTH-650, PTH-850)Intuos5 (PTK-450, PTK-650)设定使用笔自定义笔使用数位板自定义数位板触控导航自定义触控使用径向菜单应用程序特定设置畅游无线疑难解答用户手册Intuos5用户手册版本 1.0,修订 J3111版权所有© Wacom Co., Ltd., 2011保留所有权利。
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目录关于本手册5您的INTUOS5 数位板 6识别数位板型号 6Intuos5 touch 数位板 7Intuos5 数位板 9Intuos5笔 10设定NTUOS5 11人体工程学 11配置数位板方向 13USB 线缆安装 14了解数位板活动区域 15使用多个显示器 17控制面板概述 17使用 INTUOS5 18使用紧握笔 18握笔 19定位 20点击 21拖动 21使用侧面开关 22用压感方式绘图 23用倾斜方式绘图 23擦除 24眼手协调练习 24数位板控件 25使用ExpressKeys 26使用触控环 28INTUOS5 触控体验 29触控操纵 30自定义触控 40设置触控选项 41选择标准触控功能 42选择自定义触控功能 43禁用触控 44测试触控 45自定义 INTUOS5 46管理控制面板设置 47控制面板概观 48自定义笔 50调节笔尖感应和双击 51调节橡皮擦感应 52笔尖和橡皮擦压力高级设置 52自定义工具按钮 53自定义倾斜灵敏度 54自定义数位板功能 54自定义 ExpressKeys 55自定义触控环 56数位板至屏幕的映射 57屏幕区域部分 59数位板区域部分 60按钮功能 61使用和自定义径向菜单 68使用显示切换 69应用程序特定设置 71创建应用程序特定设置 72更改应用程序特定设置 73删除应用程序特定设置 73使用多个工具 74更改数位板模式 75高级选项 76请参考使用 INTUOS5 畅游无线。
高考数学所有题型解题套路总结
2)当△=0时,方程①有两个相等的实根 x1=x2=x0= ,不等式②和不等式③的解集分别是{x|x
}
和空集 ,f(x)的图象与 x轴有唯一公共点。 3)当△<0时,方程①无解,不等式②和不等式③的解集分别是 R和 当 a<0时,请读者自己分析。
.f(x)图象与 x轴无公共点。
4.二次函数的最值:若 a>0,当 x=x0时,f(x)取最小值 f(x0)=
及
知,方程①只有负根,不符合要求;
当
时,由
及
知,方程①有两个互为倒数的正根,故必有一
根在区间 内,从而方程①至少有一个根在区间[0,2]内.
综上,所求 m的取值范围是
.
第二章、函数
一、基础知识(理解去记) 定义 1 映射,对于任意两个集合 A,B,依对应法则 f,若对 A中的任意一个元素 x,在 B中都有唯一一 个元素与之对应,则称 f:A→B为一个映射。 定义 2 函数,映射 f:A→B中,若 A,B都是非空数集,则这个映射为函数。A称为它的定义域,若 x ∈A,y∈B,且 f(x)=y(即 x对应 B中的 y),则 y叫做 x的象,x叫 y的原象。集合{f(x)|x∈A}叫函 数的值域。通常函数由解析式给出,此时函数定义域就是使解析式有意义的未知数的取值范围,如函数 y=3
元素的集合称为空集,用 来表示。集合分有限集和无限集两种。
集合的表示方法有列举法:将集合中的元素一一列举出来写在大括号内并用逗号隔开表示集合的方法,如
{1,2,3};描述法:将集合中的元素的属性写在大括号内表示集合的方法。例如{有理数},
分别表示有理数集和正实数集。
定义 2 子集:对于两个集合 A与 B,如果集合 A中的任何一个元素都是集合 B中的元素,则 A叫做 B
苏教版四年级数学上册《整数四则混合运算练习(第5课时)》教案
七整数四则混合运算5整数四则混合运算练习●教学内容苏教版义务教育教科书《数学》四年级上册第75~76页的练习十二第4~9题、“思考题”。
●教学目标1.使学生进一步掌握整数四则混合运算的运算顺序,并能按顺序正确进行计算;进一步掌握分析三步计算实际问题数量关系的方法,进一步体验列综合算式解答的方法。
2.使学生加深对运算顺序的认识;进一步提高整数运算能力,培养学生比较、推理和归纳等思维能力,发展数感;进一步积累解决实际问题的经验,提高分析、解决问题的能力。
3.使学生具有细心计算、认真检查的良好学习习惯,培养按规则办事、有错就改的良好品质;感受数学中的有趣现象,产生对数学的好奇心。
●教学重点整数四则混合运算的运算顺序。
●教学难点掌握整数四则混合运算的运算顺序,并正确计算。
●教学准备多媒体课件。
●教学过程▍流程一:揭示课题引导:这一单元,我们学习了整数四则混合运算,主要内容是四则混合运算的运算顺序。
请大家回忆学习内容,互相说说你学到了混合运算的哪些运算顺序。
交流:你能说说整数四则混合运算的运算顺序吗?不含括号的三步混合运算的运算顺序:先算乘、除法,再算加、减法;含有小括号的三步混合运算的运算顺序:先算小括号里面的,再算小括号外面的;含有中括号的三步混合运算的运算顺序:先算小括号里面的,再算中括号里面的。
揭题:这节课,我们就进一步练习整数四则混合运算的计算,重点掌握四则混合运算的运算顺序,能正确计算;同时要应用学到的知识,解决一些三步计算的实际问题。
(板书课题:整数四则混合运算练习)▍流程二:练习混合运算1.说说下列各题的运算顺序。
出示:45+78÷2623×(24+18)45×2+78÷2623×(24+18÷3)45+78+26×1523×[(24+18) ÷3]指名学生根据运算顺序,按题组说说每题先算什么、再算什么和最后算什么。
第12章电子信息类专业英语第二版课本-李白萍省名师优质课赛课获奖课件市赛课一等奖课件
Unit Five ISDN
While these scenarios may sound idealistic and futuristic, they are very real possibilities with the implementation of ISDN. More than 100 ISDN trials or service implementations comprising more than 100,000 lines already exist today in Canada, England, France, Japan, the United States, Germany, and other countries.
Unit Five ISDN
Imagine a network that would bring simultaneous voice and data applications to the home. A central computer could control telephone ringing, temperature, lighting on a room-by-room basis, and the operation of home appliances. This computer could be controlled remotely by the user via the network. Other services might include call forwarding, call waiting, and special telephone ring signals, all tailored dynamically by the user depending upon the telephone number of the calling party. Two-way television and easy access to data and video services could all be available. Banking, insurance, and utility companies could design applications to take advantage of this network to provide better and more efficient service to the customer in the home.
LT6604IUFF-15#PBF,LT6604CUFF-15#PBF,LT6604CUFF-15#TRPBF,LT6604IUFF-15#TRPBF, 规格书,Datasheet 资料
T YPICAL APPLICATIOND ESCRIPTION Differential Amplifi er and15MHz Lowpass FilterThe LT ®6604-15 consists of two matched, fully differential amplifi ers, each with a 4th order, 15MHz lowpass fi lter. The fi xed frequency lowpass fi lter approximates a Chebyshev response. By integrating a fi lter and a differential ampli-fi er, distortion and noise are made exceptionally low. At unity gain, the measured in band signal-to-noise ratio is an impressive 76dB. At higher gains, the input referred noise decreases, allowing the part to process smaller input differential signals without signifi cantly degrading the signal-to-noise ratio.Gain and phase are highly matched between the two chan-nels. Gain for each channel is independently programmed using two external resistors. The LT6604-15 enables level shifting by providing an adjustable output common mode voltage, making it ideal for directly interfacing to ADCs.The LT6604-15 is fully specifi ed for 3V operation. The differential design enables outstanding performance at a 2V P-P signal level for a single 3V supply. See the back page of this datasheet for a complete list of related single and dual differential amplifi ers with integrated 2.5MHz to 20MHz lowpass fi lters.Channel to Channel Gain MatchingF EATURESA PPLICATIONS nDual Differential Amplifi er with 15MHz Lowpass Filters 4th Order Filters Approximates Chebyshev Response Guaranteed Phase and Gain Matching Resistor-Programmable Differential Gain n 76dB Signal-to-Noise (3V Supply, 2V P-P Output)n Low Distortion, 2V P-P , 800Ω Load, V S = 3V 1MHz: 86dBc 2nd, 90dBc 3rd 10MHz: 63dBc 2nd, 69dBc 3rd n Specifi ed for Operation with 3V , 5V and ±5V Supplies n Fully Differential Inputs and Outputsn Adjustable Output Common Mode Voltage n Small 4mm × 7mm × 0.75mm QFN PackagenDual Differential ADC Driver Plus Filter n Single-Ended to Differential Converter n Matched, Dual, Differential Filter Stagen Common Mode T ranslation of Differential Signals nHigh Speed ADC Antialiasing and DAC Smoothing in Wireless Infrastructure or Networking Applications n High Speed Test and Measurement Equipment n Medical ImagingL , L T , L TC and L TM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.+––0.2512160.15660415 TA01b841014620–0.2–0.1–0.150.05–0.050.10.200.25GAIN MATCH (dB)LT6604-15P IN CONFIGURATIONA BSOLUTE MAXIMUM RATINGS Total Supply Voltage .................................................11V Operating Temperature Range (Note 6)....–40°C to 85°C Specifi ed Temperature Range (Note 7) ....–40°C to 85°C Junction Temperature ...........................................150°C Storage Temperature Range ...................–65°C to 150°C Input Current+IN, –IN, V OCM , V MID (Note 8) .........................±10mA Lead Temperature (Soldering, 10 sec) ..................300°CPARAMETERCONDITIONSMIN TYP MAX UNITS Filter Gain Either Channel, V S = 3VV IN = 2V P-P , f IN = DC to 260kHzV IN = 2V P-P , f IN =1.5MHz (Gain Relative to 260kHz)V IN = 2V P-P , f IN = 7.5MHz (Gain Relative to 260kHz)V IN = 2V P-P , f IN = 12MHz (Gain Relative to 260kHz)V IN = 2V P-P , f IN = 15MHz (Gain Relative to 260kHz)V IN = 2V P-P , f IN = 45MHz (Gain Relative to 260kHz)V IN = 2V P-P , f IN = 75MHz (Gain Relative to 260kHz)l l l l l l–0.5–0.1–0.3–0.3–0.70.1000.20–29–460.50.10.41.01.0–25dB dB dB dB dB dB dBORDER INFORMATIONLEAD FREE FINISH TAPE AND REEL PART MARKING*PACKAGE DESCRIPTIONSPECIFIED TEMPERATURE RANGE L T6604CUFF-15#PBF L T6604CUFF-15#TRPBF 6041534-Lead (4mm × 7mm) Plastic QFN 0°C to 70°C L T6604IUFF-15#PBFL T6604IUFF-15#TRPBF6041534-Lead (4mm × 7mm) Plastic QFN–40°C to 85°CConsult L TC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.Consult L TC Marketing for information on non-standard lead based fi nish parts.For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/E LECTRICAL CHARACTERISTICS The l denotes specifi cations that apply over the full operating temperaturerange, otherwise specifi cations are at T A = 25°C. Unless otherwise specifi ed V S = 5V (V + = 5V , V –= 0V), R IN = 536Ω, and R LOAD = 1k.31 V –32 V –33 N C34 V M I D AV +B 17N C 16N C 15V O C M B 1430 NC 29 –OUTA 28 NC 27 +OUTA 26 NC 25 V +A 24 V –23 NC 22 NC 21 –OUTB 20 NC 19 +OUTB 18 NCNC 1+INA 2NC 3–INA 4NC 5V OCMA 6V – 7V MIDB 8NC 9+INB 10NC 11–INB 12NC 13TOP VIEW UFF PACKAGE34-LEAD (4mm × 7mm) PLASTIC QFN35T JMAX = 150°C, θJA = 34°C/W , θJC = 2.7°C/WEXPOSED PAD (PIN 35) IS V –, MUST BE SOLDERED TO PCB(Note 1)LT6604-15 E LECTRICAL CHARACTERISTICSThel denotes specifi cations that apply over the full operating temperature range, otherwise specifi cations are at T A = 25°C. Unless otherwise specifi ed V S = 5V (V+ = 5V, V– = 0V), R IN = 536Ω, and R LOAD = 1k.PARAMETER CONDITIONS MIN TYP MAX UNITSMatching of Filter Gain, V S = 3V V IN = 2V P-P, f IN = DC to 260kHzV IN = 2V P-P, f IN = 1.5MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 7.5MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 12MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 15MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 45MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 75MHz (Gain Relative to 260kHz)llllll0.050.010.020.030.060.130.150.50.10.30.40.61.52.8dBdBdBdBdBdBdBMatching of Filter Phase, V S = 3V V IN = 2V P-P, f IN = 1.5MHzV IN = 2V P-P, f IN = 7.5MHzV IN = 2V P-P, f IN = 12MHz lll0.60.80.9134degdegdegFilter Gain Either Channel, V S = 5V V IN = 2V P-P, f IN = DC to 260kHzV IN = 2V P-P, f IN =1.5MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 7.5MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 12MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 15MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 45MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 75MHz (Gain Relative to 260kHz)llllll–0.5–0.1–0.4–0.4–0.80.1–29–460.50.10.30.90.9–25dBdBdBdBdBdBdBMatching of Filter Gain, V S = 5V V IN = 2V P-P, f IN = DC to 260kHzV IN = 2V P-P, f IN =1.5MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 7.5MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 12MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 15MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 45MHz (Gain Relative to 260kHz)V IN = 2V P-P, f IN = 75MHz (Gain Relative to 260kHz)llllll0.050.010.020.030.060.130.150.50.10.30.40.61.52.8dBdBdBdBdBdBdBMatching of Filter Phase, V S = 5V V IN = 2V P-P, f IN = 1.5MHzV IN = 2V P-P, f IN = 7.5MHzV IN = 2V P-P, f IN = 12MHz lll0.60.80.9134degdegdegFilter Gain Either Channel, V S = ±5V V IN = 2V P-P, f IN = DC to 260kHz–0.6–0.10.4dBFilter Gain, R IN = 133ΩV IN = 0.5V P-P, f IN = DC to 260kHz V S = 3VV S = 5VV S = ±5V 11.511.511.412.012.011.912.512.512.4dBdBdBFilter Gain Temperature Coeffi cient (Note 2)f IN = 250kHz, V IN = 2V P-P780ppm/°C Noise Noise BW = 10kHz to 15MHz, R IN = 536Ω109μV RMSDistortion (Note 4)1MHz, 2V P-P, R L = 800Ω, V S = 3V 2nd Harmonic3rd Harmonic 8690dBcdBc10MHz, 2V P-P, R L = 800Ω, V S = 3V 2nd Harmonic3rd Harmonic 6369dBcdBcChannel Separation (Note 9)1MHz, 2V P-P, R L = 800Ω–117dB10MHz, 2V P-P, R L = 800Ω–102dBDifferential Output Swing Measured Between +OUT and –OUT, V OCM shorted to V MIDV S = 5VV S = 3V ll3.803.754.754.50V P-P_DIFFV P-P_DIFFInput Bias Current Average of IN+ and IN–l–90–35μAInput Referred Differential Offset R IN = 536Ω V S = 3VV S = 5VV S = ±5V lll51010253035mVmVmVR IN = 133Ω V S = 3VV S = 5VV S = ±5V lll555151720mVmVmVLT6604-15PARAMETER CONDITIONSMIN TYP MAX UNITS Differential Offset Drift10μV/°CInput Common Mode Voltage (Note 3)Differential Input = 500mV P-P, R IN = 133ΩV S = 3V V S = 5V V S = ±5Vl l l00–2.51.531V V VOutput Common Mode Voltage (Note 5)Differential Output = 2V P-P, V MID = Open, Common Mode Voltage at V OCM V S = 3V V S = 5V V S = ±5V l l l 11.5–1 1.532V V V Output Common Mode Offset (with Respect to V OCM )V S = 3V V S = 5V V S = ±5V l l l –35–40–5555–10404035mV mV mV Common Mode Rejection Ratio 64dB Voltage at V MID V S = 3V V S = 5Vl 2.45 2.501.5 2.56V V V MID Input Resistance l 4.3 5.77.7kΩV OCM Bias CurrentV OCM = V MID = V S /2 V S = 3VV S = 5V l l –10–10–2–2μA μAPower Supply Current (per Channel)V S = 3V, V S = 5V V S = 3V V S = 5V V S = ±5Vl l l 35343839444548mA mA mA mA Power Supply Voltagel311VE LECTRICAL CHARACTERISTICS The l denotes specifi cations that apply over the full operating temperaturerange, otherwise specifi cations are at T A = 25°C. Unless otherwise specified V S = 5V (V + = 5V , V –= 0V), R IN = 536Ω, and R LOAD = 1k.Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: This is the temperature coeffi cient of the internal feedback resistors assuming a temperature independent external resistor (R IN ).Note 3: The input common mode voltage is the average of the voltagesapplied to the external resistors (R IN ). Specification guaranteed for R IN ≥ 100Ω.Note 4: Distortion is measured differentially using a differential stimulus. The input common mode voltage, the voltage at V OCM , and the voltage at V MID are equal to one half of the total power supply voltage.Note 5: Output common mode voltage is the average of the +OUT and –OUT voltages. The output common mode voltage is equal to V OCM .Note 6: The L T6604C-15 is guaranteed functional over the operating temperature range –40°C to 85°C.Note 7: The L T6604C-15 is guaranteed to meet 0°C to 70°C specifi cations and is designed, characterized and expected to meet the extendedtemperature limits, but is not tested at –40°C and 85°C. The L T6604I-15 is guaranteed to meet specifi ed performance from –40°C to 85°C.Note 8: Input pins (+IN, –IN, V OCM and V MID ) are protected by steering diodes to either supply. If the inputs should exceed either supply voltage, the input current should be limited to less than 10mA. In addition, the inputs +IN, –IN are protected by a pair of back-to-back diodes. If the differential input voltage exceeds 1.4V , the input current should be limited to less than 10mA.Note 9: Channel separation (the inverse of crosstalk) is measured by driving a signal into one input, while terminating the other input. Channel separation is the ratio of the resulting output signal at the driven channel to the output at the channel that is not driven.LT6604-15T YPICAL PERFORMANCE CHARACTERISTICS Output ImpedanceCommon Mode Rejection RatioPower Supply Rejection RatioDistortion vs FrequencyDistortion vs Signal LevelAmplitude ResponsePassband Gain and PhasePassband Gain and DelayFREQUENCY (MHz)0.1–20G A I N (d B )–10010110100660415 G01–30–40–50–60FREQUENCY (MHz)G A I N (d B )PHASE (DEG)–3–1120660415 G02–5–7–4–20–6–8–945135225–45–135090180–90–180–2255101525FREQUENCY (MHz)G A I N (d B )DELAY (ns)6101420660415 G042–248120–4–630405*********4515505101525FREQUENCY (MHz)1O U T P U T I M P E D A N C E (Ω)100.110100660415 G050.11100FREQUENCY (MHz)0.1C M R R (d B )607080110100660415 G065040306575554535FREQUENCY (MHz)0.150P S R R (d B )607080110100660415 G07403020100FREQUENCY (MHz)0.1–100–110D I S T O R T I O N (d B c )–60–50110100660415 G08–70–80–90INPUT LEVEL (V P-P )–60–50–404660415 G09–70–801235–90–100–110D I S T O R T I O N (d B c )Passband Gain and DelayFREQUENCY (MHz)G A I N (d B )DELAY (ns)–3–1120660415 G03–5–7–4–20–6–8–9304050201025354515505101525LT6604-15TYPICAL PERFORMANCE CHARACTERISTICSDistortion vs Output Common Mode LevelSingle Channel Supply Current vs Total Supply VoltageT ransient Response,Channel Separation vs Frequency (Note 9)Distortion vs Signal LevelDistortion vs Input Common Mode LevelDistortion vs Input Common Mode LevelINPUT LEVEL (V P-P )–60–50–404660415 G10–70–801235–90–100–110D I S T O R T I O N (d B c )INPUT COMMON MODE VOTLAGE RELATIVE TO V MID (V)–3–110–100D I S T O R T I O N C O M P O N E N T (d B c )–90–80–70–60–50–40–2–1012660415 G113INPUT COMMON MODE VOTLAGE RELATIVE TO V MID (V)–3–100D I S T O R T I O N C O M P O NE N T (d B c )–90–80–70–60–50–40–2–1012660415 G123(V OCM – V MID ) VOLTAGE (V)D I S T O R T I O N C O M P O NE N T (d B c )–70–60–500.51 1.5660415 G13–80–90–1.5–1–0.502 2.5–100–110–402V P-P 1MHz INPUT GAIN = 1,R L = 800Ω AT EACH OUTPUTT A = 25°CTOTAL SUPPLY VOLTAGE (V)20S U P P L Y C U R R E N T (m A )3040502535452468660415 G141012OUT –200mV/DIV IN +500mV/DIVIN –100ns/DIVDIFFERENTIAL GAIN = 1SINGLE-ENDED INPUT DIFFERENTAL OUTPUT660415 G15OUT +200mV/DIVFREQUENCY (MHz)0.1–50–60C H A N N E L S E P A R A T I O N (d B )–40110100660415 G16–70–80–100–90–120–130–110LT6604-15 P IN FUNCTIONS+INA and –INA (Pins 2, 4): Channel A Input Pins. Signals can be applied to either or both input pins through identi-cal external resistors, R IN. The DC gain from differential inputs to the differential outputs is 536Ω/R IN.V OCMA (Pin 6): DC Common Mode Reference Voltage for the 2nd Filter Stage in Channel A. Its value programs the common mode voltage of the differential output of the fi lter. Pin 6 is a high impedance input, which can be driven from an external voltage reference, or Pin 6 can be tied to Pin 34 on the PC board. Pin 6 should be bypassed with a 0.01μF ceramic capacitor unless it is connected to a ground plane.V– (Pins 7, 24, 31, 32, 35): Negative Power Supply Pin (can be ground).V MIDB (Pin 8): The V MIDB pin is internally biased at mid-supply, see Block Diagram. For single supply operation the V MIDB pin should be bypassed with a quality 0.01μF ceramic capacitor to ground. For dual supply operation, Pin 8 can be bypassed or connected to a high quality DC ground. A ground plane should be used. A poor ground will increase noise and distortion. Pin 8 sets the output common mode voltage of the 1st Filter Stage in channel B. It has a 5.5kΩ impedance, and it can be overridden with an external low impedance voltage source.+INB and –INB (Pins 10, 12): Channel B Input Pins. Signals can be applied to either or both input pins through identi-cal external resistors, R IN. The DC gain from differential inputs to the differential outputs is 536Ω/R IN.V OCMB (Pin 14):Is the DC Common Mode Reference Voltage for the 2nd Filter Stage in Channel B. Its value programs the common mode voltage of the differential output of the fi lter. Pin 14 is a high impedance input, which can be driven from an external voltage reference, or Pin 14 can be tied to Pin 8 on the PC board. Pin 14 should be bypassed with a 0.01μF ceramic capacitor unless it is connected to a ground plane.V+A and V+B (Pins 25, 17): Positive Power Supply Pins for Channels A and B. For a single 3.3V or 5V supply (Pins 7, 24, 31, 32 and 35 grounded) a quality 0.1μF ceramic bypass capacitor is required from the positive supply pin (Pins 25, 17) to the negative supply pin (Pins 7, 24, 31, 32 and 35). The bypass should be as close as possible to the IC. For dual supply applications, bypass the negative supply pins to ground and Pins 25 and 17 to ground with a quality 0.1μF ceramic capacitor.+OUTB and –OUTB (Pins 19, 21): Output Pins. Pins 19 and 21 are the fi lter differential outputs for channel B. With a typical short-circuit current limit greater than ±40mA each pin can drive a 100Ω and/or 50pF load to AC ground.+OUTA and –OUTA (Pins 27, 29): Output Pins. Pins 27 and 29 are the fi lter differential outputs for channel A. With a typical short-circuit current limit greater than ±40mA each pin can drive a 100Ω and/or 50pF load to AC ground.V MIDA (Pin 34): The V MIDA pin is internally biased at mid-supply, see Block Diagram. For single supply operation the V MIDA pin should be bypassed with a quality 0.01μF ceramic capacitor to ground. For dual supply operation, Pin 34 can be bypassed or connected to a high quality DC ground. A ground plane should be used. A poor ground will increase noise and distortion. Pin 34 sets the output common mode voltage of the 1st stage fi lter stage in chan-nel A. It has a 5.5kΩ impedance, and it can be overridden with an external low impedance voltage source. Exposed Pad (Pin 35): V–. The Exposed Pad must be soldered to the PCB.LT6604-15BLOCK DIAGRAMV IN –V IN +V IN +V IN –OCMBNCNCV BNC+OUTA–OUTANCNCV +ANCV –NCNC+OUTBNC–OUTBV –V –V NCLT6604-15APPLICATIONS INFORMATIONInterfacing to the L T6604-15Note: The LT6604-15 contains two identical fi lters. The following applications information only refers to one fi lter. The two fi lters are independent except that they share thesame negative supply voltage V –. The two filters can be used simultaneously by replicating the example circuits. The referenced pin numbers correspond to the A channel fi lterThe LT6604-15 channel requires two equal external re-sistors, R IN , to set the differential gain to 536Ω/R IN . The inputs to the fi lter are the voltages V IN + and V IN – presented to these external components, Figure 1. The difference between V IN + and V IN – is the differential input voltage. The average of V IN + and V IN – is the common mode input voltage. Similarly, the voltages V OUT + and V OUT – appearing at Pins 27 and 29 of the LT6604-15 are the fi lter outputs. The dif-ference between V OUT + and V OUT – is the differential output voltage. The average of V OUT + and V OUT – is the commonmode output voltage. Figure 1 illustrates the LT6604-15 operating with a single 3.3V supply and unity passband gain; the input signal is DC coupled. The common mode input voltage is 0.5V, and the differential input voltage is 2V P-P . The common mode output voltage is 1.65V, and the differential output voltage is 2V P-P for frequencies below 15MHz. The common mode output voltage is determined by the voltage at V OCM . Since V OCM is shorted to V MID , the output common mode is the mid-supply voltage. In addition, the common mode input voltage can be equal to the mid-supply voltage of V MID .Figure 2 shows how to AC couple signals into the LT6604-15. In this instance, the input is a single-ended signal. AC cou-pling allows the processing of single-ended or differential signals with arbitrary common mode levels. The 0.1μF coupling capacitor and the 536Ω gain setting resistor form a high pass fi lter, attenuating signals below 3kHz. Larger values of coupling capacitors will proportionally reduce this highpass 3dB frequency.V INV INOUT +OUT –t321t3210V OUT+OUT –3221t100–1Figure 1Figure 2LT6604-15APPLICATIONS INFORMATIONIn Figure 3 the LT6604-15 is providing 12dB of gain. The gain resistor has an optional 62pF in parallel to improve the passband fl atness near 15MHz. The common mode output voltage is set to 2V.Use Figure 4 to determine the interface between the LT6604-15 and a current output DAC. The gain, or “tran-simpedance,” is defi ned as A = V OUT /I IN . To compute the transimpedance, use the following equation:A =536•R1(R1+R2)(Ω)By setting R1 + R2 = 536Ω, the gain equation reduces to A = R1 (Ω).The voltage at the pins of the DAC is determined by R1, R2, the voltage on V MID and the DAC output current. Consider Figure 4 with R1 = 49.9Ω and R2 = 487Ω. Thevoltage at V MID , for V S = 3.3V, is 1.65V. The voltage at the DAC pins is given by: V DAC =V MID •R1R1+R2+536+I IN •R1•R2R1+R2=77mV +I IN •45.3ΩI IN is I IN + or I IN –. The transimpedance in this example is 49.8Ω.Evaluating the L T6604-15The low impedance levels and high frequency operation of the LT6604-15 require some attention to the matching networks between the LT6604-15 and other devices. The previous examples assume an ideal (0Ω) source impedance and a large (1k) load resistance. Among practical examplesV INV INOUT +OUT–t32103210OUT+OUT–660415 F04=V OUT + – V OUT –I IN + – I IN –536 • R1R1 + R2Figure 3Figure 4Figure 511660415fbA PPLICATIONS INFORMATION where impedance must be considered is the evaluation of the LT6604-15 with a network analyzer.Figure 5 is a laboratory setup that can be used to char-acterize the LT6604-15 using single-ended instruments with 50Ω source impedance and 50Ω input impedance. For a unity gain confi guration the LT6604-15 requires an 536Ω source resistance yet the network analyzer output is calibrated for a 50Ω load resistance. The 1:1 transformer, 52.3Ω and 523Ω resistors satisfy the two constraints above. The transformer converts the single-ended source into a differential stimulus. Similarly, the output of the LT6604-15 will have lower distortion with larger load resistance yet the analyzer input is typically 50Ω. The 4:1 turns (16:1 impedance) transformer and the two 402Ω resistors of Figure 5, present the output of the LT6604-15 with a 1600Ω differential load, or the equiva-lent of 800Ω to ground at each output. The impedance seen by the network analyzer input is still 50Ω, reducing refl ections in the cabling between the transformer and analyzer input.Differential and Common Mode Voltage Ranges The differential amplifi ers inside the LT6604-15 contain circuitry to limit the maximum peak-to-peak differential voltage through the fi lter. This limiting function prevents excessive power dissipation in the internal circuitry and provides output short-circuit protection. The limiting function begins to take effect at output signal levelsabove 2V P-P and it becomes noticeable above 3.5V P-P . This is illustrated in Figure 6; the LT6604-15 channel was confi gured with unity passband gain and the input of the fi lter was driven with a 1MHz signal. Because this voltage limiting takes place well before the output stage of the fi lter reaches the supply rails, the input/output behavior of the IC shown in Figure 6 is relatively independent of the power supply voltage.The two amplifi ers inside the LT6604-15 channel have independent control of their output common mode voltage (see the Block Diagram section). The following guidelines will optimize the performance of the fi lter. V MID can be allowed to float, but it must be bypassed to an AC ground with a 0.01μF capacitor or some instability may be observed. V MID can be driven from a low impedance source, provided it remains at least 1.5V above V – and at least 1.5V below V +. An internal resistor divider sets the voltage of V MID . While the internal 11k resistors are well matched, their absolute value can vary by ±20%. This should be taken into consideration when connecting an external resistor network to alter the voltage of V MID . V OCM can be shorted to V MID for simplicity. If a different common mode output voltage is required, connect V OCM to a voltage source or resistor network. For 3V and 3.3V supplies the voltage at V OCM must be less than or equal to the mid supply level. For example, voltage (V OCM ) ≤ 1.65V on a single 3.3V supply. For power supply voltages higher than 3.3V the voltage at V OCM can be set above mid supply. The voltage on V OCM should not be more than 1V below the voltage on V MID . The voltage on V OCM should not be more than 2V above the voltage on V MID . V OCM is a high impedance input.The LT6604-15 was designed to process a variety of input signals including signals centered on the mid-supply volt-age and signals that swing between ground and a positive voltage in a single supply system (Figure 1). The range of allowable input common mode voltage (the average of V IN + and V IN – in Figure 1) is determined by the power supply level and gain setting (see Distortion vs Input Common Mode Level in the Typical Performance Characteristics).1MHz INPUT LEVEL (V P-P )200–20–40–60–80–10035660415 F0612467O U T P U T L E V E L (d B V )Figure 6. Output Level vs Input Level, Differential 1MHz Input, Gain = 1芯天下--/Common Mode DC CurrentsIn applications like Figure 1 and Figure 3 where the LT6604-15 not only provides lowpass fi ltering but also level shifts the common mode voltage of the input signal, DC currents will be generated through the DC path between input and output terminals. Minimize these currents to decrease power dissipation and distortion. Consider the application in Figure 3. V MID sets the output common mode voltage of the 1st differential amplifi er inside the LT6604-15 channel (see the Block Diagram section) at 2.5V. Since the input common mode voltage is near 0V, there will be approxi-mately a total of 2.5V drop across the series combination of the internal 536Ω feedback resistor and the external 133Ω input resistor. The resulting 3.7mA common mode DC current in each input path, must be absorbed by the sources V IN+ and V IN–. V OCM sets the common mode output voltage of the 2nd differential amplifi er inside the LT6604-15 channel, and therefore sets the common mode output voltage of the fi lter. Since, in the example of Figure 3, V OCM differs from V MID by 0.5V, an additional 2.5mA (1.25mA per side) of DC current will fl ow in the resistors coupling the 1st differential amplifi er output stage to the fi lter output. Thus, a total of 9.9mA per channel is used to translate the common mode voltages.A simple modifi cation to Figure 3 will reduce the DC com-mon mode currents by 40%. If V MID is shorted to V OCM the common mode output voltage of both op amp stages will be 2V and the resulting DC current will be 6mA per channel. Of course, by AC coupling the inputs of Figure 3, the common mode DC current can be reduced to 2.5mA per channel.NoiseThe noise performance of the LT6604-15 channel can be evaluated with the circuit of Figure 6. Given the low noise output of the LT6604-15 and the 6dB attenuation of the transformer coupling network, it will be necessary to measure the noise fl oor of the spectrum analyzer and subtract the instrument noise from the fi lter noise mea-surement.Example: With the IC removed and the 25Ω resistors grounded, Figure 6, measure the total integrated noise (e S) of the spectrum analyzer from 10kHz to 15MHz. With the IC inserted, the signal source (V IN) disconnected, and the input resistors grounded, measure the total integrated noise out of the fi lter (e O). With the signal source connected, set the frequency to 1 MHz and adjust the amplitude until V IN measures 100mV P-P. Measure the output amplitude, V OUT, and compute the passband gain A = V OUT/V IN. Now compute the input referred integrated noise (e IN) as:e INTable 1 lists the typical input referred integrated noise for various values of R IN.Table 1. Noise PerformancePASSBANDGAINR ININPUT REFERREDINTEGRATED NOISE10kHz TO 15MHzINPUT REFERREDINTEGRATED NOISE10kHz TO 30MHz 4133Ω36μV RMS51μV RMS2267Ω62μV RMS92μV RMS1536Ω109μV RMS169μV RMSAPPLICATIONS INFORMATION芯天下--/12660415fb。
U4T2C学习单
(3) It has been two days since we landed on Mars.
3.语法:巩固一般将来时的被动语态。
相当于We have been on Mars for two days.这里的时间two days的计算是从从句的动作land完成后算起的。
It's six weeks we had a proper shower last time.= We haven't had a proper shower for six weeks.我们已经六个礼拜没有像样地洗澡了。
A. be covered被覆盖;
The snake was covered by the earth.这条蛇被土盖住了。
B. be covered with遮盖,遮蔽;
The ground is covered with snow.土地被雪覆盖。
5.It has been two days since we landed on Mars.自从我们登上火星已经两天了。
新授课学习单样表
课题
U4T2Sc
班级
姓名
课型
新授课
备课组
九英组
主备人
王蕾
审核
牛磊
学
习
目
标
1.单词: solar, Roman, god, diameter, storm, gravity, weigh, generally journey, limit, excitement
2.句型:(1) Its diameter is 53% as wide as that of the earth.
七年级上册数学课件:整式的加减 去括号与添括号1
2x2 - 3(2x-x2)
注意:括号前 的“-”和数
解 解: :22xx22 -- 33((22xx- -xx22))
字
== 22xx22 --(36×x-23xx-2) 3×(-x2 ) == 22xx22 -- 66xx++33xx22
== 55xx22 -- 66xx
利用乘法分配律去括号
例2 先去括号,再合并同类项
7x -3{y - [ 4x - (3x – y ) ]}
例3 先化简,再求值。
- (-2a) + ( -3a + 2b ) - ( 4a - 5b + 6 )
其中,a = -2, b = 2。
练习
先化简,再求值。
① 3x3-[x3+(6x2-7x) ]-2(x3-3x2- 4x) 其中,x = -1。
比一比 赛一赛
直接去括号:
(1) +(a-4b); (2) -(a-4b);
a-4b -a+4b
(3) (-a-4b);
-a-4b
(4) -(-p-4q);
p+4q
(5) (m-2n) -(- 2m+4n); m-2n+2m - 4n
(6) -(3x+2y) +(x - 2y). -3x - 2y + x - 2y
我们今天学了什么? 要注意什么?
探索去括号法则 去括号时应注意
1. 括号前的符号 2. 括号前的系数 3. 绝不能漏项
作业: 教材112页第7、8题
附加题:
已知一个多项式是x2 +2xy-3y2,第二个多项式是 第一个多项式的2倍少-3xy+3,第三个多项式是 前2个多项式的和,求这3个多项式的和。
NORITAKE-ITRON CU20045-UW5J DATA SHEET
OPTICAL and ENVIRONMENTAL SPECIFICATIONS
Parameter
Value
Character Size/Pitch (XxY mm)
2.4 x 4.7/3.6 x 5.4
Dot Size/Pitch (XxY mm) Luminance
0.4 x 0.5/0.5 x 0.7 700 cd/m2 (204 fL) Typ.
Pin 3 (Fnc) Input This is normally open circuit. If pads JP2.1 and JP2.2 are linked. Pin 3 = /Reset.
CONTACT
Noritake Sales Office Tel Nos Nagoya Japan: +81 (0)52-561-9867
Logic High Output
VOH
Vcc-0.5VDC min. IOH = 4.0mA
Logic Low Output
VOL
Vss+0.5VDC max IOL = 4.0mA
The power on rise time should be less than 50ms.The inrush current at power on can be 2 x ICC. The Icc current is 10mA maximum while in power down mode.
Read Data from RAM H H 00H-FFH
PIN CONNECTIONS
Pin Sig Pin Sig
1
GND 2
VCC
3
(FNC) 4
RS
微机原理和接口技术(第四版)课后习题答案解析
完美WORD格式第1章微型计算机系统①处理器每个单位时间可以处理的二进制数据位数称计算机字长。
②总线信号分成三组,分别是数据总线、地址总线和控制总线。
③PC机主存采用DRAM组成。
④高速缓冲存储器Cache是处理器与主存之间速度很快但容量较小的存储器。
⑤ROM-BIOS是“基本输入输出系统”,操作系统通过对BIOS的调用驱动各硬件设备,用户也可以在应用程序中调用BIOS中的许多功能。
⑥中断是CPU正常执行程序的流程被某种原因打断、并暂时停止,转向执行事先安排好的一段处理程序,待该处理程序结束后仍返回被中断的指令继续执行的过程。
⑦主板芯片组是主板的核心部件,它提供主板上的关键逻辑电路。
⑧MASM是微软开发的宏汇编程序。
⑨指令的处理过程。
处理器的“取指—译码—执行周期”是指处理器从主存储器读取指令(简称取指),翻译指令代码的功能(简称译码),然后执行指令所规定的操作(简称执行)的过程。
⑩机器语言层,即指令集结构。
(学生很多认为是:汇编语言层。
前4章主要涉及汇编语言,但本书还有很多处理器原理等内容)〔习题1.3〕填空题①Central Processing Unit,中央处理单元,处理器②1MB,4GB③216,64KB④EXE,COM⑤Instruction Set Architecture⑥目录⑦MMX,SSE3⑧64⑨IBM,DOS⑩PCI〔习题1.4〕说明微型计算机系统的硬件组成及各部分作用。
〔解答〕CPU:CPU也称处理器,是微机的核心。
它采用大规模集成电路芯片,芯片内集成了控制器、运算器和若干高速存储单元(即寄存器)。
处理器及其支持电路构成了微机系统的控制中心,对系统的各个部件进行统一的协调和控制。
存储器:存储器是存放程序和数据的部件。
外部设备:外部设备是指可与微机进行交互的输入(Input)设备和输出(Output)设备,也称I/O设备。
I/O设备通过I/O接口与主机连接。
总线:互连各个部件的共用通道,主要含数据总线、地址总线和控制总线信号。
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Ⅰ.Words:
1. v. 代表,象征_____________
2. n. 社团,联系,联想___________
3. adj. 好奇的___________
4. v. & n. 接近,靠近,走近__________
5. v. 保护,保卫_________
6. adj. 主要的__________
7. v. 误解,误会_____________ 8. n. & adj. adult_________
9. adj. 可能的__________ 10. adj. 面部的__________
11. n.作用& v.起作用__________ 12. n. & v. ease_______
13. adv. 真实地,真诚地_________ 14. adj. false_________
15. adj. subjective___________ 16. adj. 恭敬的__________
17. n. dormitory___________ 18. n. flight ____________
19.v. dash ____________ 20. n. rank _____________
Ⅱ.Phrases:
1.防御,保卫……以免受_________________
2. 总的来说,通常________________
3.背对___________________
4. 把A介绍给B introduce A to B
5. 很可能….,有希望…______________
6. 口头语言spoken language
Ⅲ.Sentences:
(1)单句语法填空
1.Yesterday, another student and I, ___________(represent) our university’s student _________(associate), went to the Capital International Airport to meet this year’s international students.
2.____ general, though, _________ (study) international customs can certainly help avoid _________ (difficult) in today’s world of cultural crossroads!
3.The most universal facial expression is, of course, the smile—___function is to show _________(happy) and put people _____ ease.
4.When Darlence Coulon from France came________(dash) through the door, she ________(recognize) Tony Garcia’s smiling face.
(2)单句改错
1. When we met yesterday, he moved very closely to me as I introduce myself.
2. Tony approached Julia, touch her shoulder and kissed her in the cheek!
Ⅰ.Words:
1. adj.中心的,中央的__________
2. adj. various _________
3. pron. whichever ___________
4. n. fantasy__________
5.n.秋千,摇摆v.摆动_________
6.n. 有吸引力的事物,吸引________
7.adj. unique__________ 8. v. preserve__________
9.n. 长度,长_________ 10. adj. 运动的__________
11.v. &n. 前进,促进,进步___________ 12. n.允许进入,入场费__________
13.n. theme___________ 14. n. 娱乐,消遣___________
15.n. carpenter __________ 16.n. engine ___________
17.n. tournament__________ 18. n.译员,翻译___________
19.n. minority____________ 20.n. creature _____________
21.n. souvenir ___________ 22.n. brochure ____________
Phrases:
1.以……而闻名_______________
2. 难怪,不足为奇_____________
3.根据……模仿,仿造_____________
4. 提前________________
5.活跃起来_________________
6. 接近__________________
7. 不仅仅,不只是more than8. 经营农场run one's farm
9. 人熟悉某物sb. be familiar with
Ⅲ.Sentences:
(1)单句语法填空
1. Whatever and whichever you like, there is ___ theme park for you.
2. It will bring you ______ a magical world and make your dream come true, _________ you are traveling through space, visiting a pirate ship or meeting your favorite fairy tale or Disneyland.
3. With all these attractions, no wonder tourism is ___________(increase) wherever there is a Disneyland.
4. ____________(open) in 1987, Futuroscope is one of the __________(large) space-age parks (太空时代主题公园)in the world.
5. For anyone _________ (come) out of town, Futuroscope has many excellent hotels nearby, most of _________ provide a shuttle service to the park.
(2)单句改错
1. Some parks are famous for have the big or the longest roller coasters, other for showing the famous sight and sounds of a culture.
2. Disneyland also have much excited rides, from giant swinging ships terrifying free-fall drops.。