全志平台lcd调试说明文档v.0
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全志平台LCD调试说明文档
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文档履历
版本版本号号 日期
制/修订人
制/修订记录
V1.0 2015.04.10 罗昭 建立初始版本
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目 录
全志平台LCD 调试说明文档 ................................................................................................................................. 1 1. 文档概述 .. (3)
1.1. 编写目的 ............................................................................................................................................... 3 1.2. 文档适用范围 (3)
1.3. 适用人员 ............................................................................................................................................... 3
2.
LCD 介绍 (4)
2.1. LCD 时序图 .......................................................................................................................................... 4 2.2. 全志平台显示驱动架构 ....................................................................................................................... 5 2.
3. 屏的驱动结构 ....................................................................................................................................... 6 3.
调试步骤与方法 ............................................................................................................................................... 8 3.1. sys_config.fex 配置 ............................................................................................................................... 8 3.1.1接口参数配置 .................................................................................................................................. 8 3.1.2时序参数.......................................................................................................................................... 9 3.2. LCD 上电时序 .................................................................................................................................... 10 3.3. LCD 屏的初始化 .................................................................................................................................11 4.
常用LCD 屏配置DEMO ............................................................................................................................... 12 4.1 HV Parallel RGB 屏 . (12)
4.1.1 schematic........................................................................................................................................ 12 4.1.2 sys_config.fex ................................................................................................................................ 13 4.2
HV Serial RGB 屏 ............................................................................................................................... 15 4.2.1 schematic........................................................................................................................................ 15 4.2.2 sys_config.fex ................................................................................................................................ 17 4.2.3 lcd0_panel_cfg.c ............................................................................................................................ 19 4.3
CPU Parallel 18bit 屏 .......................................................................................................................... 20 4.3.1 Schematic ....................................................................................................................................... 20 4.3.2 sys_config.fex ................................................................................................................................ 21 4.3.3 lcd0_panel_cfg.c ............................................................................................................................ 22 4.4
LVDS Single Link 屏 .......................................................................................................................... 24 4.4.1 schematic ....................................................................................................................................... 24 4.4.2 sys_config.fex ................................................................................................................................ 26 4.5
LVDS Dual Link 屏 ............................................................................................................................. 27 4.5.1 Schematic ....................................................................................................................................... 27 4.5.2 Sys_config.fex ............................................................................................................................... 29 4.6
DSI Video mode 屏.............................................................................................................................. 31 4.6.1 Schematic ....................................................................................................................................... 31 4.6.2 Sys_config ..................................................................................................................................... 32 4.7
DSI Command mode 屏 ...................................................................................................................... 33 4.7.1 schematic ....................................................................................................................................... 33 4.7.2 Sys_config ..................................................................................................................................... 34 4.8 LCD Port IO . (35)
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