STM8L101xx

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STM8L超低功耗MCU精彩问答

STM8L超低功耗MCU精彩问答

主题:STM8L——引领8位MCU产品向超低功耗扩展---精彩问答[1问:]STM8L总线数据传输速度可达多高?[答:]CPU的时钟频率为16MHz[1900-1-1][2问]如何实现ARM内核的低功耗设计[答:]STM8L不是ARM内核的[2009-11-1810:14:01][3问:]STM8L的产品的工作主频能有多大?可以在待机时改变频率以节省电能吗? [答:]最高16MHz,16MIPS,待机前可以降频[2009-11-1810:14:57][4问:]STM8加密除了在下载的时候禁止读写以外,还有什么好办法呢?[答:]每个芯片有唯一的ID,可以在程序中做加密处理[2009-11-1810:15:34][5问:]STM8很多寄存器需要在某种状态下才允许修改的,能否详细说明一下?[答:]这个问题能够提的具体一点吗?[2009-11-1810:15:35][6问:]8位微控制器STM8L的外设接口是怎样设置的?[答:]你指什么外设?[2009-11-1810:20:30][7问:]STM8L单片机和TI的msp430系列MCU有什么不同,与TI的功耗比相比有什么优势?谢谢[答:]STM8L是8位机,因此比16位机便宜。

STM8L可达16MIPS,与MSP430速度相当。

STM8L的许多工作模式,功耗比TI还低[2009-11-1810:22:51][8问:]STM8L是几级流水的?工作频率是多少?指令周期是多少?有多少单指令周期指令和双指令周期的指令?[答:]3级16MHz Max指令集与STM8S相同STM8L的内核是CISC内核,指令周期从一个周期至最长10几个周期(除法指令)都有。

[2009-11-1810:24:03][9问:]调试方式有几种?FLASH和RAM?可以选择吗?[答:]可以选择Flash或RAM运行程序。

[2009-11-1810:24:05][10问:]支持几种IDE?请简单介绍,谢谢[答:]ST推荐STVD还有Raisonance的IDE也可以。

STMCU低功耗产品系列详解

STMCU低功耗产品系列详解
Int. RC 38 KHz
Clock Controller
Debug ModuleSWIM
Up to 41 I/Os
PVD
Xtal 32,768 KHz
DMA
12 bit DAC
2xComparators
Boot ROM
LCD driverUp to 4 x 28
1x16 bit TimerAdv Control3 Channels
超低功耗微控制器平台的关键词
低功耗的承诺从STM8L到STM32L完整的低功耗微控制器平台采用最新、超低漏电流的工艺极大的改善包括动态和静态的功耗高效率的承诺由于采用最新的架构,性能/功耗比达到新高运行模式功耗低至:150 µA/MHz在低功耗模式下,仅需 350nA,SRAM和寄存器数据还可以保留优化的产品分布采用通用单片机从8位到32位全覆盖的策略针对特殊的应用,提供片上集成的安全特性最佳的性价比
64 pins LQFP(10x10)
STM8L152M84 KB RAM
STM8L151M84 KB RAM
80 pins LQFP(14x14)
STM8L101 8K 结构框图
SPI
USART
I²C
2x16 bit Timer2 Channels
1x8-bit Timer
Ind. Wd with 38KHz int.
所有都包含:
USART, SPI, I2C
看门狗(STM8L15x 具有双看门狗)
多通道16-bit 定时器
内置 16 MHz 和 38 kHz RC 振荡器
复位电路(上电复位,掉电复位)
Up to 8 KB Flash
STM8L101
Up to 1.5 KB SRAM

STM8L选型手册

STM8L选型手册

Package SO-8 SO-8
TSSOP 20 LQFP 48 7x7x1.4 LQFP 64 10x10x1.4 UFQFPN 20 3x3x0.6 TSSOP 20,UFQFPN 20 3x3x0.6 TSSOP 20,UFQFPN 20 3x3x0.6 UFQFPN 28 4x4x0.55 UFQFPN 28 4x4x0.55 LQFP 32 7x7x1.4,UFQFPN 32 5x5x0.55 LQFP 48 7x7x1.4 LQFP 48 7x7x1.4 LQFP 48 7x7x1.4,UFQFPN 48 7x7x0.55 LQFP 48 7x7x1.4,UFQFPN 48 7x7x0.55 LQFP 48 7x7x1.4,UFQFPN 48 7x7x0.55 TSSOP 20,UFQFPN 20 3x3x0.6 TSSOP 20,UFQFPN 20 3x3x0.6 UFQFPN 28 4x4x0.55 UFQFPN 28 4x4x0.55 UFQFPN 28 4x4x0.55,WLCSP28 UFQFPN 28 4x4x0.55,WLCSP28 UFQFPN 32 5x5x0.55 UFQFPN 32 5x5x0.55 LQFP 32 7x7x1.4,UFQFPN 32 5x5x0.55 LQFP 32 7x7x1.4,UFQFPN 32 5x5x0.55 LQFP 80 14x14x1.4 LQFP 64 10x10x1.4 LQFP 64 10x10x1.4 LQFP 48 7x7x1.4,UFQFPN 48 7x7x0.55 LQFP 48 7x7x1.4,UFQFPN 48 7x7x0.55 LQFP 48 7x7x1.4,UFQFPN 48 7x7x0.55 LQFP 32 7x7x1.4,UFQFPN 32 5x5x0.55 LQFP 32 7x7x1.4,UFQFPN 32 5x5x0.55 WLCSP 32L DIE 768 LQFP 80 14x14x1.4 LQFP 64 10x10x1.4 LQFP 64 10x10x1.4 LQFP 80 14x14x1.4 LQFP 64 10x10x1.4

STM8L系列超低功耗8位微控制器 说明书

STM8L系列超低功耗8位微控制器 说明书

STM8L1xx 典型应用和结构框图
医疗器械 血糖仪 胰岛素泵 糖尿病监护 血压计 胆固醇计 病人监控 心脏监护 仪表 电表/气表/水表/热表 称重 报警系统 中央处理单元 有线/无线传感器 门禁 通用移动设备 手机及配件 3D鼠标及遥控器 游戏机和玩具 GPS手表 体育设施
内部的16MHz RC振荡器 1~16MHz晶体 振荡器 内部的38kHz RC振荡器 32.768kHz晶体 振荡器 运行于16MHz的 STM8核心 嵌套的中断控制器 32个中断向量 多达40个外部中断 SWIM 调试模块 多达41个I/O端口 12位ADC 25个通道
STM8L系列
超低功耗8位微控制器
微控制 超节能
2009年9月
/mcu
STM8L超低功耗MCU系列
意法半导体公司开发出了基于8位STM8内核的超低功耗微控制器.借助一个优秀的面向未来的超低功耗平台,采 用了全新的超低漏电工艺和优化的体系结构,STM8L系列微控制器集合了高性能与超低功耗于一身.STM8L系列 现有三个子系列,可以满足对低功耗有特殊要求的多种应用.
STM8L一览
现在已有26个兼容的产品
Flash容量 (字节) STM8L152C8
64 K 32 K 16 K 8K
STM8L152R8 STM8L152M8 STM8L151R8 STM8L151M8
STM8L151C8 STM8L152K6 STM8L151G6 STM8L151K6 STM8L152K4 STM8L151G4 STM8L151K4 STM8L151F3 STM8L101F3 STM8L151G3 STM8L151K3 STM8L101G3 STM8L101K3 STM8L151G2 STM8L101G2 28引脚 QFN (4x4) 32引脚 LQFP (7x7)/ QFN (5x5) 48引脚 LQFP (7x7)/ QFN (7x7) STM8L152C6 STM8L151C6 STM8L152C4 STM8L151C4

STM8单片机入门

STM8单片机入门
STM8 单 片机入门
STM8 单片机入门
目录
1 STM8 微控制器简介 ............................................................................................................... 3 1.1 STM8S 系列 ................................................................................................................. 3 1.2 STM8L 系列 ................................................................................................................. 5 1.3 STM8A 系列 ................................................................................................................ 7 1.4 STM8 微控制器网站 ................................................................................................... 9
STM8S主要特点:
n 速度达20 MIPS的高性能内核 n 抗干扰能力强,品质安全可靠 n 领先的130纳米制造工艺,优异的性价比 n 程序空间从4K到128K, 芯片选择从20脚到80脚,宽范围产品系列 n 系统成本低,内嵌EEPROM和高精度RC振荡器 n 开发容易,拥有本地化工具支持

STM8L中文参考手册_2

STM8L中文参考手册_2

手动开关手动开关没有自动切换为直接的但它提供给用户的切换事件时间的精确控制。

参照图20中的流程图。

1。

写使用系统时钟开关选择目标时钟源的8位值寄存器(clk_swr)。

然后swbsy位是由硬件,和目标源振荡器开始。

古老的时钟源继续驱动CPU和外设。

2。

该软件具有等到目标时钟源准备(稳定的)。

这是在clk_swcr寄存器和快捷旗由中断如果swien位设置显示。

3。

最终软件的作用是设置,在所选择的时间,在clk_swcr的赛文点寄存器来执行开关。

在手动和自动切换模式,旧的系统时钟源不会自动关闭的情况下是由其他模块(LSI混凝土可用于例如独立的看门狗驱动)。

时钟源可以关机使用在内部时钟寄存器的位(clk_ickcr)和外部时钟寄存器(clk_eckcr)。

如果时钟开关不因任何原因的工作,软件可以通过清除swbsy标志复位电流开关操作。

这将恢复clk_swr注册到其以前的内容(旧的系统时钟)。

注意:在清理swbsy标志具有复位时钟主开关的程序,应用程序必须等到后产生新的主时钟切换请求之前有一段至少两个时钟周期。

9.7周门控时钟(PCG)外周时钟门控(PCG)模式选择性地启用或禁用系统时钟(SYSCLK)连接到外围设备在运行或慢速模式的任何时间来优化功耗。

设备复位后,所有的外设时钟被禁用。

唯一的一点是在复位状态是默认启用pcken27因为它用于启动。

软件已被正确地写入关掉ROM Bootloader执行后的时钟。

您可以启用时钟的任何外围设置在clk_pckenrx周围门控时钟寄存器的相应pcken点。

●使周围,首先使在clk_pckenr相应的pcken点寄存器然后设置使点周围的外围控制寄存器。

●禁用适当的外围,先禁用在周边的适当位控制寄存器,然后停止相应的时钟。

注:蜂鸣器,RTC和液晶显示器是由不同的SYSCLK特定的时钟,使他们继续运行,即使时钟门控的外设寄存器是断言。

9.8时钟安全系统(CSS)9.8.1时钟安全系统对HSE时钟安全系统(CSS)监控HSE晶体时钟源故障时安全作为系统时钟。

stm8l05xx,stm8l15xx和stm8l16xx中文参考手册(完整版)资料

stm8l05xx,stm8l15xx和stm8l16xx中文参考手册(完整版)资料

本参考手册的目标应用程序开发人员。

它提供了完整的信息如何使用stm8l05xx,stm8l15xx 和stm8l16xx微控制器的存储器和外围设备。

该stm8l05xx / stm8l15xx / stm8l16xx是一个家庭的不同存储密度的微控制器和外围设备。

这些产品是专为超低功耗应用。

可用的外设的完整列表,请参阅产品数据表。

订购信息,引脚说明,机械和电气设备的特点,请参阅产品数据表。

关于STM8 SWIM通信协议信息和调试模块,请参阅用户手册(um0470)。

在STM8的核心信息,请参阅STM8的CPU编程手册(pm0044)。

关于编程,擦除和保护的内部快闪记忆体,请参阅STM8L闪存编程手册(pm0054)。

1 中央处理单元(CPU)。

30。

1.1 引言301.2 CPU的寄存器。

30。

1.2.1 描述CPU寄存器。

..。

301.2.2 STM8 CPU寄存器图。

..。

341.3 全球配置寄存器(cfg_gcr)。

34。

1.3.1 激活水平。

..。

341.3.2 游泳禁用。

..。

351.3.3 描述全局配置寄存器(cfg_gcr)。

..。

35 1.3.4 全局配置寄存器图及复位值。

..。

352 启动ROM . . . 363程序存储器和数据存储器。

37。

3.1引言373.2术语。

37。

3.3个主要的快闪存储器的特点。

38。

3.4记忆的组织。

39。

3.4.1低密度设备的存储器组织。

393.4.2介质密度的装置记忆的组织。

..。

403.4.3介质+密度装置记忆的组织。

..。

413.4.4高密度存储器组织。

..。

423.4.5专有代码区(译)。

433.4.6用户区(UBC)。

433.4.7数据的EEPROM(数据)。

..。

463.4.8主程序区。

463.4.9选项字节。

..。

463.5内存保护。

47。

3.5.1读出保护。

473.5.2内存访问安全系统(质量)。

473.5.3使写访问选项字节。

493.6内存编程493.6.1同时读写(读写网)。

STM8L中文参考手册-5

STM8L中文参考手册-5

29通用同步/异步接收器发射机(USART)本节适用于低密度stm8l05xx / stm8l15xx设备,介质密度stm8l05xx / stm8l15xx设备,介质+密度stm8l05xx / stm8l15xx设备高密度stm8l05xx / stm8l15xx / stm8l16xx设备,除非另有规定。

29.1是介绍USART(通用异步接收发送器)提供了一个灵活的需要一个行业标准的NRZ码的异步串行数据格式的外部设备的全双工数据交换装置。

它提供了一个非常广泛的波特率。

USART支持同步单向通信、半双工单线通信。

智能卡协议和IrDA(红外数据协会)先生ENDEC规格也支持。

USART也可以用于多处理器通信。

高速数据通信是可能的,使用DMA多缓冲区结构。

29.2是主要特点●全双工异步通信,●NRZ格式(标记/空间)●高精度波特率发生器系统常见的可编程发送和接收波特率可达fsysclk / 16●可编程数据字长(8或9位)●配置的停止位为1或2个停止位的支持●发射机时钟输出同步通信●单线半双工通信●IrDA SIR的编码器,解码器-正常模式3 / 16位元时间支持●智能卡仿真能力-智能卡接口支持异步协议的智能卡在ISO 7816-3标准定义1.5停止位的智能卡操作●配置多缓冲区通信使用的DMA(直接存储器存取)-接收/保留的内存使用DMA传输字节缓冲集中●单独使发射机和接收机的位●转移检测标志:接收缓冲区满传输缓冲区空-传输结束标志●奇偶控制:-将奇偶校验位–检查接收数据字节的奇偶性●4误差检测的旗帜:-溢出错误噪声误差帧错误奇偶校验错误●8个中断源的旗帜:发送的数据寄存器空传输完成接收数据寄存器满空闲线接收奇偶校验错误-溢出错误-帧错误噪声误差●2中断向量:发送中断接收中断●降低功耗模式●多处理器通信进入静音模式如果地址不匹配发生●唤醒从静音模式(空闲线检测或地址标记检测)●2接收器唤醒模式:地址位(MSB)空闲线29.3串口功能描述接口是外部连接到另一个设备通过三个引脚(见图152)。

stm8选型

stm8选型

STM8 选型意法半导体的8位微控制器平台基于高性能8位内核和先进外设集。

该平台采用意法半导体专有的130 nm 嵌入式非易失性存储器技术制造而成。

STM8的增强型堆栈指针操作、高级寻址模式和新指令让用户能够实现快速、安全的开发。

STM8平台支持4个产品系列:∙STM8S - 主流MCU∙STM8L - 超低功耗MCU∙STM8AF和STM8AL - 汽车用MCUSTM8S选型意法半导体的STM8S系列主流8位微控制器适于工业、消费类和计算机市场的多种应用,特别是要实现大批量的情况。

基于STM8专有内核,STM8S系列采用ST的130纳米工艺技术和先进内核架构,主频达到24 MHz,处理能力高达20MIPS。

嵌入式EEPROM、RC振荡器和全套标准外设为设计者提供了稳定且可靠的解决方案。

相关工具链,从经济型探索套件到更复杂的评估套件和第三方工具,为利用STM8S微控制器进行开发提供了极大方便。

STM8S系列包括四个产品线,具有不同特性,但是保持了全面兼容性和可升级性,从而减少了未来产品设计变更。

∙STM8S003/005/007超值型是入门级产品,具有基本功能。

∙STM8S103/105基本型提供了更多特性和封装选项。

∙STM8S20增强型配有全套外设,满足中、高端应用的性能要求。

∙STM8S专用型提供了更多模拟特性和专用固件解决方案。

STM8S903STM8S103/105基本型属于标准多功能8位微控制器。

作为低成本超值型产品升级的第一步,STM8S103/105基本型提供了更多的封装、存储容量、特性和工厂编程服务选项。

它基于专有16 MHz内核,具有全套定时器、接口(UART、SPI、I2C)、10位ADC、内部和外部时钟控制系统、看门狗、自动唤醒单元和集成式单线调试模块。

该产品系列具有高达32 KB的Flash程序存储器、高达1 KB的数据EEPROM和高达2 KB的RAM。

它提供三种封装选项:32、44和48引脚封装。

STM8L101F3P6单片机IO模拟收发调试

STM8L101F3P6单片机IO模拟收发调试

本程序选用的芯片为STM8L101F3P6共分为如下几个文件Main.c文件内容#include "stm8l10x_diy_time.h"#include "stm8l10x_diy_port.h"#include "STM8L101F3P.h"#include "NRF24L01.h"#include "STM8l10x.h"char lock_key;void main(void){clk_init ();//时钟初始化gpio_init();time_init();LED01=0;LED02=0;IRQ_OUT;//IRQ设置为输出模式IRQ_O=1;//赋值ifnnrf_rx_mode();while (1){if(But01==0){ IRQ_OUT;IRQ_O=1;SPI_RW_Reg(WRITE_REG+STATUS,0xff);tx_buf[0]=2;ifnnrf_tx_mode();IRQ_IN;while(IRQ_I);sta=SPI_Read(STATUS);SPI_RW_Reg(WRITE_REG+STA TUS,0xff);if(sta& STA_MARK_TX){LED02=1;Delay(0xfffFf);LED02=0;Delay(0xffFff);}else{ifnnrf_CLERN_ALL();LED02=1;Delay(0xffFf);LED02=0;Delay(0xffFf);}ifnnrf_rx_mode();IRQ_OUT;IRQ_O=1;IRQ_IN;Delay(0x0f);while(IRQ_I==0);Delay(0xffff);}IRQ_OUT;IRQ_O=1;IRQ_IN;if(IRQ_I==0){sta=SPI_Read(STATUS);SPI_RW_Reg(WRITE_REG+STATUS,0xff);if(sta&STA_MARK_RX){SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);if (rx_buf[0] == 2){LED01=1;Delay(0xffFff);LED01=0;Delay(0xfFfff);rx_buf[0] = 0;}}else{ifnnrf_CLERN_ALL();ifnnrf_rx_mode();IRQ_OUT;IRQ_O=1;IRQ_IN;Delay(0x0f);while(IRQ_I==0);}}}}@far @interrupt void TIM4_interrupt(void){static unsigned int TIM_Work;static unsigned char TIM_Time;if(But01==0){if(TIM_Work++>2500){// LED01 =~LED01;TIM_Work=0;}}else{TIM_Work =0;// LED01 =0;}TIM4_SR1 = 0x00;return;}stm8_interrupt_vector.c内容/* BASIC INTERRUPT VECTOR TABLE FOR STM8 devices* Copyright (c) 2007 STMicroelectronics*/typedef void @far (*interrupt_handler_t)(void);struct interrupt_vector {unsigned char interrupt_instruction;interrupt_handler_t interrupt_handler;};@far @interrupt void NonHandledInterrupt(void){/* in order to detect unexpected events during development, it is recommended to set a breakpoint on the following instruction */return;}extern void _stext(); /* startup routine */extern @far @interrupt void TIM4_interrupt(void);struct interrupt_vector const _vectab[] = {{0x82, (interrupt_handler_t)_stext}, /* reset */{0x82, NonHandledInterrupt}, /* trap */{0x82, NonHandledInterrupt}, /* irq0 */{0x82, NonHandledInterrupt}, /* irq1 */{0x82, NonHandledInterrupt}, /* irq2 */{0x82, NonHandledInterrupt}, /* irq3 */{0x82, NonHandledInterrupt}, /* irq4 */{0x82, NonHandledInterrupt}, /* irq5 */{0x82, NonHandledInterrupt}, /* irq6 */{0x82, NonHandledInterrupt}, /* irq7 */{0x82, NonHandledInterrupt}, /* irq8 */{0x82, NonHandledInterrupt}, /* irq9 */{0x82, NonHandledInterrupt}, /* irq10 */{0x82, NonHandledInterrupt}, /* irq11 */{0x82, NonHandledInterrupt}, /* irq12 */{0x82, NonHandledInterrupt}, /* irq13 */{0x82, NonHandledInterrupt}, /* irq14 */{0x82, NonHandledInterrupt}, /* irq15 */{0x82, NonHandledInterrupt}, /* irq16 */{0x82, NonHandledInterrupt}, /* irq17 */{0x82, NonHandledInterrupt}, /* irq18 */{0x82, NonHandledInterrupt}, /* irq19 */{0x82, NonHandledInterrupt}, /* irq20 */{0x82, NonHandledInterrupt}, /* irq21 */{0x82, NonHandledInterrupt}, /* irq22 */{0x82, NonHandledInterrupt}, /* irq23 */{0x82, NonHandledInterrupt}, /* irq24 */{0x82, TIM4_interrupt}, /* irq25 */{0x82, NonHandledInterrupt}, /* irq26 */{0x82, NonHandledInterrupt}, /* irq27 */{0x82, NonHandledInterrupt}, /* irq28 */{0x82, NonHandledInterrupt}, /* irq29 */};stm8l10x_diy_port.c内容#include "stm8l10x_diy_port.h"#include "STM8L101F3P.h"#include "stm8l10x_gpio.h"/************************************************************** 功能:配置IO口配置IO输入输出说明输出:配置PC_DDR,PC_CR1寄存器,把相应位拉高即可输入:只配置PD_CR1寄存器,拉高即可/*************************************************************/ void gpio_init(void){GPIO_DeInit(GPIOB);//恢复寄存器到默认值GPIO_DeInit(GPIOC);GPIO_DeInit(GPIOD);/*配置输出****************************************************/ PC_DDR|= 0x04;//LEDPC_CR1|= 0x04;//LEDPD_DDR|= 0x01;//LEDPD_CR1|= 0x01;//LEDPC_DDR|= 0x01;//CEPC_CR1|= 0x01;//CEPB_DDR|= 0x10;//CSNPB_CR1|= 0x10;//CSNPB_DDR|= 0x20;//SCKPB_CR1|= 0x20;//SCKPB_DDR|= 0x80;//MISOPB_CR1|= 0x80;//MISO/*配置输入****************************************************/ PC_CR1|= 0x08;//buttomPB_CR1|= 0x01;//buttomPB_CR1|= 0x40;//mOSIPB_CR1|= 0x02;//IRQLED01=1;LED02=1;IRQ_OUT;//IRQ作为输出IRQ_O=1;CE=0; // chip enableCSN=1; // Spi disableSCK=0; // Spi clock line init high}/************************************************************** 功能:配置时钟/*************************************************************/ void clk_init(void){CLK_CKDIVR = 0x00;CLK_PCKENR|= 0x04;//开启定时器4中断(必修有)/*TIM2:0x01TIM3:0x02TIM4:0x04************************************************************/}/************************************************************** 延迟函数/*************************************************************/ void Delay(unsigned int nCount){while (nCount != 0){nCount--;}}/************************************************************** 按键防抖动及按键锁/*************************************************************/ char Key_Scanf(char Buttom){static char Key_Lock;char ButtomStatus;ButtomStatus=But_OFF ;if(Buttom==But_ON){Delay(0x3ff);/* 消抖*/if((Buttom==But_ON)&&(Key_Lock==1)){ButtomStatus=But_ON;}}else Key_Lock= 1;return ButtomStatus;}stm8l10x_diy_port.h内容#ifndef __stm8l10x_diy_port_H#define __stm8l10x_diy_port_H#include "STM8L101F3P.h"#define L 0#define H 1#define But_ON 0 //按下时为低#define But_OFF 1#define IRQ_OUT PB_DDR|= 0x02 //配置输出#define IRQ_IN PB_DDR&= 0xFD //配置输入_Bool IRQ_O @PB_ODR:1;//IRQ输出。

STM8L中文参考手册(4)-

STM8L中文参考手册(4)-

STM8L中文参考手册(4)-20 16位通用定时器(TIM2、TIM3、tim5)20.1简介本章介绍TIM2、TIM3和tim5是相同的定时器每个定时器包括一个由可编程分频器驱动的16位上下自动重载计数器它可以用于多种目的,包括:●定时产生●测量输入信号的脉冲长度(输入捕获)●产生输出波形(输出比较、脉宽调制和脉冲模式)●各种中断能力事件(捕获、比较、溢出)●与其他定时器或外部信号(外部时钟、复位、触发使能)同步定时器时钟可以来自内部时钟,也可以来自配置寄存器或外部源本章仅介绍通用定时器的主要特性。

它参考了与19:16高级控制定时器(TIM1)相对应的部分中的每个功能的更详细的信息页28320.2 TIMx 主要功能通用TIMx TIM2/TIM3功能包括:●16位向上、向下、向上/向下自动刷新计数器●3位可编程分频器允许将计数器的时钟频率分成1至128的任意2次方两个独立的低电平通道:输入捕获输出比较脉冲宽度调制产生(边沿对齐)-一个脉冲输出模式低电平中断输入,用于复位定时器输出信号,或处于已知状态●输入捕捉2可通过来自comp2比较器:更新的中断和DMA请求产生以下事件:当计数器溢出时,计数器初始化(软件)输入捕捉输出比较中断输入触发事件(开始、停止、内部/外部触发初始化或计数)20.3.1时间单元定时器时基单元包括:●16位可逆计数器时钟源是内部时钟(fsysclk)它由预分频器计数器的时钟ck_cnt驱动,预分频器计数器直接连接到ck_psc时钟馈送分频器分频器的实现如下:7位计数器(在timx_pscr寄存器中)由基于低预分频器的3位寄存器控制它可以控制飞行中寄存器缓冲区的变化。

它可以将计数器的时钟频率转换为1、2、4、8、16、32、64或128计数器的时钟频率计算如下:fCk _ CNT = fck _ PSC/2(PSCR[2:0)计数器操作请参考第19.3.4页:上部288,模式部分19.3.5:在第290页向下计数,模式19.3.6:中心对齐(向上/向下计数)29220.3.2时钟/触发控制器参见第296页第19.4节:TIM1时钟/触发控制器20.3.3采集/比较通道输入级参见第310页第19.5节:TIM1采集/比较通道有两个输入通道,如图122:输入级框图通道2内部连接到比较器输出级参见第19.5.4页:315,输出级19.5.5:强制输出模式在第316页,第19.5.7页:脉宽调制模式在第318页如图124所示。

STML中文介绍

STML中文介绍

STM8L152介绍8位超低功耗单片机,高达64 + 2字节数据的闪存EE PROM,EEPROM (Electrically Erasable Programmable Read-Only Memory),实时时钟,液晶显示器,定时器,USART,C,SPI,模数转换器,数模转换器,比较器特点:操作条件:工作电源:1.65v~ 3.6v温度范围:40 to 85, 105 or 125低功耗的特点:5个低功耗模式:等,低功率运行(5.9¦Ì一),低功耗等(3¦Ì一),active-halt全实时时钟(1.4¦Ì一),停止(400)动态功率消耗:200UA/兆赫+ 330UA,快速唤醒从停止模式(4.7us)超低漏I/ O:50nA先进的stm8核心:哈佛结构和三级流水线最大频率:16条16mhz,相关峰最多40个外部中断源复位和供应管理:低功率,超安全欠压复位5可编程阈值超低功率POR /PDR(通电复位/Protection(保护)、Detection(检测)、Response(响应))可编程电压检测器(Programmable voltage detector (PVD))时钟管理32kHz和1-16MHz晶体振荡器工厂校准的内部16MHz RC和38kHz的低功耗RC时钟安全系统低功耗RTCBCD日历,闹钟中断,数字校准+ / - 0.5ppm的准确度先进的防篡改检测DMA4个通道。

ADC,DAC的,SPIS,我2C,USART接口,定时器,1路。

存储器到存储器的LCD:8x40或4x44瓦特/升压转换器12位ADC1 Msps/28渠道温度。

传感器和内部参考。

电压记忆高达64 KB的快闪记忆体高达2KB的数据EEPROM,ECC和RWW灵活的读/写保护模式高达4 KB的RAM2x12位DAC(双模式)与输出缓冲器2个超低功耗比较器1个固定阈值和1个轨到轨唤醒功能定时器3个16位定时器,2个通道(IC,OC,PWM),正交编码器一个16位高级控制定时器,3个信道,支持电机控制1个7位预分频器的8位定时器1个窗口和1个独立的看门狗蜂鸣器定时器1,2或4kHz的频率通讯接口两个同步串行接口(SPI)快速I2C 400千赫SMBus和PMBus三个USART(ISO7816接口+红外线)最多67个I /o中断向量,所有可映射多达16个电容检测通道,免费固件快速片上编程和非侵入性调试与游泳,Bootloader的使用USART 独特的96位ID描述:1、stm8l超低功耗的8位家庭福利2、设备概述3、超低功率连续简介:本文描述的特点,因此,机械数据和订购信息:高密度stm8l15xxx装置:stm8l151x8和stm8l152x8微控制器与闪速存储器密度64字节。

单片机型号选型表2012-2013

单片机型号选型表2012-2013

44脚 STM8S207S8 24 64K 4K 1536 9 2(4+1)(1) 1(4) 1 2 1 1 0 31 34(15) LQFP44(10x10)
STM8S207SB 24 128K 4K 1536 9 2(4+1)(1) 1(4) 1 2 1 1 0 31 34(15) LQFP44(10x10)
- 26(24)
WFQFPN 28 (4x4) WFQFPN 28 (4x4)
32脚 STM8L101K3
8K
1.5 K
-
-
2 (4/4/4)
1
ISO 7816) - 30(28) LQFP32, WFQFPN32 (5x5)
STM8L151超低功耗系列:16MHz和32kHz振荡器,硬件RTC,12位ADC,16MHz和38kHz内部RC振荡器,4种低功耗模式,2个比较器,DMA,复位
的性价比。 ■ 程序空间从4K到128K, 芯片选择
从20脚到80脚,宽范围产品系列。 ■ 系统成本低,内嵌EEPROM和高
精度RC振荡器。 ■ 开发容易,拥有本地工具支持。
2个系列都包含:
4~128k字节Flash
UART(LIN/7816/IrDA)
ห้องสมุดไป่ตู้
400kHz多主I2C接口 多达3个16位定时器
STM8S207C6 24 32K 2K 1024 10 2(5) 1(4) 1 2 1 1 0 35 38(16) LQFP48(7x7)
48脚 STM8S207C8 24 64K 4K 1536 10 2(5) 1(4) 1 2 1 1 0 35 38(16) LQFP48(7x7)
STM8S207CB 24 128K 6K 2048 10 2(5) 1(4) 1 2 1 1 0 35 38(16) LQFP48(7x7)

STM8L中文参考手册-2

STM8L中文参考手册-2

手动开关手动开关没有自动切换为直接的但它提供给用户的切换事件时间的精确控制。

参照图20中的流程图。

1。

写使用系统时钟开关选择目标时钟源的8位值寄存器(clk_swr)。

然后swbsy位是由硬件,和目标源振荡器开始。

古老的时钟源继续驱动CPU和外设。

2。

该软件具有等到目标时钟源准备(稳定的)。

这是在clk_swcr寄存器和快捷旗由中断如果swien位设置显示。

3。

最终软件的作用是设置,在所选择的时间,在clk_swcr的赛文点寄存器来执行开关。

在手动和自动切换模式,旧的系统时钟源不会自动关闭的情况下是由其他模块(LSI混凝土可用于例如独立的看门狗驱动)。

时钟源可以关机使用在内部时钟寄存器的位(clk_ickcr)和外部时钟寄存器(clk_eckcr)。

如果时钟开关不因任何原因的工作,软件可以通过清除swbsy 标志复位电流开关操作。

这将恢复clk_swr注册到其以前的内容(旧的系统时钟)。

注意:在清理swbsy标志具有复位时钟主开关的程序,应用程序必须等到后产生新的主时钟切换请求之前有一段至少两个时钟周期。

9.7周门控时钟(PCG)外周时钟门控(PCG)模式选择性地启用或禁用系统时钟(SYSCLK)连接到外围设备在运行或慢速模式的任何时间来优化功耗。

设备复位后,所有的外设时钟被禁用。

唯一的一点是在复位状态是默认启用pcken27因为它用于启动。

软件已被正确地写入关掉ROM Bootloader执行后的时钟。

您可以启用时钟的任何外围设置在clk_pckenrx周围门控时钟寄存器的相应pcken点。

●使周围,首先使在clk_pckenr相应的pcken点寄存器然后设置使点周围的外围控制寄存器。

●禁用适当的外围,先禁用在周边的适当位控制寄存器,然后停止相应的时钟。

注:蜂鸣器,RTC和液晶显示器是由不同的SYSCLK特定的时钟,使他们继续运行,即使时钟门控的外设寄存器是断言。

9.8时钟安全系统(CSS)9.8.1时钟安全系统对HSE时钟安全系统(CSS)监控HSE晶体时钟源故障时安全作为系统时钟。

STM8L_Flash&EEPROM

STM8L_Flash&EEPROM

June 2010Doc ID 15433 Rev 41/24PM0054Programming manualHow to program STM8L Flash program memory and data EEPROMIntroductionThis manual describes how to program Flash program memory and data EEPROM on STM8 microcontrollers. It applies to low density STM8L101x, medium density STM8L15x, and high density STM8L15x/16x devices. It is intended to provide information to the programming tool manufacturers and to the customers who want to implement programming by themselves on their production line.The in-circuit programming (ICP) method is used to update the content of Flash program memory and data EEPROM while the user software is not running. It uses the Single wire interface module (SWIM) to communicate between the programming tool and the device.In contrast to the ICP method, in-application programming (IAP) can use anycommunication interface supported by the microcontroller (I/Os, SPI, USART , I 2C, USB, CAN...). IAP has been implemented for users who want their application software to update itself by re-programming the Flash program memory during program execution. The main advantage of IAP is its ability to re-program Flash program memory and data EEPROM when the chip has already been soldered on the application board and while the user software is running. Nevertheless, part of the Flash program memory has to be previously programmed using ICP .Some devices also contains a bootloader embedded in a ROM memory. Through this firmware the device memory can be re-programmed using a standard communication interface. This programming method is not described in this document.For details on memory implementation and features, registers or stack top addresses, refer to the product datasheets.Related documents●STM8 SWIM communication protocol and debug module (UM0470)●STM8 bootloader user manual (UM0560)●Low density STM8L101x microcontroller family reference manual (RM0013) ●Medium density and high density STM8L15x/16x microcontroller family reference manual (RM0031) ●Basic in-application programming example using the STM8 I 2C and SPI peripherals (AN2737) ●Low density STM8L101x datasheet ●Medium density STM8L15x datasheet●High density STM8L15x databrief●High density STM8L16x databriefContents RM0031Contents1Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.1Low density STM8L101x microcontrollers . . . . . . . . . . . . . . . . . . . . . . . . . 62.2Medium density STM8L15x microcontrollers . . . . . . . . . . . . . . . . . . . . . . . 72.3High density STM8L15x/16x microcontrollers . . . . . . . . . . . . . . . . . . . . . . 83Memory protection strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.1Readout protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.2Proprietary code area protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.3User Boot Code area protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123.4Unwanted memory access protection . . . . . . . . . . . . . . . . . . . . . . . . . . . 124Programming STM8 Flash microcontrollers . . . . . . . . . . . . . . . . . . . . . 134.1Unlocking the Memory Access Security System (MASS) . . . . . . . . . . . . 134.2Block programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.3Word programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164.4Byte programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.5Programming the option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184.5.1Summary of memory dedicated option bytes . . . . . . . . . . . . . . . . . . . . 184.5.2How to program the option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184.6Memory access versus programming method . . . . . . . . . . . . . . . . . . . . . 194.6.1ICP methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.6.2IAP method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5Flash program memory and data EEPROM comparison . . . . . . . . . . . 22 6Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232/24 Doc ID 15226 Rev 4RM0031List of tables List of tablesTable 1.Low density STM8L101x memory partition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2.Medium density STM8L15x memory partition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3.High density STM8L15x/16x memory partition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4.PCODE size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 5.Minimum size of the UBC area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 6.MASS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 7.Memory access versus programming method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table parison between STM8L devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 9.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Doc ID 15226 Rev 43/24Glossary RM0031 1 GlossaryThis section gives a brief definition of acronyms and terms used in this document:●BlockA block is a set of bytes that can be programmed or erased in one single programmingoperation. Operations that are available on a block are fast programming, erase only,and standard programming (which includes an erase operation). Refer to Section2:Memory organization for details on block size according to the device.●BootloaderThe bootloader is an IAP application embedded in the system memory of the device. Itis used to erase and program the device using a standard serial communication port.The bootloader is not available on small devices, and is not described in the presentdocument.Refer to STM8 bootloader user manual (UM0500) for more details.●DriverA driver is a control program defined by the application developer. It is used to managethe allocation of system resources to start application programs. In this document twodrivers are described, ICP and IAP drivers.●In-application programming (IAP)IAP is the ability to re-program the Flash program memory and data EEPROM (DAT A)of a microcontroller while the device is already plugged-in to the application and theapplication is running.●In-circuit programming (ICP)ICP is the ability to program the Flash program memory and data EEPROM of amicrocontroller using the SWIM protocol while the device is plugged-in to theapplication.●In-circuit debugging (ICD)ICD is the ability to debug the user software using the SWIM protocol. The user has theability to connect the device to a debugger and insert breakpoints in his firmware.Debugging may be intrusive (application patched to allow debugging) or non intrusive(using a debug module).●Memory access security system (MASS) keysThe Memory access security system (MASS) consists of a memory write protectionlock designed to prevent unwanted memory modifications due to EMS or programcounter loss. To unlock the memory protection, one or more keys must be written in adedicated register and in a specific order. When the operation (write or erase) iscompleted, the MASS must be activated again to provide good memory security.●PageA page is a set of blocks. The number of blocks in a page may differ from one device toanother. Refer to Section2: Memory organization for details on page size according tothe device.Dedicated option bytes can be used to configure by increments of one page the size ofthe user boot code, the proprietary code, and the data EEPROM. Refer to Section5: 4/24 Doc ID 15226 Rev 4RM0031Glossary Flash program memory and data EEPROM comparison for a description of availableareas and option bytes according to the devices.●Proprietary code area (PCODE)The proprietary code area (PCODE) can be used to protect proprietary softwarelibraries used to drive peripherals. Refer to Section3.2: Proprietary code areaprotection for details.●Read-while-write (RWW)The RWW feature provides the ability for the software to perform write operation ondata EEPROM while reading and executing the program memory. Execution time istherefore optimized. The opposite operation is not allowed: the software cannot readdata memory while writing program memory.The RWW feature is not available on all STM8 devices. Refer to Table8 for informationon devices with RWW capability.●Single wire interface module (SWIM)The SWIM is a communication protocol managed by hardware in the STM8microcontrollers. The SWIM main purpose is to provide non intrusive debug capability.It can also be used to download programs into RAM and execute them. It can also write(registers or RAM) or read any part of the memory space and jump to any memoryaddress. The SWIM protocol is used for ICP. It is accessed by providing a specificsequence on the SWIM pin either during the reset phase or when the device is running(if allowed by the application).●System memoryThe STM8 system memory is a small ROM accessible when the user software isexecuted. It contains the bootloader. The system ROM and the bootloader are notavailable on all STM8 devices.●User boot code area (UBC)The user boot code area is a write-protected area which contains reset vector, interruptvectors, and IAP routine for the device to be able to recover from interrupted orerroneous IAP programming.●User modeThe user mode is the standard user software running mode in the STM8. It is enteredeither by performing a power-on-reset on the device or by issuing the SWIM SRSTcommand from a development tool.●WordA word is a set of 4 bytes and corresponds to the memory granularity.Doc ID 15226 Rev 45/24Memory organization RM00316/24 Doc ID 15226 Rev 42 Memory organizationThis section describes the memory organization corresponding to low density STM8L101x,medium density STM8L15x and high density STM8L15x/16x microcontrollers.Low density STM8L101x microcontrollers feature up to 8Kbytes of Flash program memoryincluding up to 2Kbytes of data EEPROM.Medium density STM8L15x microcontrollers feature from 16 to 32Kbytes of Flash memory,plus up to 1Kbytes of data EEPROM, while the high density STM8L15x/16x feature64Kbytes of Flash memory and up to 2Kbytes of data EEPROM.The memory organization differs from one STM8 family to another. Refer to Section 2.1,Section 2.2 and Section 2.3, for a description of the memory organization according tomicrocontroller family and memory density.A memory accelerator takes advantage of the parallel 4-byte storage, which corresponds toa word. The Flash program memory and data EEPROM can be erased and programmed atbyte level, word level or block level. In word programming mode, 4 bytes can beprogrammed/erased during the same cycle, while in block programming mode, a wholeblock is programmed/erase during the same cycle. Refer to Section 2.1, Section 2.2 andSection 2.3, for information on block size according to the devices.2.1 Low density STM8L101x microcontrollersThe low density STM8L101x memory features:●Up to 8Kbytes of Flash program memory including up to 2Kbytes of data EEPROM. The whole memory array is divided into 128 pages of one block (64 bytes) each.The Flash program memory is divided into 3 areas:–The user boot code area (UBC)–A configurable data EEPROM area (DATA)–The main program areaThe DATA and main program areas can be write protected independently by using thememory access security mechanism (MASS).The size of UBC, and DATA areas can be configured through option bytes.●One block (64bytes) of option bytes of which 5 bytes are already used to configure device hardware features. The option bytes can be programmed only in ICP/SWIMmode.Refer to T able 1: Low density STM8L101x memory partition for a detailed description of lowdensity STM8L101x memory partition.RM0031Memory organizationDoc ID 15226 Rev 47/242.2 Medium density STM8L15x microcontrollersThe medium density STM8L15x memory features:●From 16 to 32 Kbytes of embedded Flash program divided into 256 pages of one block (128 bytes) each. The memory array is organized in 32-bit words (4bytes). It includestwo areas:The Flash program memory is divided into 2 areas:–The user boot code area (UBC)–The main program areaThe size of the UBC area can be configured through option bytes.●Up to 1Kbytes of data EEPROM located in a distinct array from Flash program memory ●Up to 128 option bytes (one block) of which 5 bytes are already used to configure device hardware features. The option bytes can be programmed in user, IAP andICP/SWIM modes except for ROP and UBC option bytes (refer to Section 4.5.2).Refer to T able 2 for a detailed description of the memory partition for medium densitySTM8L15x microcontrollers.Table 1.Low density STM8L101x memory partition (1)AreaPage/block number (1 page = 1 block)Address Option Byte 00x004800-0x00483F Flash program memory UBC and main program memory 00x008000-0x00803F 10x008040-0x00807F 20x008080-0x0080BF 30x0080C0-0x0080FF……95…Configurable data EEPROM (2)960x009800-0x00987F-…0x009F80-0x009FBFUp to 1270x009FC0-0x009FFF 1.The memory mapping is given for the devices featuring 8Kbytes of Flash program memory including up to 2Kbytes of data EEPROM.2.The size of the data EEPROM area is configurable from 0 to 32 pages starting from the last page of the Flash program memory down to page 96.Memory organization RM00318/24 Doc ID 15226 Rev 42.3 High density STM8L15x/16x microcontrollersThe high density STM8L15x/16x memory features:●64Kbytes of embedded Flash program divided into 256 pages of two blocks (2x128 bytes) each. The memory array is organized in 32-bit words (4 bytes). It includes threeareas:The Flash program memory is divided into 3 areas:–The proprietary code area (PCODE)–The user boot code area (UBC)–The main program areaThe size of PCODE and UBC areas can be configured through option bytes.●Up to 2Kbytes of data EEPROM located in a distinct array from Flash program memory ●Up to 128 option bytes (one block) of which 5 bytes are already used to configure device hardware features. The option bytes can be programmed in user, IAP andICP/SWIM modes except for ROP , UBC and PCODESIZE option bytes (refer toSection 4.5.2).Refer to T able 3 for a detailed description of the memory partition for high densitySTM8L15x/16x microcontrollers.Table 2.Medium density STM8L15x memory partition (1)Area Page number (1 page=1 block)Address Data EEPROM 00x001000-0x00107F 10x001080-0x0010FF20x001100-0x00117F..0x001180-0x0011FF70x001380-0x0013FF Option bytes 0 0x004800-0x00487FFlash program memory Main program memory UBC 00x008000-0x00807F 10x008080-0x0080FF 20x008100-0x00817F30x008180-0x0081FF40x00 8200-0x00 827F50x00 8280-0x00 82FF......2550x00FF80-0x00FFFF 1.The memory mapping is given for the devices featuring 32Kbytes of Flash program memory and 1Kbytes of data EEPROM.RM0031Memory organization Doc ID 15226 Rev 49/24Table 3.High density STM8L15x/16x memory partitionArea Page number (1 page = 2 blocks)Address Data EEPROM 00x001000-0x0010FF 10x001100-0x0011FF 20x001200-0x0012FF .....70x001700-0x0017FF Option bytes 00x004800-0x00487F Flashprogrammemory Main program memory PCODE, UBC 00x008000-0x0080FF 10x008100-0x0081FF 20x008200-0x0082FF 30x008300-0x0083FF 40x00 8400-0x00 84FF ......2550x017F00-0x017FFFMemory protection strategy RM003110/24 Doc ID 15226 Rev 43 Memory protection strategyThe STM8 devices feature several mechanisms allowing to protect the content of the Flashprogram and data EEPROM areas:●Readout protectionThe software can prevent application code and data stored in the Flash programmemory and data EEPROM from being read and modified in ICP/SWIM mode. Thereadout protection is enabled and disabled by programming an option byte inICP/SWIM mode. Refer to Section 3.1 for details.●Proprietary code area (PCODE)To protect proprietary peripheral software driver libraries, some STM8 devices featuresa permanently readout protected area, the proprietary code area (PCODE). This areais part of the Flash program memory. Its content cannot be modified and can only beread/executed in user privileged mode.The size of the PCODE area can be configured in ICP/SWIM mode through an optionbyte by increments of one page.The PCODE area is not available on all devices. Refer to T able 8: Comparison betweenSTM8L devices for the devices featuring PCODE area, and to Section 3.2 for details onPCODE area.●User boot code area (UBC)In order to guaranty the capability to recover from an interrupted or erroneous IAPprogramming, all STM8 devices provide a write-protected area called user boot code(UBC). This area is a part of the Flash program memory which cannot be modified inuser mode (that is protected against modification by the user software). The content ofthe UBC area can be modified only in ICP/SWIM mode after clearing the UBC optionbyte.The size of the user boot code area can be configured through an option byte byincrements of one page.Refer to Section 3.3 for details on user boot code area.●Unwanted memory access protectionAll STM8 devices offer unwanted memory access protection, which purpose is toprevent unintentional modification of program memory and data EEPROM (for exampledue to a firmware bug or EMC disturbance).This protection consists of authorizing write access to the memory only through aspecific software sequence which is unlikely to happen randomly or by mistake. Accessto Flash program and data EEPROM areas is enabled by writing MASS keys into keyregisters.Refer to Section 3.4 for details on unwanted memory access protection.3.1 Readout protectionOn low density STM8L101x microcontrollers, the readout protection is enabled by writing0xAA in the ROP option byte. It is disabled by reprogramming the ROP option byte with anyvalue except for 0xAA and resetting the device.Doc ID 15226 Rev 411/24On medium density STM8L15x and high density STM8L15x/16x microcontrollers, thereadout protection is set by writing any value except for 0xAA in the ROP option byte. It isdisabled by reprogramming the ROP option byte with 0xAA, and resetting the device.Enabling and disabling readout protection is possible only in ICP/SWIM mode.When the readout protection is selected, reading or modifying the Flash program memory inICP mode (using the SWIM interface) is forbidden. When available, the data EEPROMmemory is also protected against read and write access through ICP .Erasing the ROP option byte to disable the readout protection causes the Flash programmemory, the DATA area and the option bytes to be erased.Even though no protection can be considered as totally unbreakable, the readout protectionfeature provides a very high level of protection for general purpose microcontrollers. Ofcourse, a software that allows the user to dump the Flash program memory content makethis readout protection useless. Table 7 describes possible accesses to each memory areasversus the different modes and readout protection settings.3.2 Proprietary code area protectionThe memory pages containing peripherals software libraries must be located in theproprietary code area (PCODE).The size of the PCODE area can be configured through the PCODE option byte(PCODESIZE) in ICP/SWIM mode. Refer to Table 4 for details on PCODE minimum andmaximum size. Once programmed, the PCODE option byte cannot be erased, the size ofthe PCODE area remains fixed and its content protected from read and write operationswhatever the mode.Except for the interrupt vectors which can be read directly, the PCODE area can be readonly through TRAP or TLI interrupt in ICP/SWIM (with readout protection disabled), userand IAP mode.When the PCODE option byte is set, the PCODE area and both TLI and TRAP vectors arewrite protected to prevent a malicious user/program from inserting a “dump” routine insidethe protected code.When accessing the PCODE area, no other program can be executed (all interrupt anddebug access are disabled). The programmer must consequently ensure that the protectedcode embedded in the PCODE area gives back control to the main/end user software atreasonable periods of time.Table 4.PCODE sizeSTM8 microcontroller family Minimum sizeMaximum size High density STM8L15x/16x1 page (256 bytes)255 pages (last page always left free for mainprogram)3.3 User Boot Code area protectionWhatever the memory content, it is always possible to restart an ICP session after a criticalerror by applying a reset and restarting the SWIM communication.On the contrary, during IAP sessions, the programming software driver must always be writeprotected to be able to recover from any critical failure that might happen duringprogramming (such as power failure).The pages where the IAP driver is implemented must be located in the write-protected bootcode area (UBC). The application reset and interrupt vectors and the reset routine must alsobe stored in the UBC. These conditions allow the user software to manage the recoveryfrom potential critical failure by applying a reset and restarting the IAP routine from theprotected boot area.The UBC size is defined by the user boot code (UBC) area option byte. This option byte mayslightly differ from one product to another. See Table5 for the minimum size of the UBCarea. The UBC maximum size is equal to 255 pages on medium density and high densitySTM8L15x/16x devices (last page always left free for main program), and to the full memorysize on low density STM8L101x.Table 5.Minimum size of the UBC areaSTM8 microcontroller family Minimum size of the UBC areaLow density STM8L101x 3 pages = 192 bytesMedium density STM8L15x 2 pages = 256 bytesHigh density STM8L15x/16x 1 page = 256 bytes3.4 Unwanted memory access protectionThe unwanted memory access protection consists of writing two 8-bit keys in the right orderinto dedicated MASS key registers.Writing the correct sequence of keys in the program memory MASS key register(FLASH_PUKR) enables the programming of the program memory area excluding the UBCand the PCODE area (when available). If wrong keys are provided, a reset must to begenerated to be able to reprogram the right keys.Once the write memory protection has been removed, it is possible to reactivate theprotection of the area by resetting the PUL bit in FLASH_IAPSR.To enable write access to the data EEPROM area,another specific MASS key register(FLASH_DUKR) and a different key sequence must be used. Once the dataEEPROM/option byte area is unlocked, it is possible to reactivate the protection of the areaby resetting the DUL bit in FLASH_IAPSR.If wrong keys have been provided to the FLASH_PUKR register, the device must be resetbefore performing a new key program sequence. However, when wrong keys are provided tothe FLASH_DUKR register, new keys can be entered without the device being previouslyreset.On low density STM8L devices, the size of the DATA area can be configured through theDATASIZE option byte for a given product.12/24 Doc ID 15226 Rev 4Doc ID 15226 Rev 413/24In order to be as effective as possible, the application software must lock again theunwanted memory access protection as soon as the programming is completed. Otherwise,the protection level of the MASS is significantly reduced. To activate the MASS protectionagain, the user must reset the corresponding bits in the FLASH_IAPSR register (DUL bit fordata EEPROM or PUL bit for Flash program memory).Note:1The mechanism to lock and unlock unwanted memory access protection is identical for option bytes and data EEPROM (see Table 6: MASS ).2Before starting programming program memory or data EEPROM, the software must verifythat the area is not write protected by checking that the PUL or DUL bit is effectively set.4 Programming STM8 Flash microcontrollersThis section describes how to program STM8 single-voltage Flash microcontrollers.4.1 Unlocking the Memory Access Security System (MASS)The memory must be unlocked before attempting to perform any erase or write operation.To unlock it, follow the procedure described in Section 3.4: Unwanted memory accessprotection , and Table 6.The software must poll the PUL and DUL bit, before attempting to write to program memoryand data EEPROM, respectively.Table 6.MASSMicrocontroller family Data EEPROM and option bytesProgram memory UnlockLock Unlock Lock STM8LWrite 0xAE then56h inFLASH_DUKR(0x00 5053)(1)(2)1.In the low density STM8L101x devices the option bytes are not accessible in user/IAP mode.2.The OPT bit of the FLASH_CR2 register must be set/cleared to enable access to the option bytes.Reset bit 3 (DUL) in FLASH_IAPSR (0x00 5054)Write 0x56 then 0xAE in FLASH_PUKR(0x00 5052)(3)3.If wrong keys have been entered, a reset must to be generated to be able to reprogram the right keys.Reset bit 1 (PUL) in FLASH_IAPSR (0x00 5054)4.2 BlockprogrammingBlock write operations allow to program an entire block in one shot, thus minimizing theprogramming time.There are three possible block programming modes: erase, write only (also called fastprogramming) and combined erase/write cycle (also called standard block programming).The programming mode is selected through FLASH_CR2 register.The memory must be unlocked before performing any of these operations.Block program operations can be performed both to main program memory and DATA area:.●Programming a block of main program memory:The block program operation has to be executed totally from RAM.The program execution continues from RAM. If the program goes back to main programmemory, it is stalled until the block program operation is complete. On medium densitySTM8L15x and high density STM8L15x/16x, the DMA controller can be programmed toperform a block transfer to Flash program memory, and put the CPU in Wait mode.●Programming a block of data EEPROM with RWW capability:The block program operation can be executed from main program memory. Howeverthe data loading phase has to be executed from RAM (see below).Normal program execution can continue from main program memory. The HVOFF bit ofthe FLASH_IAPSR register can be polled to check if the memory is ready for RWW.●Programming a block of data EEPROM without RWW capability:The block program operation must be executed totally from RAM.The programming can also be performed directly through the SWIM interface. In this case, itis recommended to stall the device in order to prevent the core from accessing the Flashprogram memory during the block program or erase operation. This can be done by settingthe STALL bit in the DM_CSR2 debug module register. Refer to the STM8 SWIMcommunication protocol and debug module (UM0470) for more information.Caution:During a block program or erase operation, it is recommended to avoid executing instructions performing a read access to program memory.Caution:If the number of written memory locations is higher than what is required in the block program/erase sequence, the additional locations are handled as redundant byte writeoperations.If the number of written memory locations is lower than what is specified in the blockprogram/erase sequence, the block program/erase process does not start and the CPUstalls waiting for the remaining operations to be performed.Caution:EOP and WR_PG_DIS bits of FLASH_IAPSR register are automatically cleared when a program/erase operation starts.Caution:If a block program or erase sequence is interrupted by a reset, the data programmed in the memory may be corrupted.14/24 Doc ID 15226 Rev 4。

STM8L看门狗手册

STM8L看门狗手册

独立看门狗
简介
独立看门狗是当发生硬件或者软件错误时恢复系统。

这一外设被38KHz时钟驱动,因此主时钟停止后,它仍然工作。

独立看门狗功能描述
将0xCC写入IWDG_KR寄存器将启动看门狗功能,从复位后0xFF开始计数递减。

若减至0x00时,系统将复位。

一旦使能看门狗,看门狗可以通过IWDG_PR和IWDG_RLR寄存器来设置。

IWDG_PR用来对计数时钟选择预分频。

每当KEY_REFRESH的数值(0xAA)写入到IWDG_KR寄存器时,独立看门狗将用IWDG_RLR的数值刷新计数器的内容,从而避免了产生看门狗的复位。

IWDG_PR和IWDG_RLR寄存器具有写保护功能,要修改它们前,需首先在IWDG_KR寄存器写入KEY_ACCESS代码(0x55);在IWDG_KR写入0xAA将恢复写保护状态。

硬件看门狗功能
如果在IWDG_HW选择字节中使能了硬件看门狗的功能,在芯片上电时看门狗的功能被自动开启,如果软件不能及时操作键寄存器,则在计数器达到0x00时产生复位。

关于选择字节的内容请参考数据手册中的说明。

超时周期
超时周期由计数器数值和时钟预分频器决定,下表列出了它们的数值。

在停机模式或者活跃停机模式中使用独立看门狗
通过设置IWDG_HALT寄存器,在停机或活跃停机模式中独立看门狗可以正常工作。

它可以唤醒该器件。

注:为了使用这一功能,避免看门狗错误复位,在执行HALT指令之前,独立看门狗溢出时间和重装看门狗必须设置正确。

STM8L微控制器中文参考手册要点

STM8L微控制器中文参考手册要点

本参考手册的目标应用程序开发人员。

它提供了完整的信息如何使用stm8l05xx,stm8l15xx和stm8l16xx 微控制器的存储器和外围设备。

该stm8l05xx / stm8l15xx / stm8l16xx是一个家庭的不同存储密度的微控制器和外围设备。

这些产品是专为超低功耗应用。

可用的外设的完整列表,请参阅产品数据表。

订购信息,引脚说明,机械和电气设备的特点,请参阅产品数据表。

关于STM8 SWIM通信协议信息和调试模块,请参阅用户手册(um0470)。

在STM8的核心信息,请参阅STM8的CPU编程手册(pm0044)。

关于编程,擦除和保护的内部快闪记忆体,请参阅STM8L闪存编程手册(pm0054)。

1 中央处理单元(CPU)。

30。

1.1 引言301.2 CPU的寄存器。

30。

1.2.1 描述CPU寄存器。

..。

301.2.2 STM8 CPU寄存器图。

..。

341.3 全球配置寄存器(cfg_gcr)。

34。

1.3.1 激活水平。

..。

341.3.2 游泳禁用。

..。

351.3.3 描述全局配置寄存器(cfg_gcr)。

..。

35 1.3.4 全局配置寄存器图及复位值。

..。

352 启动ROM . . . 363程序存储器和数据存储器。

37。

3.1引言373.2术语。

37。

3.3个主要的快闪存储器的特点。

38。

3.4记忆的组织。

39。

3.4.1低密度设备的存储器组织。

393.4.2介质密度的装置记忆的组织。

..。

40 3.4.3介质+密度装置记忆的组织。

..。

41 3.4.4高密度存储器组织。

..。

423.4.5专有代码区(译)。

433.4.6用户区(UBC)。

433.4.7数据的EEPROM(数据)。

..。

463.4.8主程序区。

463.4.9选项字节。

..。

463.5内存保护。

47。

3.5.1读出保护。

473.5.2内存访问安全系统(质量)。

473.5.3使写访问选项字节。

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3.17 I²C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
This is information on a product in full production.
DocID15275 Rev 13
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STM8L101xxContenຫໍສະໝຸດ sContents1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
• Clock management – Internal 16 MHz RC with fast wakeup time (typ. 4 µs) – Internal low consumption 38 kHz RC driving both the IWDG and the AWU
• Reset and supply management – Ultralow power POR/PDR – Three low power modes: Wait, Active-halt, Halt
3.11 General purpose and basic timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.12 Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.13 Infrared (IR) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.14 Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Features
• Main microcontroller features – Supply voltage range 1.65 V to 3.6 V – Low power consumption (Halt: 0.3 µA, Active-halt: 0.8 µA, Dynamic Run: 150 µA/MHz) – STM8 Core with up to 16 CISC MIPS throughput – Temp. range: -40 to 85 °C and 125 °C
3.7 Voltage regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.8 Clock control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
UFQFPN32
LQFP32
UFQFPN28
UFQFPN20
TSSOP20
• Peripherals – Two 16-bit general purpose timers (TIM2 and TIM3) with up and down counter and 2 channels (used as IC, OC, PWM) – One 8-bit timer (TIM4) with 7-bit prescaler – Infrared remote control (IR) – Independent watchdog – Auto-wakeup unit – Beeper timer with 1, 2 or 4 kHz frequencies – SPI synchronous serial interface – Fast I2C Multimaster/slave 400 kHz – USART with fractional baud rate generator – 2 comparators with 4 inputs each
3.5 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6 Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.15 USART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.16 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
• Interrupt management – Nested interrupt controller with software priority control – Up to 29 external interrupt sources
• I/Os – Up to 30 I/Os, all mappable on external interrupt vectors – I/Os with prog. input pull-ups, high sink/source capability and one LED driver infrared output
2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
Product overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.9 Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.10 Auto-wakeup counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
• Memories – Up to 8 Kbytes of Flash program including up to 2 Kbytes of data EEPROM – Error correction code (ECC) – Flexible write and read protection modes – In-application and in-circuit programming – Data EEPROM capability – 1.5 Kbytes of static RAM
3.1 Central processing unit STM8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.2 Development tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
STM8L101xx
8-bit ultralow power microcontroller with up to 8 Kbytes Flash, multifunction timers, comparators, USART, SPI, I2C
Datasheet - production data
5
Memory and register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6
Interrupt vector mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
• Development support – Hardware single wire interface module (SWIM) for fast on-chip programming and non intrusive debugging – In-circuit emulation (ICE)
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