LCDdrive驱动原理资料讲解

0 -B
< E x a m p le 1 > M 4 1 7 :(D u ty = 1 /9 6 ,B = 1 /3 ,t= 1 0 0 u s ) s o ( LF Cr aDm - e7 0 0 0m) u s t s e5 t2 H z .
< E x a m p le 2 > M 4 2 9 :(D u ty = 1 /1 2 0 ,B = 1 /7 ,t= 1 6 0 u s ) s o F r a m e ( L C D - 7 0 0 20 6) Hm zu. s t s e t
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
2020/10/10
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LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
APT驅動法
F
<1>C O M
-F
1
N -1
D - (F + D )
- (F - D )
0 -D
0 -D
< 6 > D e fin itioຫໍສະໝຸດ Baidun o f p a r a m
V op=F+ D B ia s = D /V o p N = a m o u n t o f C O M lin e s D u ty = 1 /N V o n = { [ ( F + 2D +) ( N - 1 )2D ] / N 1} / 2 V o f f = { [ ( F - 2D +) ( N - 1 )2D ] / N }1 / 2
T h ew a v e f o (r Lm C D - 7 0 0 0 ) C o u l d b e t h e s i m u l a t e d
t o. M L A
m o d u le 's
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V 3+ V 1
V c=0
V 2=2V 1 V1
V c=0 M V 1=-V 1
M V 2=-V 2=-2V 1
V 2=2V 1 V1
V c=0 M V 1=-V 1
M V 2=-V 2=-2V 1
<4>SEL EC T
V1
-V 1 - (V 3 - V 1 )
0 - (V 3 + V 1 )
V 3-V 1
e te
5
APT Conclusion
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
low voltage segment driver : 2D (typical value:1~2V)
high voltage common driver : 2F (typical value:20~25V)
<5>N O N -SEL E C T
V1 0
< 6 > D e f in itio n o f p a r a
V o p (E )= V 3 - M V 3 (E p s o n )= 2 V 3 V o p (N )= V 3 + V 1 (N a n Y a ) B ia s ( E ) = V 1 '/ V o p ( E ) = V 1 / 2 V 3 B ia s ( N ) = V 1 / V o p ( N ) = V 1 / V 3 + V 1 N = a m o u n t o f C O M lin e s D u ty = 1 /N V o n = { [ 3 ( V 3 + 2V +1 () V 3 - V 2 1 +) ( N - 4 ) V 2 1 ] / N }1 / 2
V o f f = { [ 3 ( V 3 - 2V +1 () V 3 + V 21 +) ( N - 4 ) V2 1] / N }1 / 2
-V 1
m e te r
- (V 3 +
V 1)
- (V 3 - V 1 )
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LCD-7000波形設定
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
2020/10/10
6
IAPT驅動法
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
<1>C O M
F+ D F
D 0
F+ D
<2>SEG -O N
0 F-D <3>SEG -O FF
2D
F+ D
<4>SELEC T
F-D <5>N O N -SEL EC T
LCD驅動原理介紹
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課程大綱
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
•STN驅動原理 •TN/STN V-T curve •APT驅動法(Alt Pleshko Technique)
*APT Conclusion
0 -B
M LA
V op
SELECT
1 1-2B
31
N -4
t 1
M LA
V op
1-2B
N ON SELECT
13 t
N -4
B 0
-B
- (1 - 2 B ) -1
B
- (1 - 2 B ) -1
V o p( L C D - 7 0 0 =0 )V 3 + V 1 B ia s = V 1 /V 3 + V 1 N = a m o u n t o f C O M lin e s D u ty = 1 /N t = 1 / F r a m( LeC D - 7 0 0 20 )N = 1 /1 4 0 N (F ra m e = 7 0 H z )
L C D - 7 0 0 0 W A V E E D IT O R
1
I A P T / A P TV o p
B
SELECT
0 -B
1
N -1
t
IA P T /A P T
1-2B
N ON SELECT
-1
B - (1 - 2 B )
V o p( L C D - 7 0 0 =0 )F + D B ia s = D /F + D N = a m o u n t o f C O M lin e s D u ty = 1 /N t = 1 / F r a m( LeC D - 7 0 0 20 )N = 1 /1 4 0 N (F ra m e = 7 0 H z )
• Steepness: (V90/V10-1)x100% =(SR-1) x100%
• Selection Ratio: SRopt=√(√N+1)/(√N-1)
<ON>= √{(F+D)2+(N-1)D2}/N
<OFF>= √{(F-D)2+(N-1)D2}/N SR= <ON>/<OFF>
F/Dopt= √N
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APT/IAPT LCD規格
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
• Operating voltage Vop: Vlcd=F+D=(1+√N)D
• Bias Ratio: B=D/ Vlcd =1/(1+ √N)
1
N -1
D - (F + D )
- (F - D )
0 -D
0 -D
< 6 > D e fin itio n o f p a r a m e t
V op=F+ D B ia s = D /V o p N = a m o u n t o f C O M lin e s D u ty = 1 /N V o n = { [ ( F + 2D +) ( N - 1 )2D ] / N }1 / 2 V o n = { [ ( F - 2D +) ( N - 1 )2D ] / N 1} / 2
If we offset +D for positive polarity and offset +F for negative polaritythen APT IAPT
voltage range of segment driver : F+D
voltage range of common driver : F+D
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Bias CKT架構
Vlcd R1
R2
F+D(C/S) F(C ) F-D(S )
R3 2D(S )
R4 D(C )
R5 GND
0(C/S)
R1=R2=R4=R5=R
R3=(F/D-3)R
1/B=(F+D)/D=(R3/R)+4
2020/10/10
LCD設計處製程組 LCD Design Dept. Process Control Sec. Ext:2897-2898
•IAPT驅動法(Improved Alt Pleshko
Technique)
*APT/IAPT LCD規格 *Bias CKT架構
•MLA驅動法(Multi-line addressing) •LCD-7000波形設定 •Crosstalk •M signal
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STN驅動原理
9
MLA驅動法
LCD設計處製程組
LCD Design Dept. Process Control Sec. Ext:2897-2898
V3
<1>C O M
t
M 4 1 7 ,t= 1 0 0 u s
1
M 4 2 9 ,T = 1 6 0 u s
<2>SEG -O N <3>SEG -O F F
M V 3=-V 3 N
D
<2>SEG -O N
-D
LCD設計處製程組 LCD Design Dept. Process Control Sec. Ext:2897-2898
V m =0
V m =0
D <3>SEG -O FF
-D
V m =0
<4>SELEC T
F+ D
F-D <5>N O N -SELEC T
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