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igbt米勒效应

igbt米勒效应
igbt米勒效应是一种与传统晶体管不同的微电子元件。

它主要由三大部分组成：发射极导通晶体管（TRA）、输出晶体管（GTO）和拓扑晶体管（TOP）。

它的工作原理是，当TRA在一个特定的高压状态下，它会从输出晶体管中释放出微小的电流以帮助偏置拓扑晶体管。

当拓扑晶体管的偏置电流获得足够的强度时，它就会切换到稳态，产生有效的可控高压脉冲。

igbt米勒效应的最大优势就在于它可以在短时间内提供大量的功率。

在高功率，高频率的场合下，它可以比传统的晶体管提供更多的功率。

这样一来，它可以应用于激光焊接、电动汽车等高功耗设备上，提供更加高效和准确的操作。

此外，igbt米勒效应还可用于可控器件（如脉冲电源）的制造，使更多的脉冲输出可能。

它的脉宽可调整，可以根据应用的需要进行调整，从而实现有效的可控制。

再者，igbt米勒效应的功耗更低，比传统晶体管耗电量降低了40%以上。

除此之外，它也比晶体管具有更高的抗干扰能力。

因此，它能够有效抑制各种外界干扰，保证电路的稳定性。

最后，igbt米勒效应的输出电压可在0-1000V之间进行调整，可以满足多种应用的要求。

它的工作温度可以从-40到125度之间调整，处于模拟和数字两种电路的需求。

总之，igbt米勒效应是一种非常成熟的微电子元件，具备多种优势，能够满足多种不同的应用要求。

它不仅可以提供高效率和高可
靠性，而且还可以抗各种外界干扰，保证电路的稳定可靠性。

因此，igbt米勒效应在微电子元件领域非常受欢迎，有望在未来成为微电子元件的主流应用。

latch-up闩锁效应

Latch up
• Latch up 的定义 • Latch up 的原理分析 • 产生 Latch up 的具体原因 • 防止 Latch up 的方法
Latch up 的定义
Latch up 最易产生在易受外部干扰的I/O电路处, 也偶尔发生在内部电路
Latch up 是指cmos晶片中, 在电源power VDD和地线 GND(VSS)之间由于寄生的PNP和NPN双极性BJT相互影响而产生的一低阻抗通路, 它的存在会使VDD和 GND之间产生大电流
BJT到低阻基体上的通路 • 使用Guard ring: P+ ring环绕nmos并接GND；N+ ring环绕pmos 并
接VDD，一方面可以降低Rwell和Rsub的阻值，另一方面可阻止栽子到达BJT的基极。如果可能，可再增加两圈ring。 • Substrate contact和well contact应尽量靠近source,以降低Rwell和 Rsub的阻值。 • 使nmos尽量靠近GND，pmos尽量靠近VDD,保持足够的距离在 pmos 和nmos之间以降低引发SCR的可能 • 除在I/O处需采取防Latch up的措施外，凡接I/O的内部mos 也应圈 guard ring。 • I/O处尽量不使用pmos(nwell)
• Emitter-Base齐纳管有100~300欧姆的内阻， NSD/P-epi和PSD/N-well齐纳管的内阻则更大，这些内阻大大提高了齐纳管的耐压性，同时也会使PAD 上出现高于理论值几十伏的电压，这种特点大大限制了齐纳箝位保护电路的应用。
PAD
D1
NMoat
Metal connecting to pad
Poly resistor

IGBT芯片技术发展概述

IGBT芯片技术发展概述摘要：回顾IGBT芯片技术的发展历程，从最开始发明，经过不断研究，目前已经广泛的应用在工业控制、电动汽车、轨道交通、智能电网、变频家电中。

本文着重介绍了IGBT芯片技术发展历程中，不同时期解决的技术难题，包括闩锁问题、IGBT关断拖尾、降低饱和压降等，以及未来的发展展望。

关键字：IGBT; RC-IGBT; CS-TBT; SJ-IGBT; SIC-IGBTOverview of IGBT chip technology developmentAbstract: Reviewing the development history of IGBT chip technology, after continuous research from the beginning, it has been widely used in industrial control, electric vehicles, rail transit, smart grid and frequency conversion equipment. This article focuses on the technical problems solved in different periods during the development of IGBT chip technology, including latch-up problems, IGBT turn-off tailing, reduction of saturation voltage drop, etc., as well as future development prospects.Keywords: IGBT; RC-IGBT; CS-TBT; SJ-IGBT; SIC-IGBT图1 IGBT Latch-Up示意图图2 Non-Latch-Up IGBT器件结构至此，IGBT进入快速发展的阶段，多家厂商成功量产出IGBT，并不断迭代升级。

IGBT器件分析(实用经验)

Abstract In recent years, the performances of IGBT have been dramatically improved and the application fields of IGBT have widely been expanding, especially in high power applications. It is reported that the trench gate IGBT"'3' has superior characteristics in power loss compared to the conventional planer gate IGBT. However, the trench gate could not be only solution for future device structure, because the performance of the planer gate IGBT has not yet reached its limit. There are some factors to be considered when determining the device technology for the future devices in practical applications. And there are some drawbacks of the trench gate IGBT as follows: 1)Excessive over current under a short circuit because of the higher transconductance. 2)More complex wafer process technologies and relatively low yields. 3)POOr gate oxide quality. In this paper, the possible design aspects of device geometry for hture high performance 600V IGBT are discussed. Introduction Figure 1 shows the cross section of the planer gate IGBT (a)-(c) and the trench gate IGBT (d). The trench gate structure makes it possible to introduce high cell density, which is impossible for the planer gate structure due to JFET effect. In addition, the higher the cell density is, the larger the current under a short circuit flows, It brings very poor short circuit capability, which can be fatal problem for inverter applications. Therefore, high density cell design, whch is one of the ;advantagesin trench gate structure, is not suitable for IGBT in a motor application and so on. On the other hand, the planer gate IGBT has advantages on gate oxide quality, fabrication cost, yield and so on. Therefore, there may be a room for studying the device structures for next generation IGBT. And there are three major candidates for the next Gen. IGBT structure to be considered, which are the planer gate PT-IGBT with fine pattern technology, NPT-IGBT and the trench gate PTIGBT for 600V class indicated in Fig.l'4'. It becomes important to investigate the performance limit of planer gate IGBT.

高速IGBT及IGBT抗闩锁性能优化

摘要摘要文章从技术发展角度总结了IGBT发明初期的发展历史，比较全面的介绍了动态控制IGBT阳极发射结的研究进展与现状，并列举了目前比较常见的能提高IGBT抗闩锁能力的设计方法。

采用MEDICI电路仿真功能模拟研究基于陈星弼教授的专利--一种高速IGBT[27]而设计的两种高速IGBT结构。

利用专利中给出的技术所设计的高速IGBT，在开关过程中依靠独特的终端设计结构，能在内部生成合适的阶跃信号（阶跃电平）并反馈给阳极控制端，以此达到动态控制阳极发射结的短路与开路，不需要低压电源。

结果显示，高速IGBT不但能完全消除拖尾电流，并且使IGBT关断时的下降时间由18μs，变为0.8μs。

电流大小相同时，高速IGBT导通压降为1.40V 比普通IGBT的1.35V略有提升。

研究了一种新的IGBT发射极元胞并给出其设计方法。

该元胞在不影响单位面积有效沟道宽度的情况下，将P+与N+并排垂直于沟道一侧放置以缩短空穴路径。

与传统采用深P+注入的抗闩锁方法相比，经过优化设计后的新结构闩锁电流增大了约8倍；V ce=1.5V时，新元胞的电流密度比以前增加了3倍；元胞静态阻断电压也有20%的增加，从而扩展了IGBT的安全工作区，而且工艺更简单。

关键词：绝缘栅双极型晶体管动态控制阳极双栅IGBT 闩锁IABSTRACTABSTRACTThe article summarizes the development history of the early invention of IGBT from the point of technical development, and introduces the progress and status of dynamic control of IGBT anode emitter more comprehensively, and lists the current common design methods which can improve the latch-up immunity of IGBT.The advanced circuit module in MEDICI is used to study the two kinds of structures of high-speed IGBT, both of which are designed based on the patent --a high speed IGBT [27] by Professor Xingbi Chen. The high-speed IGBT can achieve dynamic control of the anode, and the appropriate step control signal is generated by the unique structure of the voltage terminal can generate appropriate anode control signal, without the help of the low voltage supply. The simulation result shows that, the proposed high speed IGBT has elimited the current tail, and the turn-off time has been largely reduced, from original 18μs to 0.8μs. However, the on-state voltage drop of this high speed IGBT is 1.4V, which is little larger than the compared common structure with 1.35V forward voltage drop.A new kind of cell of IGBT emitter is studied and the design method is given. The cell places p+ and n+ side by side and perpendicular to one side of the channel in order to shorten the path of holes without affecting the effective channel width per unit area. Compared with traditional anti-latch method which uses deep injection of P+, the latch current of the new structure with optimized design is increased by about 8 times; when V ce is 1.5V, the current density of the new cell is 3 times bigger than before; and the static blocking voltage of the cell has also increased 20%, thus extending the safe operating area of IGBT and simplifying the technology at the same time.Keywords：IGBT Dynamic controlled anode-short DGIGBT Latch-upII目录摘要 (I)ABSTRACT ..................................................................................................................... I I 目录 .. (III)第一章绪论 (1)1.1功率器件发展简介 (1)1.2 IGBT产生背景及发展历史 (2)1.3 IGBT的总体发展趋势 (5)1.4国内外IGBT发展现状 (7)1.5本章小结 (9)第二章IGBT结构及工作机理 (10)2.1 IGBT端口命名的说明 (10)2.2 穿通型IGBT和非穿通型IGBT (11)2.3 IGBT工作模式 (15)2.3.1反向耐压特性 (15)2.3.2 正向阻断特性 (16)2.3.3 正向导通特性 (16)2.3.4 IGBT的开启与关断 (17)2.4 关于IGBT性能的优化 (19)2.4.1 导通压降与关断时间之间的折衷关系 (19)2.4.2 关于IGBT的抗闩锁能力 (23)2.5 第二章小结 (25)第三章高速IGBT的研究与设计 (26)3.1 MEDICI简介 (26)3.1.1 MEDICI所采用的半导体物理方程 (26)3.1.2 模型选择与比较 (27)3.2 动态阳极控制的IGBT研究背景 (29)3.3高速IGBT的研究与设计 (33)3.4 本章小结 (42)III第四章IGBT抗闩锁性能优化 (43)4.1 IGBT静态与动态闩锁机理分析 (43)4.2不同的抗闩锁结构简述 (44)4.3 新结构抗闩锁性能仿真分析 (49)4.4 本章小结 (57)第五章结论 (59)5.1论文工作总结 (59)5.2工作改进方向 (59)致谢 (61)参考文献 (63)攻读硕士期间取得的研究成果 (68)IV第一章绪论第一章绪论本章介绍功率半导体科学技术的作用与发展。

IGBT短路保护中的软关断技术分析

It is very common that an IGBT used for motor drive, UPS and some other industrial applications, be selected for 10 micro-second short-circuit withstand time (SCWT) if regular de-sat protection driver is used. But this driver generates high turn-off stress to the IGBT during inverter short circuit or the output becomes faulty. Under these abnor-mal conditions when the IGBT is turned-off abruptly, failures can occur if the IGBT is not selected properly. If the smart fault protection is not used, high turn-off loss will be generated and even short circuit current can ramp-up to a dangerous level destroying the IGBT. There are several ways to turn-off the IGBT once fault condition is detected. Some of these are as follows:Gate is discharged through high gate resistance. This discharge path is activated only during the above said abnormal conditions. This is not the best solution.Gate voltage is abruptly reduced to zero.Adding some source inductance which is common for both gate dis-charge path and load current.Gate de-bias occurs. But during normal condition switching loss is increased.Sense IGBT can also be used where fault current is sensed by pilot cell but the current sense accuracy of these pilot cells is not good which is further is affected by temperature.Gate voltage pattern analyzer for short-circuit protection in IGBT inverters [1]. These circuits are very sensitive to load changes and type of loads.Current sense resistor or Hall-effect devices are also used to detect fault through IGBT. But again these methods either generate power loss or are costly.But de-sat protection is the most commonly used for short-circuit and over current fault protection. De-sat detection truly provides the state of electrical over stress of IGBT under current fault condition when gate voltage is high. Reducing gate voltage in a controlled manner to just above gate threshold voltage is preferred and described in this article. This will reduce fault current and after some finite time gate voltage is brought down to zero safely, turning-off the IGBT without stress.Gate Drive CircuitThe main function of any gate driver circuit is to convert a control sig-nal to a power signal that can efficiently controls the IGBT or MOS-FET turn-on and turn-off. If the IGBT or MOSFET requires short cir-cuit protection, the gate drive circuit must safely turn-off the switch during a shorted or abnormal overload condition. A more detailed list of the gate drive circuit requirements for an IGBT or MOSFET are as follows:A controlled turn-on and turn-off of the IGBT so as to optimize the conduction and switching losses.In some applications, electrical isolation between control circuit and power circuit is very important.In the case of a short circuit condition, the IGBT should be protected and turned-off safely with minimum power dissipation and stress. The gate drive circuit should be able to minimize short circuit current and short-circuit withstand time without device failure. If both of these parameters are minimized, the power dissipation under short circuit will reduce and the system reliability will increase.During a short circuit condition, the IGBT collector to emitter voltage can rise fast. The voltage across the gate to emitter should not beIGBT Behavior under Short Circuit and Fault ProtectionUsing Two-Step-Soft-Turn-Off Gate DriverIn inverter driven UPS or motor applications, the IGBT can be destroyed when it is turned-on into a faulted motor or an output short circuit or an input bus voltage shoot through. Under these conditions current through the IGBT increases rapidly until it saturates. After fault detection, depending on the point at which the fast turn-off pulse is applied, very different levels of hole current can flow under the n+ source region, making this an important factor in the successful containment of the fault current. We present experimental observations showing that IGBT failure under short-circuit conditions is dependent on where and how the turn-off pulse is applied. A two-step (two-level) turn-off gate driver circuit is introduced which safely turns-off even a high transconductance IGBT during short-circuit and abnormal over current faults. This turn-off process startsduring faulted condition only.By Sampat Shekhawat and Bob Brockway, Fairchild SemiconductorIGBT驱动的软关断技术分析35allowed to rise due to gate to collector displacement current flowinginto the gate to emitter capacitance, Cge. Current flowing into Cge will cause Vge to rise and further increase the short circuit current.One should make sure that this condition is avoided.Preferably a totem pole output stage with separate turn-on and turn-off resistance option. The gate discharging switch of the totem pole should be as close as possible to IGBT and minimize the loop induc-tance between this switch and IGBT gate & emitter terminals. Minimize the propagation delay time between input and output pulses of the gate driver.De-SaturationThe de-saturation detection technique for identifying a short circuit and fault condition in an IGBT is well known. Generally, a de-satura-tion condition is said to exist if the voltage across the IGBT collector to emitter terminals rises above 5-8 volts while the gate to emitter voltage is high. This condition indicates that the current through the IGBT has exceeded the normal operating level. The gate drive circuit should be designed so that it reacts promptly to the short circuit and safely turns-off the IGBT within SCWT rating of the IGBT. However, in recent years, IGBTs have been designed with lower conduction and switching losses but this generally reduces SCWT. IGBT technology utilizes shallow junctions to decrease switching and conduction loss-es. However these new technologies have increased the transcon-ductance (gm) of the IGBT. Since the magnitude of the IGBT short circuit current is directly proportional to gm, during a short-circuit con-dition, a higher collector current results. The large collector current and high bus voltage place the IGBT in a state of high instantaneous power dissipation that can only be sustained for a few microseconds.The gate drive circuit must respond very quickly and efficiently to the fault current to protect the IGBT. Due to the two-step turn-off, the IGBT with even 4 microseconds short circuit withstand time can safe-ly be turned-off and protected. The IGBT, used in conjunction with the two-step turn-off gate drive, safely turns off low impedance over-cur-rent faults and shorted bus conditions where single-step gate drivers fail. The Industry standard (10 µs) SCWT is no longer required when the IGBT is used with this gate driver.IGBT Behavior during short circuit and over currentThe peak current during a short circuit is limited by the gm of the IGBT. Moreover, the rate of rise of the current is limited by the turn-on characteristics of the IGBT in combination with common emitter inductance. If IGBT collector current does not saturate and reach a state of equilibrium and bus voltage has not raised high enough attempting to turn off the IGBT during can lead to IGBT latch-up [2].In case of fault conditions very different hole current flow under n+source regions. These different hole current conditions and patterns of hole current under n+ source generate different electrical stress. In case if the gate voltage is brought down abruptly to zero before device voltage reaches clamp, the IGBT can latch-up and fail. Flow of electron through the channel is cutoff once the gate is turned off.Holes continue to inject from emitter of p-n-p structure which isknown as IGBT collector. This process stops when electrons in IGBT N-base are depleted. At this point IGBT current is almost all hole cur-rent. The amount of holes is very high here and if IGBT does not reach clamp voltage IGBT can latch-up and fail. However if enough time is allowed to complete this process and plasma of electrons in IGBT N-base is reduced or depleted so that base current reaches zero. At this point the carriers from emitter of IGBT p-n-p transistor are no longer injected and IGBT current is almost all hole current.IGBT voltage rises at a rate so that edge of the depletion spread cansweep out enough carriers to maintain inductive current. If enough time is allowed to stabilize the bus voltage while the channel current is flowing, the IGBT N-base is depleted and because of this current flow is more uniformly distributed. The displacement current becomes very small since dv/dt reduces and latch-up is avoided. If enoughtime is not allowed for the IGBT to reach clamp voltage and gate volt-age is removed abruptly, IGBT voltage will rise with high dv/dt and current in IGBT is non-uniformly distributed, high displacement cur-rent generated by high dv/dt can latch-up IGBT. Non-uniform gate ESR combined with Miller capacitance result in non-uniform turn-off of IGBT active area. This results into high localized hole current den-sity flowing laterally in P-base of parasitic n-p-n bipolar resulting in latch-up of parasitic thyristor. Because of these reasons one has to wait untill IGBT reaches clamp voltage collector current saturates. So it is safer to choose IGBT with 10 microseconds SCWT for motor drive and UPS inverter applications if a regular gate driver is used.Two step soft turn-off gate driveIt is clear that if the collector to emitter voltage rises to the DC Bus slowly and high transconductance increases short circuit current, reg-ular driver does not protect an IGBT with a low short circuit withstand time (<5us). However the longer SCWT comes at the cost of higher switching and conduction losses. The rate of rise of the collector to emitter voltage is dependent upon the operating conditions and can take several microseconds to rise to bus voltage. However, the gate drive must respond quickly to initiate turn off to protect a low SCWT IGBT. The only solution is to lower the gate voltage to just above threshold voltage of the IGBT. The IGBT reaches clamp voltage faster and reduces IGBT current during fault.The schematic of two step gate driver is shown in Figure 1. The gate driver output will produce a positive signal with respect to the IGBT emitter terminal when the control signal goes high. As the control sig-nal goes high, transistor Q1 turns on, Q2 turns off, and the LED of optocoupler U1 turns on. This forces the output voltage of the opto-coupler to the low state. When the optocoupler output goes low, both transistors Q3 and Q4 turn off, turning on the Darlington combination of transistors Q5 and Q7. This will connect the Von supply to the gate of the IGBT through the gate turn-on resistor initiating the IGBT turn-on process.During the time that transistor Q4 is off, the output stage PNP tran-sistor Q6 remains off. Once the IGBT is turned on, the inverting inputFigure 1: Two-step gate drive circuitof comparator U3 will be clamped to one diode drop (forward voltage drop of de-saturation diode DC) plus the IGBT Vcesat voltage. For the gate driver to operate properly, the inverting voltage node must be at a lower voltage level than the non-inverting voltage node. The non-inverting input voltage is set by zener diode Z2. When the con-trol signal goes low, the LED of U1 turns off, and the optocoupler out-put voltage Von goes high with respect to negative terminal of VccG.This turns on transistors Q3 and Q4. When Q3 turns on, capacitor C5discharges through R24 allowing the output of the comparator U3 to remain high. Once transistor Q4 is on, the output stage Darlington combination turns off, and the PNP transistor Q6 turns on. Now, the gate of the IGBT will discharge through R21, R22 and transistor Q6,initiating the IGBT turn-off. During normal operation (no short-circuit or overload condition) comparator U3 remains off without effecting the gate driver circuit.However, the de-saturation circuit activates when a fault occurs at the inverter output, or the complimentary IGBT turns on due to noise.When the IGBT is turned-on into the low impedance load, it draws a large current, which causes the collector to emitter voltage of the IGBT to rise towards the bus voltage. As the IGBT collector to emit-ter voltage rises, the voltage across capacitor C5 will begin to charge towards VccG.When the voltage across C5 rises above Z2 zener voltage, the com-parator U3 turns-on. When U3 turns on, the base voltage of Darling-ton transistor Q5 lowers to approximately 8 volts with some quick slope. R14, R15, R27, C6 and D2 set this voltage and slope. The applied gate voltage of the IGBT is reduced from approximately 13volts to about 8 volts, significantly decreasing the saturation current of the IGBT. As soon as the gate bias reduces, electron current (MOSFET current) reduces. As electron current reduces, base cur-rent of the IGBT structure PNP transistor reduces. Hence, the satura-tion current of the IGBT reduces.When IGBT is turned-on into an inductive short-circuit or it is under shoot through condition current ramps quickly. The voltage across the device increases and current through the IGBT saturates if the gate voltage is kept on. Now if the gate voltage is brought to zero after IGBT current saturates and drain voltage rises to clamp voltage the IGBT will turn-off safely.The Ic U4 & U5 decide the time duration of first step level voltage and after this time the comparator U2 turns on and transistor Q5 &Q7 turn-off and Q6 turns-on turning-off IGBT safely. During first step time, the collector to emitter voltage across the IGBT rises faster than it would by holding the gate at 15 volts. As previously mentioned, the faster collector to emitter voltage rise is beneficial for the IGBT to safely turn-off the IGBT under a shorted load.Figure 2 and Figure 3 depicts the Fairchild 1200V Trench IGBT turn-ing on into a resistive load and after 1 micro-second the resistor is shorted. In ‘case 1’IGBT is protected within 2.6 micro-seconds. The zener Z2 decides when to start first step. The second step voltage level is decided by D1 and Vbe of gate turn-on transistor as shown in figure 2. When the zener Z2 value is 8.2V, that allows IGBT peak cur-rent to rise up to about 300A but still it turns-off IGBT safely asshown figure 2 ‘case 1’. But in figure 3 ‘case 2’when this zener value is reduced to 5.6 volts the short circuit current only rises up to about 190A. By selecting this zener properly depending on type of IGBT technology one can reduce this short circuit peak current and increase system reliability.SummaryA new two-step gate drive circuit has been proposed which protects the IGBT during short circuit and over load fault. The gate-drive safe-ly turns-off the IGBT in two steps. The IGBT stress during short cir-cuit or fault current conditions is minimized. The new gate drive cir-cuit can safely shut-off IGBTs with SCWT as low as 3?sec. The Fairchild trench IGBT can be turned-off safely in less than 3 micro-seconds.REFERENCES[1] Jun-Bae Lee, Dac-Woong Chung and Bum-Seok Suh, “Gate Volt-age Pattern Analyzer for Short-Circuit Protection in IGBT Inverters”APEC, 2007.[2] A. Bhalla, S. Shekhawat, J. Gladish, J. Yedinak, G. Dolny, “ IGBT Behavior During Short circuit and Fault Current Protection”ISPSD’98, pp. 245-248, June 3-6,1998.[3] B. Jayant Baliga, “Modern Power Devices” John Wiley & Sons”Figure 2: Trench IGBT (FGA25N120ANTD) into short circuit ‘case 1’Figure 3: Trench IGBT (FGA25N120ANTD) into short circuit ‘case 2’。

IGBT的设计要点

绝缘栅双极晶体管（IGBT ）的设计要点赵善麒、张景超、刘利峰、王晓宝江苏宏微科技有限公司作为新型电力半导体器件的主要代表，IGBT 被广泛用于工业、信息、新能源、医学、交通、军事和航空领域。

随着半导体材料和加工工艺的不断进步，IGBT 的电流密度、耐压和频率不断得到提升。

目前，市场上的IGBT 器件的耐压高达6500V ，单管芯电流高达200A ，频率达到300kHz 。

在高频大功率领域，目前还没有任何一个其它器件可以代替它。

本文着重分析讨论IGBT 器件的设计要点。

一、IGBT 的基本结构和工作原理从图1可以看出，IGBT 是一个复合器件，由一个MOSFET 和一个PNP 三极管组成，也可以把它看成是一个VDMOS 和一个PN 二极管组成。

图2是IGBT 的等效电路。

图1 IGBT 原胞的基本结构简化为 Injection layerR b图2 IGBT 器件的等效电路图1. IGBT 的静态特性常规IGBT 只有正向阻断能力，由PNP 晶体管的集电结承担，而其反向的电压承受能力只有几十伏，因为PNP 晶体管的发射结处没有任何终端和表面造型。

IGBT 在通态情况下，除了有一个二极管的门槛电压（0.7V 左右）以外，其输出特性与VDMOS 的完全一样。

图3 一并给出了IGBT 器件的正、反向直流特性曲线。

IGBT 的主要静态参数： z 阻断电压V （BR ）CES – 器件在正向阻断状态下的耐压；；。

z 通态压降V CE(on) – 器件在导通状态下的电压降z 阈值电压V GEth – 器件从阻断状态到导通状态所需施加的栅极电压 V G图3 IGBT 器件的正、反向直流特性2. IGBT 的开关特性IGBT 的开关机理与VDMOS 完全一样，由MOS 栅来控制其开通和关断。

所不同的是IGBT 比VDMOS 在漏极多了一个PN 结，在导通过程中有少子空穴的参与，这就是所谓的电导调制效应。

IGBT短路保护中的软关断技术分析

It is very common that an IGBT used for motor drive, UPS and some other industrial applications, be selected for 10 micro-second short-circuit withstand time (SCWT) if regular de-sat protection driver is used. But this driver generates high turn-off stress to the IGBT during inverter short circuit or the output becomes faulty. Under these abnor-mal conditions when the IGBT is turned-off abruptly, failures can occur if the IGBT is not selected properly. If the smart fault protection is not used, high turn-off loss will be generated and even short circuit current can ramp-up to a dangerous level destroying the IGBT. There are several ways to turn-off the IGBT once fault condition is detected. Some of these are as follows:Gate is discharged through high gate resistance. This discharge path is activated only during the above said abnormal conditions. This is not the best solution.Gate voltage is abruptly reduced to zero.Adding some source inductance which is common for both gate dis-charge path and load current.Gate de-bias occurs. But during normal condition switching loss is increased.Sense IGBT can also be used where fault current is sensed by pilot cell but the current sense accuracy of these pilot cells is not good which is further is affected by temperature.Gate voltage pattern analyzer for short-circuit protection in IGBT inverters [1]. These circuits are very sensitive to load changes and type of loads.Current sense resistor or Hall-effect devices are also used to detect fault through IGBT. But again these methods either generate power loss or are costly.But de-sat protection is the most commonly used for short-circuit and over current fault protection. De-sat detection truly provides the state of electrical over stress of IGBT under current fault condition when gate voltage is high. Reducing gate voltage in a controlled manner to just above gate threshold voltage is preferred and described in this article. This will reduce fault current and after some finite time gate voltage is brought down to zero safely, turning-off the IGBT without stress.Gate Drive CircuitThe main function of any gate driver circuit is to convert a control sig-nal to a power signal that can efficiently controls the IGBT or MOS-FET turn-on and turn-off. If the IGBT or MOSFET requires short cir-cuit protection, the gate drive circuit must safely turn-off the switch during a shorted or abnormal overload condition. A more detailed list of the gate drive circuit requirements for an IGBT or MOSFET are as follows:A controlled turn-on and turn-off of the IGBT so as to optimize the conduction and switching losses.In some applications, electrical isolation between control circuit and power circuit is very important.In the case of a short circuit condition, the IGBT should be protected and turned-off safely with minimum power dissipation and stress. The gate drive circuit should be able to minimize short circuit current and short-circuit withstand time without device failure. If both of these parameters are minimized, the power dissipation under short circuit will reduce and the system reliability will increase.During a short circuit condition, the IGBT collector to emitter voltage can rise fast. The voltage across the gate to emitter should not beIGBT Behavior under Short Circuit and Fault ProtectionUsing Two-Step-Soft-Turn-Off Gate DriverIn inverter driven UPS or motor applications, the IGBT can be destroyed when it is turned-on into a faulted motor or an output short circuit or an input bus voltage shoot through. Under these conditions current through the IGBT increases rapidly until it saturates. After fault detection, depending on the point at which the fast turn-off pulse is applied, very different levels of hole current can flow under the n+ source region, making this an important factor in the successful containment of the fault current. We present experimental observations showing that IGBT failure under short-circuit conditions is dependent on where and how the turn-off pulse is applied. A two-step (two-level) turn-off gate driver circuit is introduced which safely turns-off even a high transconductance IGBT during short-circuit and abnormal over current faults. This turn-off process startsduring faulted condition only.By Sampat Shekhawat and Bob Brockway, Fairchild SemiconductorIGBT驱动的软关断技术分析35allowed to rise due to gate to collector displacement current flowinginto the gate to emitter capacitance, Cge. Current flowing into Cge will cause Vge to rise and further increase the short circuit current.One should make sure that this condition is avoided.Preferably a totem pole output stage with separate turn-on and turn-off resistance option. The gate discharging switch of the totem pole should be as close as possible to IGBT and minimize the loop induc-tance between this switch and IGBT gate & emitter terminals. Minimize the propagation delay time between input and output pulses of the gate driver.De-SaturationThe de-saturation detection technique for identifying a short circuit and fault condition in an IGBT is well known. Generally, a de-satura-tion condition is said to exist if the voltage across the IGBT collector to emitter terminals rises above 5-8 volts while the gate to emitter voltage is high. This condition indicates that the current through the IGBT has exceeded the normal operating level. The gate drive circuit should be designed so that it reacts promptly to the short circuit and safely turns-off the IGBT within SCWT rating of the IGBT. However, in recent years, IGBTs have been designed with lower conduction and switching losses but this generally reduces SCWT. IGBT technology utilizes shallow junctions to decrease switching and conduction loss-es. However these new technologies have increased the transcon-ductance (gm) of the IGBT. Since the magnitude of the IGBT short circuit current is directly proportional to gm, during a short-circuit con-dition, a higher collector current results. The large collector current and high bus voltage place the IGBT in a state of high instantaneous power dissipation that can only be sustained for a few microseconds.The gate drive circuit must respond very quickly and efficiently to the fault current to protect the IGBT. Due to the two-step turn-off, the IGBT with even 4 microseconds short circuit withstand time can safe-ly be turned-off and protected. The IGBT, used in conjunction with the two-step turn-off gate drive, safely turns off low impedance over-cur-rent faults and shorted bus conditions where single-step gate drivers fail. The Industry standard (10 µs) SCWT is no longer required when the IGBT is used with this gate driver.IGBT Behavior during short circuit and over currentThe peak current during a short circuit is limited by the gm of the IGBT. Moreover, the rate of rise of the current is limited by the turn-on characteristics of the IGBT in combination with common emitter inductance. If IGBT collector current does not saturate and reach a state of equilibrium and bus voltage has not raised high enough attempting to turn off the IGBT during can lead to IGBT latch-up [2].In case of fault conditions very different hole current flow under n+source regions. These different hole current conditions and patterns of hole current under n+ source generate different electrical stress. In case if the gate voltage is brought down abruptly to zero before device voltage reaches clamp, the IGBT can latch-up and fail. Flow of electron through the channel is cutoff once the gate is turned off.Holes continue to inject from emitter of p-n-p structure which isknown as IGBT collector. This process stops when electrons in IGBT N-base are depleted. At this point IGBT current is almost all hole cur-rent. The amount of holes is very high here and if IGBT does not reach clamp voltage IGBT can latch-up and fail. However if enough time is allowed to complete this process and plasma of electrons in IGBT N-base is reduced or depleted so that base current reaches zero. At this point the carriers from emitter of IGBT p-n-p transistor are no longer injected and IGBT current is almost all hole current.IGBT voltage rises at a rate so that edge of the depletion spread cansweep out enough carriers to maintain inductive current. If enough time is allowed to stabilize the bus voltage while the channel current is flowing, the IGBT N-base is depleted and because of this current flow is more uniformly distributed. The displacement current becomes very small since dv/dt reduces and latch-up is avoided. If enoughtime is not allowed for the IGBT to reach clamp voltage and gate volt-age is removed abruptly, IGBT voltage will rise with high dv/dt and current in IGBT is non-uniformly distributed, high displacement cur-rent generated by high dv/dt can latch-up IGBT. Non-uniform gate ESR combined with Miller capacitance result in non-uniform turn-off of IGBT active area. This results into high localized hole current den-sity flowing laterally in P-base of parasitic n-p-n bipolar resulting in latch-up of parasitic thyristor. Because of these reasons one has to wait untill IGBT reaches clamp voltage collector current saturates. So it is safer to choose IGBT with 10 microseconds SCWT for motor drive and UPS inverter applications if a regular gate driver is used.Two step soft turn-off gate driveIt is clear that if the collector to emitter voltage rises to the DC Bus slowly and high transconductance increases short circuit current, reg-ular driver does not protect an IGBT with a low short circuit withstand time (<5us). However the longer SCWT comes at the cost of higher switching and conduction losses. The rate of rise of the collector to emitter voltage is dependent upon the operating conditions and can take several microseconds to rise to bus voltage. However, the gate drive must respond quickly to initiate turn off to protect a low SCWT IGBT. The only solution is to lower the gate voltage to just above threshold voltage of the IGBT. The IGBT reaches clamp voltage faster and reduces IGBT current during fault.The schematic of two step gate driver is shown in Figure 1. The gate driver output will produce a positive signal with respect to the IGBT emitter terminal when the control signal goes high. As the control sig-nal goes high, transistor Q1 turns on, Q2 turns off, and the LED of optocoupler U1 turns on. This forces the output voltage of the opto-coupler to the low state. When the optocoupler output goes low, both transistors Q3 and Q4 turn off, turning on the Darlington combination of transistors Q5 and Q7. This will connect the Von supply to the gate of the IGBT through the gate turn-on resistor initiating the IGBT turn-on process.During the time that transistor Q4 is off, the output stage PNP tran-sistor Q6 remains off. Once the IGBT is turned on, the inverting inputFigure 1: Two-step gate drive circuitof comparator U3 will be clamped to one diode drop (forward voltage drop of de-saturation diode DC) plus the IGBT Vcesat voltage. For the gate driver to operate properly, the inverting voltage node must be at a lower voltage level than the non-inverting voltage node. The non-inverting input voltage is set by zener diode Z2. When the con-trol signal goes low, the LED of U1 turns off, and the optocoupler out-put voltage Von goes high with respect to negative terminal of VccG.This turns on transistors Q3 and Q4. When Q3 turns on, capacitor C5discharges through R24 allowing the output of the comparator U3 to remain high. Once transistor Q4 is on, the output stage Darlington combination turns off, and the PNP transistor Q6 turns on. Now, the gate of the IGBT will discharge through R21, R22 and transistor Q6,initiating the IGBT turn-off. During normal operation (no short-circuit or overload condition) comparator U3 remains off without effecting the gate driver circuit.However, the de-saturation circuit activates when a fault occurs at the inverter output, or the complimentary IGBT turns on due to noise.When the IGBT is turned-on into the low impedance load, it draws a large current, which causes the collector to emitter voltage of the IGBT to rise towards the bus voltage. As the IGBT collector to emit-ter voltage rises, the voltage across capacitor C5 will begin to charge towards VccG.When the voltage across C5 rises above Z2 zener voltage, the com-parator U3 turns-on. When U3 turns on, the base voltage of Darling-ton transistor Q5 lowers to approximately 8 volts with some quick slope. R14, R15, R27, C6 and D2 set this voltage and slope. The applied gate voltage of the IGBT is reduced from approximately 13volts to about 8 volts, significantly decreasing the saturation current of the IGBT. As soon as the gate bias reduces, electron current (MOSFET current) reduces. As electron current reduces, base cur-rent of the IGBT structure PNP transistor reduces. Hence, the satura-tion current of the IGBT reduces.When IGBT is turned-on into an inductive short-circuit or it is under shoot through condition current ramps quickly. The voltage across the device increases and current through the IGBT saturates if the gate voltage is kept on. Now if the gate voltage is brought to zero after IGBT current saturates and drain voltage rises to clamp voltage the IGBT will turn-off safely.The Ic U4 & U5 decide the time duration of first step level voltage and after this time the comparator U2 turns on and transistor Q5 &Q7 turn-off and Q6 turns-on turning-off IGBT safely. During first step time, the collector to emitter voltage across the IGBT rises faster than it would by holding the gate at 15 volts. As previously mentioned, the faster collector to emitter voltage rise is beneficial for the IGBT to safely turn-off the IGBT under a shorted load.Figure 2 and Figure 3 depicts the Fairchild 1200V Trench IGBT turn-ing on into a resistive load and after 1 micro-second the resistor is shorted. In ‘case 1’IGBT is protected within 2.6 micro-seconds. The zener Z2 decides when to start first step. The second step voltage level is decided by D1 and Vbe of gate turn-on transistor as shown in figure 2. When the zener Z2 value is 8.2V, that allows IGBT peak cur-rent to rise up to about 300A but still it turns-off IGBT safely asshown figure 2 ‘case 1’. But in figure 3 ‘case 2’when this zener value is reduced to 5.6 volts the short circuit current only rises up to about 190A. By selecting this zener properly depending on type of IGBT technology one can reduce this short circuit peak current and increase system reliability.SummaryA new two-step gate drive circuit has been proposed which protects the IGBT during short circuit and over load fault. The gate-drive safe-ly turns-off the IGBT in two steps. The IGBT stress during short cir-cuit or fault current conditions is minimized. The new gate drive cir-cuit can safely shut-off IGBTs with SCWT as low as 3?sec. The Fairchild trench IGBT can be turned-off safely in less than 3 micro-seconds.REFERENCES[1] Jun-Bae Lee, Dac-Woong Chung and Bum-Seok Suh, “Gate Volt-age Pattern Analyzer for Short-Circuit Protection in IGBT Inverters”APEC, 2007.[2] A. Bhalla, S. Shekhawat, J. Gladish, J. Yedinak, G. Dolny, “ IGBT Behavior During Short circuit and Fault Current Protection”ISPSD’98, pp. 245-248, June 3-6,1998.[3] B. Jayant Baliga, “Modern Power Devices” John Wiley & Sons”Figure 2: Trench IGBT (FGA25N120ANTD) into short circuit ‘case 1’Figure 3: Trench IGBT (FGA25N120ANTD) into short circuit ‘case 2’。

从安全工作区探讨IGBT的失效机理

1、引言半导体功率器件失效的原因多种多样。

换效后进行换效分析也是十分困难和复杂的。

其中失效的主要原因之一是超出安全工作区（S afe Operating Area简称SOA）使用引起的。

因此全面了解SOA，并在使用中将IGBT的最大直流电流IC和集电极—发射极电压Vce控制在SOA之内是十分重要的。

SOA分为正偏安全工作区（FBSOA）、反偏安全工作区（RBSOA）、开关安全工作区（SSOA）和短路安全工作区（SCSOA）。

2、各安全工作区的物理概念IGBT的SOA表明其承受高压大电流的能力，是可靠性的重要标志。

2.1正偏安全工作区（FBSOA）FBSO是处于Vge>阈值电压Vth的输出特性曲线的有源区之内，如图1所示。

图1中ABCDO所包围的区域为直流安全工作区。

AB 段为tc=80℃限制的最大直流电流Ic。

B点对应的IC和Vce的乘积等于最大耗散功率Pcm。

BC段为等功耗线。

CD段为二次击穿限制的安全工作区的边界，此段不是等功耗。

随着Vce的增加功耗下降，V ce越高功耗越低。

这说明高电压强电场状态更容易出现失效。

由图1可见，随着脉冲宽度减小SOA扩大。

这里要说明的是手册给的FBSOA，除DCSOA之外。

一定脉冲宽度下的脉冲SOA，均是单脉冲安全工作区。

而且FBSOA只考虑导通损耗，不包括开关损耗。

所以FBSOA只适用功率放大器的A类、B类及短路工作没有开关损耗的工作状态。

对于一定脉宽和占空比的连续工作，其安全工作区应使用瞬态热阻曲线的计算来确定。

2.2反偏安全工作区（RBSOA）RBSOA是表明在箝位电感负载时，在额定电压下关断最大箝位电感电流Ilm的能力。

Ilm一般是最大DC额定电流的两倍，而额定电压接近反向击穿电压。

PT型IGBT和NPT型IGBT的反偏安全工作区略有不同。

PT型IGBT的RBSOA是梯形SOA，NPT型IGBT 的RBSO是矩形SOA。

如图2所示。

可见NPT型IGBT。

数字集成电路设计_笔记归纳之欧阳育创编

第三章、器件一、超深亚微米工艺条件下MOS 管主要二阶效应：1、速度饱和效应：主要出现在短沟道NMOS 管，PMOS 速度饱和效应不显著。

主要原因是TH GS V V -太大。

在沟道电场强度不高时载流子速度正比于电场强度（μξν=），即载流子迁移率是常数。

但在电场强度很高时载流子的速度将由于散射效应而趋于饱和，不再随电场强度的增加而线性增加。

此时近似表达式为：μξυ=（c ξξ<），c sat μξυυ==（c ξξ≥），出现饱和速度时的漏源电压DSAT V 是一个常数。

线性区的电流公式不变，但一旦达到DSAT V ，电流即可饱和，此时DS I 与GS V 成线性关系（不再是低压时的平方关系）。

2、Latch-up 效应：由于单阱工艺的NPNP 结构，可能会出现VDD 到VSS 的短路大电流。

正反馈机制：PNP 微正向导通，射集电流反馈入NPN 的基极，电流放大后又反馈到PNP 的基极，再次放大加剧导通。

克服的方法：1、减少阱/衬底的寄生电阻，从而减少馈入基极的电流，于是削弱了正反馈。

2、保护环。

3、短沟道效应：在沟道较长时，沟道耗尽区主要来自MOS 场效应，而当沟道较短时，漏衬结（反偏）、源衬结的耗尽区将不可忽略，即栅下的一部分区域已被耗尽，只需要一个较小的阈值电压就足以引起强反型。

所以短沟时VT随L的减小而减小。

此外，提高漏源电压可以得到类似的效应，短沟时VT随VDS 增加而减小，因为这增加了反偏漏衬结耗尽区的宽度。

这一效应被称为漏端感应源端势垒降低。

4、漏端感应源端势垒降低（DIBL）：VDS增加会使源端势垒下降，沟道长度缩短会使源端势垒下降。

VDS很大时反偏漏衬结击穿，漏源穿通，将不受栅压控制。

5、亚阈值效应（弱反型导通）：当电压低于阈值电压时MOS 管已部分导通。

不存在导电沟道时源（n+）体（p）漏（n+）三端实际上形成了一个寄生的双极性晶体管。

一般希望该效应越小越好，尤其在依靠电荷在电容上存储的动态电路，因为其工作会受亚阈值漏电的严重影响。

latch-up描述

Latch up：即闩锁效应，又称自锁效应、闸流效应，它是由寄生晶体管引起的，属于CMOS电路的缺点。

通常在电路设计和工艺制作中加以防止和限制。

该效应会在低电压下导致大电流，这不仅能造成电路功能的混乱，而且还会使电源和地线间短路，引起芯片的永久性损坏。

防止：在集成电路工艺中采用足够多的衬底接触。

Latch up 的定义Latch up 最易产生在易受外部干扰的I/O电路处, 也偶尔发生在内部电路Latch up 是指cmos晶片中, 在电源power VDD和地线GND(VSS)之间由于寄生的PNP和NPN双极性BJT相互影响而产生的一低阻抗通路, 它的存在会使VDD和GND之间产生大电流随着IC制造工艺的发展, 封装密度和集成度越来越高,产生Latch up的可能性会越来越大Latch up 产生的过度电流量可能会使芯片产生永久性的破坏, Latch up 的防范是IC Layout 的最重要措施之一Latch up 的原理图分析Latch up 的原理分析Q1为一垂直式PNP BJT, 基极(base)是nwell, 基极到集电极(collector)的增益可达数百倍；Q2是一侧面式的NPN BJT，基极为P substrate，到集电极的增益可达数十倍；Rwell是nwell的寄生电阻；Rsub是substrate电阻。

以上四元件构成可控硅（SCR）电路，当无外界干扰未引起触发时，两个BJT处于截止状态，集电极电流是C-B的反向漏电流构成，电流增益非常小，此时Latch up不会产生。

当其中一个BJT的集电极电流受外部干扰突然增加到一定值时，会反馈至另一个BJT，从而使两个BJT因触发而导通，VDD至GND（VSS）间形成低抗通路，Latch up由此而产生。

CMOS电路中的寄生双极型晶体管部分出现闩锁，必须满足以下几个条件：(1) 电路要能进行开关转换,其相关的PNPN结构的回路增益必须大于1即βnpn*βpnp >1，在最近的研究中,把闩锁产生的条件用寄生双极晶体管的有效注入效率和小信号电流增益来表达。

IGBT 设计要点

绝缘栅双极晶体管（IGBT ）的设计要点赵善麒、张景超、刘利峰、王晓宝江苏宏微科技有限公司作为新型电力半导体器件的主要代表，IGBT 被广泛用于工业、信息、新能源、医学、交通、军事和航空领域。

随着半导体材料和加工工艺的不断进步，IGBT 的电流密度、耐压和频率不断得到提升。

目前，市场上的IGBT 器件的耐压高达6500V ，单管芯电流高达200A ，频率达到300kHz 。

在高频大功率领域，目前还没有任何一个其它器件可以代替它。

本文着重分析讨论IGBT 器件的设计要点。

一、IGBT 的基本结构和工作原理从图1可以看出，IGBT 是一个复合器件，由一个MOSFET 和一个PNP 三极管组成，也可以把它看成是一个VDMOS 和一个PN 二极管组成。

图2是IGBT 的等效电路。

图1 IGBT 原胞的基本结构简化为 Injection layerR b图2 IGBT 器件的等效电路图1. IGBT 的静态特性常规IGBT 只有正向阻断能力，由PNP 晶体管的集电结承担，而其反向的电压承受能力只有几十伏，因为PNP 晶体管的发射结处没有任何终端和表面造型。

IGBT 在通态情况下，除了有一个二极管的门槛电压（0.7V 左右）以外，其输出特性与VDMOS 的完全一样。

图3 一并给出了IGBT 器件的正、反向直流特性曲线。

IGBT 的主要静态参数： z 阻断电压V （BR ）CES – 器件在正向阻断状态下的耐压；；。

z 通态压降V CE(on) – 器件在导通状态下的电压降z 阈值电压V GEth – 器件从阻断状态到导通状态所需施加的栅极电压 V G图3 IGBT 器件的正、反向直流特性2. IGBT 的开关特性IGBT 的开关机理与VDMOS 完全一样，由MOS 栅来控制其开通和关断。

所不同的是IGBT 比VDMOS 在漏极多了一个PN 结，在导通过程中有少子空穴的参与，这就是所谓的电导调制效应。

IGBT基本特性

IGBT正向压降
V F V P N V drift V ACC V JFET V CH
VJFET 在VF 中占较大比重，甚至使I-V特性出现 snap-back。
改进措施: 增加JFET区的掺杂浓度。
N+ P-body N+ P-body
J2
NJ1
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IGBT的闩锁效应闩锁效应 IGBT中寄生的晶闸管开启，闩锁效应发生。电流迅速增大，最终IGBT热击穿。闩锁发生的条件 npn+ pnp=1
Gourab Majumdar, and Tadaharu Minato
Power Device Works, Mitsubishi Electric Corporation
新型IGBT发展趋势
IGBT 的阻断特性
IGBT 的静态特性主要考虑的四个方面 BVces Vce(on) Vth
SCSOA
C
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等效电路
ICE VG
VCE Reverse Characteristics Forward Characteristics
反向阻断：NPT IGBT有，
输出特性
PT IGBT方向阻断电压低
IGBT 设计优化的三角折中
IGBT 的发展
Recent and Future IGBT Evolution
PNP ( PT IGBT )
导通状态下的载流子分布
Emitter/cathode Polysilicon gate window Polysilicon gate region
p+
J2
n+ p base PiN
W IGBT n- base J1

IGBT知识，这次说明白了!

IGBT知识，这次说明⽩了!IGBT的基本原理IGBT的基本原理IGBT(Insulated Gate Bipolar Transistor, 绝缘栅双极晶体管)是⼀种少数载流⼦器件,具有输⼊阻抗⾼,电流承载能⼒强的特点.从电路设计者的⾓度来看,IGBT具有MOS器件的输⼊特性且有双极器件的电流输出能⼒,是⼀种电压控制型双极型器件.IGBT被发明的⽬的是为了综合功率MOSFET与BJT两种器件的优点.可以讲IGBT是功率MOSFET与BJT合⼆为⼀的化⾝.两者优点集中在⼀体从⽽能有优异的性能.IGBT适合于功率电路中的很多种应⽤,尤其是PWM驱动,三相驱动这些需要⾼动态控制与低噪⾳的应⽤场景.其他应⽤UPS,开关电源等等需要⾼开关频率的场景也适合使⽤IGBT.IGBT的特点是能提供⾼的动态性能,转换效率,同时具有低的可听到的噪⾳.它也适⽤于谐振模式的转换/逆变电路.有专门为低传导损耗与低开关损耗优化的IGBT器件.IGBT对于功率MOSFET与BJT的主要优点体现在如下⼏点:1.具有⾮常低的导通压降与优秀的导通电流密度.所以可以使⽤更⼩尺⼨的器件从⽽降低成本.2.因为栅极结构使⽤MOS管的同类设计,所以驱动功率⾮常⼩,驱动电路也很简单.与可控硅/BJT这些电流控制型器件来⽐,在⾼压与⾼电流应⽤场景,IGBT⾮常易于控制.3.与BJT相⽐具有更好的电流传导能⼒.在正向与反向隔离⽅⾯参数也更优秀.除了优点,IGBT也有它的不⾜之处:1.开关速度低于功率MOSFET,但是⾼于BJT.因为是少数载流⼦器件,集电极电流残余导致关断速度较慢.2.因为内部的PNPN型可控硅结构,有⼀定概率会锁死.IGBT的长处在于增强电压隔断的能⼒.⽐如说对于MOSFET,随着击穿电压的增加,导通电阻会增加⾮常快,原因在于为了提⾼击穿电压,漂移区的厚度与本⾝电阻必须增加.所以实践中,⼀般不会设计同时具有⾼电流承载能⼒与⾼击穿电压的MOSFET.⽽对于IGBT,因为在导通时有⾼度集中的注⼊少数载流⼦,漂移区的电阻⼤⼤减⼩.故此漂移区的正向压降仅仅与其厚度相关⽽与其本⾝的电阻相对独⽴.基本结构图1所⽰为使⽤DMOS⼯艺制作的典型的N通道的IGBT的简化原理图.此结构只是可能选⽤的多种结构之⼀.可以看出除了P+注⼊层,IGBT的硅交叉区与垂直功率MOSFET基本⼀样.在栅极区与N+源区的P阱,IGBT与MOSFET⼏乎没有区别.顶部的N+曾是S极或者发射极,底部的P+曾是D极或者集电极.如果在掺杂时使⽤相反的顺序,那么制作出来的就是P通道IGBT.IGBT因为NPNP的结构所以会有⼀个寄⽣的可控硅(thyristor).⼀般不希望此可控硅导通.图1 典型的N通道IGBT结构图某些IGBT在制造的时候没有加上N+缓冲层,被称为⾮穿型(NPT)IGBT.相对的有这个缓冲层的被称之为穿型(PT)IGBT.如果掺杂与此层厚度设计恰当,此层能⼤⼤提升整个器件的性能.尽管在外形上IGBT类似于MOSFET,但在实际⼯作中IGBT更加类似于BJT.这是因为P+的漏层(注⼊层)能将少数载流⼦注⼊N-漂移区从⽽导致的导通调制特性.图2 IGBT的等效电路从上述分析可以画出IGBT的等效电路图(图2).等效电路包含MOSFET,JFET,NPN与PNP三极管.PNP的集电极与NPN的基极相连.NPN的集电极通过JFET与PNP的基极相连.NPN与PNP代表了寄⽣的可控硅,这个可控硅会带来⼀个再⽣型的反馈回路.RB为NPN的BE结电阻,其作⽤是保证寄⽣可控硅不⾄于锁定从⽽保证IGBT不锁定.JFET代表的是任意相邻的两个IGBT之间的收缩电流.JFET在⼤多数电压范围存在,使得MOSFET保持在低压从⽽导致低的RDS(on)值.图3所⽰为IGBT的电路符号.三个极分别叫做集电极(C),栅极(G)与发射极(E).图3 IGBT的电路符号IXYS的产品同时包括NPT与PT型IGBT.两种类型的物理结构如图4所⽰.如前⽂所述,PT类型有⼀个额外的层.这个曾有两个主要功能:(i)避免因为因为⾼电压⽽导致的耗尽区扩展,从⽽避免了穿通型失效.(ii)因为P+集电区注⼊的空⽳部分在此层重新组合⽽减⼩了关断时的残余电流,从⽽缩短了关断的下降时间.NPT型的IGBT,具有同样的正向与反向击穿电压,适合于交流应⽤.PT型的IGBT,反向击穿电压低于正向击穿电压,适合于直流电路(因为直流电路中器件⽆须再反向承担电压).图4 NPT与PT型的IGBT结构表1:NPT与PT型的IGBT特性对⽐⼯作模式正向关断与导通模式如图1所⽰,当集电极-发射极加上正向电压且栅极与发射极短路,IGBT进⼊正向关断模式.此时J1与J3结正向偏置,J2反向偏置.J2两端的耗尽区部分地扩散⾄P基极与N漂移区.当将栅极与发射极之间的短路移除,并且对栅极加已⾜够的电压以使P基极区的硅反向,IGBT从正向关断模式转移⾄正向导通模式.此种模式下,N+发射极与N-漂移区之间形成⼀个导通通道.N+发射极的电⼦通过此通道流向N-漂移区.流向N-漂移区的电⼦使得N-漂移区的电位降低,⽽P+集电极/N-漂移区的结被正向偏置.从⽽⾼密度的少数载流⼦空⽳从P+集电极注⼊到N-漂移区.当注⼊的载流⼦密度远远⾼于背景密度时,在N-漂移区建⽴起被称作空⽳离⼦流条件的情形.此种空⽳离⼦流将电⼦从发射极吸引⾄发射极以维持局部电荷中和.如此在N-漂移区建⽴起某种空⽳与电⼦的分区集中.此种分区集中⼤⼤提⾼N-漂移区的导电性能.这种机制被称作N-漂移区的导通调制.反向关断模式当如图1所⽰在集电极与发射极之间加上负电压,J1反向偏置,其耗尽区扩散⾄N-漂移区.反向关断的击穿电压由P+集电极/N-漂移区/P基极所形成的开基极BJT决定.如果N-漂移区的掺杂不⾜,此器件将易于被击穿.要获得所需要的击穿电压,必须控制N-漂移区的电阻与厚度.要获取反向击穿电压与正向压降的具体参数,以下是计算N-漂移区的宽度公式:其中:LP: 少数载流⼦杂散长度Vm: 最⼤关断电压εo: ⾃由区的介电常数εs: 硅的介质常数q: 电荷ND: N漂移区的掺杂密度注意: ⼤多数应⽤中IGBT的反向关断⾮常罕见,⽽是⼀般使⽤反并⼆极管(FRED)输出特性图5所⽰为⼀个NPT-IGBT的正向输出特性图.这是⼀个曲线群,每条代表不同的栅极-发射极电压情况.集电极电流(IC)在VGE固定时为VCE的⼀个函数.图5 NPT-IGBT的I-V输出曲线需要注意的是0.7V的偏移电压.这是因为对于P+集电极的IGBT,会有⼀个额外的PN结.这个PN结使得IGBT的特性与MOSFET区分开来.传输特性传输特性指的是不同温度下,⽐如25度,125度,-40度时,ICE对于VGE变化的响应函数.如图6所⽰.给定温度下传输特性的梯度被称作该器件在该温度下的跨导(gfs).图6 IGBT的传输特性⼀般来说较低栅极电压下要获取⾼的电流能⼒,希望gfs的值⽐较⼤.通道与栅极的结构决定了gfs 的值.gfs与RDS(on)均由通道的长度来控制,⽽通道的长度由P基与N+发射极的扩散深度的差值来决定.传输特性曲线上的切线决定了器件的阈值/门限电压(VGE(th)).图7 某IGBT的跨导特性图7所⽰为某IGBT的跨导特性(IC-gfs).当集电极电流增加,gfs随之增加,但是随着集电极电流继续增加,gfs的增长曲线慢慢平缓.这是因为寄⽣MOSFET的饱和现象减缓了PNP三极管的基极的驱动电流的增加.开关特性IGBT的开关特性与MOSFET的开关特性⾮常相似.主要差别在于:由于N-漂移区会储存电荷会导致⼀个残余集电极电流.此残余电流增加了关断损耗也需要半桥电路中两个器件关断之间的死区时间相应增加.图8显⽰了开关特性的测试电路.图9显⽰了相应的开启与关断的电压电流波形.IXYS的IGBT产品在测试时使⽤15V到0V的栅极电压.为了降低开关损耗,建议在关断时给栅极加⼀个负电压(⽐如-15V).图8 开关特性测试电路IGBT的开关速度受限于寄⽣PNP三极管的基极的N-漂移区的少数载流⼦的⽣命周期.此区对于外部来讲是不可操作的,故此没有外部⼿段来增加移除此电荷的速度以提⾼开关速度.此电荷移除的唯⼀途径是在IGBT内部重新中和.此外增加N+缓冲区以收集少数载流⼦电荷能够增加此电荷的中和速度.图9 IGBT的开启关断电压电流波形Eon表⽰导通能量,是IC*VCE在从10%的ICE到90%的VCE区间的积分.导通能量的⼤⼩取决于续流⼆极管的反向恢复特性,所以如果IGBT当中包含续流⼆极管时⼀定要特别注意.Eoff表⽰关断能量,是IC*VCE在10%的VCE到90%的IC区间的积分.Eoff是IGBT的开关损耗的主要组成部分.锁死/锁定(Latch-up)在导通状态,IGBT内部电流⾛向如图10所⽰.从P+集电极注⼊N-漂移区的空⽳形成两个电流路径.空⽳中的⼀部分因为与MOSFET通道的电⼦中和⽽消失.其他部分的空⽳受电⼦的负电荷所吸引⾄反向层的附近,从外延穿过P层,在体欧姆电阻区形成压降.如果这个电压⾜够⼤,将正向偏置N+P 结,同时⼤量的电⼦从发射极注⼊⽽在寄⽣NPN三极管将被开启.如果这种现象发⽣寄⽣的NPN与PNP三极管将被同时导通,故此两个管⼦组成的可控硅将被锁定(Latch up),从⽽使整个IGBT发⽣锁定.⼀旦锁定发⽣,栅极电压将失去对集电极的电流的控制作⽤,此时唯⼀关闭IGBT的⽅法是强制电换向,就像真正的可控硅中的情形⼀样.图10 IGBT导通状态的电流流向如果此种锁定状态不能快速被终⽌,IGBT将因为过⼤的耗散功率⽽被烧毁.IGBT能通过的最⼤的不引起锁定的尖峰电流称之为(ICM).器件的数据⼿册中都会写明这个参数.超过此电流值,⾜够⼤的外围电压降就会激活可控硅从⽽导致锁定.安全⼯作区(Safe Operating Area,SOA)所谓的安全⼯作区是指的电流-电压两者围成的⼀个区间,此区间内器件能安全⼯作不⾄于被损坏.对于IGBT,此区间由最⼤的集电极-发射极电压VCE与集电极电流Ic定义,此区间内IGBT能安全运转不⾄被损坏.IGBT的安全⼯作区有如下类型:正向偏置安全⼯作区(FBSOA),反向偏置安全⼯作区(RBSOA)与短路安全⼯作区(SCSOA).正向偏置安全⼯作区(FBSOA)对于感性负载的应⽤来说,FBSOA是个重要的特性.由最⼤的集电极-发射极电压与饱和的集电极电流来决定.此种模式下,电⼦与空⽳通过漂移区移动,并维持⽐较⾼的集电极电压.漂移区的电⼦与空⽳的密度与当前电流密度的关系为:其中Vsat,n与Vsat,p分别为电⼦与空⽳的饱和漂移速度.漂移区的净正电荷为:此电荷决定了漂移区的电场分布.在稳态的正向关断条件下,漂移区的电荷等于ND.正向安全⼯作区间中,净电荷要远远⼤于ND,这是因为空⽳的密度远远⼤于电⼦流的密度.正向安全⼯作区的击穿电压为:反向偏置安全⼯作区(RBSOA)对于关断的瞬态分析来讲,RBSOA为重要的状态.能关断的电流限于IGBT的额定电流的两倍.⽐如某额定电流为1200A的IGBT能关断的最⼤电流为2400A.最⼤电流为关断时集电极与发射极之间尖峰电压的函数.VCE的峰值等于直流电压与LбdIC/dt的乘积.Lб为功率电路的杂散电感.RBSOA 下的最⼤电流IC与VCE的关系参见图11.图11 IGBT的反向安全⼯作区此模式下,栅极的偏置为0或者负电压,如此⼀来漂移区的电流仅仅通过空⽳来进⾏(N通道的IGBT).空⽳增加了漂移区的电荷,因此P基/N漂移区节点的电场增加了.此条件下空电荷区的净电荷为:其中Jc为集电极电流总和.RBSOA的雪崩电压为:短路安全⼯作区(SCSOA)对于⼯作在电机控制应⽤的器件,⼀个关键要求是能够在负载短路时安全关断.当电流超载,集电极的电流迅速上升直⾄器件能承受的极限.器件能在此条件下不⾄于损坏的条件就是能在控制电路检测到短路状态并关断器件之前将电流幅度限制在⼀个安全的级别.IGBT的集电极电流IC为栅极-发射极电压VGE与温度T的函数.图6所⽰的传输特性表明了给定VGE时最⼤的IC值.对于15V的VGE,其值限定为80A,⼤约是额定值的1.5倍.考虑到短路电流经常是额定电流的6-7倍,这个值算是⾮常⼩了.图12 SCSOA测试电路图12展⽰了⼀个SCSOA的测试电路.短路电感值决定了电路的⼯作模式.当此值为uH级别,电路⼯作模式类似于正常的感性负载开关.当IGBT开启,VCE降⾄饱和电压.IC以dIC/dt的速率增加,IGBT 逐渐饱和.当集电极电流⾼于2倍的额定电流时不允许关断操作,因为这样做是超出RBSOA的.如果短路发⽣,必须等待设备达到活跃⼯作区.必须在10us内关闭IGBT以免器件因为过热⽽损坏.。

IGBT的锁定效应和安全工作区

IGBT的锁定效应和安全工作区1.锁定效应IGBT为四层结构，体内存在一个寄生晶体管，其等效电路如图1所示。

在V2的基极与发射极之间并有一个扩展电阻Rb，在此电阻上，P型体区的横向空穴会产生一定压降，对J3结来说，相当于一个正偏电流范围以内，这个正偏置电压不大，对V2不起作用，当Id大到一定程度时，该正偏置电压足以使V2开通，进而使V2和V3处于饱和状态，于是寄生晶体管开通，栅极失去对集电极电流的控制作用，这就是所谓的IGBT的静态锁定效应，IGBT发生锁定效应后，漏极电流增大，造成过高功耗，导致损坏。

可见，漏极电流有一个临界值Idm，当Id> Idm时便会产生锁定效应。

具备寄生晶体管的IGBT等效电路在IGBT 关断的动态过程当中，假若dvds/dt过高，那么在J2结中引起的位移电流会增大，当该电流流过体区扩展电阻Rb时，也可产生足以使晶体管V2开通的正向偏置电压，满足寄生晶体管开通锁定的条件，形成动态锁定效应。

为此，在应用中必须防止IGBT发生锁定效应，为此可限制Idm值，或用加大栅极电阻RG的办法延长IGBT关断时间，以减少dvds/dt值。

值得指出的是，动态锁定效应允许的漏极电流比静态锁定所允许的要小，IGBT 器件提供的Id值是按动态锁定效应所允许的最大漏极电流来确定的。

锁定效应曾限制 IGBT 电流容量提高，这个问题在20世纪90年代中后期开始渐渐解决，即将IGBT与反并联的快速二极管封装在一起，制成模块，成为逆导器件。

2．安全工作区安全工作区（SOA)反映了一个功率器件同时承受一定电压和电流的能力。

IGBT的安全工作区可以分为三个主要区域：1)正向导通[正向偏置安全工作区( FBSOA)]。

这部分安全工作区是指电子和空穴电流在导通瞬态时流过的区域。

在lc处于饱和状态时，IGBT所能承受的最大电压是器件的物理极限。

IGBT开通时的正向偏置安全工作区由电流、电压和功耗三条边界极限包围而成（最大集电极电流、最大集电极—发射极间电压和最大集电极功耗）。

避免IGBT不良反应的隔离驱动7条经验

避免IGBT不良反应的隔离驱动7条经验
IGBT技术大多应用在大功率电源场合，要在这些场合应用，首先就需要拥有避免欠压、米勒效应、过载一类的不良反应。

因此在隔离驱动IGBT功率器件的设计上就需要相应的设计技巧。

本文将为针对避免不良反应为前提来介绍IGBT功率器件设计的八种技巧。

如何避免米勒效应
IGBT操作时所面临的问题之一是米勒效应的寄生电容。

这种效果是明显的在0到15V类型的门极驱动器（单电源驱动器）。

门集-电极之间的耦合，在于IGBT关断期间，高dV/dt瞬态可诱导寄生IGBT道通（门集电压尖峰），这是潜在的危险。

当上半桥的IGBT打开操作，dVCE/dt电压变化发生跨越下半桥的IGBT。

电流会流过米勒的寄生电容，门极电阻和内部门极驱动电阻。

这将倒至门极电阻电压的产生。

如果这个电压超过IGBT门极阈值的电压，可能会导致寄生IGBT道通。

有两种传统解决方案。

首先是添加门极和发射极之间的电容。

第二个解决方法是使用负门极驱动。

第一个解决方案会造成效率损失。

第二个解决方案所需的额外费用为负电源电压。

解决方案是通过缩短门极-发射极的路径，通过使用一个额外的晶体管在于门极-发射极之间。

达到一定的阈值后，晶体管将短路门极-发射极地区。

这种技术被称为有源米勒钳位。

故障保护功能有哪些？都是集成在隔离驱动器里吗？
3种故障保护功能都集成到Avago的高集成栅极驱动器ACPL-33xJ里-UVLO（以避免VCC2电平不足够时开启IGBT），DESAT（以保护IGBT过。

浅谈IGBT的闩锁效应

浅谈IGBT的闩锁效应闩锁(Lanch-up)效应，一般我们也可以称之为擎住效应，是由于（IGBT）超安全工作区域而导致的（电流）不可控现象，当然，闩锁效应更多的是决定于IGBT（芯片）本身的构造。

实际工作中我们可能很少听到一种失效率，闩锁失效，今天我们就来聊一聊什么是闩锁效应。

关于IGBT的构造我们这里不再赘述，集MOS和BJT于一身的"男人"，一般我们认为IGBT的理想等效电路如下图所示上图直观地显示了IGBT的组成，是对PNP双极型（晶体管）和功率（MOSFET）进行达林顿连接后形成的单片型Bi-MOS晶体管。

故在G-E之间外加正向电压使MOS管导通时，PNP晶体管的基极-集电极之间就连上了低电阻，从而使PNP晶体管处于导通状态。

此后，使G-E之间的电压为零或者负压时，首先MOS管处于断路状态，PNP晶体管的基极电流被切断，从而使IGBT关断。

所以，IGBT 和MOS一样，都是电压控制型器件。

那闩锁效应的产生是在哪里呢?其实IGBT的实际等效电路与上面我们讲到的理想等效电路略有不同，还需要考虑其内部寄生的内容，如下图从上图我们可以看处，实际等效电路是由可控硅和MOS构成的。

内部存在一个寄生的可控硅，在NPN晶体管的基极和发射极之间并有一个体区扩展电阻（Rs），P型体内的横向空穴电流会在Rs上产生一定的电压降，对于NPN基极来说，相当于一个正向偏置电压。

在规定的集电极电流分为内，这个正偏电压不会很大，对于NPN晶体管起不了什么作用。

当集电极电流增大到一定程度时，该正向电压则会大到足以使NPN晶体管开通，进而使得NPN和PNP晶体管处于饱和状态。

此时，寄生晶闸管导通，门极则会失去其原本的控制作用，形成自锁现象，这就是我们所说的闩锁效应，也就是擎住效应，准确的应该说是静态擎住效应。

IGBT发生擎住效应后，集电极的电流增大，产生过高的功耗，从而导致器件失效。

动态擎住效应主要是在器件高速关断时电流下降太快(di/dt大)，dv/dt很大，引起的较大位移电流，流过Rs,产生足以使NPN晶体管导通的正向偏置电压，造成寄生晶闸管的自锁。