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单片机英文文献资料及翻译单片机(英文：Microcontroller)Microcontroller is a small computer on a single integrated circuit that contains a processor core, memory, and programmable input/output peripherals. Microcontrollers are designed for embedded applications, in contrast to the microprocessors used in personal computers or other general purpose applications.A microcontroller's processor core is typically a small, low-power computer dedicated to controlling the operation of the device in which it is embedded. It is often designed to provide efficient and reliable control of simple and repetitive tasks, such as switching on and off lights, or monitoring temperature or pressure sensors.MEMORYMicrocontrollers typically have a limited amount of memory, divided into program memory and data memory. The program memory is where the software that controls the device is stored, and is often a type of Read-Only Memory (ROM). The data memory, on the other hand, is used to store data that is used by the program, and is often volatile, meaning that it loses its contents when power is removed.INPUT/OUTPUTMicrocontrollers typically have a number of programmable input/output (I/O) pins that can be used to interface with external sensors, switches, actuators, and other devices. These pins can be programmed to perform specific functions,such as reading a sensor value, controlling a motor, or generating a signal. Many microcontrollers also support communication protocols like serial, parallel, and USB, allowing them to interface with other devices, including other microcontrollers, computers, and smartphones.APPLICATIONSMicrocontrollers are widely used in a variety of applications, including:- Home automation systems- Automotive electronics- Medical devices- Industrial control systems- Consumer electronics- RoboticsCONCLUSIONIn conclusion, microcontrollers are powerful and versatile devices that have become an essential component in many embedded systems. With their small size, low power consumption, and high level of integration, microcontrollers offer an effective and cost-efficient solution for controlling a wide range of devices and applications.。

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Validation and Testing of Design Hardening for Single Event Effects Using the 8051 MicrocontrollerAbstractWith the dearth of dedicated radiation hardened foundries, new and novel techniques are being developed for hardening designs using non-dedicated foundry services. In this paper, we will discuss the implications of validating these methods for the single event effects (SEE) in the space environment. Topics include the types of tests that are required and the design coverage (i.e., design libraries: do they need validating for each application?). Finally, an 8051 microcontroller core from NASA Institute of Advanced Microelectronics (IAμE) CMOS Ultra Low Power Radiation Tolerant (CULPRiT) design is evaluated for SEE mitigative techniques against two commercial 8051 devices.Index TermsSingle Event Effects, Hardened-By-Design, microcontroller, radiation effects.I. INTRODUCTIONNASA constantly strives to provide the best capture of science while operating in a space radiation environment using a minimum of resources [1,2]. With a relatively limited selection of radiation-hardened microelectronic devices that are often two or more generations of performance behind commercialstate-ofthe-art technologies, NASA’s performance of this task is quite challenging. One method of alleviating this is by the use of commercial foundry alternatives with no or minimally invasive design techniques for hardening. This is often called hardened-by-design (HBD).Building custom-type HBD devices using design libraries and automated design tools may provide NASA the solution it needs to meet stringent science performance specifications in a timely,cost-effective, and reliable manner.However, one question still exists: traditional radiation-hardened devices have lot and/or wafer radiation qualification tests performed; what types of tests are required for HBD validation?II. TESTING HBD DEVICES CONSIDERATIONSTest methodologies in the United States exist to qualify individual devices through standards and organizations such as ASTM, JEDEC, and MIL-STD- 883. Typically, TID (Co-60) and SEE (heavy ion and/or proton) are required for device validation. So what is unique to HBD devices?As opposed to a “regular” commercial-off-the-shelf (COTS) device or application specific integrated circuit (ASIC) where no hardening has been performed, one needs to determine how validated is the design library as opposed to determining the device hardness. That is, by using test chips, can we “qualify” a future device using the same library?Consider if Vendor A has designed a new HBD library portable to foundries B and C. A test chip is designed, tested, and deemed acceptable. Nine months later a NASA flight project enters the mix by designing a new device using Vendor A’s library. Does this device require complete radiation qualification testing? To answer this, other questions must be asked.How complete was the test chip? Was there sufficient statistical coverage of all library elements to validate each cell? If the new NASA design uses a partially or insufficiently characterized portion of the design library, full testing might be required. Of course, if part of the HBD was relying on inherent radiation hardness of a process, some of the tests (like SEL in the earlier example) may be waived.Other considerations include speed of operation and operating voltage. For example, if the test chip was tested statically for SEE at a power supply voltage of 3.3V, is the data applicable to a 100 MHz operating frequency at 2.5V? Dynamic considerations (i.e., nonstatic operation) include the propagated effects of Single Event Transients (SETs). These can be a greater concern at higher frequencies.The point of the considerations is that the design library must be known, the coverage used during testing is known, the test application must be thoroughly understood and the characteristics of the foundry must be known. If all these are applicable or have been validated by the test chip, then no testing may be necessary. A task within NASA’s Electronic Parts and Packaging (NEPP) Program was performed to explore these types of considerations.III. HBD TECHNOLOGY EVALUATION USING THE 8051 MICROCONTROLLERWith their increasing capabilities and lower power consumption, microcontrollers are increasingly being used in NASA and DOD system designs. There are existing NASA and DoD programs that are doing technology development to provide HBD. Microcontrollers are one such vehicle that is being investigated to quantify the radiation hardness improvement. Examples of these programs are the 8051 microcontroller being developed by Mission Research Corporation (MRC) and the IAμE (the focus of this study). As these HBD technologies become available, validation of the technology, in the natural space radiation environment, for NASA’s use in spaceflight systems is required.The 8051 microcontroller is an industry standard architecture that has broad acceptance, wide-ranging applications and development tools available. There are numerous commercial vendors that supply this controller or have it integrated into some type of system-on-a-chip structure. Both MRC and IAμE chose this device to demonstrate two distinctly different technologies for hardening. The MRC example of this is to use temporal latches that require specific timing to ensure that single event effects are minimized. The IAμE technology uses ultra low power, and layout and architecture HBD design rules to achieve their results. These are fundamentally different than the approach by Aeroflex-United Technologies Microelectronics Center (UTMC), the commercial vendor of a radiation–hardened 8051, that built their 8051 microcontroller using radiationhardened processes. This broad range of technology within one device structure makes the 8051an ideal vehicle for performing this technology evaluation.The objective of this work is the technology evaluation of the CULPRiT process [3] from IAμE. The process has been baselined against two other processes, the standard 8051 commercial device from Intel and a version using state-of-the-art processing from Dallas Semiconductor. By performing this side-by-side comparison, the cost benefit, performance, and reliability trade study can be done.In the performance of the technology evaluation, this task developed hardware and software for testing microcontrollers. A thorough process was done to optimize the test process to obtain as complete an evaluation as possible. This included taking advantage of the available hardware and writing software that exercised the microcontroller such that all substructures of the processor were evaluated. This process is also leading to a more complete understanding of how to test complex structures, such as microcontrollers, and how to more efficiently test these structures in the future.IV. TEST DEVICESThree devices were used in this test evaluation. The first is the NASA CULPRiT device, which is the primary device to be evaluated. The other two devices are two versions of a commercial 8051, manufactured by Intel and Dallas Semiconductor, respectively.The Intel devices are the ROMless, CMOS version of the classic 8052 MCS-51 microcontroller. They are rated for operation at +5V, over a temperature range of 0 to 70 °C and at a clock speeds of 3.5 MHz to 24 MHz. They are manufactured in Intel’s P629.0 CHMOS III-E process.The Dallas Semiconductor devices are similar in that they are ROMless 8052 microcontrollers, but they are enhanced in various ways. They are rated for operation from 4.25 to 5.5 Volts over 0 to 70 °C at clock speeds up to 25 MHz. They have a second full serial port built in, seven additional interrupts, a watchdog timer, a power fail reset, dual data pointers and variable speed peripheral access. In addition, the core is redesigned so that the machine cycle is shortened for most instructions, resulting in an effective processing ability that is roughly 2.5 times greater (faster) than the standard 8052 device. None of these features, other than those inherent in the device operation, were utilized in order to maximize the similarity between the Dallas and Intel test codes.The CULPRiT technology device is a version of the MSC-51 family compatible C8051 HDL core licensed from the Ultra Low Power (ULP) process foundry. The CULPRiT technology C8051 device is designed to operate at a supply voltage of 500 mV and includes an on-chip input/output signal level-shifting interface with conventional higher voltage parts. The CULPRiT C8051 device requires two separate supply voltages; the 500 mV and the desired interface voltage. The CULPRiT C8051 is ROMless and is intended to be instruction set compatible with the MSC-51 family.V. TEST HARDWAREThe 8051 Device Under Test (DUT) was tested as a component of a functional computer. Aside from DUT itself, the other componentsof the DUT computer were removed from the immediate area of the irradiation beam.A small card (one per DUT package type) with a unique hard-wired identifier byte contained the DUT, its crystal, and bypass capacitors (and voltage level shifters for the CULPRiT DUTs). This "DUT Board" was connected to the "Main Board" by a short 60-conductor ribbon cable. The Main Board had all other components required to complete the DUT Computer, including some which nominally are not necessary in some designs (such as external RAM, external ROM and address latch). The DUT Computer and the Test Control Computer were connected via a serial cable and communications were established between the two by the Controller (that runs custom designed serial interface software). This Controller software allowed for commanding of the DUT, downloading DUT Code to the DUT, and real-time error collection from the DUT during and post irradiation. A 1 Hz signal source provided an external watchdog timing signal to the DUT, whose watchdog output was monitored via an oscilloscope. The power supply was monitored to provide indication of latchup.VI. TEST SOFTWAREThe 8051 test software concept is straightforward. It was designed to be a modular series of small test programs each exercising a specific part of the DUT. Since each test was stand alone, they were loaded independently of each other for execution on the DUT. This ensured that only the desired portion of the 8051 DUT was exercised during the test and helped pinpoint location of errors that occur during testing. All test programs resided on the controller PC until loaded via the serial interface to the DUT computer. In this way, individual tests could have been modified at any time without the necessity of burning PROMs. Additional tests could have also been developed and added without impacting the overall test design. The only permanent code, which was resident on the DUT, was the boot code and serial code loader routines that established communications between the controller PC and the DUT.All test programs implemented:• An external Universal Asynchronous Receive and Transmit device (UART) for transmission of error information and communication to controller computer.• An external real-time clock for data error tag.•A watchdog routine designed to provide visual verification of 8051 health and restart test code if necessary.• A "foul-up" routine to reset program counter if it wanders out of code space.• An external telemetry data storage memory to provide backup of data in the event of an interruption in data transmission.The brief description of each of the software tests used is given below. It should be noted that for each test, the returned telemetry (including time tag) was sent to both the test controller and the telemetry memory, giving the highest reliability that all data is captured.Interrupt –This test used 4 of 6 available interrupt vectors (Serial, External, Timer0 Overflow, and Timer1 Overflow) to trigger routines that sequentially modified a value in the accumulator which was periodically compared to a known value. Unexpected values were transmitted with register information.Logic –This test performed a series of logic and math computations and provided three types of error identifications: 1) addition/subtraction, 2) logic and 3) multiplication/division. All miscompares of computations and expected results were transmitted with other relevant register information.Memory – This test loaded internal data memory at locations D:0x20 through D:0xff (or D:0x20 through D:0x080 for the CULPRiT DUT), indirectly, with an 0x55 pattern. Compares were performed continuously and miscompares were corrected while error information and register values were transmitted.Program Counter -The program counter was used to continuously fetch constants at various offsets in the code. Constants were compared with known values and miscompares were transmitted along with relevant register information. Registers – This test loaded each of four (0,1,2,3) banks of general-purpose registers with either 0xAA (for banks 0 and 2) or 0x55 (for banks 1 and 3). The pattern was alternated in order to test the Program Status Word (PSW) special function register, which controls general-purpose register bank selection. General-purpose register banks were then compared with their expected values. All miscompares were corrected and error information was transmitted.Special Function Registers (SFR) – This test used learned static values of 12 out 21 available SFRs and then constantly compared the learned value with the current one. Miscompares were reloaded with learned value and error information was transmitted.Stack – This test performed arithmetic by pushing and popping operands on the stack. Unexpected results were attributed to errors on the stack or to the stack pointer itself and were transmitted with relevant register information.VII. TEST METHODOLOGYThe DUT Computer booted by executing the instruction code located at address 0x0000. Initially, the device at this location was an EPROM previously loaded with "Boot/Serial Loader" code. This code initialized the DUT Computer and interface through a serial connection to the controlling computer, the "Test Controller". The DUT Computer downloaded Test Code and put it into Program Code RAM (located on the Main Board of the DUT Computer). It then activated a circuit which simultaneously performed two functions: held the DUT reset line active for some time (~10 ms); and, remapped the Test Code residing in the Program Code RAM to locate it to address 0x0000 (the EPROM will no longer be accessible in the DUT Computer's memory space). Upon awaking from the reset, the DUT computer again booted by executing the instruction code at address 0x0000, except this time that code was not be the Boot/Serial Loader code but the Test Code.The Test Control Computer always retained the ability to force the reset/remap function, regardless of the DUT Computer's functionality. Thus, if the test ran without a Single Event Functional Interrupt (SEFI) either the DUT Computer itselfor the Test Controller could have terminated the test and allowed the post-test functions to be executed. If a SEFI occurred, the Test Controller forced a reboot into Boot/Serial Loader code and then executed the post-test functions. During any test of the DUT, the DUT exercised a portion of its functionality (e.g., Register operations or Internal RAM check, or Timer operations) at the highest utilization possible, while making a minimal periodic report to the Test Control Computer to convey that the DUT Computer was still functional. If this reportceased, the Test Controller knew that a SEFI had occurred. This periodic data was called "telemetry". If the DUT encountered an error that was not interrupting the functionality (e.g., a data register miscompare) it sent a more lengthy report through the serial port describing that error, and continued with the test.VIII.DISCUSSIONA. Single Event LatchupThe main argument for why latchup is not an issue for the CULPRiT devices is that the operating voltage of 0.5 volts should be below the holding voltage required for latchup to occur. In addition to this, the cell library used also incorporates the heavy dual guard-barring scheme [4]. This scheme has been demonstrated multiple times to be very effective in rendering CMOS circuits completely immune to SEL up to test limits of 120 MeV-cm2/mg. This is true in circuits operating at 5, 3.3, and 2.5 Volts, as well as the 0.5 Volt CULPRiT circuits. In one case, a 5 Volt circuit fabricated on noncircuits wafers even exhibited such SEL immunity.B. Single Event UpsetThe primary structure of the storage unit used in the CULPRiT devices is the Single Event Resistant Topology (SERT) [5]. Given the SERT cell topology and a single upset node assumption, it is expected that the SERT cell will be completely immune to SEUs occurring internal to the memory cell itself. Obviously there are other things going on. The CULPRiT 8051 results reported here are quite similar to some resultsobtained with a CULPRiT CCSDS lossless compression chip (USES) [6]. The CULPRiT USES was synthesized using exactly the same tools and library as the CULPRiT 8051.With the CULPRiT USES, the SEU cross section data [7] was taken as a function of frequency at two LET values, 37.6 and 58.5 MeV-cm2/mg. In both cases the data fit well to a linear model where cross section is proportional to clock. In the LET 37.6 case, the zero frequency intercept occurred essentially at the zero cross section point, indicating that virtually all of these SEUs are captured SETs from the combinational logic. The LET 58.5 data indicated that the SET (frequency dependent) component is sitting on top of a "dc-bias" component –presumably a second upset mechanism is occurring internal to the SERT cells only at a second, higher LET threshold.The SET mitigation scheme used in the CULPRiT devices is based on the SERT cell's fault tolerant input property when redundant input data is provided to separate storage nodes. The idea is that the redundant input data is provided through a total duplication of combinational logic (referred to as “dual rail design”) such that a simple SET on one rail cannot produce an upset. Therefore, some other upset mechanism must be happening. It is possible that a single particle strike is placing an SET on both halves of the logic streams, allowing an SET to produce an upset. Care was taken to separate the dual sensitive nodes in the SERT cell layouts but the automated place-and-route of the combinatorial logic paths may have placed dual sensitive nodes close enough.At this point, the theory for the CULPRiT SEU response is that at about an LET of 20, the energy deposition is sufficiently wide enough (and in the right locations) to produce an SET in both halves of the combinatorial logic streams. Increasing LET allows for more regions to be sensitive to this effect, yielding a larger cross section. Further, the second SEU mechanism that starts at an LET of about 40-60 has to do with when the charge collection disturbance cloud gets large enough to effectively upset multiples of the redundant storage nodes within the SERT cell itself. In this 0.35 μm library, the node separation is several microns. However, since it takes less charge to upset a node operating at 0.5 Volts, with transistors having effective thresholds around 70 mV, this is likely the effect being observed. Also the fact that the per-bit memory upset cross section for the CULPRiT devices and the commercial technologies are approximately equal, as shown in Figure 9, indicates that the cell itself has become sensitive to upset.IX. SUMMARYA detailed comparison of the SEE sensitivity of a HBD technology (CULPRiT) utilizing the 8051 microcontroller as a test vehicle has been completed. This paper discusses the test methodology used and presents a comparison of the commercial versus CULPRiT technologies based on the data taken. The CULPRiT devices consistently show significantly higher threshold LETs and an immunity to latchup. In all but the memory test at the highest LETs, the cross section curves for all upset events is one to two orders of magnitude lower than the commercial devices. Additionally, theory is presented, based on the CULPRiT technology, that explain these results.This paper also demonstrates the test methodology for quantifying the level of hardness designed into a HBD technology. By using the HBD technology in a real-world device structure (i.e., not just a test chip), and comparing results to equivalent commercial devices, one can have confidence in the level of hardness that would be available from that HBD technology in any circuit application.ACKNOWLEDGEMENTSThe authors of this paper would like to acknowledge the sponsors of this work. These are the NASA Electronic Parts and Packaging Program (NEPP), NASA Flight Programs, and the Defense Threat Reduction Agency (DTRA).。

单片机英文文献及翻译

附录A英文文献翻译原文Temperature Control Using a Microcontroller:An Interdisciplinary Undergraduate Engineering Design ProjectJames S. McDonaldDepartment of Engineering ScienceTrinity UniversitySan Antonio, TX 78212AbstractThis paper describes an interdisc iplinary design project which was done under the author’s supervision by a group of four senior students in the Department of Engineering Science at Trinity University. The objective of the project was to develop a temperature control system for an air-filled chamber. The system was to allow entry of a desired chamber temperature in a prescribed range and to exhibit overshoot and steady-state temperature error of less than 1 degree Kelvin in the actual chamber temperature step response. The details of the design developed by this group of students, based on a Motorola MC68HC05 family microcontroller, are described. The pedagogical value of the problem is also discussed through a description of some of the key steps in the design process. It is shown that the solution requires broad knowledge drawn from several engineering disciplines including electrical, mechanical, and control systems engineering.1 IntroductionThe design project which is the subject of this paper originated from a real-world application.A prototype of a microscope slide dryer had been developed around an OmegaTM modelCN-390 temperature controller, and the objective was to develop a custom temperature control system to replace the Omega system. The motivation was that a custom controller targeted specifically for the application should be able to achieve the same functionality at a much lower cost, as the Omega system is unnecessarily versatile and equipped to handle a wide variety of applications.The mechanical layout of the slide dryer prototype is shown in Figure 1. The main element of the dryer is a large, insulated, air-filled chamber in which microscope slides, each with a tissue sample encased in paraffin, can be set on caddies. In order that the paraffin maintain the proper consistency, the temperature in the slide chamber must be maintained at a desired (constant) temperature. A second chamber (the electronics enclosure) houses a resistive heater and the temperature controller, and a fan mounted on the end of the dryer blows air across theheater, carrying heat into the slide chamber. This design project was carried out during academic year 1996–97 by four students under the author’s supervision as a Senior Design project in the Department of Engineering Science at Trinity University. The purpose of this paper isto describe the problem and the students’ solution in some detail, and to discuss some of the pedagogical opportunities offered by an interdisciplinary design project of this type. The students’ own report was presented a t the 1997 National Conference on Undergraduate Research [1]. Section 2 gives a more detailed statement of the problem, including performance specifications, and Section 3 describes the students’ design. Section 4 makes up the bulk of the paper, and discusses in some detail several aspects of the design process which offer unique pedagogical opportunities. Finally, Section 5 offers some conclusions.2 Problem StatementThe basic idea of the project is to replace the relevant parts of the functionality of an Omega CN-390 temperature controller using a custom-designed system. The application dictates that temperature settings are usually kept constant for long periods of time, but it’s nonetheless important that step changes be tracked in a “reasonable” manner. Thus the main requirements boil down to·allowing a chamber temperature set-point to be entered,·displaying both set-point and actual temperatures, and·tracking step changes in set-point temperature with acceptable rise time, steady-state error, and overshoot.Although not explicitly a part of the specifications in Table 1, it was clear that the customer desired digital displays of set-point and actual temperatures, and that set-point temperature entry should be digital as well (as opposed to, say, through a potentiometer setting).3 System DesignThe requirements for digital temperature displays and setpoint entry alone are enough to dictate that a microcontrollerbased design is likely the most appropriate. Figure 2 shows a block diagram of the stude nts’ design.The microcontroller, a MotorolaMC68HC705B16 (6805 for short), is the heart of the system. It accepts inputs from a simple four-key keypad which allow specification of the set-point temperature, and it displays both set-point and measured chamber temperatures using two-digit seven-segment LED displays controlled by a display driver. All these inputs and outputs are accommodated by parallel ports on the 6805. Chamber temperature is sensed using apre-calibrated thermistor and input via one of the 6805’s analog-to-digital inputs. Finally, a pulse-width modulation (PWM) output on the 6805 is used to drive a relay which switches line power to the resistive heater off and on.Figure 3 shows a more detailed schematic of the electronics and their interfacing to the 6805. The keypad, a Storm 3K041103, has four keys which are interfaced to pins PA0{ PA3 of Port A, configured as inputs. One key functions as a mode switch. Two modes are supported: set mode and run mode. In set mode two of the other keys are used to specify the set-point temperature: one increments it and one decrements. The fourth key is unused at present. The LED displays are driven by a Harris Semiconductor ICM7212 display driver interfaced to pins PB0{PB6 of Port B, configured as outputs. The temperature-sensing thermistor drives, through a voltage divider, pin AN0 (one of eight analog inputs). Finally, pin PLMA (one of two PWM outputs) drives the heater relay.Software on the 6805 implements the temperature control algorithm, maintains the temperature displays, and alters the set-point in response to keypad inputs. Because it is not complete at this writing, software will not be discussed in detail in this paper. The control algorithm in particular has not been determined, but it is likely to be a simple proportional controller and certainly not more complex than a PID. Some control design issues will be discussed in Section 4, however.4 The Design ProcessAlthough essentially the project is just to build a thermostat, it presents many nice pedagogical opportunities. The knowledge and experience base of a senior engineering undergraduate are just enough to bring him or her to the brink of a solution to various aspects of the problem. Yet, in each case, realworld considerations complicate the situation significantly.Fortunately these complications are not insurmountable, and the result is a very beneficial design experience. The remainder of this section looks at a few aspects of the problem which present the type of learning opportunity just described. Section 4.1 discusses some of the features of a simplified mathematical model of the thermal properties of the system and how it can beeasily validated experimentally. Section 4.2 describes how realistic control algorithm designs can be arrived at using introductory concepts in control design. Section 4.3 points out some important deficiencies of such a simplified modeling/control design process and how they can be overcome through simulation. Finally, Section 4.4 gives an overview of some of the microcontroller-related design issues which arise and learning opportunities offered.4.1 MathematicalModelLumped-element thermal systems are described in almost any introductory linear control systems text, and just this sort of model is applicable to the slide dryer problem. Figure 4 shows a second-order lumped-element thermal model of the slide dryer. The state variables are the temperatures Ta of the air in the box and Tb of the box itself. The inputs to the system are the power output q(t) of the heater and the ambient temperature T¥. ma and mb are the masses of the air and the box, respectively, and Ca and Cb their specific heats. μ1 and μ2 are heat transfer coefficients from the air to the box and from the box to the external world, respectively.It’s not hard to show that the (linearized) state equationscorresponding to Figure 4 areTaking Laplace transforms of (1) and (2) and solving for Ta(s), which is the output of interest, gives the following open-loop model of the thermal system:where K is a constant and D(s) is a second-order polynomial.K, tz, and the coefficients ofD(s) are functions of the variousparameters appearing in (1) and (2).Of course the various parameters in (1) and (2) are completely unknown, but it’s not hard to show that, regardless of their values, D(s) has two real zeros. Therefore the main transfer function of interest (which isthe one from Q(s), since we’ll assume constant ambient temperature) can be writtenMoreover, it’s not too hard to show that 1=tp1 <1=tz <1=tp2, i.e., that the zero lies between the two poles. Both of these are excellent exercises for the student, and the result is the openloop pole-zero diagram of Figure 5.Obtaining a complete thermal model, then, is reduced to identifying the constant K and the three unknown time constants in (3). Four unknown parameters is quite a few, but simple experiments show that 1=tp1 _ 1=tz;1=tp2 so that tz;tp2 _ 0 are good approximations. Thus the open-loop system is essentially first-order and can therefore be written(where the subscript p1 has been dropped).Simple open-loop step response experiments show that,for a wide range of initial temperatures and heat inputs, K _0:14 _=W and t _ 295 s.14.2 Control System DesignUsing the first-order model of (4) for the open-loop transfer function Gaq(s) and assuming for the moment that linear control of the heater power output q(t) is possible, the block diagram of Figure 6 represents the closed-loop system. Td(s) is the desired, or set-point, temperature,C(s) is the compensator transfer function, and Q(s) is the heater output in watts.Given this simple situation, introductory linear control design tools such as the root locus method can be used to arrive at a C(s) which meets the step response requirements on rise time, steady-state error, and overshoot specified in Table 1. The upshot, of course, is that a proportional controller with sufficient gain can meet all specifications. Overshoot is impossible, and increasing gains decreases both steady-state error and rise time.Unfortunately, sufficient gain to meet the specifications may require larger heat outputs than the heater is capable of producing. This was indeed the case for this system, and the result is that the rise time specification cannot be met. It is quite revealing to the student how useful such an oversimplified model, carefully arrived at, can be in determining overall performance limitations.4.3 Simulation ModelGross performance and its limitations can be determined using the simplified model of Figure 6, but there are a number of other aspects of the closed-loop system whose effects on performance are not so simply modeled. Chief among these are·quantization error in analog-to-digital conversion of the measured temperature and· the use of PWM to control the heater.Both of these are nonlinear and time-varying effects, and the only practical way to study them is through simulation (or experiment, of course).Figure 7 shows a SimulinkTM block diagram of the closed-loop system which incorporates these effects. A/D converter quantization and saturation are modeled using standard Simulink quantizer and saturation blocks. Modeling PWM is more complicated and requires a customS-function to represent it.This simulation model has proven particularly useful in gauging the effects of varying thebasic PWM parameters and hence selecting them appropriately. (I.e., the longer the period, the larger the temperature error PWM introduces. On the other hand, a long period is desirable to avoid excessiv e relay “chatter,” among other things.) PWM is often difficult for students to grasp, and the simulation model allows an exploration of its operation and effects which is quite revealing.4.4 The MicrocontrollerSimple closed-loop control, keypad reading, and display control are some of the classic applications of microcontrollers, and this project incorporates all three. It is therefore an excellent all-around exercise in microcontroller applications. In addition, because the project isto produce an actua l packaged prototype, it won’t do to use a simple evaluation board with theI/O pins jumpered to the target system. Instead, it’s necessary to develop a complete embedded application. This entails the choice of an appropriate part from the broad range offered in a typical microcontroller family and learning to use a fairly sophisticated development environment. Finally, a custom printed-circuit board for the microcontroller and peripherals must be designed and fabricated.Microcontroller Selection. In view of existing local expertise, the Motorola line of microcontrollers was chosen for this project. Still, this does not narrow the choice down much. A fairly disciplined study of system requirements is necessary to specify which microcontroller, out of scores of variants, is required for the job. This is difficult for students, as they generally lack the experience and intuition needed as well as the perseverance to wade through manufacturers’ selection guides.Part of the problem is in choosing methods for interfacing the various peripherals (e.g., what kind of display driver should be used?). A study of relevant Motorola application notes [2, 3, 4] proved very helpful in understandingwhat basic approaches are available, and what microcontroller/peripheral combinations should be considered.The MC68HC705B16 was finally chosen on the basis of its availableA/D inputs and PWMoutputs as well as 24 digital I/O lines. In retrospect this is probably overkill, as only oneA/D channel, one PWM channel, and 11 I/O pins are actually required (see Figure 3). The decision was made to err on the safe side because a complete development system specific to the chosen part was necessary, and the project budget did not permit a second such system to be purchased should the firstprove inadequate.Microcontroller Application Development. Breadboarding of the peripheral hardware, development of microcontroller software, and final debugging and testing of a customprinted-circuit board for the microcontroller and peripherals all require a development environment of some kind. The choice of a development environment, like that of themicrocontroller itself, can be bewildering and requires some faculty expertise. Motorola makes three grades of development environment ranging from simple evaluation boards (at around $100) to full-blown real-time in-circuit emulators (at more like $7500). The middle option was chosen for this project: the MMEVS, which consists of _ a platform board (which supports all 6805-family parts), _ an emulator module (specific to B-series parts), and _ a cable and target head adapter (package-specific). Overall, the system costs about $900 and provides, with some limitations, in-circuit emulation capability. It also comes with the simple but sufficient software development environment RAPID [5].Students find learning to use this type of system challenging, but the experience they gain in real-world microcontroller application development greatly exceeds the typical first-course experience using simple evaluation boards.Printed-Circuit Board. The layout of a simple (though definitely not trivial) printed-circuit board is another practical learning opportunity presented by this project. The final board layout, with package outlines, is shown (at 50% of actual size) in Figure 8. The relative simplicity of the circuit makes manual placement and routing practical—in fact, it likely gives better results than automatic in an application like this—and the student is therefore exposed to fundamental issues of printed-circuit layout and basic design rules. The layout software used was the very nice package pcb,2 and the board was fabricated in-house with the aid of our staff electronics technician.5 ConclusionThe aim of this paper has been to describe an interdisciplinary, undergraduate engineering design project: a microcontroller- based temperature control system with digital set-point entry and set-point/actual temperature display. A particular design of such a system has been described, and a number of design issues which arise—from a variety of engineering disciplines—have been discussed. Resolution of these issues generally requires knowledge beyond that acquired in introductory courses, but realistically accessible to advance undergraduate students, especiallywith the advice and supervision of faculty.Desirable features of the problem, from a pedagogical viewpoint, include the use of a microcontroller with simple peripherals, the opportunity to usefully apply introductorylevel modeling of physical systems and design of closed-loop controls, and the need for relatively simple experimentation (for model validation) and simulation (for detailed performance prediction). Also desirable are some of the technologyrelated aspects of the problem including practical use of resistive heaters and temperature sensors (requiring knowledge of PWM and calibration techniques, respectively), microcontroller selection and use of development systems, and printedcircuit design.AcknowledgementsThe author would like to acknowledge the hard work, dedication, and ability shown by the students involved in this project: Mark Langsdorf, Matt Rall, PamRinehart, and David Schuchmann. It is their project, and credit for its success belongs to them.References[1] M. Langsdorf, M. Rall, D. Schuchmann, and P. Rinehart,“Temperature control of a microscope slide dryer,” in1997 National Conference on Undergraduate Research,(Austin, TX), April 1997. Poster presentation.[2] Motorola, Inc., Phoenix, AZ, Temperature Measurementand Display Using the MC68HC05B4 and the MC14489,1990. Motorola SemiconductorApplicationNote AN431.[3] Motorola, Inc., Phoenix, AZ, HC05 MCU LED DriveTechniques Using the MC68HC705J1A, 1995. MotorolaSemiconductor Application Note AN1238.[4] Motorola, Inc., Phoenix, AZ, HC05MCU Keypad DecodingTechniques Using the MC68HC705J1A, 1995. MotorolaSemiconductor Application Note AN1239.[5] Motorola, Inc., Phoenix, AZ, RAPID Integrated DevelopmentEnvironment User’s Manual, 1993. (RAPID wasdeveloped by P & E Microcomputer Systems, Inc.).附录B英文文献翻译中文单片机温度控制：一个跨学科的本科生工程设计项目JamesS.McDonald工程科学系三一大学德克萨斯州圣安东尼奥市78212摘要本文所描述的是作者领导由四个三一大学高年级学生组成的团队进行的一个跨学科工程项目的设计。

单片机的外文文献及中文翻译

SCM is an integrated circuit chip，is the use of large scale integrated circuit technology to a data processing capability of CPU CPU random access memory RAM，read-only memory ROM，a variety of I / O port and interrupt system, timers / timer functions （which may also include display driver circuitry，pulse width modulation circuit，analog multiplexer，A / D converter circuit）integrated into a silicon constitute a small and complete computer systems.SCM is also known as micro—controller （Microcontroller), because it is the first to be used in industrial control。

Only a single chip by the CPU chip developed from a dedicated processor。

The first design is by a large number of peripherals and CPU on a chip in the computer system, smaller, more easily integrated into a complex and demanding on the volume control device which。

毕业设计(论文)外文原文及译文

毕业设计（论文）外文原文及译文一、外文原文MCUA microcontroller (or MCU) is a computer-on-a-chip. It is a type of microcontroller emphasizing self-sufficiency and cost-effectiveness, in contrast to a general-purpose microprocessor (the kind used in a PC).With the development of technology and control systems in a wide range of applications, as well as equipment to small and intelligent development, as one of the single-chip high-tech for its small size, powerful, low cost, and other advantages of the use of flexible, show a strong vitality. It is generally better compared to the integrated circuit of anti-interference ability, the environmental temperature and humidity have better adaptability, can be stable under the conditions in the industrial. And single-chip widely used in a variety of instruments and meters, so that intelligent instrumentation and improves their measurement speed and measurement accuracy, to strengthen control functions. In short，with the advent of the information age, traditional single- chip inherent structural weaknesses, so that it show a lot of drawbacks. The speed, scale, performance indicators, such as users increasingly difficult to meet the needs of the development of single-chip chipset, upgrades are faced with new challenges.The Description of AT89S52The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of In-System Programmable Flash memory. The device is manufactured using Atmel's high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes ofFlash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.Features• Compatible with MCS-51® Products• 8K Bytes of In-System Programmable (ISP) Flash Memory– Endurance: 1000 Write/Erase Cycles• 4.0V to 5.5V Operating Range• Fully Static Operation: 0 Hz to 33 MHz• Three-level Program Memory Lock• 256 x 8-bit Internal RAM• 32 Programmable I/O Lines• Three 16-bit Timer/Counters• Eight Interrupt Sources• Full Duplex UART Serial Channel• Low-power Idle and Power-down Modes• Interrupt Recovery from Power-down Mode• Watchdog Timer• Dual Data Pointer• Power-off FlagPin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.ALE/PROGAddress Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSENis activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Special Function RegistersNote that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.Timer 2 Registers:Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.Interrupt Registers:The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer Registers areprovided: DP0 at SFR address locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should always initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register.Power Off Flag:The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1” during power up. It can be set and rest under software control and is not affected by reset.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space.When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52.Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON.Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.In the Counter function, the register is incremented in response to a1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.InterruptsThe AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 10.Each of these interrupt sources can be individually enabled or disabledby setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once.Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software.The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.二、译文单片机单片机即微型计算机，是把中央处理器、存储器、定时/计数器、输入输出接口都集成在一块集成电路芯片上的微型计算机。

单片机外文文献翻译(2024)

引言：单片机（Microcontroller）是一种广泛应用于嵌入式系统中的小型计算机芯片。

它集成了处理器核心、存储器、外设接口和时钟电路等核心部件，可以独立运行。

随着全球化的发展，外文文献对于学习和研究单片机领域来说至关重要。

本文翻译的外文文献《MicrocontrollerbasedTrafficLightControlSystem》详细介绍了基于单片机的交通信号灯控制系统。

概述：交通信号灯控制是现代都市交通系统中至关重要的一环。

传统的交通信号灯控制系统通常由定时器控制，不能根据实际交通情况动态调整信号灯的时间。

而基于单片机的交通信号灯控制系统可以实现根据实时交通流量来动态调整信号灯的时间，优化交通效率。

本文将详细介绍该系统的设计和实现。

正文：一、单片机选型1.1.CPU性能：本文选择了一款高性能的32位单片机作为控制核心，它具有较高的处理能力和较大的存储器容量，可以同时处理多条交通路口的信号控制。

1.2.外设接口：该单片机具有丰富的外设接口，可以与交通信号灯、传感器和通信设备等进行连接，实现信号控制和数据交互。

1.3.低功耗设计：为了节约能源和延长系统寿命，在单片机选型时考虑了低功耗设计，降低系统运行的能耗。

二、硬件设计2.1.交通信号灯：在设计交通信号灯时，考虑了日夜可见性和能耗。

采用了高亮度LED作为信号灯光源，同时添加了光敏传感器控制信号灯的亮度，以满足不同时间段的亮度需求。

2.2.传感器：通过安装车辆感应器和行人感应器等传感器，可以在实时监测交通流量的基础上，智能调整信号灯时间，提高路口的交通效率。

2.3.通信设备：在交通信号灯控制系统中引入了通信设备，可以实现各交通路口之间的信息交互和协调控制，提高整体交通系统的效率。

三、软件设计3.1.程序架构：采用了多任务的实时操作系统，将交通信号灯控制、传感器数据处理和通信设备控制等功能分别封装成不同的任务，实现了系统的高效运行和任务调度。

单片机设计外文文献翻译(含中英文)

附录A 外文翻译——AT89S52/AT89S51技术手册AT89S52译文主要性能与MCS-51单片机产品兼容8K字节在系统可编程Flash存储器1000次擦写周期全静态操作：0Hz～33Hz三级加密程序存储器32个可编程I/O口线三个16位定时器/计数器八个中断源全双工UART串行通道低功耗空闲和掉电模式掉电后中断可唤醒看门狗定时器双数据指针掉电标识符功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程Flash 存储器。

使用Atmel公司高密度非易失性存储器技术制造，与工业80C51产品指令和引脚完全兼容。

片上Flash 允许程序存储器在系统可编程，亦适于常规编程器。

在单芯片上，拥有灵巧的8位CPU和在系统可编程Flash，使得AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。

AT89S52具有以下标准功能：8k字节Flash，256字节RAM，32位I/O口线，看门狗定时器，2个数据指针，三个16位定时器/计数器，一个6向量2级中断结构，全双工串行口，片内晶振及时钟电路。

另外，AT89S52可降至0Hz静态逻辑操作，支持2种软件可选择节电模式。

空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、中断继续工作。

掉电保护方式下，RAM内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止。

引脚结构方框图VCC : 电源GND :地P0口：P0口是一个8位漏极开路的双向I/O口。

作为输出口，每位能驱动8个TTL逻辑电平。

对P0端口写“1”时，引脚用作高阻抗输入。

当访问外部程序和数据存储器时，P0口也被作为低8位地址/数据复用。

在这种模式下，P0具有内部上拉电阻。

在flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。

程序校验时，需要外部上拉电阻。

P1口：P1 口是一个具有内部上拉电阻的8位双向I/O 口，p1 输出缓冲器能驱动4个TTL 逻辑电平。

自动化单片机毕业设计文献翻译中英文_单片机概述、应用与发展

外文资料Outline, Application and Development of thesinglechipThe singlechip is one kind of integrated circuit chip, which uses the ultra large-scale technology and has the data-handling capacity (for example arithmetic operation, logic operation, data transfer, interrupt processing) the microprocessor (CPU), random access data-carrier storage (RAM), read-only program memory (ROM), input output circuit (I/O), possibly also includes fixed time the counter, serial passes unguardedly (SCI), demonstration actuation electric circuit (LCD or LED actuation electric circuit), pulse-duration modulation electric circuit (PWM), simulation multichannel switch and A/Electric circuit and so on D switch integrates to together the monolith chip on, constitutes to be smallest the computer system which however consummates. These electric circuits can under the software control accurate, be rapid, highly effective complete the procedure designer preset the duty.From this looked that, singlechip has the function which the microprocessor does not have, it may alone complete the intellectualization control function which the modern industry control requests, this is singlechip biggest characteristic.However singlechip also is different with the single trigger, the chip before the development, it only has the function greatly strengthened ultra large scale integrated circuit, if entrusts with it the specific procedure, it then is youngest, the integrity microcomputer control system, it (PC machine) has the essential difference with the single trigger or the personal computing, singlechip application belongs to the chip level application, needs the user to understand singlechip chip the structure and the command system as well as other integrated circuit application technologies and the system design need theory and technology, with such specific chip design application procedure, thus causes this chip to have the specific function.The different singlechip has the different hardware characteristic and the software characteristic, namely their technical characteristicis different, the hardware characteristic is decided by singlechip chip internal structure, the user must use some kind of singlechip, must understand whether this product does satisfy the characteristic target which the need the function and the application system requests. Here technical characteristic including function characteristic, control characteristic and electrical specification and so on, these information needs to obtain from in the production merchant technical manual. The software characteristic is refers to the command system characteristic and the development support environment, the instruction characteristic is singlechip addressing way which we is familiar with, the data processing and the logical processing way, input-output characteristic and to power source request and so on. The development support environment is compatible and the probability including the instruction, supports the software (to contain may support development application procedure software resources) and the hardware resources. Must use some model singlechip to develop own application system, master its structure characteristic and the technical characteristic is that we need..Singlechip control system could substitute for before uses control system which the complex electronic circuit or the digital circuit constituted, might the software control realizes, and could realize the intellectualization, now singlechip control category omnipresent, for example correspondence product, domestic electric appliances, intelligent instrument measuring appliance, process control and special-purpose control device and so on, singlechip application domain was more and more widespread.Indeed, singlechip application significance is far is not restricted in its application category or from this the economic efficiency which brings, it fundamentally changed the traditional control method and the design thought more importantly. Is controls technical a revolution, is an important milestone.2.The MCU’s development outlineIn 1946 first electronic accounting machine birth until now, only then 50 years, depends upon microelectronic technology and the semiconductor technology progress, from the electron tube - transistor- integrated circuit - large scale integrated circuit, now together on the chipdefinitely may integrate several million even more than ten million transistor, causes the computer volume slightly, the function is stronger. Specially in the nearly 20 years time, computer technology obtained the rapid development, the computer in the industry and agriculture, the scientific research, the education, the national defense and the aerospace domain has obtained the widespread application, computer technology already was a national modern science and technology level important symbol.Singlechip is born in the 20th century 70's, looks like F8 monolithic microcomputer which Fairchid Corporation develops. The so-called singlechip is uses the large scale integrated circuit technology the central processing element (Center Processing Unit, Also is Chang Cheng CPU) and the data-carrier storage (RAM), the program memory (ROM) and other I/O passes integrates unguardedly on together the chip, constitutes a smallest computer system, but modern singlechip then has added on the severance unit, fixed time unit and A/D transformation and so on more complex, more perfect electric circuit, causes singlechip the function more and more formidable, the application is more widespread.The 20th century 70's, microelectronic technology is being at the development phase, the integrated circuit belongs to the scale development time, each kind of new material new craft not yet mature, singlechip still occupied the primary development phase, the part integration scale also quite small, the function quite was simple, CPU, RAM had generally has also included some simple I/O integrates to the chip on, looks like Farichild Corporation to belong to this type, it also must be joined to the periphery other processing electric circuits just now to constitute the integrity the computing system. The similar singlechip also has Zilog Corporation the Z80 microprocessor.In 1976 INTEL Corporation has promoted the MCS-48 singlechip, this time singlechip is the genuine 8 monolithic microcomputers, and pushes to the market. It is young by the volume, function entire, the price has lowly won the widespread application, has laid the foundation for singlechip development, becomes in singlechip history the important milestone.Under the MCS-48 leadership, after that, each big semiconductor company developed and has developed own singlechip one after another,looked like Zilog Corporation the Z8 series. To the beginning of the 80's, singlechip has developed to the high performance stage, looks like INTEL Corporation the MCS-51 series, Motorola Corporation 6,801 and 6,802 series, Rokwell Corporation 6,501 and 6,502 series and so on, In addition,Japan's famous electrical company NEC and HITACHI all one after another developed had oneself characteristic the special-purpose singlechip.The 80's, world each big company competes to develop the variety multi-purpose strong singlechip, some severaldozens series, more than 300 varieties, this time singlechip belongs approximately truely monolithic, mostly integrated CPU, RAM, ROM, number many I/O connection, many kinds of interruption system, even also has some to bring A/D switch singlechip, function more and more formidable, RAM and ROM capacity also more and more big, the addressing space even may reach 64kB, may say, singlechip developed to a brand-new stage, the application domain has been more widespread, many domestic electric appliances moved towards the intellectualized development path which controlled using singlechip.After 1982, 16 singlechips are published, represent the product are INTEL Corporation's MCS-96 series, 16 singlechips compare 8 machine, the data width increased a time, real-time processing ability stronger, the basic frequency is higher, the integration rate had achieved 120,000 transistors, RAM increased to 232 bytes, ROM then has achieved 8kB, and had 8 interrupt sources, at the same time has disposed multichannel A/D transformation channel, high speed I/The O processing unit, is suitable for the more complex control system.After 90's, singlechip obtained the rapid development, the world each big semiconductor company has developed a function more formidable singlechip one after another. American Microchip Corporation had issued one kind of incompatible MCS-51 new generation of PIC series singlechip, has aroused the field widespread interest completely, its product only then 33 simplified the set of instructions to attract many users specially, caused the people to concentrate from the INTEL 111 complex instructions. The PIC singlechip has obtained the fast development, holds the small space in the field.The afterwards matter, the familiar singlechip public figures quite have been all clear, more monolithic aircraft types pour out, MOTOROLACorporation had issued one after another the MC68HC series singlechip, Japan's several famous companies all developed a performance stronger product, but Japan's singlechip used in generally the special-purpose systems control, but did not look like company and so on INTEL puts in to the market forms the general singlechip. For example NEC Corporation produces the uCOM87 series singlechip, its representative works uPC7811 is one kind of performance quite outstanding singlechip. MOTOROLA Corporation's characteristic and so on MC68HC05 series its high speed low price has won many users.Zilog Corporation's Z8 series product representative works are Z8671, contains BASIC the Debug interpreter, enormous place then user. But American country half COP800 series singlechip then uses the advanced Harvard structure. ATMEL Corporation then perfectly unifies singlechip technology and the advanced Flash memory technology, has issued the performance quite outstanding AT89 series singlechip. Including company and so on China's Taiwan HOLTEK and WINBOND in abundance has also joined singlechip development ranks, by reason of their inexpensive superiority, shares cup of beautiful thick soup.In 1990 American INTEL Corporation promoted 80,960 super 32 singlechips to cause the computer stir, the product has put in the market one after another, became in singlechip history an important milestone.This period, in singlechip field, singlechip variety extraordinary splendour, competes to be the most unusual. Some 8, 16 even 32 machine, but 8 singlechips by its price inexpensive, the variety complete, the application software rich, the support environment were still full, characteristic and so on development convenience but are occupying the dominant position. But INTEL Corporation by reason of their abundant technology, the performance outstanding type and the good foundation, at present was still singlechip mainstream product. Only is the 90's intermediate stages, INTEL Corporation is busy is developing their personal computing microprocessor, not the enough energy continued singlechip technology which develops oneself creates leads, but by company and so on PHILIPS continues to develop the C51 series singlechip.3.Singlechip application domainMCU applications SCM now permeate all areas of our lives, which is almost difficult to find traces of the field without SCM. Missile navigation equipment, aircraft, all types of instrument control, computer network communications and data transmission, industrial automation, real-time process control and data processing, extensive use of various smart IC card, civilian luxury car security system, video recorder, camera, fully automatic washing machine control, and program-controlled toys, electronic pet, etc., which are inseparable from the microcontroller. Not to mention the area of robot control, intelligent instruments, medical equipment was. Therefore, the MCU learning, development and application of the large number of computer applications and intelligent control of the scientists, engineers.Singlechip widely applies in the instrument measuring appliance, the domestic electric appliances, the medical equipment, domain and so on aerospace, special purpose equipment intellectualized management and process control, may divide the following several categories approximately:1. On intelligent instrument measuring appliance applicationSinglechip has the volume small, the power loss low, the control function strong, the expansion is nimble, merit and so on microminiaturization and easy to operate, widely applies in the instrument measuring appliance, the union different type sensor, may realize such as physical quantity the and so on voltage, power, frequency, humidity, temperature, current capacity, speed, thickness, angle, length, degree of hardness, element, pressure survey. Uses singlechip control to cause the instrument measuring appliance digitization, the intellectualization, the microminiaturization, also the function compares uses the electron or the digital circuit is more formidable. For example precise measurement equipment (dynamometer, oscilloscope, each kind of analyzer).2. In industry control applicationMay constitute the various formats control system, the data acquisition system with singlechip. For example the factory assembly line intellectualized management, the elevator intellectualization control, each kind of alarm system, constitutes two cascade control systems with the computer networking and so on.3. In domestic electric appliances applicationMay say like this that, the present domestic electric appliances basically have all used singlechip control, praised, the washer, the electric refrigerator, the air conditioner, the color television, other acoustic video frequency equipments from the electricity food, again to the electronic weighting equipment, all kinds of, omnipresent.4. In computer network and correspondence domain applicationOf the modern singlechip has the correspondence connection generally, may very conveniently and the computer carries on the data communication, for provided the extremely good physical conditions application in between the computer network and the communication facility, the present communication facility basically has all realized singlechip intelligence control, from the handset, the telephone, the small program controlled switch, the building automatic correspondence ringing system, the train wireless correspondence, again the mobile phone which everywhere to the routine work in, the colony mobile communication, radio intercom and so on.5. Singlechip in medical equipment domain applicationSinglechip quite is also widespread inmedical equipment use, for example medical life-support machine, each kind of analyzer, , ultrasound diagnosis equipment and hospital bed ringing system and so on.6. In a variety of major appliances in the modular applicationsDesigned to achieve some special single specific function to be modular in a variety of circuit applications, without requiring the use of personnel to understand its internal structure. If music integrated single chip, seemingly simple function, miniature electronic chip in the net (the principle is different from the tape machine), you need a computer similar to the principle of the complex. Such as: music signal to digital form stored in memory (like ROM), read by the microcontroller, analog music into electrical signals (similar to the sound card). In large circuits, modular applications that greatly reduce the volume, simplifies the circuit and reduce the damage, error rate, but also easy to replace.7. Microcontroller in the application field of automotive equipmentSCM in automotive electronics is widely used, such as a vehicle engine controller, CAN bus-based Intelligent Electronic Control Engine, GPS navigation system, abs anti-lock braking system, brake system, etc..In addition, singlechip in the industry and commerce, the finance, the scientific research, the education, domain and so on national defense aerospace all has the extremely widespread use.4.Singlechip development tendencyNow may say singlechip was all flowers blooms together, the time which hundred school of thought contended, in the world each big chip manufacture company has all promoted own singlechip, from 8, 16 to 32, innumerable, had everything expected to find, has compatibly with the mainstream C51 series, also had not not compatibly, but they unique, became mutually supplementarily, provided the broad world for singlechip application.Looks over singlechip developing process, may indicate singlechip development tendency, has approximately:1. Low power loss CMOSThe MCS-51 series 8,031 promotes when the power loss reaches 630mW, but the present singlechip all about 100mW, along with more and more is generally low to singlechip power loss request, the present each singlechip manufacturer basic has all used CMOS (complementary metal oxide semiconductor craft). Looked like 80C51 to use HMOS (namely high density metal oxide compound semiconductor craft) and CHMOS (supplementary high density metal oxide compound semiconductor craft). CMOS although power loss low, but because its physical characteristic decides its working speed insufficiently high, but CHMOS then had has been high speed and the low power loss characteristic, these characteristics, suited in are requesting the low power loss likely battery power supply the application situation. Therefore this kind of craft will be the main way which the next section of times singlechip will develop.2. Miniature monolithicNow the conventional singlechip all is generally the central processor (CPU), the random access data storage (RAM), the read-only program memory (ROM), parallel and the serial communication connection, the interruption system, the timing circuit, the clock electric circuit integration on together the sole chip, the enlargement mode singlechip integrated like A/The D switch, PMW (pulse-duration modulation electric circuit), WDT (watch-dog), some singlechips (liquid crystal) actuate LCD the electriccircuit all to integrate on the sole chip, such singlechip contains unit electric circuit more, the function is more formidable. Even singlechip merchant also may act according to the user requirement the body custom make, makes has oneself characteristic singlechip chip.In addition, present product universal demand volume small, weight light, this requests singlechip strong and the power loss is low besides the function, but also requests its volume to have to be small. Present many singlechips all have the many kinds of seals form, SMD (superficial seal) more and more receives welcome, to enable the system which constitutes by singlechip towards the microminiaturized direction to develop.3. Mainstream and multi- varieties coexistenceNow although singlechip variety is many, unique, but still as the core singlechip occupies the mainstream take 80C51, the compatible its structure and the command system have PHILIPS Corporation the product, the ATMEL Corporation's product and the Chinese Taiwan's Winbond series singlechip. Therefore C8051 was the core singlechip occupied the half of the country. But Microchip Corporation's PIC simplified the set of instructions (RISC) also to have the strong development tendency, the Chinese Taiwan's HOLTEK Corporation recent years singlechip output grows day by day, if the low price nature superior superiority, occupied a certain market minute volume. In addition also has MOTOROLA Corporation the product, the Japanese several big companies' special-purpose singlechips. In the certain time, this kind of situation will be able to continue, will not have the monopoly aspect which some singlechip unified, will walk will be depends on for existence supplementarily, will complement one another, the communal development path.中文译文单片机概述、应用及发展单片机是一种集成电路芯片，采用超大规模技术把具有数据处理能力(如算术运算，逻辑运算、数据传送、中断处理)的微处理器(CPU)，随机存取数据存储器(RAM)，只读程序存储器(ROM)，输入输出电路(I/O口)，可能还包括定时计数器，串行通信口(SCI)，显示驱动电路(LCD或LED驱动电路)，脉宽调制电路(PWM)，模拟多路转换器及A/D转换器等电路集成到一块单块芯片上，构成一个最小然而完善的计算机系统。

单片机毕业设计外文文献翻译

英文原文：80C518051 single-chip micro-computer, referred to as microcontrollers, there are known as micro-controller, a micro-computer re -To branch. SCM is developed in the mid 70s a large-scale integrated circuit chip, a CPU, RAM, ROM, I / O interfaces and interrupt system on the same silicon device. Since the 80s, Microcontroller rapid development, all kinds of new products are constantly emerging, there have been many high-performance of new models now become the field of factory automation and control of the pillar industries.Pin Function:MCS-51 is a standard 40-pin DIP IC chip, pin distribution ---- microcontroller pin diagram please refer to:P0.0 ~ P0.7 P0 port 8-bit bidirectional port lines (in the pin 39 to No. 32 terminal). P1.0 ~ P1.7 P1 port 8-bit bidirectional port line (pin 1 in the No. 8 terminal).P2.0 ~ P2.7 P2 port 8-bit bidirectional port lines (in the pin terminal 21 ~ 28).P3.0 ~ P3.7 P3 port 8-bit bidirectional port lines (in the pin terminal 10 ~ 17).This four I / O port has not exactly the same function, we can get to learn, and other books though, but written in too deep, difficult to understand for beginners, here are according to my own expression to write the I believe that you can understand.P0 port has three functions:1, external expansion memory, as the data bus (Figure 1 in D0 ~ D7 of data bus interface)2, external expansion memory, as the address bus (Figure 1 in A0 ~ A7 to address bus interface)3, is not extended, it can do a general I / O to use, but within the supreme pull-up resistor, as an input or output should be connected to an external pull-up resistor.P1 port Zhizuo I / O port to use: its internal pull-up resistor.P2 port has two functions:1,An extended external memory when used as an address bus2, doing a general I / O port used, and their internal pull-up resistor;P3 port has two functions:As well as I / O using the external (the internal pull-up resistor), there are some special features, from a special register to set the specific features please refer to our explanation behind the pin.Internal EPROM of the microcontroller chip (for example, 8751), for the writing process required to provide specialized programming and programming pulse power, these signals are also provided in the form from the signal pin, and Namely: programming pulse: 30 feet (ALE / PROG)Programming voltage (25V): 31 feet (EA / Vpp)In introducing the four I / O port referred to a "pull-up resistor" Then, pull-up resistor is what Dongdong do? What role does he play? Said the resistance that is of course, is a resistor, when as an input, the pull-up resistor pulled its potential, if the input is low you can provide a current source; Therefore, if the P0 port as long as the input, in the high impedance state, only an external pull-up resistor to be effective. ALE / PROG address latch control signal: in a system is extended, ALE is used to control the P0 port output low 8-bit address latch latch get together in order to achieve low address and data segregation. (In the back on the expansion of the curriculum, we will see the 8051 expansion of EEPROM circuit, the ALE and the 74LS373 in Figure G-latches connected to the external CPU to access when the time to lock the address low address, the P0 port output. ALE may be high may also be low, when the ALE is high, allowing address latch signal when accessing external memory, ALE signals a negative transition (from positive to negative) P0 port on the lower eight address signals into the latch. when ALE is low, when, P0 port on the content and the output latch line. on the latch, and we will be introduced later.In the absence of access to external memory during the period, ALE 1 / 6 oscillator frequency output cycle (ie, frequency of 6 points), when access to external memory to 1 / 12 oscillator cycle, the output (12 min frequency). From here we can see that when the system does not extend when the ALE will be 1 / 6 cycle, fixed frequency oscillator output, so can be used as an external clock, or the use of an external timing pulse.PORG pulse input for the program: In the fifth lesson MCU's internal structure and composition, we know that in 8051 within the a 4KB or 8KB of program memory (ROM), ROM's role is to be used to store user needs implementation of the program, then we are into how to write good programs into this ROM in it? Is actually programmed into the pulse input can be written, this pulse input port is PROG. PSEN external program memory read strobe: In reading an external ROM, PSEN low effective, in order to achieve an external ROM module read.1, the internal ROM reading, PSEN is not action;2, external ROM reading at each machine cycle will move twice;3, external RAM read, the two PSEN pulse is skipped will not be output;4, external ROM, and ROM-foot-phase OE.See Figure 2 - (8051 extension 2KB EEPROM circuit in Figure PSEN and expansion ROM in the OE pin-phase)EA / VPP access and sequence memory control signals1, then high time:CPU reads the internal program memory (ROM)Expansion of the external ROM: When reading the internal program memory than0FFFH (8051) 1FFFH (8052) automatically reads the external ROM.2, then low when: CPU to read external program memory (ROM). In the previous study, we are aware, there is no internal ROM MCU 8031, then 8031 microcontroller in the application, this pin is a low level of direct.3,8751 Shaoxie internal EPROM, to make use of this pin input voltage of 21V forShao Xie.RST Reset signal: when the input signal continuously high for more than two machine cycles when it is effective to complete the MCU reset initialization, when the reset program counter PC = 0000H, ie, after reset from the program memory of the 0000H unit to read the first script.External crystal oscillator pins XTAL1 and XTAL2. When using the chip internal clock, this two-pin for external quartz crystal and fine-tuning capacitor; when using an external clock, used to access an external clock pulse signal.VCC: Power Supply +5 V inputVSS: GND Ground.A VR and the pic are 8051 different structures with 8-bit microcontrollers, because structure is different, so assembly instructions are different, but distinct from the useof CISC instruction set of the 8051, they are RISC instruction set, and only a few dozen instructions, most instructions are single instruction cycle instruction, so in the same crystal frequency, faster than the 8051. Another PIC 8-bit microcontroller in previous years, is the world's largest MCU shipments, followed by Freescale microcontroller.ARM is actually 32-bit microcontroller, its internal resources (registers and peripheral functions) than in 8051 and PIC, A VR should be a lot more, with the computer's CPU chip is very close. Commonly used in mobile phones, routers and so on.DSP is actually a special kind of microcontroller, which from 8-32 are available here. It is specifically used to calculate the digital signals. Operation in some formulas, it's fastest computers than the current home of the CPU even faster. For example, the general 32-bit DSP instruction cycle in an op-End a 32-digit x 32-digit product coupled with a 32-digit. Applied to certain pairs of real-time processing requirements of the higher places中文译文：8051单片微型计算机简称为单片机，又称为微型控制器，是微型计算机的一个重要分支。

单片机STM32外文文献翻译、中英文翻译

外文译英文原文：STM32 MicrocontrollerIntroductionRequirements based STM32 family is designed for high-performance, low-cost, low-power embedded applications designed specifically for ARM Cortex-M3 core. According to the performance into two different series: STM32F103 "Enhanced〞 series and STM32F101 "Basic" series. Enhanced Series clock frequency of 72MHz, the highest performance of similar products product; basic clock frequency of 36MHz, 16-bit product prices get more than 16 products significantly enhance the performance and is 16 product users the best choice. Both series have built-in 32K to 128K of flash memory, the difference is the maximum capacity of the SRAM and peripheral combinations. At 72MHz, executing from Flash, STM32 power consumption 36mA, are 32 products on the market s lowest power, the equivalent of 0.5niA/MHz.STM32F103 Performance Characteristics1)Kernel. ARM32 bit CPU, the maximum operating frequency of 72MHz,1.25DMIPS/MHz. Single-cycle multiply and hardware divide.2)Memory. Integrated on-chip 32-512KB of Flash memory. 6-64KB SRAM memory.3)Clock, reset, and power management. 2.0-3.6V power supply and I/O interface, the drive voltage. POR, PDR and programmable voltage detector. 4-16MHz crystal. Embedded factory tuned 8MHz RC oscillator circuit. 40 kHz internal RC oscillator circuit. CPU clock for the PLL. With calibration for the RTC 32kHz crystal.4)Low power consumption. Three kinds of low-power mode. Sleep, stop, standby mode. For RTC and backup registers supply VBAT.5)Debug mode. Serial debugging and JTAG interface.6)Direct data storage. 12-channel direct data storage controller. Supported peripherals: timers, ADC, DAC, SPI, IIC and USART.7)Up to a maximum of 112 fast I / O ports. Depending on the modeL there are 26,37,51,80, and 112 I/O ports, all ports can be mapped to 16 external interrupt vectors. In addition to the analog input, all of them can accept the input of 5V or less.8)Up to a maximum of 11 timers. Four 16-bit timers, each with 4 IC / OC / PWM orpulse counter. 2 16 6-channel advanced control timer: up to 6 channels can be used for PWM output. 2 watchdog timer. Systick tinier: 24 down counter. Two 16-bit basic timer for driving DAC.9)Up to a maximum of 13 communication interfaces. 2 IIC interface. 5 USART interfaces. 3 SPI interface, two and IIS reuse. CAN interface. USB 2.0 full-speed interface. SDIO interface.System Function1)Integration of embedded Flash and SRAM memory ARM Cortex-M3 core. And 8/16 equipment compared, ARM Cortex-M3 32-bit RISC processor provides a higher code efficiency. STM32F103xx microcontrollers with an embedded ARM core, so it can be compatible with all ARM tools and software.2)Embedded Flash memory and RAM memory. Built up to 512KB embedded Flash, can be used to store programs and data. Up to 64KB of embedded SRAM clock speed of the CPU can read and write.3)Variable static memory. Variable static memory with 4 chip selects, supports four modes: Flash, RAM, PSRAM, NOR and NAND. After three FSMC interrupt lines connected to the OR after the nested vector interrupt controller. No read / write FIFO, except PCCARD, the code is executed from external memory is not supported Boot, the target frequency is equal to SYSCLK / 2, so the time when the system clock is 72MHz, 36MHz conducted in accordance with external access.4)Nested Vectored Internipt Controller. Can handle 43 maskable interrupt channels, providing 16 interrupt priority levels. Tightly coupled nested vectored intenupt controller to achieve lower latency interrupt handling directly passed to the kernel interrupt vector table entry address, tightly coupled nested vectored interrupt controller kernel interface, allowing early treatment interruption, the latter to be more high-priority interrupt processing, support tail chain, auto-save processor state terrupts automatically restored on interrupt exit, no instructions intervention.5)External internipt / event controller. External interrupt / event controller consists for 19 to generate interrupt / event requests edge detector lines. Each line can be individually configured to select the trigger event, it can be individually masked. There is a pending interrupt request registers to maintain state. When an external line appear longer than the internal APB2 clock-cycle pulse, the external interrupt / event controller is able to detect. Up to 112 GPIO connected to the 16 external internipt lines.6)Clocks and startup. At boot time or to the system clock selection, but the reset whenthe internal 8MHz crystal oscillator is selected as the CPU clock. Can choose a 4-16MHz external clock, and will be monitored to determine the success. During this time, the interrupt controller is disabled and the software management is subsequently disabled. Also, if there is a need, PLL clock internipt management fully available. Comparator can be used more pre-configuration of the AHB frequency, including high-speed and low-speed APB APB, APB highest frequency of high-speed 72MHz, low-speed APB highest frequency of 36MHz.Architectural AdvantagesIn addition to the new features Enhanced peripheral interfaces, STM32 series also interconnect with other STM32 microcontrollers offer the same standard interface, such sharing of peripherals to enhance the entire product family, application flexibility, so that developers can a plurality of design reuse the same software. New STM32 standard peripherals include 10 timers, two 12-bit ADC, two 12-bit DAC, two I2C interfaces, five USART interfaces and three SPI ports. There are 12 new products peripherals direct data storage channel, there is a CRC calculation unit, like other STM32 microcontrollers, the supports 96 unique identifier.New series also has followed the STM32 microcontroller family of products low voltage and energy saving are two advantages. 2.0V to 3.6V operating voltage range compatible with the mainstream of battery technologies such as lithium batteries and nickel-metal hydride batteries, the package also features a battery operation mode dedicated pin Vbat. 72MHz frequency to execute code from flash consumes only 27mA current. There are four low-power mode, the current consumption can be reduced to two microamps. Quick Start from low power mode to save energy too; starting circuit using STM32 internally generated 8MHz signal, the microcontroller from stop mode when you wake up with less than 6 microseconds.中文译:单片机STM321STM32的介绍STM32系列基于专为要求高性能、低本钱、低功耗的嵌入式应用专门设计的ARMCortex-M3内核.按性能分成两个不同的系列：STM32F103 “增强型〞系列和STM32F101 “根本型〞系列.增强型系列时钟频率到达72MHz,是同类产品中性能最高的产品；根本型时钟频率为36MHz,以16位产品的价格得到比16位产品大幅提升的性能,是16位产品用户的最正确选择.两个系列都内置32K 到128K 的闪存,不同的是SRAM的最大容量和外设接口的组合.时钟频率72MHz时,从闪存执行代码,STM32功耗36mA,是32位市场上功耗最低的产品,相当于0.5mA/MHz.2STM32F103性能特点1〕内核.ARM32位CPU,最高工作频率72MHz, 1.25DMIPS/MHzo单周期乘法和硬件除法.2〕存储器.片上集成32-512KB的Flash存储器.6-64KB的SRAM存储器.3〕时钟、复位和电源治理.2.0-3.6V的电源供电和I/O接口的驱动电压. POR、PDR和可编程的电压探测器.4-16MHZ的晶振.内嵌出厂前调校的8MHz RC振荡电路.内部40 kHz的RC振荡电路.用于CPU时钟的PLL.带校准用于RTC的32kHz的晶振.4〕低功耗.3种低功耗模式：休眠,停止,待机模式.为RTC和备份存放器供电的VBAT.5〕调试模式.串行调试和JTAG接口.6〕直接数据存储.12通道直接数据存储限制器.支持的外设：定时器,ADC, DAC, SPI, IIC 和USART.7〕最多高达112个的快速I/O端口.根据型号的不同,有26, 37, 51, 80, 和112的I/O端口,所有的端口都可以映射到16个外部中断向量.除了模拟输入,所有的都可以接受5V以内的输入.8〕最多多达11个定时器.4个16位定时器,每个定时器有4个IC/OC/PWM 或者脉冲计数器.2个16位的6通道高级限制定时器:最多6个通道可用于PWM 输出.2个看门狗定时器.Systick定时器：24位倒计数器.2个16位根本定时器用于驱动DACo9〕最多多达13个通信接口.2个HC接口.5个USART接口.3个SPI接口,两个和IIS复用.CAN接口.USB 2.0全速接口.SDIO接口.3系统作用1〕集成嵌入式Hash和SRAM存储器的ARM Cortex-M3内核.和8/16位设备相比,ARM Cortex-M3 32位RISC处理器提供了更高的代码效率. STM32F103xx微限制器带有一个嵌入式的ARM核,所以可以兼容所有的ARM 工具和软件.2〕嵌入式Flash存储器和RAM存储器.内置多达512KB的嵌入式Flash, 可用于存储程序和数据.多达64KB的嵌入式SRAM可以以CPU的时钟速度进行读写.3〕可变静态存储器.可变静态存储器带有4个片选,支持四种模式：Flash, RAM, PSRAM, NOR和NANDo 3个FSMC中断线经过OR后连接到嵌套矢量中断限制器.没有读/写FIFO,除PCCARD之外,代码都是从外部存储器执行, 不支持Boot,目标频率等于SYSCLK/2,所以当系统时钟是72MHz时' 外部访问根据36MHz进行.4〕嵌套矢量中断限制器.可以处理43个可屏蔽中断通道,提供16个中断优先级.紧密耦合的嵌套矢量中断限制器实现了更低的中断处理延迟,直接向内核传递中断入口向量表地址,紧密耦合的嵌套矢量中断限制器内核接口,允许中断提前处理,对后到的更高优先级的中断进行处理,支持尾链,自动保存处理器状态,中断入口在中断退出时自动恢复,不需要指令干预.5〕外部中断/事件限制器.外部中断/事件限制器由用于19条产生中断/事件请求的边沿探测器线组成.每条线可以被单独配置用于选择触发事件,也可以被单独屏蔽.有一个挂起存放器来维护中断请求的状态.当外部线上出现长度超过内部APB2时钟周期的脉冲时,外部中断/事件限制器能够探测到.多达112个GPIO连接到16个外部中断线.6〕时钟和启动.在启动的时候还是要进行系统时钟选择,但复位的时候内部8MHz的晶振被选用作CPU时钟.可以选择一个外部的4-16MHZ的时钟,并且会被监视来判定是否成功.在这期间,限制器被禁止并且软件中断治理也随后被禁止.同时,如果有需要,PLL时钟的中断治理完全可用.多个预比拟器可以用于配置AHB频率,包括高速APB和低速APB,高速APB最高的频率为72MHz, 低速APB最高的频率为36MHzo4架构优势除新增的功能强化型外设接口外,STM32互连系列还提供与其它STM32微限制器相同的标准接口,这种外设共用性提升了整个产品家族的应用灵活性,使开发人员可以在多个设计中重复使用同一个软件.新STM32的标准外设包括10 个定时器、两个12位模数转换器、两个12位数模转换器、两个12c接口、五个USART接口和三个SPI端口.新产品外设共有12条直接数据存储通道,还有一个CRC计算单元,像其它STM32微限制器一样,支持96位唯一标识码.新系列微限制器还沿续了STM32产品家族的低电压和节能两大优点.2.0V 到3.6V的工作电压范围兼容主流的电池技术,如锂电池和银氢电池,封装还设有一个电池工作模式专用引脚Vbato以72MHz频率从闪存执行代码,仅消耗27mA 电流.低功耗模式共有四种,可将电流消耗降至两微安.从低功耗模式快速启动也同样节省电能；启动电路使用STM32内部生成的8MHz信号,将微控制器从停止模式唤醒用时小于6微秒.。

(完整版)单片机毕业参考英文文献及翻译

Structure and function of the MCS-51 seriesStructure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces。

This company introduced 8 top-grade one—chip computers of MCS—51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one—chip computer the chips have，such as 8051， 8031, 8751， 80C51BH, 80C31BH，etc。

, their basic composition, basic performance and instruction system are all the same. 8051 daily representatives— 51 serial one-chip computers 。

An one—chip computer system is made up of several following parts: （ 1) One microprocessor of 8 (CPU）。

( 2） At slice data memory RAM (128B/256B）,it use not depositting not can reading /data that write, such as result not middle of operation，final result and data wanted to show, etc. ( 3） Procedure memory ROM/EPROM (4KB/8KB )，is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers， such as 8031 , 8032， 80C ，etc。

单片机英文文献外文翻译

单片机英文文献Principle of MCUSingle-chip is an integrated on a single chip a complete computer system. Even though most of his features in a small chip, but it has a need to complete the majority of computer components: CPU, memory, internal and external bus system, most will have the Core. At the same time, such as integrated communication interfaces, timers, real-time clock and other peripheral equipment. And now the most powerful single-chip microcomputer system can even voice, image, networking, input and output complex system integration on a single chip.Also known as single-chip MCU (Microcontroller), because it was first used in the field of industrial control. Only by the single-chip CPU chip developed from the dedicated processor. The design concept is the first by a large number of peripherals and CPU in a single chip, the computer system so that smaller, more easily integrated into the complex and demanding on the volume control devices. INTEL the Z80 is one of the first design in accordance with the idea of the processor, From then on, the MCU and the development of a dedicated processor parted ways.Early single-chip 8-bit or all of the four. One of the most successful is INTEL's 8031, because the performance of a simple and reliable access to a lot of good praise. Since then in 8031 to develop a single-chip microcomputer system MCS51 series. Based on single-chip microcomputer system of the system is still widely used until now. As the field of industrial control requirements increase in the beginning of a 16-bit single-chip, but not ideal because the price has not been very widely used. After the 90's with the big consumer electronics product development, single-chip technology is a huge improvement. INTEL i960 Series with subsequent ARM in particular, a broad range of applications, quickly replaced by 32-bit single-chip 16-bit single-chip high-end status, and enter the mainstream market. Traditional 8-bit single-chip performance has been the rapid increase in processing power compared to the 80's to raise a few hundred times. At present, the high-end 32-bit single-chip frequency over 300MHz, the performance of the mid-90's close on the heels of a special processor, while the ordinary price of the model dropped to one U.S. dollars, the most high-end models, only 10 U.S. dollars. Contemporary single-chip microcomputer system is no longer only the bare-metal environment in the development and use of a large number of dedicated embedded operating system is widely used in the full range of single-chip microcomputer. In PDAs and cell phones as the core processing of high-end single-chip or even a dedicated direct access to Windows and Linux operating systems.More than a dedicated single-chip processor suitable for embedded systems, so it was up to the application. In fact the number of single-chip is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will have a single-chip integration. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse in the Department are equipped with 1-2 single chip. And personal computers also have a large number of single-chip microcomputer in the workplace. Vehicles equipped with more than 40 Department of the general single-chip, complex industrial control systems and even single-chip may have hundreds of work at the same time! SCM is not only far exceeds the number of PC and other integrated computing, even more than the numberof human beings.Hardwave introductionThe 8051 family of micro controllers is based on an architecture which is highly optimized for embedded control systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts are available. This wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a company's entire line of products since it can perform many functions and developers will only have to learn this one platform.The basic architecture consists of the following features:·an eight bit ALU·32 descrete I/O pins (4 groups of 8) which can be individually accessed·two 16 bit timer/counters·full duplex UART· 6 interrupt sources with 2 priority levels·128 bytes of on board RAM·separate 64K byte address spaces for DA TA and CODE memoryOne 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pending interrupts. The time required for any 8051 instruction can be computed by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, you can compute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle (1.085 microseconds).单片机原理单片机是指一个集成在一块芯片上的完整计算机系统。

单片机的外文文献及中文翻译教学内容

单片机的外文文献及中文翻译SCM is an integrated circuit chip, is the use of large scale integrated circuit technology to a data processing capability of CPU CPU random access memory RAM, read-only memory ROM, a variety of I / O port and interrupt system, timers / timer functions (which may also include display driver circuitry, pulse width modulation circuit, analog multiplexer, A / D converter circuit) integrated into a silicon constitute a small and complete computer systems.SCM is also known as micro-controller (Microcontroller), because it is the first to be used in industrial control. Only a single chip by the CPU chip developed from a dedicated processor. The first design is by a large number of peripherals and CPU on a chip in the computer system, smaller, more easily integrated into a complex and demanding on the volume control device which. The Z80 INTEL is the first designed in accordance with this idea processor, then on the development of microcontroller and dedicated processors will be parting ways.Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performance was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller, but not ideal because the cost has not been very widely used. After 90 years with the great development of consumer electronics, microcontroller technology has been a huge increase. With INTEL i960 series, especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter the mainstream market. The traditional 8-bit microcontroller performance have been the rapid increase capacity increase compared to 80 the number of times. Currently, high-end 32-bit microcontroller clocked over 300MHz, the performance catching the mid-90s dedicated processor, while the average model prices fall to one U.S. dollar, the most high-end [1] model only 10 dollars. Modern SCM systems are no longer only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM. The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.SCM is more suitable than the specific processor used in embedded systems, so it was up to the application. In fact the number of SCM is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will be integrated single chip. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse with a 1-2 in both the Department of SCM. Personal computer will have a large number of SCM in the work. General car with more than 40 microcontroller, a complex industrial control systems may even hundreds of single chip at the same time work! SCM is notonly far exceeds the number of PC and other computing the sum, or even more than the number of human beings.Single chip, also known as single-chip microcontroller, it is not complete a certain logic chips, but to a computer system integrated into a chip. Equivalent to a micro-computer, and computer than just the lack of a microcontroller I / O devices. General talk: a chip becomes a computer. Its small size, light weight, cheap, for the study, application and development of facilities provided. At the same time, learning to use the MCU is to understand the principle and structure of the computer the best option.Microcontroller and the computer functions internally with similar modules, such as CPU, memory, parallel bus, the same effect there, and hard disk memory device, is it different properties of these components are relatively weak many of our home computer, but the price is low , usually not more than 10 yuan you can do with it ...... some control for a class is not very complicated electrical work is enough of. We are using automatic drum washing machine, smoke hood, VCD and so on appliances which could see its shadow! ...... It is mainly part of the core components as the control.t is an online real-time control computer, on-line is on-site control, need to have strong anti-interference ability, low cost, and this is, and off-line computer (such as home PC), the main difference. Single chipMCU is through running, and can be modified. Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some are great efforts are very difficult to achieve. A not very complex functions if the 50's with the United States developed 74 series, or the 60's CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70's with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!As the microcontroller on the cost-sensitive, so now the dominant software or the lowest level assembly language, which is the lowest level in addition to more than binary machine code language, and as so low why is the use? Many high-level language has reached the level of visual programming Why is not it? The reason is simply that there is no home computer as a single chip CPU, not as hard as a mass storage device. A visualization of small high-level language program is only one button on it though, will reach tens of K in size! For the home PC's hard drive in terms of nothing but speaking for the MCU is not acceptable. SCM in the utilization of hardware resources to be very high for the job so although the original is still in the compilation of a lot of use. The same token, if the giant computer operating system and applications run up get home PC, home PC, also bear not work.Can be said that the twentieth century across the three "power" era, that is, the age of electricity, the electronic age and has entered into the computer age. However, this computer, usually refers to the personal computer, referred to as PC. It consists of the host, keyboard, monitor and other components. Another type of computer, most people do not know how. This computer is to give all kinds of machinery, intelligent single chip (also known as micro-controller). As the name suggests, this computer system took only a minimal integrated circuit, can be a simple operation and control. Because it is small, usually in the charged with possession of mechanical "stomach" in. It is in the device, like the human brain plays a role, it goes wrong, the whole plant was paralyzed. Now, this microcontroller has been very widely used in the field, such as smart meters, real-time industrial control, communications equipment, navigation systems, and household appliances. Once all kinds of products were using SCM, can serve to upgrade the effectiveness of products, often in the product name preceded by the adjective - "intelligent", such as intelligent washing machines. Now some technical personnel of factories or other amateur electronics developers to engage in out of certain products, not the circuit is too complicated, that function is too simple and can easily be copied. The reason may be stuck in the product did not use a microcontroller or other programmable logic device.外文文献的翻译：单片机是一种集成在电路芯片，是采用超大规模集成电路技术把具有数据处理能力的中央处理器CPU随机存储器RAM、只读存储器ROM、多种I/O口和中断系统、定时器/计时器等功能（可能还包括显示驱动电路、脉宽调制电路、模拟多路转换器、A/D转换器等电路）集成到一块硅片上构成的一个小而完善的计算机系统。

自动化专业单片机外文文献英文文献外文翻译中英对照

Dormancy of the one-chip computer---restore to the throne in the operation way and improve anti- interference abilityAbstract: Introduce a kind of dormancy of using- restore to the throne in theoperation way and improve the anti-interference ability method of the one-chip computer;Analyse its scope of application, provide and use the circuit concretly; Combine the instance, analyse the characteristic of the hardware and software design under these kind of operation way.Keyword: One-chip computer Restore to the throne /dormancyanti-interference ForewordIntroduction:With the development at full speed of the microelectric technique, the performance of the one-chip computer improves rapidly, demonstrate the outstanding advantage in the operation, logic control, intelligent respect, replaced and enlarged the measuring that the circuit made up, control circuit by digital logical circuit, operation originally to a great extent, use very extensivly. But because it have system halted, procedure run critical defect of flying etc, make it limit in a lot of important application of occasion.A lot of technology in anti-interference , for example set up the software trap, add thehardware to guard the gate in dog's circuit etc, can make this problem havebetter settlement, but still the existing problem: ① Guard the gate dog at the movement, mean and appear mistake already and run some time, this is not allowed in some occasions; ②Procedure appear circulation mistake very much sometimes, but just guard the gate dog control link include and enter, adopt and guard the gate as to such a mistake dog unable to discern; ③ Inmeasure and control cycle among the long system, one-chip computer spend wait for the peripheral hardware a large amount of time, will be interfered too when carry out and wait for the order. To these situations, we have tried the method restored to the throne voluntarily in practice, alternate pulse of adopting etc or restore to the throne waking according to external terms to the one-chip computer up. After being restored to the throne each time, the one-chip computer carries out the corresponding procedure, enters dormancy in time after finishing carrying out the task, wait to be restored to the throne nextly. Have solved above-mentioned problems well with this method , and has got better result in the agricultural voltage transformer comprehensive protector experiment. Now take 51 serial one-chip computers as an example and probe into the concrete principle and implementation method, restored to the throne the signal as the high level.1.A principle and implementation method1.1 Restored to the throne the law regularly unconditionallyUse timer, special-purpose clock chip or other pulse generator, produce signal of restoring to the throne regularly according to interval that set for. This kind of method is especially suitable for the measuring instrument. In not running actually, sample the analog quantity of introduction with A/D converter often, then store showing. This course is very fast, but steady for reading, the data per second are only upgraded 1 -2 times, a large amount of time of CPU is used for waiting. Let CPU carry out and enter dormancy directly after the task , restore to the throne and wake by external world up It carry out the next operation, this is to restore to the throne the law regularly In this way can make anti-interference ability strengthen greatly , have 2 points mainly: ①. At the dormancy, procedure stop run, can appear PC indicatordisorderly procedure that causes run and fly. Work time in dormancy proportion 1:9, that is to say 1 s have 0.1 time of s used for measuring, sending off showing, there is time dormancy of 0.9s, the probability that the procedure is interfered is 1/10 while running at full speed, whole anti-interference ability raise by 10 times. ② Because every 1s is restored to the throne once unconditionally, once present the system halted during a job, can certainly resume when restored to the throne next time. As to only instrument that show, some reading mistake that 1s appear accidentally there is no memory to the next measurement, be could bear , belong to “pass” mistake. This kind is restored to the throne the advantage of dog's circuit for guarding the gate regularly, first, change waiting time into a dormancy state, time to shorten and may be interfered; Second, avoided happenning that the dog controls the death circulation of the link to include guarding the gate.1.2 The external condition is restored to the throne the lawSome arrival that export or measure is controlled by the outside. For instance, the hot form. of heating, rotate the pulse produced and calculate heat by hot water water wheels, there is no hot water to flow, there is no heat to export, CPU only need in fact keep number value, do not need to count. Can imagine hot water water wheels rotate when parking warm , CPU idle in will it be will it be one season autumn spring and summer, If let dormancy its , measure have water wheels pulse constantly, anti-interference ability can strengthen greatly. So, so long as link up the restoring to the throne of the pulse of the water wheels and CPU, the water wheels rotate a circle each time, CPU is restored to the throne once, hot form. can work normally , this is restored to the throne the law by the external condition . Similar application have half electron kilowatt-hour meter , go on one count just when the machinery degree wheels and transfers to a circle, users do not need the electricity,CPU has been knowing the dormancy all the time . The restoring to the throne in the interval not to be regular, but confirmed according to the external condition of this method. In some occasions, the time of the dormancy will be very long, very effective to improving anti-interference ability.2 .The hardware realizes the main point2.1 Restored to the throne regularly unconditionallyGenerally have 2 kinds of methods. ① Use theitimer or the special-purpose clock chip to be restored to the throne. Fig1, in order to use the timing circuit that 555 circuit makes up; Can use the clock chips of X1126 ,etc too , wake CPU up with the alarm signal after setting up warning time. This kind of method is suitable when the long interval is made, can also follow the result of this operation ，determine to wake time up in alarm next time temporarily, very flexible and convenient. ② The signal of using the system to be inherent is as reducing the pulse regularly. Use 50Hz worker power make reducing after having a facelift frequently, already omit the timer, gathered the corresponding signal for the phase place which measured the electric current signal at the same time, as Fig. 2 shows.2.2 External conditions are restored to the throneSend external condition pulse to and is restored to the throne the end son after having a facelift. To that above-mentioned water wheels or the ammeter spend a pulse produced, can use Schmitt's trigger to have a facelift; For writing down the instrument of the biggest or minimum，can use the window comparator. In order to realize the electronization that is regulated，canuse the electronic electric potential device, establish upper and lower limits with the order of the one-chip computer.2.3 Reduce cycle and restored to the throne the high electricity at ordinary timesIn Fig3, restored to the throne the signal during high level Tr, the one-chip computer is in the state of restoring to the throne, the procedure does not run, anti-interference ability is the strongest; After the high level, the one-chip computer begins to hold the conduct procedure. That is to say, are restored to the throne and suitable for the time that the procedure carries out during the low level Td of the signal, this time should be greater than the execution cycle of the procedure each time. It is restore to the throne cycle and restore to the throne high level of signal take empty than very much important to choose rationally. As to simple to show instrument, restore to the throne cycle determine data break cycle, low electricity is it measure, hancl over all time shown to greater than to want at ordinary times; Otherwise, cant present forever the mistake of the intact executive program.Monolithic integrated circuit in Ts and Tr period all can effectively the antijamming, but is best the unnecessary time arrangement in Tr. When the program time is long, when as far as possible the request reduces Tr, may join the differentiating circuit, like chart 1 center C30, R26, D9.2.4 Treatment of output end sons(1) Restore to the throne straight pulseDuring all I/O mouth of one-chip computer turn into the high level when restoring to the throne. That is to say output for low pin normally, will according to restore to the throne cycle appear the width for the straightpulse of Tr. This straight pulse will influence the normal output, 2 methods are dealt with: ① Connect in parallel electric capacity suppress , capacity confirm according to Tr time that restore to the throne on the son in end. Reducing Tr can be reduced and connected the electric capacity in parallel.② It is invalid to design the peripheral circuit into the high level. (2) Fault-tolerantChoose the capacity that the output end connects the electric capacity in parallel fault-tolerantly and properly, can realize fault-tolerant control. Reduced cycle in a certain, because interfered exporting the wrong level. Because the keeping function of electric capacity, can't still enable exporting the change to the valid level within this cycle; Next cycle , the mistake is corrected. So, so long as does not make mistakes in 2 cycles in succession, it is very fault-tolerant to export Certainly, this kind of method will make the normal output change lag behind for one cycle, just really reflect the output end son.2.5 has the electricity to measure and restore to the throne manuallySome system is it make some initialize and operate to want at electricity for the first time. Restored to the throne and already become the beginning condition of normal running each time while adopting the way of restoring to the throne to run , it is unable to distinguish and have the electricity for the first time. In some pin connects the electric capacity of one ljIF to the ground, measure this pin after being restored to the throne, if low level to have electricity for the first time. Give system set up one restore to the throne button, that is to say a common one manual to restore to the throne, this button is not joined and being restored to the throne in the end, isconnected in parallel in the electric capacity both ends to the ground of above-mentioned pins.3. The software realizes the main point3.1 is it resume with zero clearing RAM to outputRestore to the throne the last all pin turn high level into , is it should taKe place unnecessary change for low pin to make regularly, so, should resume the state.of all pins immediately after being restored to the throne. There are 2 kinds of methods : ① Analyse and judge immediately after being restored to the throne this time, provide the state of the pin according to the need;② In being RAM it is the last last state that come down,these RAMs when restored.To the throne regularly can the zero clearing one; But electricity or manual to rstore to the throne when pushing in conformity with zero clearing, is it embody to want when the software is worked outing at the beginning. If calculate time allows, try one's best to take method 1. Restore to the throne cycle probability made mistakes to calculate very little, according to 2 for the 2nd time in succession. 4 output end son that narrate connect treatment method of electric capacity in parallel, can reach kind anti-interference result very.3.2 realizes crossing over and is restored to the throne alternate time sequenceregularly to controlWork in way of restoring to the throne now, start anew and carry out the same procedure repeatedly each time. Can be divided into 2 kinds of situations: ① As to simple to show instrument, carry on measurement ，send off showingafter being restored to the throne each time, have causality between restoring to the throne twice . need is it switch over to the dormancy to waiting original only. Should pay attention to, measurement, give total time used to show is it is it restore to the throne low electricity at ordinary times to smaller than to want, otherwise can't present forever the mistake of the intact executive program. ② For having application that time sequence controlled , after being restored to the throne each time , should check first that see the sign left last cycle , in order to determine what is done this cycle . That is to say every is it restore to the throne operation of cycle to stride , by is it transmit to indicate all, these indicate while leaving in inside RAM , the zero clearing only when have the electricity for the first time. For example, the protecting synthetically device of above-mentioned voltage transformer , is restored to the throne regularly according to the interval of 20ms. It reaches the normal working state through, certain movement order after having the electricity, such as Fig. 4; Write a part of the procedure of the software according to this movement, such as Fig. 5.In 4 Fig, act as person who protect the beginning at the electricity, is it transmit power 0 to try at first. 5s, points out and transmits power soon; Transmit power formally after waiting for 30s. It is start-up time in 1s after transmitting power, does not measure the electric current. Start after finishing, if all going well, the location is put" normal sign ", person who protect restore to the throne cycle enter normal running in the next one. Try 0 that transmits power. 5s is it is it realize to count once restoring to the throne to delay time, restore to the throne time 20ms each time. At having electricity for the first time, make all zero clearing to inside RAM, make it is it time Ts to transmit power not to try =Dormancy after 25. After restoring to the throne, is it have electric pin to have electricity for the first timealready, is it is it is it is it time the measuring of Ts to transmit power to try to get to go on to measure next time. If Ts * 0, is it in is it prolong period to transmit power, is it enter dormancy after the 1 to reduce Ts to prove. Act as Ts-1 = 0, the course which waited for 30s that should enter and lose electrical power. Just when Ts decreases progressively to 0, make it is it indicate to wait for not to lose electrical power Td =1500. When the procedure is restored to the throne beginning again, measure to Ts =0 but Td * 0, is it is it is it transmit power to try to cross already to indicate, at is it wait for the course of 30s to lose electrical power now. In this way, the whole process is transmitted each other by such these parameters as Tr, Td , Ts etc, go on step by step.Result:Conclusion Anti-interference is an important problem in an electronic design, especially Important in the one-chip computer. This is because the one-chip computer has procedures to run particularity that flies, the consequence that it is interfered may be the system halted, may send out various kinds of mistakes or illegal movements before the system halted too, make the whole system produce the mortality mistake. So, only guarantee it is not enough yet for one-chip computer not to crash, study how to reduce the risk interfered, it can befault-toierant how is it after and make mistakes. This text is it act as some exploration from two these to try hard, hope these elementary opinions can play some function of casting a brick to attract jade, helpful to everybody; Hope too every colleague explore together, improve our design level together.单片机休眠-复位运行方式提高抗干扰能力摘要：介绍一种用休眠-复位运行方式提高单片机抗干扰能力的方法；分析其适用范围，给出具体应用电路；结合实例，分析这种运行方式下硬件和软件设计的特点。

(完整版)_毕业设计英文文献51单片机中英文文献翻译_

AT89C51的概况The General Situation of AT89C51Chapter 1 The application of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The domains also require that these microcontrollers are be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Plaform Engineering department developed anobject-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of thisenvironment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with variousThe 8-bit AT89C51 CHMOS microcontrollers are designed to engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhancedon-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of the market, particularly in mission criticalapplications such as an autopilot or anti-lock braking system, mistakes are financiallyprohibitive. Redesign costs can run as flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions.This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully.Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts.The type of the device and its application requirements determine which types of testing are performed on the device.1.2 The AT89C51 provides the following standard features:4Kbytes of Flash, 128 bytes of RAM, 32 IO lines, two 16-bittimercounters, a five vector two-level interrupt architecture,a full duple ser -ial port, on-chip oscillator and clock circuitry.In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timercounters,serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscil –lator disabling all other chip functions until the next DescriptionVCC Supply voltage.GND Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional IO port. As an output port, each pin cansink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as this mode P0 . External pullups are required during programverification.Port 1：Port 1 is an 8-bit bi-directional IO port with internal pullups.The Port 1 output buffers can sinkso -urce four TTL inputs.When 1s are written to Port 1 pins they are pulled be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bi-directional IO port with internal pullups.The Port 2 outputbuffers can sinksource four TTL inputs.When 1s are written to Port 2 pins they arepulled be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the Flash programming and verification.Port 3：Port 3 is an 8-bit bi-directional IO port with internal pullups.The Port 3 outputbuffers can sinksou -rce four TTL inputs.When 1s are written to Port 3 pins they are pulled be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special featuresof the AT89C51 as listed below:RST：Reset input. A this pin for two machine cycles while the oscillator is running resets the device.ALEPROG：Address Latch Enable output pulse for latching the low byte of the address duringaccesses to external memory.This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 16 the oscillator frequency,and may be used for external timing or clocking purposes. Note, be disabled by setting bit 0 of SFR location 8EH.With the bit set, ALE is active onlyduring a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled external execution mode.PSEN：Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twiceeach machine cycle, except that two PSEN activations are skipped during each access toexternal data memory.EAVPP：External Access Enable. EA must be strapped to GND in order to enable the deviceto fetch code from external program memory locations starting at 0000H up to FFFFH.Note, alsreceives the 12-volt programming enable voltage (VPP) during Flash programming, forparts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operatingcircuit.XTAL2：Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifierwhich can be configured for use as an on-chip oscillator, as shown in Figure 1. Either aquartz crystal or ceramic resonator may be used. To drive the device from an externalclock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage idle mode, the CPU puts itself to sleep while all the onchip peripherals remainactive. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a idle is terminated by a ,from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a -chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.2 Programming AlgorithmBefore programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the addresslines.2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EAVPP to 12V for the the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle initiated.2.1ReadyBusy:The progress of byte programming can also be monitored by the RDYBSY output signal. P3.4 is pulled low after ALE goes when programming is done to indicate READY.Program Verify:If lock bits LB1 and LB2 programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Figure 2-1-1 Programming the Flash Figure 2-2-2 Verifying the Flash2.2 Chip Erase:The entire Flash array is erased electrically by using the proper combination of control signals and by with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.2.3 Reading the Signature Bytes:The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned areas follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programming2.4 Programming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion. A microcomputer interface converts information between two forms. Outside the microcomputer the information electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps. An analog-to-digital converter(ADC) is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the inputoutput section of the microcomputer itself. Output interfaces take a similar form, the obvious difference being that is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface andperforms the scaling numbers which may be needed for digital-to-analog converter(DAC). This subroutine passesinformation in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned(usually amplified) to a form suitable for operating an actuator.The signals used within microcomputer circuits are almost always too small to be connected directly to the outside world” and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator. To solve real-world problems, a microcontroller must just a CPU, a program, and a data memory. In addition, it must contain from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. These microcontrollers is the general purpose I70 port. Each of the IO pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zeroby using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions. Some type of serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer IO pins to perform the communication function, which makes it less expensive, but slower.Serial transmissions are performed either synchronously orasynchronously.翻译AT89C51的概况1 AT89C51应用单片机广泛应用于商业：诸如调制解调器，电动机控制系统，空调控制系统，汽车发动机和其他一些领域。

单片机的外文文献及中文翻译

单片机的外文文献及中文翻译一、外文文献Title: The Application and Development of SingleChip Microcontrollers in Modern ElectronicsSinglechip microcontrollers have become an indispensable part of modern electronic systems They are small, yet powerful integrated circuits that combine a microprocessor core, memory, and input/output peripherals on a single chip These devices offer significant advantages in terms of cost, size, and power consumption, making them ideal for a wide range of applicationsThe history of singlechip microcontrollers can be traced back to the 1970s when the first microcontrollers were developed Since then, they have undergone significant advancements in technology and performance Today, singlechip microcontrollers are available in a wide variety of architectures and capabilities, ranging from simple 8-bit devices to complex 32-bit and 64-bit systemsOne of the key features of singlechip microcontrollers is their programmability They can be programmed using various languages such as C, Assembly, and Python This flexibility allows developers to customize the functionality of the microcontroller to meet the specific requirements of their applications For example, in embedded systems for automotive, industrial control, and consumer electronics, singlechip microcontrollers can be programmed to control sensors, actuators, and communication interfacesAnother important aspect of singlechip microcontrollers is their low power consumption This is crucial in batterypowered devices and portable electronics where energy efficiency is of paramount importance Modern singlechip microcontrollers incorporate advanced power management techniques to minimize power consumption while maintaining optimal performanceIn addition to their use in traditional electronics, singlechip microcontrollers are also playing a significant role in the emerging fields of the Internet of Things （IoT) and wearable technology In IoT applications, they can be used to collect and process data from various sensors and communicate it wirelessly to a central server Wearable devices such as smartwatches and fitness trackers rely on singlechip microcontrollers to monitor vital signs and perform other functionsHowever, the design and development of systems using singlechip microcontrollers also present certain challenges Issues such as realtime performance, memory management, and software reliability need to be carefully addressed to ensure the successful implementation of the applications Moreover, the rapid evolution of technology requires developers to constantly update their knowledge and skills to keep up with the latest advancements in singlechip microcontroller technologyIn conclusion, singlechip microcontrollers have revolutionized the field of electronics and continue to play a vital role in driving technological innovation Their versatility, low cost, and small form factor make them an attractive choice for a wide range of applications, and their importance is expected to grow further in the years to come二、中文翻译标题：单片机在现代电子领域的应用与发展单片机已成为现代电子系统中不可或缺的一部分。

at89c52单片机中英文资料对照外文翻译文献综述

D.htmlat89c52单片机中英文资料对照外文翻译文献综述at89c52单片机简介中英文资料对照外文翻译文献综述AT89C52 Single-chip microprocessor introductionSelection of Single-chip microprocessor1. Development of Single-chip microprocessorThe main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。

Storage RAM immediately﹑memoy readROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。

Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。

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单片机方面毕业设计外文文献翻译
中文译文
单片机
单片机也被称为微控制器（Microcontroller Unit），常见英文字母的缩写MCU表示单片机，它最早是被用在工业控制领域。

单片机由芯片内仅有CPU的专用处理器发展而来。

最早的设计理念是经过将大量外围设备和CPU集成在一个芯片中，使计算机系统更小，更容易集成进复杂的而对体积要求严格的控制设备当中。

INTEL的Z80是最早按照这种思想设计出的处理器，从此以后，单片机和专用处理器的发展便分道扬镳。

早期的单片机都是8位或4位的。

其中最成功的是INTEL 的8031，因为简单可靠而性能不错获得了很大的好评。

此后在8031上发展出了MCS51系列单片机系统。

基于这一系统的单片机系统直到现在还在广泛使用。

随着工业控制领域要求的提高，开始出现了16位单片机，但因为性价比不理想并未得到很广泛的应用。

90年代后随着消费电子产品大发展，单片机技术得到了巨大提高。

随着INTEL i960系列特别是后来的ARM系列的广泛应用，32位单片机迅速取代16位单片机的高端地位，而且进入主流市场。

而传统的8位单片机的性能也得到了飞速提高，处理能力比起80年代提高了数百倍。

当前，高端的32位单片机主频已经超过300MHz，性能直追90年代中期的专用处理器，而普通的型号出厂价格跌落至1美元，最高端[1]的型号也只有10美元。

当代单片机系统已经不再只在裸机环境下开发和
使用，大量专用的嵌入式操作系统被广泛应用在全系列的单片机上。

而在作为掌上电脑和手机核心处理的高端单片机甚至能够直接使用专用的Windows和Linux操作系统。

单片机比专用处理器更适合应用于嵌入式系统，因此它得到了最多的应用。

事实上单片机是世界上数量最多的计算机。

现代人类生活中所用的几乎每件电子和机械产品中都会集成有单片机。

手机、电话、计算器、家用电器、电子玩具、掌上电脑以及鼠标等电脑配件中都配有1-2部单片机。

而个人电脑中也会有为数不少的单片机在工作。

汽车上一般配备40多部单片机，复杂的工业控制系统上甚至可能有数百台单片机在同时工作！单片机的数量不但远超过PC机和其它计算的总和，甚至比人类的数量还要多。

单片机又称单片微控制器,它不是完成某一个逻辑功能的芯片,而是把一个计算机系统集成到一个芯片上。

相当于一个微型的计算机，和计算机相比，单片机只缺少了I/O设备。

概括的讲：一块芯片就成了一台计算机。

它的体积小、质量轻、价格便宜、为学习、应用和开发提供了便利条件。

同时，学习使用单片机是了解计算机原理与结构的最佳选择。

单片机内部也用和电脑功能类似的模块，比如CPU，内存，并行总线，还有和硬盘作用相同的存储器件，不同的是它的这些部件性能都相对我们的家用电脑弱很多，不过价钱也是低的，一般不超过10元即可......用它来做一些控制电器一类不
是很复杂的工作足矣了。

我们现在用的全自动滚筒洗衣机、排烟罩、VCD等等的家电里面都能够看到它的身影！......它主要是作为控制部分的核心部件。

它是一种在线式实时控制计算机，在线式就是现场控制，需要的是有较强的抗干扰能力，较低的成本，这也是和离线式计算机的（比如家用PC）的主要区别。

单片机芯片
单片机是靠程序运行的，而且能够修改。

经过不同的程序实现不同的功能，特别是特殊的独特的一些功能，这是别的器件需要费很大力气才能做到的，有些则是花大力气也很难做到的。

一个不是很复杂的功能要是用美国50年代开发的74系列，或者60年代的CD4000系列这些纯硬件来搞定的话，电路一定是一块大PCB板！可是如果要是用美国70年代成功投放市场的系列单片机，结果就会有天壤之别！只因为单片机的经过你编写的程序能够实现高智能，高效率，以及高可靠性！
由于单片机对成本是敏感的，因此当前占统治地位的软件还是最低级汇编语言，它是除了二进制机器码以上最低级的语言了，既然这么低级为什么还要用呢？很多高级的语言已经达到了可视化编程的水平为什么不用呢？原因很简单，就是单片机没有家用计算机那样的CPU，也没有像硬盘那样的海量存储设备。

一个可视化高级语言编写的小程序里面即使只有一个按钮，也会达到几十K的尺寸！对于家用PC的硬盘来讲没什么，
可是对于单片机来讲是不能接受的。

单片机在硬件资源方面的利用率必须很高才行，因此汇编虽然原始却还是在大量使用。

一样的道理，如果把巨型计算机上的操作系统和应用软件拿到家用PC上来运行，家用PC的也是承受不了的。

能够说，二十世纪跨越了三个“电”的时代，即电气时代、电子时代和现已进入的电脑时代。

不过，这种电脑，一般是指个人计算机，简称PC机。

它由主机、键盘、显示器等组成。

还有一类计算机，大多数人却不怎么熟悉。

这种计算机就是把智能赋予各种机械的单片机（亦称微控制器）。

顾名思义，这种计算机的最小系统只用了一片集成电路，即可进行简单运算和控制。

因为它体积小，一般都藏在被控机械的“肚子”里。

它在整个装置中，起着有如人类头脑的作用，它出了毛病，整个装置就瘫痪了。

现在，这种单片机的使用领域已十分广泛，如智能仪表、实时工控、通讯设备、导航系统、家用电器等。

各种产品一旦用上了单片机，就能起到使产品升级换代的功效，常在产品名称前冠以形容词——“智能型”，如智能型洗衣机等。

现在有些工厂的技术人员或其它业余电子开发者搞出来的某些产品，不是电路太复杂，就是功能太简单且极易被仿制。

究其原因，可能就卡在产品未使用单片机或其它可编程逻辑器件上。

单片机历史
单片机诞生于20世纪70年代末，经历了SCM、MCU、SoC 三大阶段。

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