操作系统课件第11章 IO系统

合集下载
  1. 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
  2. 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
  3. 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。

Chapter 11: I/O Systems

⏹I/O Hardware 硬件

⏹Goals of I/O Software 软件的目标

⏹I/O Software Layers 软件的分层

⏹Application I/O Interface I/O应用接口

⏹Kernel I/O Subsystem 内核I/O子系统

⏹Transforming I/O Requests to Hardware Operations

从I/O请求到硬件操作

⏹Streams流

⏹Performance性能

I/O Hardware硬件

Some typical device, network, and data base rates

I/O Hardware硬件

⏹Incredible variety多样性of I/O devices

☞Storage 存储

☞Transmission 传输

☞Human_interface 人机接口

⏹Common concepts

☞Port 端口

☞Bus (daisy chain or shared direct access)总线

☞Controller (host adapter)控制器

⏹I/O instructions control devices指令控制设备

⏹Devices have addresses, used by设备具有地址

☞Direct I/O instructions直接I/O指令

☞Memory-mapped I/O内存映射I/O

⏹An I/O port typically consists of four registers, called

status, control, data-in and data-out registers

一个I/O端口通常有四类寄存器(状态、控制、输入/输出)

Device Controllers设备控制器⏹I/O devices have components:设备由两部分组

☞mechanical component 机械部分

☞electronic component 电子部分

⏹The electronic component is the device

controller

电子部分是设备控制器

☞may be able to handle multiple devices可管多个设备⏹Controller‘s tasks控制器的任务

☞convert serial bit stream to block of bytes串/并转换

☞perform error correction as necessary按需要进行校错☞make available to main memory使内存可用

Devices Addresses设备地址

⏹Separate I/O and memory space与内存分开⏹Memory-mapped I/O内存映射

⏹Hybrid混合

Bus Architecture总线结构

⏹(a) A single-bus architecture单总线

⏹(b) A dual-bus memory architecture双总线

A Typical PC Bus Structure总线结构

Device I/O Port Locations on PCs (partial)

PC上的I/O端口

I/O的控制形式

Polling轮流检测

⏹Determines state of device 设备状态

☞command-ready就绪

☞Busy忙

☞Error出错

⏹Busy-wait cycle忙等待循环to wait for I/O from

device

Interrupts中断

⏹CPU Interrupt request line triggered by I/O device

由I/O设备触发中断请求线

⏹Interrupt handler receives interrupts

中断处理函数接受中断

⏹Maskable to ignore or delay some interrupts

关中断

⏹Interrupt vector中断向量to dispatch interrupt to correct

handler处理程序

☞Based on priority按优先级

☞Some unmaskable一些中断不可屏蔽

⏹Interrupt mechanism also used for exceptions中断机制亦

用于异常

Interrupts Revisited回顾中断

⏹How interrupts happens.

☞Connections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated

wires

Interrupt-Driven I/O Cycle 中断驱动器的I/O周期

Intel Pentium Processor Event-Vector Table

相关文档
最新文档