模拟集成电路设计精粹课件17
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SC ladder filter
Capacitors Switches Opamps
C l o c k
Capacitors: metal-n+ & Metal-poly
C area≈ 5 fF/µm2
C p≈ 1.2 fF/µm2
C area/C p ≈ 1/4•Voltage dependent •R sub: noise
C area≈ 2 fF/µm2
C p≈ 1 fF/µm2
C area/C p ≈ 1/2
•Linear
•Large parasitics: Multi-layer !
Constant Area / Perimeter ! Common centroide lay-out !
1% 0.1%
1.0
2.0
3.0
4.0
5.0
VIN
3.0 k 2.0 k
60 k 40 k 20 k 0 k
V 5 V
V 1.8 V
Ci/C
Ci B<<1 : ∆Q=Q/2 ÖDummy
High Speed Clocks
Low Speed Clocks
Ref. Wegmann, Vittoz, JSSC Dec.87, 1091-1097
(with bulk effect)
Reduce C ox area
Use metal to ‘shield’clock lines
Parasitic C
⇓CFT
out
f c-f s
f s f
f c
N-order filter:
N fs fc −fs
[]
=−Attenuation
20
10
fc =fs .Attenuation 20.N
10
Ex. Attenuation = 40 dB; fs = 10 kHz ; N = 1 Öfc = 1 MHz
+ …… if ωT c<< 1
Euler’s relationship:
sin(x)=
+jx
e−−jx
e
2j
f/f c= 0.1
error ≈ 0.1%
T c/2
/2
T c/2)
Non-inverting
damped integrator
(c)
Inverting
Damped integrator
-