ADC0832_H

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ADC0832中文资料_数据手册_参数

ADC0832中文资料_数据手册_参数
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ADC0832功能描述 (续)可能是因为DI输入只是在“期待”期间当DO线仍处于高电平时,MUX寻址间隔阻抗状态. 3.0参考考虑 施加到这些转换器的参考输入的电压, ERS定义了模拟输入的电压范围(差分 - V之间 IN(MAX) 和V IN(MIN) ),其中256 可能的输出代码适用.该设备可以用于无论是比例式应用还是需要消耗系统的系统,琵琶精度.参考引脚必须连接到A能够驱动参 考输入电阻的电压源,通常3.5 K Ω.该引脚是电阻器的顶部用于逐次逼近的分频器串,锡永.在比例系统中,ADC0832模拟输入电 压是比例系数,用于A / D参考的电压.这个电压通常是系统电源,所以V REF 引脚可以绑在V上 CC (在ADC0832内部完成). 这 个技巧放宽系统参考的稳定性要求模拟输入和A / D参考一起保持 - ADC0832对于给定的输入条件,输出相同的输出代码.对于绝 对精度,模拟输入变化的地方, TWEEN非常具体的电压限制,参考引脚可以偏置一个时间和温度稳定的电压源. LM385和LM336 基准二极管的电流很低,租用设备与这些转换器一起使用.参考的大值限制在V CC电源电压.然而,ADC0832小值可以是相当的小 (见典型性能特征)允许换能器输出的直接转换提供小于 5V输出范围.必须特别小心噪声拾取,电路布局和系统误差电压当由于 运行减少跨度运行的源增加了转换器的灵敏度(1 LSB等于 V REF / 256). 4.0模拟输入这些转换器重要的特点就是它们可以位于 模拟信号源的右侧并通过只需几根电线即可与控制过程进行通信 - 具有高度噪声的免疫串行比特流.这本身大大减少了电路维护 模拟信号精度,否则ADC0832容易受到噪音的影响.但是,就模拟而言,有几句话是顺序的输入应该是嘈杂的开始或可能乘着一 个很大的共模电压.这些转换器的差分输入实际上减少了共模输入噪声的影响,一个共同的信号到选定的“+”和“ - ”输入转换 (60赫兹是典型的).采样“+”之间的时间间隔 输入,然后“ - ”输入是 一个时钟周期的 1/2 . 该在短时间 ADC0832功能描述 (续) 3.在时钟的每个上升沿,数据的状态 (DI)线输入到MUX地址移位寄存器.该起始位是出现在这行的 第一个逻辑“1”(全部)前导零被忽略).在开始之后,转换器期望接下来的2到4位是MUX分配字. 4.起始位移入起始位置时 MUX寄存器的输入通道已被分配 转换即将开始. 间隔 1/2 时钟期间(没有任何事情发生)被自动插入允许选定的MUX通道解决. 特区地位此时线路变高以表示正在进行转换正在进行中,DI线被禁用(不再接受数据). 5.数据输出(DO)线现在来自TRISTATE和在这个MUX的一个时钟周期内提供了一个前导零安定时间. 6.转换开始时,SAR的输出比较器,指示模拟输入是否是大 于(高)或小于(低)每个连续的电压 - 从内部电阻器阶梯,出现在DO线在时钟的每个下降沿.这个数据是的结果转换被转移出 去(先到达的MSB)和可以立即被处理器读取. 7.经过8个时钟周期后,转换完成.该 SAR状态线返回低电平表示这个 1/2 时钟周期 后来. 8.如果程序员喜欢,数据可以在一个 LSB第一种格式[这使用移位使能(SE)控制线].结果的所有8位都存储在输出中移位寄 存器.在不包含SE控制的设备上线,LSB的数据首先自动移出DO行,MSB后的第一个数据流. DO线然后去低,并保持低位,直到 CS回到高点.在ADC0838上 SE线被拿出来,如果高的话, LSB在DO线上保持有效.当SE被迫低时,ADC0832数据首先被LSB移出. ADC0831是一个因为其数据仅以MSB第一格式输出. 9.当CS线为高电平时,所有内部寄存器都被清零.如果需要进行另一次转换, 则CS必须从高到低过渡之后是地址信息. DI和DO线可以连接在一起并进行控制通过一根双线处理器的I / O位.这是 8单端 8伪差分 00558353 00558354 4差分混合模式 0055835拟输入多路复用器选项

ADC0832

ADC0832

ADC0831/ADC0832/ADC0834/ADC08388-Bit Serial I/O A/D Converters with Multiplexer OptionsGeneral DescriptionThe ADC0831series are 8-bit successive approximation A/D converters with a serial I/O and configurable input multiplex-ers with up to 8channels.The serial I/O is configured to comply with the NSC MICROWIRE ™serial data exchange standard for easy interface to the COPS ™family of proces-sors,and can interface with standard shift registers or µPs.The 2-,4-or 8-channel multiplexers are software configured for single-ended or differential inputs as well as channel as-signment.The differential analog voltage input allows increasing the common-mode rejection and offsetting the analog zero input voltage value.In addition,the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8bits of resolution.Featuresn NSC MICROWIRE compatible —direct interface to COPS family processorsn Easy interface to all microprocessors,or operates “stand-alone”n Operates ratiometrically or with 5V DC voltage referencen No zero or full-scale adjust requiredn 2-,4-or 8-channel multiplexer options with address logic n Shunt regulator allows operation with high voltage suppliesn 0V to 5V input range with single 5V power supply n Remote operation with serial digital data link n TTL/MOS input/output compatiblen 0.3"standard width,8-,14-or 20-pin DIP package n 20Pin Molded Chip Carrier Package (ADC0838only)n Surface-Mount PackageKey Specificationsn Resolution8Bitsn Total Unadjusted Error ±1⁄2LSB and ±1LSBn Single Supply 5V DC n Low Power15mW nConversion Time32µsTypical ApplicationTRI-STATE ®is a registered trademark of National Semiconductor Corporation.COPS ™and MICROWIRE ™are trademarks of National Semiconductor Corporation.DS005583-1August 1999ADC0831/ADC0832/ADC0834/ADC08388-Bit Serial I/O A/D Converters with Multiplexer Options©1999National Semiconductor Corporation Connection DiagramsADC08388-Channel MuxSmall Outline/Dual-In-Line Package(WM and N)DS005583-8Top ViewADC08344-Channel MUXSmall Outline/Dual-In-Line Package(WM and N)DS005583-30COM internally connected to A GND Top ViewTop ViewADC08322-Channel MUX Dual-In-Line Package (N)DS005583-31COM internally connected to GND.V REF internally connected to V CC .Top ViewTop ViewADC08322-Channel MUX Small Outline Package (WM)DS005583-41Top ViewADC0831Single Differential Input Dual-In-Line Package (N)DS005583-32Top ViewADC0831Single Differential Input Small Outline Package (WM)DS005583-42Top ViewADC08388-Channel MUX Molded Chip Carrier (PCC)Package (V)DS005583-33 2Ordering InformationPart Number Analog Input Total Package TemperatureChannels Unadjusted Error RangeADC0831CCN1±1Molded(N)0˚C to+70˚CADC0831CCWM SO(M)0˚C to+70˚CADC0832CIWM2±1SO(M)−40˚C to+85˚CADC0832CCN Molded(N)0˚C to+70˚CADC0832CCWM SO(M)0˚C to+70˚CADC0834BCN4±1⁄2Molded(N)0˚C to+70˚CADC0834CCN±1Molded(N)0˚C to+70˚CADC0834CCWM SO(M)0˚C to+70˚CADC0838BCV8±1⁄2PCC(V)0˚C to+70˚CADC0838CCV±1PCC(V)0˚C to+70˚CADC0838CCN Molded(N)0˚C to+70˚CADC0838CIWM SO(M)−40˚C to+85˚CADC0838CCWM SO(M)0˚C to+70˚CSee NS Package Number M14B,M20B,N08E,N14A,N20A or V20A3Absolute Maximum Ratings(Notes1,2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Current into V+(Note3)15mA Supply Voltage,V CC(Note3) 6.5V VoltageLogic Inputs−0.3V to V CC+0.3V Analog Inputs−0.3V to V CC+0.3V Input Current per Pin(Note4)±5mA Package±20mA Storage Temperature−65˚C to+150˚C Package Dissipationat T A=25˚C(Board Mount)0.8W Lead Temperature(Soldering10sec.)Dual-In-Line Package(Plastic)260˚C Molded Chip Carrier PackageVapor Phase(60sec.)215˚C Infrared(15sec.)220˚C ESD Susceptibility(Note5)2000V Operating Ratings(Notes1,2)Supply Voltage,V CC 4.5V DC to6.3V DC Temperature Range T MIN≤T A≤T MAX ADC0832/8CIWM−40˚C to+85˚C ADC0834BCN,ADC0838BCV,ADC0831/2/4/8CCN,ADC0838CCV,ADC0831/2/4/8CCWM0˚C to+70˚CConverter and Multiplexer Electrical Characteristics The following specifications apply for V CC=V+=V REF=5V,V REF≤V CC+0.1V,T A=T j=25˚C,and f CLK=250kHz unless otherwise specified.Boldface limits apply from T MIN to T MAX.Parameter Conditions CIWM Devices BCV,CCV,CCWM,BCNand CCN DevicesTyp Tested Design Typ Tested Design Units (Note12)Limit Limit(Note12)Limit Limit(Note13)(Note14)(Note13)(Note14)CONVERTER AND MULTIPLEXER CHARACTERISTICSTotal Unadjusted Error V REF=5.00VADC0838BCV(Note6)±1⁄2±1⁄2ADC0834BCN±1⁄2±1⁄2LSB(Max) ADC0838CCV±1±1ADC0831/2/4/8CCN±1±1ADC0831/2/4/8CCWM±1±1ADC0832/8CIWM±1Minimum Reference 3.5 1.3 3.5 1.3 1.3kΩInput Resistance(Note7)Maximum Reference 3.5 5.9 3.5 5.4 5.9kΩInput Resistance(Note7)Maximum Common-ModeInput Range(Note8)V CC+0.05V CC+0.05V CC+0.05VMinimum Common-ModeInput Range(Note8)GND−0.05GND−0.05GND−0.05V DC Common-Mode Error±1/16±1⁄4±1/16±1⁄4±1⁄4LSB Change in zero15mA into V+error from V CC=5V V CC=N.C.to internal zener V REF=5Voperation(Note3)111LSB V Z,internal MIN15mA into V+ 6.3 6.3 6.3diode breakdown MAX8.58.58.5V (at V+)(Note3)Power Supply Sensitivity V CC=5V±5%±1/16±1⁄4±1⁄4±1/16±1⁄4±1⁄4LSBI OFF,Off Channel Leakage On Channel=5V,−0.2−0.2−1µACurrent(Note9)Off Channel=0V−1On Channel=0V,+0.2+0.2+1µAOff Channel=5V+14Converter and Multiplexer Electrical Characteristics The following specifications apply for V CC=V+=V REF=5V,V REF≤V CC+0.1V,T A=T j=25˚C,and f CLK=250kHz unless otherwise specified.Boldface limits apply from T MIN to T MAX.(Continued)Parameter Conditions CIWM Devices BCV,CCV,CCWM,BCNand CCN DevicesTyp Tested Design Typ Tested Design Units (Note12)Limit Limit(Note12)Limit Limit(Note13)(Note14)(Note13)(Note14)CONVERTER AND MULTIPLEXER CHARACTERISTICSI ON,On Channel Leakage On Channel=0V,−0.2−0.2−1µA Current(Note9)Off Channel=5V−1On Channel=5V,+0.2+0.2+1µAOff Channel=0V+1DIGITAL AND DC CHARACTERISTICSV IN(1),Logical“1”Input V CC=5.25V 2.0 2.0 2.0V Voltage(Min)V IN(0),Logical“0”Input V CC=4.75V0.80.80.8V Voltage(Max)I IN(1),Logical“1”Input V IN=5.0V0.00510.00511µA Current(Max)I IN(0),Logical“0”Input V IN=0V−0.005−1−0.005−1−1µA Current(Max)V OUT(1),Logical“1”Output V CC=4.75VVoltage(Min)I OUT=−360µA 2.4 2.4 2.4VI OUT=−10µA 4.5 4.5 4.5VV OUT(0),Logical“0”Output V CC=4.75V0.40.40.4V Voltage(Max)I OUT=1.6mAI OUT,TRI-STATE Output V OUT=0V−0.1−3−0.1−3−3µA Current(Max)V OUT=5V0.130.1+3+3µAI SOURCE,Output Source V OUT=0V−14−6.5−14−7.5−6.5mA Current(Min)I SINK,Output Sink Current(Min)V OUT=V CC168.0169.08.0mAI CC,Supply Current(Max)ADC0831,ADC0834,0.9 2.50.9 2.5 2.5mA ADC0838ADC0832Includes Ladder 2.3 6.5 2.3 6.5 6.5mACurrentAC CharacteristicsThe following specifications apply for V CC=5V,t r=t f=20ns and25˚C unless otherwise specified.Typ Tested Design Limit Parameter Conditions(Note12)Limit Limit Units(Note13)(Note14)f CLK,Clock Frequency Min10kHzMax400kHzt C,Conversion Time Not including MUX Addressing Time81/f CLK Clock Duty Cycle Min40% (Note10)Max60%t SET-UP,CS Falling Edge or250ns Data Input Valid to CLKRising Edget HOLD,Data Input Valid90ns after CLK Rising Edge5AC Characteristics(Continued)The following specifications apply for V CC =5V,t r =t f =20ns and 25˚C unless otherwise specified.TypTested Design Limit ParameterConditions(Note 12)Limit Limit Units(Note 13)(Note 14)t pd1,t pd0—CLK Falling C L =100pF Edge to Output Data Valid Data MSB First 6501500ns (Note 11)Data LSB First 250600ns t 1H ,t 0H ,—Rising Edge of C L =10pF,R L =10k125250ns CS to Data Output and (see TRI-STATE ®Test Circuits)SARS Hi–ZC L =100pf,R L =2k500ns C IN ,Capacitance of Logic 5pF InputC OUT ,Capacitance of Logic 5pFOutputsNote 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions.Note 2:All voltages are measured with respect to the ground plugs.Note 3:Internal zener diodes (6.3to 8.5V)are connected from V+to GND and V CC to GND.The zener at V+can operate as a shunt regulator and is connected to V CC via a conventional diode.Since the zener voltage equals the A/D’s breakdown voltage,the diode insures that V CC will be below breakdown when the device is powered from V+.Functionality is therefore guaranteed for V+operation even though the resultant voltage at V CC may exceed the specified Absolute Max of 6.5V.It is recommended that a resistor be used to limit the max current into V+.(See Figure 3in Functional Description Section 6.0)Note 4:When the input voltage (V IN )at any pin exceeds the power supply rails (V IN <V −or V IN >V +)the absolute value of current at that pin should be limited to 5mA or less.The 20mA package input current limits the number of pins that can exceed the power supply boundaries with a 5mA current limit to four.Note 5:Human body model,100pF discharged through a 1.5k Ωresistor.Note 6:Total unadjusted error includes offset,full-scale,linearity,and multiplexer errors.Note 7:Cannot be tested for ADC0832.Note 8:For V IN (−)≥V IN (+)the digital output code will be 00000000.Two on-chip diodes are tied to each analog input (see Block Diagram)which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the V CC supply.Be careful,during testing at low V CC levels (4.5V),as high level analog inputs (5V)can cause this input diode to conduct —especially at elevated temperatures,and cause errors for analog inputs near full-scale.The spec allows 50mV forward bias of either diode.This means that as long as the analog V IN or V REF does not exceed the supply voltage by more than 50mV,the output code will be correct.To achieve an absolute 0V DC to 5V DC input voltage range will therefore require a minimum supply voltage of 4.950V DC over temperature varia-tions,initial tolerance and loading.Note 9:Leakage current is measured with the clock not switching.Note 10:A 40%to 60%clock duty cycle range insures proper operation at all clock frequencies.In the case that an available clock has a duty cycle outside of these limits,the minimum,time the clock is high or the minimum time the clock is low must be at least 1µs.The maximum time the clock can be high is 60µs.The clock can be stopped when low so long as the analog input voltage remains stable.Note 11:Since data,MSB first,is the output of the comparator used in the successive approximation loop,an additional delay is built in (see Block Diagram)to allow for comparator response time.Note 12:Typicals are at 25˚C and represent most likely parametric norm.Note 13:Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).Note 14:Guaranteed but not 100%production tested.These limits are not used to calculate outgoing quality levels.Typical Performance CharacteristicsUnadjusted Offset Error vs V REF VoltageDS005583-43Linearity Error vs V REF VoltageDS005583-44Linearity Error vs TemperatureDS005583-45 6Typical Performance Characteristics(Continued)Leakage Current Test CircuitLinearity Error vs f CLKDS005583-46Power Supply Current vs Temperature (ADC0838,ADC0831,ADC0834)DS005583-47Note:For ADC0832add I REF .Output Current vs TemperatureDS005583-48Power Supply Current vs f CLKDS005583-29DS005583-37TRI-STATE Test Circuits and WaveformsTiming Diagramst 1HDS005583-49t 0HDS005583-50t 1H DS005583-51t 0HDS005583-52Data Input TimingDS005583-24Data Output TimingDS005583-25ADC0831Start Conversion TimingDS005583-26 8Timing Diagrams(Continued)ADC0831TimingDS005583-27*LSB first output not available on ADC0831.ADC0832TimingDS005583-28ADC0834TimingDS005583-59Timing Diagrams(Continued)A D C 0838T i m i n gD S 005583-6*M a k e s u r e c l o c k e d g e #18c l o c k s i n t h e L S B b e f o r e S E i s t a k e n l o w10ADC0838Functional Block DiagramD S 005583-7*S o m e o f t h e s e f u n c t i o n s /p i n s a r e n o t a v a i l a b l e w i t h o t h e r o p t i o n s .N o t e 1:F o r t h e A D C 0834,D 1i s i n p u t d i r e c t l y t o t h e D i n p u t o f S E L E C T 1.S E L E C T 0i s f o r c e d t o a “1”.F o r t h e A D C 0832,D I i s i n p u t d i r e c t l y t o t h e D I i n p u t o f O D D /S I G N .S E L E C T 0i s f o r c e d t o a “0”a n d S E L E C T 1i s f o r c e d t o a “1”.11Functional Description 1.0MULTIPLEXER ADDRESSINGThe design of these converters utilizes a sample-data com-parator structure which provides for a differential analog in-put to be converted by a successive approximation routine. The actual voltage converted is always the difference be-tween an assigned“+”input terminal and a“−”input terminal. The polarity of each input terminal of the pair being con-verted indicates which line the converter expects to be the most positive.If the assigned“+”input is less than the“−”in-put the converter responds with an all zeros output code.A unique input multiplexing scheme has been utilized to pro-vide multiple analog channels with software-configurable single-ended,differential,or a new pseudo-differential option which will convert the difference between the voltage at any analog input and a common terminal.The analog signal con-ditioning required in transducer-based data acquisition sys-tems is significantly simplified with this type of input flexibility. One converter package can now handle ground referenced inputs and true differential inputs as well as signals with some arbitrary reference voltage.A particular input configuration is assigned during the MUX addressing sequence,prior to the start of a conversion.The MUX address selects which of the analog inputs are to be enabled and whether this input is single-ended or differential.In the differential case,it also assigns the polarity of the channels.Differential inputs are restricted to adjacent chan-nel pairs.For example channel0and channel1may be se-lected as a different pair but channel0or1cannot act differ-entially with any other channel.In addition to selecting differential mode the sign may also be selected.Channel0 may be selected as the positive input and channel1as the negative input or vice versa.This programmability is best il-lustrated by the MUX addressing codes shown in the follow-ing tables for the various product options.The MUX address is shifted into the converter via the DI line. Because the ADC0831contains only one differential input channel with a fixed polarity assignment,it does not require addressing.The common input line on the ADC0838can be used as a pseudo-differential input.In this mode,the voltage on this pin is treated as the“−”input for any of the other input channels. This voltage does not have to be analog ground;it can be any reference potential which is common to all of the inputs. This feature is most useful in single-supply application where the analog circuitry may be biased up to a potential other than ground and the output signals are all referred to this potential.TABLE1.Multiplexer/Package OptionsPart Number of Analog Channels Number ofNumber Single-Ended Differential Package PinsADC0831118ADC0832218ADC08344214ADC08388420 12Functional Description(Continued)TABLE2.MUX Addressing:ADC0838Single-Ended MUX ModeMUX Address Analog Single-Ended Channel#SGL/ODD/SELECT01234567COMDIF SIGN101000+−1001+−1010+−1011+−1100+−1101+−1110+−1111+−TABLE3.MUX Addressing:ADC0838Differential MUX ModeMUX Address Analog Differential Channel-Pair#SGL/ODD/SELECT0123DIF SIGN10012345670000+−0001+−0010+−0011+−0100−+0101−+0110−+0111−+TABLE4.MUX Addressing:ADC0834Single-Ended MUX ModeMUX Address Channel#SGL/ODD/SELECTDIF SIGN10123100+101+110+111+COM is internally tied to A GNDTABLE5.MUX Addressing:ADC0834Differential MUX ModeMUX Address Channel#SGL/ODD/SELECTDIF SIGN10123000+−001+−010−+011−+13Functional Description(Continued)TABLE6.MUX Addressing:ADC0832Single-Ended MUX ModeMUX Address Channel#SGL/ODD/01DIF SIGN10+11+COM is internally tied to A GNDTABLE7.MUX Addressing:ADC0832Differential MUX ModeMUX Address Channel#SGL/ODD/01DIF SIGN00+−01−+Since the input configuration is under software control,it can be modified,as required,at each conversion.A channel can be treated as a single-ended,ground referenced input for one conversion;then it can be reconfigured as part of a dif-ferential channel for another conversion.Figure1illustrates the input flexibility which can be achieved.The analog input voltages for each channel can range from 50mV below ground to50mV above V CC(typically5V)with-out degrading conversion accuracy.2.0THE DIGITAL INTERFACEA most important characteristic of these converters is their serial data link with the controlling ing a serial communication format offers two very significant system im-provements;it allows more function to be included in the converter package with no increase in package size and it can eliminate the transmission of low level analog signals by locating the converter right at the analog sensor;transmitting highly noise immune digital data back to the host processor. To understand the operation of these converters it is best to refer to the Timing Diagrams and Functional Block Diagram and to follow a complete conversion sequence.For clarity a separate diagram is shown of each device.1.A conversion is initiated by first pulling the CS(chip select) line low.This line must be held low for the entire conversion. The converter is now waiting for a start bit and its MUX as-signment word.2.A clock is then generated by the processor(if not provided continuously)and output to the A/D clock input.14Functional Description(Continued)3.On each rising edge of the clock the status of the data in (DI)line is clocked into the MUX address shift register.The start bit is the first logic “1”that appears on this line (all lead-ing zeros are ignored).Following the start bit the converter expects the next 2to 4bits to be the MUX assignment word.4.When the start bit has been shifted into the start location of the MUX register,the input channel has been assigned and a conversion is about to begin.An interval of 1⁄2clock pe-riod (where nothing happens)is automatically inserted to al-low the selected MUX channel to settle.The SAR status line goes high at this time to signal that a conversion is now in progress and the DI line is disabled (it no longer accepts data).5.The data out (DO)line now comes out of TRI-STATE and provides a leading zero for this one clock period of MUX set-tling time.6.When the conversion begins,the output of the SAR com-parator,which indicates whether the analog input is greater than (high)or less than (low)each successive voltage from the internal resistor ladder,appears at the DO line on each falling edge of the clock.This data is the result of the conver-sion being shifted out (with the MSB coming first)and can be read by the processor immediately.7.After 8clock periods the conversion is completed.The SAR status line returns low to indicate this 1⁄2clock cycle later.8.If the programmer prefers,the data can be provided in an LSB first format [this makes use of the shift enable (SE)con-trol line].All 8bits of the result are stored in an output shift register.On devices which do not include the SE control line,the data,LSB first,is automatically shifted out the DO line,after the MSB first data stream.The DO line then goes low and stays low until CS is returned high.On the ADC0838the SE line is brought out and if held high,the value of the LSB remains valid on the DO line.When SE is forced low,the data is then clocked out LSB first.The ADC0831is an excep-tion in that its data is only output in MSB first format.9.All internal registers are cleared when the CS line is high.If another conversion is desired,CS must make a high to low transition followed by address information.The DI and DO lines can be tied together and controlled through a bidirectional processor I/O bit with one wire.This is possible because the DI input is only “looked-at”during the MUX addressing interval while the DO line is still in a high impedance state.8Single-EndedDS005583-538Pseudo-DifferentialDS005583-544Differential DS005583-55Mixed ModeDS005583-56FIGURE 1.Analog Input Multiplexer Options for the ADC083815Functional Description(Continued)3.0REFERENCE CONSIDERATIONSThe voltage applied to the reference input to these convert-ers defines the voltage span of the analog input (the differ-ence between V IN(MAX)and V IN(MIN))over which the 256possible output codes apply.The devices can be used in ei-ther ratiometric applications or in systems requiring absolute accuracy.The reference pin must be connected to a voltage source capable of driving the reference input resistance of typically 3.5k Ω.This pin is the top of a resistor divider string used for the successive approximation conversion.In a ratiometric system,the analog input voltage is propor-tional to the voltage used for the A/D reference.This voltage is typically the system power supply,so the V REF pin can be tied to V CC (done internally on the ADC0832).This technique relaxes the stability requirements of the system reference as the analog input and A/D reference move together maintain-ing the same output code for a given input condition.For absolute accuracy,where the analog input varies be-tween very specific voltage limits,the reference pin can be biased with a time and temperature stable voltage source.The LM385and LM336reference diodes are good low cur-rent devices to use with these converters.The maximum value of the reference is limited to the V CC supply voltage.The minimum value,however,can be quite small (see Typical Performance Characteristics)to allow di-rect conversions of transducer outputs providing less than a 5V output span.Particular care must be taken with regard to noise pickup,circuit layout and system error voltage sources when operating with a reduced span due to the increased sensitivity of the converter (1LSB equals V REF /256).4.0THE ANALOG INPUTSThe most important feature of these converters is that they can be located right at the analog signal source and through just a few wires can communicate with a controlling proces-sor with a highly noise immune serial bit stream.This in itself greatly minimizes circuitry to maintain analog signal accu-racy which otherwise is most susceptible to noise pickup.However,a few words are in order with regard to the analog inputs should the input be noisy to begin with or possibly riding on a large common-mode voltage.The differential input of these converters actually reduces the effects of common-mode input noise,a signal common to both selected “+”and “−”inputs for a conversion (60Hz is most typical).The time interval between sampling the “+”in-put and then the “−”input is 1⁄2of a clock period.The change in the common-mode voltage during this short time interval can cause conversion errors.For a sinusoidal common-mode signal this error is:where f CM is the frequency of the common-mode signal,V PEAK is its peak voltage valueand f CLK ,is the A/D clock frequency.For a 60Hz common-mode signal to generate a 1⁄4LSB error (≈5mV)with the converter running at 250kHz,its peak value would have to be 6.63V which would be larger than allowed as it exceeds the maximum analog input limits.Due to the sampling nature of the analog inputs short spikes of current enter the “+”input and exit the “−”input at the clock edges during the actual conversion.These currents decay rapidly and do not cause errors as the internal com-parator is strobed at the end of a clock period.Bypass ca-pacitors at the inputs will average these currents and cause an effective DC current to flow through the output resistance of the analog signal source.Bypass capacitors should not be used if the source resistance is greater than 1k Ω.This source resistance limitation is important with regard to the DC leakage currents of input multiplexer as well.The worst-case leakage current of ±1µA over temperature will create a 1mV input error with a 1k Ωsource resistance.An op amp RC active low pass filter can provide both imped-ance buffering and noise filtering should a high impedance signal source be required.DS005583-57a)Ratiometric DS005583-58b)Absolute with a reduced SpanFIGURE 2.Reference Examples16Functional Description(Continued)5.0OPTIONAL ADJUSTMENTS5.1Zero ErrorThe zero of the A/D does not require adjustment.If the mini-mum analog input voltage value,V IN(MIN),is not ground a zero offset can be done.The converter can be made to out-put00000000digital code for this minimum input voltage by biasing any V IN(−)input at this V IN(MIN)value.This utilizes the differential mode operation of the A/D.The zero error of the A/D converter relates to the location of the first riser of the transfer function and can be measured by grounding the V IN(−)input and applying a small magnitude positive voltage to the V IN(+)input.Zero error is the differ-ence between the actual DC input voltage which is neces-sary to just cause an output digital code transition from0000 0000to00000001and the ideal1⁄2LSB value(1⁄2LSB=9.8 mV for V REF=5.000V DC).5.2Full-ScaleThe full-scale adjustment can be made by applying a differ-ential input voltage which is11⁄2LSB down from the desired analog full-scale voltage range and then adjusting the mag-nitude of the V REF input(or V CC for the ADC0832)for a digi-tal output code which is just changing from11111110to1111 1111.5.3Adjusting for an Arbitrary Analog Input Voltage RangeIf the analog zero voltage of the A/D is shifted away from ground(for example,to accommodate an analog input signal which does not go to ground),this new zero reference should be properly adjusted first.A V IN(+)voltage which equals this desired zero reference plus1⁄2LSB(where the LSB is calculated for the desired analog span,using1LSB= analog span/256)is applied to selected“+”input and the zero reference voltage at the corresponding“−”input should then be adjusted to just obtain the00HEX to01HEX code tran-sition.The full-scale adjustment should be made[with the proper V IN(−)voltage applied]by forcing a voltage to the V IN(+)in-put which is given by:where:V MAX=the high end of the analog input rangeandV MIN=the low end(the offset zero)of the analog range.(Both are ground referenced.)The V REF(or V CC)voltage is then adjusted to provide a code change from FE HEX to FF HEX.This completes the adjust-ment procedure.6.0POWER SUPPLYA unique feature of the ADC0838and ADC0834is the inclu-sion of a zener diode connected from the V+terminal to ground which also connects to the V CC terminal(which is the actual converter supply)through a silicon diode,as shown in Figure3.(Note3)This zener is intended for use as a shunt voltage regulator toeliminate the need for any additional regulating components.This is most desirable if the converter is to be remotely lo-cated from the system power source.Figure4and Figure5il-lustrate two useful applications of this on-board zener whenan external transistor can be afforded.An important use of the interconnecting diode between V+and V CC is shown in Figure6and Figure7.Here,this diodeis used as a rectifier to allow the V CC supply for the converterto be derived from the clock.The low current requirements ofthe A/D and the relatively high clock frequencies used(typi-cally in the range of10k–400kHz)allows using the smallvalue filter capacitor shown to keep the ripple on the V CC lineto well under1⁄4of an LSB.The shunt zener regulator canalso be used in this mode.This requires a clock voltageswing which is in excess of V Z.A current limit for the zener isneeded,either built into the clock generator or a resistor canbe used from the CLK pin to the V+pin.DS005583-11FIGURE3.An On-Chip Shunt Regulator Diode 17。

ADC0832

ADC0832

ADC08328位串行A/D 转换器ADC08321.功能特点ADC0832是NS(National Semiconductor)公司生产的串行接口8位A/D转换器,通过三线接口与单片机连接,功耗低,性能价格比较高,适宜在袖珍式的智能仪器仪表中使用。

ADC0832为8位分辨率A/D转换芯片,其最高分辨可达256级,可以适应一般的模拟量转换要求。

芯片具有双数据输出可作为数据校验,以减少数据误差,转换速度快且稳定性能强。

独立的芯片使能输入,使多器件连接和处理器控制变得更加方便。

通过DI 数据输入端,可以轻易的实现通道功能的选择。

其主要特点如下:●8位分辨率,逐次逼近型,基准电压为5V;●5V 单电源供电;●输入模拟信号电压范围为0~5V;●输入和输出电平与TTL 和CMOS 兼容;●在250KHZ 时钟频率时,转换时间为32us;●具有两个可供选择的模拟输入通道;●功耗低,15mW。

2.外部引脚及其说明ADC0832有DIP 和SOIC 两种封装,DIP 封装的ADC0832引脚排列如图6.21所示。

各引脚说明如下:●CS——片选端,低电平有效。

●CH0,CH1——两路模拟信号输入端。

●DI——两路模拟输入选择输入端。

●DO——模数转换结果串行输出端。

●CLK——串行时钟输入端。

●Vcc/REF——正电源端和基准电压输入端。

●GND——电源地。

3.单片机对ADC0832的控制原理一般情况下ADC0832与单片机的接口应为4条数据线,分别是CS、CLK、DO、DI。

但由于DO端与DI端在通信时并未同时有效并与单片机的接口是双向的,所以电路设计时可以将DO 和DI 并联在一根数据线上使用。

当ADC0832未工作时其CS输入端应为高电平,此时芯片禁用,CLK 和DO/DI 的电平可任意。

当要进行A/D转换时,须先将CS端置于低电平并且保持低电平直到转换完全结束。

此时芯片开始转换工作,同时由处理器向芯片时钟输入端CLK提供时钟脉冲,DO/DI端则使用DI端输入通道功能选择的数据信号。

adc0832模块程序

adc0832模块程序

adc0832模块程序/* ADC0832差分00工作方式*/#include#include"adc0832.h"#include"1602.h"sbit ADC_CS =P2^0;sbit ADC_CLK=P2^1;sbit ADC_DO =P2^2;sbit ADC_DI =P2^3;unsigned char adval;unsigned char ReadADC(void) //把模拟电压值转换成8位二进制数并返回{unsigned char i,ch,bb,cc,dd;ch=0;ADC_CS=0;ADC_DO=0;//片选,DO为高阻态for(i=0;i<10;i++){;}ADC_CLK=0;delay(2);ADC_DI=1;ADC_CLK=1;delay(2); //第一个脉冲,起始位ADC_CLK=0;delay(2);ADC_DI=1;ADC_CLK=1;delay(2); //第二个脉冲,DI=1表示双通道单极性输入ADC_CLK=0;delay(2);ADC_DI=1;ADC_CLK=1;delay(2); //第三个脉冲,DI=1表示选择通道1(CH2)ADC_DI=0;ADC_DO=1;//DI转为高阻态,DO脱离高阻态为输出数据作准备ADC_CLK=1;delay(2);ADC_CLK=0;delay(2);//经实验,这里加一个脉冲AD便能正确读出数据,//不加的话读出的数据少一位(最低位d0读不出?for(i=0;i<8;i++){ADC_CLK=1;delay(2);ADC_CLK=0;delay(2);ch=(ch<<1)|ADC_DO;//在每个脉冲的下降沿DO输出一位数据,最终ch为8位二进制数}ADC_CS=1;//取消片选,一个转换周期结束adval=ch;returnadval;}。

adc0832数字电压表(程序+仿真图)

adc0832数字电压表(程序+仿真图)

adc0832数字电压表(程序+仿真图)仿真图:/*********************************包含头文件********************************/#include <reg51.h>#include <intrins.h>/*********************************端口定义**********************************/sbit CS = P3^5;sbit Clk = P3^3;sbit DATI = P3^4;sbit DATO = P3^4;sbit P20=P2^0 ;/*******************************定义全局变量********************************/unsigned char dat = 0x00; //AD值unsigned char count = 0x00; //定时器计数unsigned char CH; //通道变量unsigned char dis[] = {0x00, 0x00, 0x00}; //显示数值/*******************************共阳LED 段码表*******************************/unsigned char code tab[]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8, 0x80,0x90};char code tablewe[]={ 0xfd,0xfb,0xf7,0xef,0xdf,0xfe };/**************************************** ************************************函数功能:AD转换子程序入口参数:CH出口参数:dat***************************************** ***********************************/unsigned char adc0832(unsigned char CH){unsigned char i,test,adval;adval = 0x00;test = 0x00;Clk = 0; //初始化DATI = 1;_nop_();CS = 0;_nop_();Clk = 1;_nop_();if ( CH == 0x00 ) //通道选择{Clk = 0;DATI = 1; //通道0的第一位_nop_();Clk = 1;_nop_();Clk = 0;DATI = 0; //通道0的第二位_nop_();Clk = 1;_nop_();}else{Clk = 0;DATI = 1; //通道1的第一位_nop_();Clk = 1;_nop_();Clk = 0;DATI = 1; //通道1的第二位_nop_();Clk = 1;_nop_();}Clk = 0;DATI = 1;for( i = 0;i < 8;i++ ) //读取前8位的值{_nop_();adval <<= 1;Clk = 1;_nop_();Clk = 0;if (DATO)adval |= 0x01;elseadval |= 0x00;}for (i = 0; i < 8; i++) //读取后8位的值{test >>= 1;if (DATO)test |= 0x80;elsetest |= 0x00;_nop_();Clk = 1;_nop_();Clk = 0;}if (adval == test) //比较前8位与后8位的值,如果不相同舍去。

ADC0832引脚图

ADC0832引脚图

adc0832引脚图:ADC0832 是美国国家半导体公司生产的一种8 位分辨率、双通道A/D转换芯片。

由于它体积小,兼容性强,性价比高而深受单片机爱好者及企业欢迎,其目前已经有很高的普及率。

学习并使用ADC0832 可是使我们了解A/D转换器的原理,有助于我们单片机技术水平的提高。

ADC0832 具有以下特点:· 8位分辨率;·双通道A/D转换;·输入输出电平与TTL/CMOS相兼容;· 5V电源供电时输入电压在0~5V之间;·工作频率为250KHZ,转换时间为32μS;·一般功耗仅为15mW;· 8P、14P—DIP(双列直插)、PICC 多种封装;·商用级芯片温宽为0°C to +70°C,工业级芯片温宽为−40°C to +85°C;芯片顶视图:(图1、图2)ADC0832程序:程序占用资源有累加器A,工作寄存器R7,通用寄存器B 和特殊寄存器CY。

通道功能寄存器和转换值共用寄存器B。

在使用转换子程序之前必须确定通道功能寄存器B 的值,其赋值语句为“MOV B,#data”(00H~03H)。

运行转换子程序后的转换数据值被放入B 中。

子程序退出后即可以对B 中数据处理。

ADC0832 芯片接口程序[汇编] :/*------------------------------------------- 子程序名:ADC0832子程序编写人:杜洋初写时间:2005年10 月10日程序功能:将模拟电压量转换成数字量实现方法:串行通信。

CPU说明:MCS-51植入说明:占用A、B、CY、R7-------------------------------------------*/ ;以下接口定义根据硬件连线更改ADCS BIT P3.5 ;使能接口ADCLK BIT P3.4 ;时钟接口ADDO BIT P3.3 ;数据输出接口(复用)ADDI BIT P3.3 ;数据输入接口;以下语句在调用转换程序前设定MOV B,#00H ;装入通道功能选择数据值;以下为ADC0832读取数据子程序;==== ADC0832读数据子程序==== ADCONV:SETB ADDI ;初始化通道选择NOPNOPCLR ADCS ;拉低/CS端NOPNOPSETB ADCLK ;拉高CLK端NOPCLR ADCLK ;拉低CLK端,形成下降沿MOV A,BMOV C,ACC.1 ;确定取值通道选择MOV ADDI,CNOPNOPSETB ADCLK ;拉高CLK端NOPNOPCLR ADCLK ;拉低CLK端,形成下降沿2 MOV A,BMOV C,ACC.0 ;确定取值通道选择MOV ADDI,CNOPNOPSETB ADCLK ;拉高CLK端NOPNOPCLR ADCLK ;拉低CLK端,形成下降沿3 SETB ADDINOPNOPMOV R7,#8 ;准备送下后8个时钟脉冲AD_1:MOV C,ADDO ;接收数据MOV ACC.0,CRL A ;左移一次SETB ADCLKNOPCLR ADCLK ;形成一次时钟脉冲NOPNOPDJNZ R7,AD_1 ;循环8次MOV C,ADDO ;接收数据MOV ACC.0,CMOV B,AMOV R7,#8AD_13:MOV C,ADDO ;接收数据MOV ACC.0,CRR A ;左移一次SETB ADCLKNOPNOPCLR ADCLK ;形成一次时钟脉冲NOPNOPDJNZ R7,AD_13 ;循环8次CJNE A,B,ADCONV ;数据校验SETB ADCS ;拉高/CS端CLR ADCLK ;拉低CLK端SETB ADDO ;拉高数据端,回到初始状态RET;====子程序结束====。

adc0832的工作原理

adc0832的工作原理

adc0832的工作原理ADC0832是一款8位精密模数转换器,它具有许多特性,使其成为许多数字系统的理想选择。

在本文中,我们将深入探讨ADC0832的工作原理,以便更好地理解它的功能和应用。

首先,让我们来了解一下ADC0832的基本工作原理。

ADC0832采用了双重转换技术,即首先进行采样保持(S/H)转换,然后进行模数(A/D)转换。

在采样保持转换阶段,输入信号被采样并保持在一个电容器中,以确保在进行模数转换时能够获得准确的输入信号。

接下来,在模数转换阶段,采样保持电压被转换成相应的数字输出,该输出可以通过数字接口进行读取和处理。

ADC0832的工作原理主要涉及到其内部的运算放大器、采样保持电路和模数转换器。

首先,运算放大器负责放大输入信号,并将其传递给采样保持电路。

采样保持电路则负责对输入信号进行采样和保持,并将其传递给模数转换器进行数字化处理。

模数转换器则将模拟信号转换为相应的数字输出,以便于数字系统进行进一步处理和分析。

此外,ADC0832还具有一些特殊的工作原理,如内部参考电压源和串行接口。

内部参考电压源可以提供稳定的参考电压,以确保模数转换的准确性和稳定性。

而串行接口则可以方便地与微控制器或其他数字系统进行通信,实现数据的传输和控制。

总的来说,ADC0832的工作原理是基于运算放大器、采样保持电路和模数转换器的协同作用,通过将模拟信号转换为数字输出,实现对输入信号的准确采样和数字化处理。

同时,其内部的特殊工作原理也为数字系统的应用提供了便利和稳定性。

在实际应用中,了解ADC0832的工作原理对于正确使用和优化其性能至关重要。

只有深入理解其内部原理,才能更好地设计和调试数字系统,实现更高的性能和稳定性。

因此,通过深入研究和理解ADC0832的工作原理,可以更好地发挥其在各种数字系统中的作用,为工程应用提供更多可能性和创新空间。

综上所述,ADC0832是一款功能强大的8位精密模数转换器,其工作原理基于运算放大器、采样保持电路和模数转换器的协同作用。

ADC0832芯片介绍doc资料

ADC0832芯片介绍doc资料

A D C0832芯片介绍这一课我们来学习ADC0832芯片的应用。

模-数(AD)和数-模(DA)转换是模拟电路和数字电路进行沟通的渠道,从前面的课程我们知道,数字电路里,电平只有高和低两种状态,比如5V和0V,对应着1和0;模拟电路里,电平则理论上有无数个状态,比如0V、0.1V、0.2V…等等。

如何将模拟电平值在数字电路里表达出来呢?这就需要AD转换过程,同理的,也有DA转换过程。

这一课,我们就利用实验板上的ADC0832芯片来实AD转换这一过程。

ADC0832是美国国家半导体公司生产的一种8位分辨率、双通道A/D转换芯片。

由于它体积小,兼容性强,性价比高而深受单片机爱好者及企业欢迎,其目前已经有很高的普及率。

学习并使用ADC0832可是使我们了解A/D转换器的原理,有助于我们单片机技术水平的提高。

ADC0832具有以下特点:● 8位分辨率;● 双通道A/D转换;● 输入输出电平与TTL/CMOS相兼容;● 5V电源供电时输入电压在0~5V之间;● 工作频率为250KHZ,转换时间为32μS;● 一般功耗仅为15mW;● 8P、14P—DIP(双列直插)、PICC多种封装;● 商用级芯片温宽为0°C to +70°C?,工业级芯片温宽为40℃ to +85℃下面看看它的引脚及功能。

ADC0832为8位分辨率A/D转换芯片,其最高分辨可达256级,可以适应一般的模拟量转换要求。

其内部电源输入与参考电压的复用,使得芯片的模拟电压输入在0~5V之间。

芯片转换时间仅为32μS,据有双数据输出可作为数据校验,以减少数据误差,转换速度快且稳定性能强。

独立的芯片使能输入,使多器件挂接和处理器控制变的更加方便。

通过DI数据输入端,可以轻易的实现通道功能的选择。

正常情况下ADC0832与单片机的接口应为4条数据线,分别是CS、CLK、DO、DI。

但由于DO端与DI端在通信时并未同时有效并与单片机的接口是双向的,所以电路设计时可以将DO和DI并联在一根数据线上使用。

ADC0832电压采集电路分析

ADC0832电压采集电路分析

ADC0832芯片功能分析:8管脚芯片,管脚1cs 用于片选,低电平有效,cs=0,芯片才可以工作。

Ch0.ch1,模拟输入通道,gnd 接地。

Vcc 接电源正极,clk 给芯片工作提供震荡信号,D0,D1,为数据输入端口,两个端口一般不会同时工作,
所以使用时一般共同连在一个端口上,d1用于选通工作通道,d0用于数据输入。

D1在时钟第一个脉冲下降时必须置高,用于启动芯片工作,在第二个,第三个时钟脉冲信号下降之前,d1端口必须输入两位数,用以选通数据输入通道,在第三个时钟脉冲下降之后,D1通道失去作用,置高。

然后d0通道传输数据。

光敏电阻和adc0832采集电路原理

光敏电阻和adc0832采集电路原理

光敏电阻和adc0832采集电路原理一、光敏电阻原理光敏电阻是一种用于测量光强度的传感器,其原理是基于光敏材料的电导率随着光照强度的变化而发生变化。

当有光照射到光敏电阻上时,其电导率会降低,反之则会升高。

因此,可以通过测量光敏电阻的电阻值来间接测量光照强度。

二、ADC0832采集电路原理ADC0832是一种8位串行模数转换器,它可以将模拟信号转换为数字信号输出。

ADC0832采集电路主要由模拟输入部分和数字输出部分组成。

1. 模拟输入部分模拟输入部分主要由采样保持电路和模数转换器组成。

采样保持电路用于对输入信号进行采样和保持,以确保在转换过程中输入信号的稳定性。

模数转换器则将采样后的信号转换为相应的数字信号输出。

2. 数字输出部分数字输出部分主要由串行数据输出接口和控制逻辑组成。

串行数据输出接口用于将数字信号以串行方式输出,控制逻辑则负责控制整个转换过程,并将转换结果输出。

三、光敏电阻和ADC0832采集电路的结合原理将光敏电阻和ADC0832采集电路结合起来,可以实现对光照强度的精确测量。

具体实现过程如下:1. 将光敏电阻作为模拟输入信号接入ADC0832采集电路中的采样保持电路。

2. 通过控制逻辑,启动模数转换器对输入信号进行转换,并将转换结果输出到串行数据输出接口。

3. 通过串行数据输出接口,将数字信号传输到单片机或其他处理器中进行处理。

4. 在单片机或其他处理器中,可以根据数字信号的大小计算出对应的光照强度值,并进行相应的控制或显示等操作。

四、注意事项在使用光敏电阻和ADC0832采集电路时,需要注意以下几点:1. 光敏电阻应该放置在光线直射处以获得最佳效果。

2. ADC0832采集电路应该被正确地连接并按照规定方式使用。

3. 应该根据实际需求选择合适的参考电压和采样率以获得准确的测量结果。

4. 在使用过程中需要注意避免干扰源,以确保测量结果的准确性。

五、总结光敏电阻和ADC0832采集电路结合可以实现对光照强度的精确测量,是一种常用的光照强度传感器。

ADC0832内部原理(Adc0832internalprinciple)

ADC0832内部原理(Adc0832internalprinciple)

ADC0832内部原理(Adc 0832 internal principle)ADC0832 is A 8-bit resolution and dual channel A/D conversion produced by national semiconductor companyThe chip. Due to its small size, strong compatibility and high cost performance, it is well received by the fans and enterprises of the single chip.It has a high penetration rate. Learn and use ADC0832 but let us know A/D converterThe principle of it can help us to improve the technology of SCM.ADC0832 has the following characteristics:· 8-bit resolution;· dual channel A/D conversion;· input output level is compatible with TTL/CMOS;· 5V power supply when the input voltage is between 0 and 5V;· the working frequency is 250KHZ and the conversion time is 32 mu S;· general power consumption is only 15mW;· 8P, 14P - DIP (dual column direct interpolation), PICC multiple packaging;, commercial level chip WenKuan 0 ° C to + 70 ° C, industrial-grade WenKuan for chip. 40 ° C to + 85 ° C;Chip top view: (figure 1, figure 2)Figure 1 in figure 2- DYDIYE -Themail:******************Chip interface description:· CS_ film selection to enable the ability of low level chips.CH0 emulates the input channel 0, or as IN + / -.· CH1 analog input channel 1, or as IN + / - use.· GND chip reference 0 potential (ground).· DI data signal input, select channel control.· DO data signal output, transform data output.· CLK chip clock input.· Vcc/REF power input and reference voltage input (reuse).ADC0832 and single chip microcomputer interface circuit:Figure 3- DYDIYE -Themail:******************The adc 0832 is 8-bit resolution A/D conversion chip with A maximum resolution of 256, which can be usedGeneral analog conversion requirements. Its internal power input and reference voltage are multiplexed to make the chip simulationThe voltage input is between 0 and 5V. The switching time of the chip is only 32 mu S, and there are two data outputs that can be used as dataCheck to reduce data error, fast conversion speed and stable performance. Independent chips enable inputMulti-device connection and processor control are more convenient. The DI data input side can be easily implementedSelection of channel functions.Control principle of ADC0832 single chip microcomputer:Normally, the interface of ADC0832 and singlechip should be 4 data lines, which are CS, CLK,DO, DI. However, because the DO end and DI end are not effective at the same time and the interface of the single chip is doubleFor the circuit design, DO and DI can be used in parallel with a cable. (see figure 3)When adc 0832 is not working, its CS input should be high level, when the chip is disabled, CLK andThe level of DO/DI is arbitrary. When A/D conversion is to be performed, the CS must first be placed in A low levelKeep the low level until the transition is complete. At this point, the chip starts to shift work, while the processor is moving toward the coreThe slice clock input CLK enters the clock pulse, and the DO/DI side USES the DI terminal input channel function selectionData signals. The DI end must be high level before the sinking of the first clock pulse, indicating the initial signal.The DI side should enter two bits of data to select the channel function, and its functional items, before the second and third pulse sinksSee table 1.Table 1- DYDIYE -Themail:******************As shown in table 1, when the 2 bits are "1" and "0", only a single channel transformation is performed for CH0.When two data is "1" and "1", only single channel conversion is performed for CH1. When two data is "0",When "0", CH0 is the input IN +, CH1 as negative input IN - input. When twoWhen the data is "0" and "1", CH0 is used as the negative input terminal IN -, CH1 as positive input terminal IN +The input.After the fall of the third pulse, the input level of the DI is lost, and then DO/DIThe end starts to use the data output DO to convert data to read. Start with the fourth pulse and start with DOThe end output converts data to the highest level DATA7, and then each pulse submergs the DO side to output the next data.The lowest data DATA0 was issued until the eleventh pulse, and the data output of a byte was completed. It is alsoFrom this point, the next byte of data is output from the next bit, which is the down output DATD0 from the eleventh byte.The 8-bit data is then output and the data output is completed in the 19th pulse, which also marks A/D conversionThe end. Finally, CS high level is disabled, and the converted data is processed directly.See table 2 for more detailed timing instructions.Table 2.- DYDIYE -Themail:******************The input voltage of ADC0832 is 0 ~ 5V and 8-bit resolution as input of single channel analog signalThe voltage accuracy is 19.53 mV. The voltage value is set if the input is made from IN + and IN - inputSet the width of the conversion within a larger range. But it's worth noting that IN +IN the input to in-line, if the voltage IN the in-line is greater than the IN + voltage, the data result will always be00 h.Writing of adc 0832 chip interface program:ADC0832 data read program flow:For efficient and efficient communication, we use a compilationLanguage programming interface program. Because of the data of ADC0832The change time is only 32 mu S, so the data of A/D transformation is sampledThe frequency can be very fast, and in some cases, A/D is also guaranteedTransform the real-time requirements of data. The data read program is subprogrammedThe form of the sequence call appears, facilitating the migration of the program.The program USES the accumulator A, the work register R7,General register B and special register CY. Channel function mailThe memory and conversion values share register B. In the use of the transformation subpathBefore the sequence, you must determine the value of the channel function register B, which is assignedThe value statement is "MOV B, # data" (00H ~ 03H). shipmentThe converted data value after the line conversion subroutine is put into B. The childAfter the program exits, the data can be processed in B.ADC0832 chip interface program [assembly] :- DYDIYE -mail:********************/ * -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --Subroutine name: ADC0832 subroutineWriter: du YangInitial date: 10 October 2005Program function: convert analog voltage to digitalImplementation method: serial communication.CPU description: McS-51Insert description: occupy A, B, CY, R7-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ---- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - * /; The following interface definitions are changed according to the hardware connectionADCS BIT P3.5; Can make the interfaceADCLK BIT P3.4; The clock interfaceADDO BIT P3.3; Data output interface (reuse)ADDI BIT P3.3; Data input interface; The following statement is set before invoking the transformation programMOV, B # 00 h; Load channel function to select data values; The following is the ADC0832 reading data subroutine; Read the data subroutine = = =ADCONV:SETB ADDI. Initialize the channel selectionThe NOPThe NOPThe CLR ADCS. Lower/CS sideThe NOPThe NOPSETB ADCLK; Raising the CLK endThe NOPThe NOPThe CLR ADCLK; Pull down the CLK end and form a descending edge MOV A, BMOV C, ACC. 1; Determine the selection of value channels MOV ADDI, CThe NOPThe NOPSETB ADCLK; Raising the CLK endThe NOPThe NOPThe CLR ADCLK; Pull down the CLK end and form a drop along 2MOV A, BMOV C, ACC. 0; Determine the selection of the value channel MOV ADDI, CThe NOPThe NOPSETB ADCLK; Raising the CLK endThe NOPThe NOPThe CLR ADCLK; Pull down the CLK end and form a drop along 3 SETB ADDIThe NOPThe NOPMOV R7, # 8; Prepare to send the next 8 clock pulsesAD_1:C, MOV ADDO; Receive dataMOV ACC. 0, CRL A; The left oneSETB ADCLKThe NOPThe NOPThe CLR ADCLK; Form a clock pulseThe NOPThe NOPDJNZ R7 AD_1; Loop eight timesC, MOV ADDO; The last person receiving data to receive data MOV ACC. 0, CMOV B, AMOV R7, # 8AD_13:C, MOV ADDO; Receive dataMOV ACC. 0, CThe RR A; Moves to the right aSETB ADCLKThe NOPThe NOPThe CLR ADCLK; Form a clock pulseThe NOPThe NOPDJNZ R7 AD_13; Loop eight timesCJNE A, B, ADCONV; Data validationSETB ADCS. End up/CSThe CLR ADCLK; Lower the CLK endSETB ADDO. Pull up the data end, back to the initial state RET; = = = = = = = = = = =。

ADC0832引脚图

ADC0832引脚图

adc0832引脚图:ADC0832 是美国国家半导体公司生产的一种8 位分辨率、双通道A/D转换芯片。

由于它体积小,兼容性强,性价比高而深受单片机爱好者及企业欢迎,其目前已经有很高的普及率。

学习并使用ADC0832 可是使我们了解A/D转换器的原理,有助于我们单片机技术水平的提高。

ADC0832 具有以下特点:· 8位分辨率;·双通道A/D转换;·输入输出电平与TTL/CMOS相兼容;· 5V电源供电时输入电压在0~5V之间;·工作频率为250KHZ,转换时间为32μS;·一般功耗仅为15mW;· 8P、14P—DIP(双列直插)、PICC 多种封装;·商用级芯片温宽为0°C to +70°C,工业级芯片温宽为−40°C to +85°C;芯片顶视图:(图1、图2)ADC0832程序:程序占用资源有累加器A,工作寄存器R7,通用寄存器B 和特殊寄存器CY。

通道功能寄存器和转换值共用寄存器B。

在使用转换子程序之前必须确定通道功能寄存器B 的值,其赋值语句为“MOV B,#data”(00H~03H)。

运行转换子程序后的转换数据值被放入B 中。

子程序退出后即可以对B 中数据处理。

ADC0832 芯片接口程序[汇编] :/*------------------------------------------- 子程序名:ADC0832子程序编写人:杜洋初写时间:2005年10 月10日程序功能:将模拟电压量转换成数字量实现方法:串行通信。

CPU说明:MCS-51植入说明:占用A、B、CY、R7-------------------------------------------*/ ;以下接口定义根据硬件连线更改ADCS BIT P3.5 ;使能接口ADCLK BIT P3.4 ;时钟接口ADDO BIT P3.3 ;数据输出接口(复用)ADDI BIT P3.3 ;数据输入接口;以下语句在调用转换程序前设定MOV B,#00H ;装入通道功能选择数据值;以下为ADC0832读取数据子程序;==== ADC0832读数据子程序==== ADCONV:SETB ADDI ;初始化通道选择NOPNOPCLR ADCS ;拉低/CS端NOPNOPSETB ADCLK ;拉高CLK端NOPCLR ADCLK ;拉低CLK端,形成下降沿MOV A,BMOV C,ACC.1 ;确定取值通道选择MOV ADDI,CNOPNOPSETB ADCLK ;拉高CLK端NOPNOPCLR ADCLK ;拉低CLK端,形成下降沿2 MOV A,BMOV C,ACC.0 ;确定取值通道选择MOV ADDI,CNOPNOPSETB ADCLK ;拉高CLK端NOPNOPCLR ADCLK ;拉低CLK端,形成下降沿3 SETB ADDINOPNOPMOV R7,#8 ;准备送下后8个时钟脉冲AD_1:MOV C,ADDO ;接收数据MOV ACC.0,CRL A ;左移一次SETB ADCLKNOPCLR ADCLK ;形成一次时钟脉冲NOPNOPDJNZ R7,AD_1 ;循环8次MOV C,ADDO ;接收数据MOV ACC.0,CMOV B,AMOV R7,#8AD_13:MOV C,ADDO ;接收数据MOV ACC.0,CRR A ;左移一次SETB ADCLKNOPNOPCLR ADCLK ;形成一次时钟脉冲NOPNOPDJNZ R7,AD_13 ;循环8次CJNE A,B,ADCONV ;数据校验SETB ADCS ;拉高/CS端CLR ADCLK ;拉低CLK端SETB ADDO ;拉高数据端,回到初始状态RET;====子程序结束====。

ADC0832英文手册

ADC0832英文手册
Molded (N) SO(M)
Molded (N) Molded (N)
SO(M) PCC (V) PCC (V) Molded (N) SO(M) SO(M)
Temperature Range
0˚C to +70˚C 0˚C to +70˚C −40˚C to +85˚C 0˚C to +70˚C 0˚C to +70˚C 0˚C to +70˚C 0˚C to +70˚C 0˚C to +70˚C 0˚C to +70˚C 0˚C to +70˚C 0˚C to +70˚C −40˚C to +85˚C 0˚C to +70˚C
0˚C to +70˚C
Converter and Multiplexer Electrical Characteristics The following specifications apply for
VCC = V+ = VREF = 5V, VREF ≤ VCC +0.1V, TA = Tj = 25˚C, and fCLK = 250 kHz unless otherwise specified. Boldface limits apply from TMIN to TMAX.
supplies n 0V to 5V input range with single 5V power supply n Remote operation with serial digital data link n TTL/MOS input/output compatible n 0.3" standard width, 8-, 14- or 20-pin DIP package n 20 Pin Molded Chip Carrier Package (ADC0838 only) n Surface-Mount Package

AD转换芯片ADC0832 的应用

AD转换芯片ADC0832 的应用

A/D转换芯片ADC0832的应用作者:杜洋2005年10月11日ADC0832是美国国家半导体公司生产的一种8位分辨率、双通道A/D转换芯片。

由于它体积小,兼容性强,性价比高而深受单片机爱好者及企业欢迎,其目前已经有很高的普及率。

学习并使用ADC0832可是使我们了解A/D转换器的原理,有助于我们单片机技术水平的提高。

ADC0832具有以下特点:·8位分辨率;·双通道A/D转换;·输入输出电平与TTL/CMOS相兼容;·5V电源供电时输入电压在0~5V之间;·工作频率为250KHZ,转换时间为32μS;·一般功耗仅为15mW;·8P、14P—DIP(双列直插)、PICC多种封装;·商用级芯片温宽为0°C to +70°C,工业级芯片温宽为−40°C to +85°C;芯片顶视图:(图1、图2)图1图2芯片接口说明:· CS_ 片选使能,低电平芯片使能。

· CH0 模拟输入通道0,或作为IN+/-使用。

· CH1 模拟输入通道1,或作为IN+/-使用。

· GND 芯片参考0电位(地)。

· DI 数据信号输入,选择通道控制。

· DO 数据信号输出,转换数据输出。

· CLK 芯片时钟输入。

· Vcc/REF 电源输入及参考电压输入(复用)。

ADC0832与单片机的接口电路:图3h tt p ://w w w.e l e c f a n s .c o mADC0832为8位分辨率A/D 转换芯片,其最高分辨可达256级,可以适应一般的模拟量转换要求。

其内部电源输入与参考电压的复用,使得芯片的模拟电压输入在0~5V 之间。

芯片转换时间仅为32μS ,据有双数据输出可作为数据校验,以减少数据误差,转换速度快且稳定性能强。

ADC0832的数字电压表设计说明

ADC0832的数字电压表设计说明

目录1. 引言 (1)2. 方案设计 (1)2.1设计要求 (1)2.2设计方案 (1)3. 硬件设计 (2)3.1单片机最小系统 (2)3.2显示驱动部分 (2)3.3转换电路 (3)3.4单片机驱动部分 (3)4. 软件设计 (4)4.1软件流程 (4)4.2子程序模板 (5)5实验结果与讨论 (5)5.1实验仿真 (5)5.2结果讨论 (5)6心得体会 (6)7参考文献 (13)8附录8.1程序 (7)8.2原理图 (7)1. 引言随着片机技术的飞速发展,,现代的电子产品几乎渗透到了社会的各个领域,有力地推动了社会生产力的发肢和社会信息化程度的提商,人们为了寻求最好的科技,为了方便人类在使用科技产品的快速性,准确性。

例如数字电压表能够准确的,快速的量出电压。

利用ADC0832和AT89C52的结合再通过LCD来显示出来。

ADC0832是一个8位D/A转换器。

单电源供电,从+5V〜+15V均可正常工作。

基准电压的围为土10V;电流建立时间为1卩S; CMOS:艺,低功耗20mWADC0832 转换器芯片为20引脚,双列直插式封装。

该转换器由输入寄存器和DAC寄存器构成两级数据输入锁存。

使用时数据输入可以采用两级锁存(双锁存)形式,或单级锁存(一级锁存,一级直通)形式,或直接输入(两级直通)形式。

2. 方案设计2.1设计要求按系统要实现功能,设计必须达到以下的几个步骤的要求(1)主电路系统是由ADC0832单片机AT89C52和LCD显示屏组成。

(2)ADC083是模拟数字转换芯片,是将外侧电压信号转换成数字信号再通过AT89C52处理,再通过LCD显示出来(3)能测量0-5V的数字电压(4)测量误差不大于0.1V2.2设计方案2.1.1 单片机的选择本设计选用单片机AT89C52它是一种带8K字节闪烁可编程可擦除只读存储器的低电压,足够本设计之用,高性能CMOS位微处理器该器件采用ATME高密度非易失存储器制造技术制造,与工业标准的MCS-51指令系统及8052产品引脚兼容,功能强大、使用方便的AT80C52单片机适用于许多较为复杂的应用场合。

ADC0832的基本应用方法

ADC0832的基本应用方法

ADC0832 的基本应用方法
ADC0832 的基本应用方法
ADC0832 简介
ADC0832 是广泛应用的8 位串行A/D 转换器。

ADC0832 是双通道输入,并且可以软件配置成单端或差分输入,其串行输出可以方便的和标准的移位寄存器及微处理器接口。

ADC0832 主要特性
转换时间:Flock=250KHz 时为32us
5V 供电时输入范围:0~5V
输入输出完全兼容TTL 和CMOS 电路
全部非校准误差:±1LSB
单5V 供电
工作温度范围:0℃~70℃
ADC0832 的应用方法
ADC0832 处于工作状态时,置CS 端为低即可启动转换,并使所有的逻辑电路使能,CS 在整个转换过程中必须置为低电平。

转换结束后,转换的数据位依次从D0 端输出,并以最高位(MSB)开头。

在经过8 个时钟后,数据输出完成,CS 变高,内部所有寄存器清零,此时,输出电路变为高阻状态。

如果希望开始另一个转换,CS 必须有一个从高到低的跳变,且后面应紧跟着输入地址数据。

ADC0832 程序清单。

adc0832芯片工作原理

adc0832芯片工作原理

adc0832芯片工作原理
ADC0832芯片是一种8位串行式模数转换器(ADC),其主要用途是将模拟信号转换为数字信号。

它是由8位逐次逼近型模数转换器和一个控制逻辑组成的。

该芯片的工作原理可以简单概括为以下几个步骤:
1. 时钟控制:ADC0832芯片需要外部提供时钟信号,它使用时钟信号来同步转换过程。

时钟信号通常由系统的主时钟提供,并通过控制信号进行配置。

2. 输入信号采样:ADC0832具有单通道输入,它可以接收来自传感器或其他模拟信号源的输入信号。

输入信号被采样并存储在输入采样保持电容中。

3. 开始转换信号:当需要进行模数转换时,通过向ADC0832芯片发送启动转换的控制信号来触发转换过程。

4. 逐次逼近转换:ADC0832使用逐次逼近型模数转换技术。

它将输入信号与一个内部比较器进行比较,并根据比较结果调整一个逐次逼近型数字-模拟转换器(DAC)输出电压。

逼近过程将持续进行,直到
逼近型DAC输出电压与输入信号的比较结果达到一定精度。

5. 转换结果输出:一旦转换完成,ADC0832芯片将转换结果以串行方式输出。

通过数据线将转换结果传输给外部的微控制器或其他数字设备。

需要注意的是,ADC0832芯片还具有一些配置寄存器,用于设置转换精度、参考电压和其他参数。

这些寄存器可以通过发送相应的控制信号来配置。

总的来说,ADC0832芯片通过时钟控制、输入信号采样、逐次逼近转换和转换结果输出等步骤,将模拟信号转换为相应的8位数字信号。

它是一种常用的模数转换器,在许多应用中广泛使用,如传感器接口、数据采集和控制系统等。

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ADC0832设计模块
1、ADC0832的主要技术指标:
(1)8位分辨率,逐次逼近型。

(2)5V电源供电时,基准电压为5V,输入模拟电压范围为0~5V。

(3)输入和输出电平与TTL和CMOS兼容。

(4)有两个可供选择的模拟输入通道。

(5)在250KHz时钟频率时,转换时间为32µs。

(6)一般功耗仅为15mW。

2、ADC0832引脚说明
(1)/CS片选使能,低电平有效。

(2)CHO模拟通道0,差分输入时,作为IN+或IN-使用。

(3)CH1模拟输入通道1,差分输入时,作为IN+或IN-使用。

(4)GND 电源地。

(5)DI数据信号输出,选择通道控制。

(6)DO数据信号输出,转换数据输出。

(7)Vcc/Vre电源输入及参考电压输入(复用)。

(8)CLK芯片时钟信号
3、ADC0832时序图
4、运用ADC0832
设计一个0-5V的数字电压表电路如图所示:
设计要求:
五位数码管动态显示,第一位显示通道状态(0、1)第二位显示C,第三位是个数,第三位和第四位数码管分别显示十分位和百分位;按键SW1选择通道0,按键SW2选择通道1,并且蜂鸣器和短时间鸣叫;调节滑动变阻器数码管的示数能在0.00~5.00之间变化。

C程序:
#include <reg52.h>
#include <intrins.h>
#define uchar unsigned char
sbit CS=P3^5;
sbit Clk=P1^6; //时钟
sbit DO=P3^7; //ADC0832输出引脚
sbit DI=P3^6; //ADC0832输入引脚
sbit key=P3^3; //按键
bit keydownflg; //操作位的定义
bit adc_flg;
uchar dat,channel;
uchar key_buffer;
uchar P2_buffer;
uchar Beep_cnt;
uchar disp_cnt;
uchar count4ms;
uchar disp_buff[5]; //数码管显示缓存
uchar code T ab1[]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90,0x88,0x83,0xA7,0xA1,0x86,0 x8E}; //共阳数码表
uchar code T ab[5]={0x7f,0xbf,0xdf,0xef,0xf7}; //数码管位选表
uchar A_D(uchar CH) //AD函数
{
uchar i,adval,test; //定义局部变量并初始化
adval=0x00;
test=0x00;
Clk=0; //clk低电平
DI=1; //DI初始高电平在第一个时钟脉冲的下降沿前保持高电平,表示启动信号
_nop_();
CS=0; //片选
_nop_();
Clk=1; //clk上升沿,起始位写入
_nop_();
if(CH==0x00) //选择通道0
{
Clk=0; //clk低电平
DI=1;
_nop_();
Clk=1; //clk上升沿,通道0的第一位写入
_nop_();
Clk=0;
DI=1;
_nop_();
Clk=1; //clk上升沿,通道0的第二位写入
_nop_();
}
else
{
Clk=0;
DI=1;
_nop_();
Clk=1; //clk上升沿,通道1的第一位写入
_nop_();
Clk=0;
DI=1;
_nop_(); //clk上升沿,通道1的第二位写入
Clk=1;
_nop_();
}
Clk=0;
DI=1;
for(i=0;i<8;i++) //从高位向低位读取八位AD值
{
_nop_();
adval<<=1;
Clk=1;
_nop_();
Clk=0;
if(DO)
adval|=0x01;
else
adval|=0x00;
}
for(i=0;i<8;i++)
{
test>>=1; //从低位向高位读取八位AD值
if(DO)
test|=0x80;
else
test|=0x00;
_nop_();
Clk=1;
_nop_();
Clk=0;
}
if(adval==test) dat=test; //判断两个读取值是否相等相等就把读取的数赋值给DAT
_nop_();
CS=1;
DO=1;
Clk=1;
return dat;
}
void FillDispBuffer(void) //数码管显示缓存函数
{
disp_buff[0]=channel; //显示通道
disp_buff[1]=12; //显示"C"
disp_buff[2]=dat/51; //显示个位
disp_buff[3]=dat%51*10/51; //显示十分位
disp_buff[4]=((dat%51)*10%51)*10/51; //显示百分位
}
void dealkey(void) //按键处理
{
if(keydownflg) return; //keydownflg控制位为1,不对按键进行处理
key_buffer=P2;
if((key_buffer&0x80)!=0x80) channel=0; //选择通道0
if((key_buffer&0x40)!=0x40) channel=1; //选择通道1
FillDispBuffer(); //数码管显示缓存
Beep_cnt=0;
keydownflg=1; //keydownflg控制位置1 }
void main(void) //主函数
{
P0=0xff; //初始化
P2=0xff;
dat=0x00;
disp_cnt=0;
count4ms=0;
channel=0;
TMOD=0x10;
TH0=(65535-4000)/256;
TL0=(65535-4000)%256;
EA=1;
TR0=1;
ET0=1;
while(1)
{
if(adc_flg) //ADC转换控制位,防止输入与输出产生冲突
{
adc_flg=0;
A_D(channel); //ADC函数
FillDispBuffer(); //数码管显示缓存
}
if(!key) //按键
dealkey();
}
}
void T0_service(void) interrupt 1 //定时器0中断子函数
{
TH0=(65535-4000)/256;
TL0=(65535-4000)%256;
P2_buffer=T ab[disp_cnt]; //查表,数码管的位选择
if(keydownflg) //蜂鸣器0.4s的短时间鸣叫
{
P2_buffer=P2_buffer&0xfe;
Beep_cnt++;
if(Beep_cnt==100) keydownflg=0;
}
P2=P2_buffer; //数码管显示数字符号
if(disp_cnt==2) //第三位数码管显示小数点P0=T ab1[disp_buff[disp_cnt]]&0x7f;
else
P0=T ab1[disp_buff[disp_cnt]];
disp_cnt++; //
if(disp_cnt==5) disp_cnt=0;
count4ms++;
if(count4ms==50) //0.2s ADC转换一次
{
adc_flg=1;
count4ms=0;
}
}。

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