SN74AVC16T245(16位双向传输电平转换器)

θJA
Package thermal impedance(4)
Tstg Storage temperature range
I/O ports (A port) I/O ports (B port) Control inputs A port B port A port B port VI < 0 VO < 0
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCCA VCCB
Supply voltage range
VI
Input voltage range(2)
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
VO
Voltage range applied to any output in the high or low state(2)(3)
IIK
Input clamp current
IOK
Output clamp current
IO
Continuous output current
Continuous current through each VCCA, VCCB, and GND

SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005
Copyright © 2004–2005, Texas Instruments Incorporated
SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
The SN74AVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
ORDERING INFORMATION
TA
PACKAGE (1)
ORDERABLE PART NUMBER
FEATURES
• Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
• VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74AVC16T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses effectively are isolated.
SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
24 2DIR
48 1OE
25 2OE
36 2A1
2 1B1
13 2B1
To Seven Other Channels
To Seven Other Channels
GQL OR ZQL PACKAGE (TOP VIEW)
123456
A B C D E F G H J K
TERMINAL ASSIGNMENTS(2)
1
2
A
1DIR
NC
B
1B2
1B1
C
1B4
1B3
D
1B6
1B5
E
1B8
1B7
F
2B1
2B2
G
2B3
2B4
H
2B5
2B6
J
2B7
2B8
K
2DIR
NC
(2) NC – No internal connection
TOP-SIDE MARKING AVC16T245 WF245
WF245
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at /sc/package.
– 8000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC16T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
• Ioff Supports Partial-Power-Down Mode Operation
• I/Os Are 4.6-V Tolerant
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
48 1OE 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCCA 41 1A5 40 1A6 39 GND 38 1A7 37 1A8 36 2A1 35 2A2 34 GND 33 2A3 32 2A4 31 VCCA 30 2A5 29 2A6 28 GND 27 2A7 26 2A8 25 2OE
DGG OR DGV PACKAGE (TOP VIEW)
1DIR 1 1B1 2 1B2 3 GND 4 1B3 5 1B4 6 VCCB 7 1B5 8 1B6 9 GND 10 1B7 11 1B8 12 2B1 13 2B2 14 GND 15 2B3 16 2B4 17 VCCB 18 2B5 19 2B6 20 GND 21 2B7 22 2B8 23 2DIR 24
INPUTS
OE DIR
L
L
L
H
H
X
OPERATION
B data to A bus A data to B bus
Isolation
2
1DIR 1
1A1 47
SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS