信号完整性和电源完整性分析

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电路板设计中的信号完整性分析技术研究

电路板设计中的信号完整性分析技术研究

电路板设计中的信号完整性分析技术研究电路板设计是现代电子产品设计的关键环节。

随着电子产品性能要求的不断提高,电路板设计越来越重要。

在电路板设计过程中,信号完整性分析技术是非常重要的。

信号完整性分析技术,顾名思义,是指在电路板设计过程中对信号传输性能进行的评估和优化。

本文将探讨电路板设计中的信号完整性分析技术研究。

一、信号完整性分析技术概述信号完整性分析技术是指在电路板设计中对信号传输性能进行评估和优化的技术。

其主要目的是保证电路板中信号传输的正确性和可靠性。

信号完整性分析技术涉及的内容非常广泛,包括信号时序、匹配阻抗、串扰、功率供电、地面反弹等方面的问题。

因此,信号完整性分析技术是电路板设计中极为重要的一项技术。

二、信号完整性分析技术的研究内容1. 信号时序分析信号时序分析是指对信号的时序进行分析,以确定信号的传输速度和传输延迟。

在电路板中,信号时序的准确性对于信号的传输是非常重要的。

因此,在进行电路板设计时,必须通过信号时序分析来确定信号的传输速度和延迟。

2. 匹配阻抗分析匹配阻抗分析是指在电路板中对电路的阻抗进行匹配,以确保信号的传输效果。

在电路板中,如果电路的阻抗不匹配,就会造成信号反射、失真等问题。

因此,在进行电路板设计时,必须对电路的阻抗进行匹配。

3. 串扰分析串扰分析是指在电路板中对信号的串扰进行分析,以确认信号之间的互相干扰程度。

在电路板中,信号的串扰是非常常见的问题,将会影响信号的传输和接收。

因此,在进行电路板设计时,必须对信号的串扰进行分析和抑制。

4. 功率供电分析功率供电分析是指在电路板中对电路供电的稳定性进行分析,以确保稳定的供电。

在电路板中,电路的稳定供电是非常重要的,不仅会影响电路的稳定性,还会影响到电路的散热效果。

因此,在进行电路板设计时,必须对电路供电进行分析和优化。

5. 地面反弹分析地面反弹分析是指在电路板中对地面反弹现象进行分析,以确认信号的传输质量。

在电路板中,地面反弹现象会对信号的传输产生影响,影响信号的传输质量。

高速电路信号完整性分析与设计九--电源完整性分析

高速电路信号完整性分析与设计九--电源完整性分析

第9章高速信号的电源完整性分析在电路设计中,设计好一个高质量的高速PCB板,应该从信号完整性(SI——Signal Integrity)和电源完整性(PI——Power Integrity )两个方面来考虑。

尽管从信号完整性上表现出来的结果较为直接,但是信号参考层的不完整会造成信号回流路径变化多端,从而引起信号质量变差,连带引起了产品的EMI性能变差。

这将直接影响最终PCB板的信号完整性。

因此研究电源完整性是非常必要和重要的。

9.1 电源完整性概述虽然电子设计的发展已经有相当长的历史,但是高速信号是近些年才开始面对的问题,随之出现的电源完整性的许多概念并不为大多数人所了解。

这里,对其中涉及到的一些基本名词做些简单的介绍。

9.1.1 电源完整性的相关概念电源完整性(Power Integrity) :是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。

虽然电源完整性是讨论电源供给的稳定性问题,但由于地在实际系统中总是和电源密不可分的,通常把如何减少地平面的噪声也做为电源完整性的一部分讨论。

电源分配网络:电源分配网络的作用就是给系统内所有器件或芯片提供足够的电源,并满足系统对电源稳定性的要求。

同步开关噪声(Simultaneous Switch Noise,简称SSN):是指当器件处于开关状态,产生瞬间变化的电流(di/dt),在经过回流途径上存在的电感时,形成交流压降,从而引起噪声,所以也称为Δi噪声。

同步开关噪声包括电子噪声、地弹噪声、回流噪声、断点噪声等。

它对电源完整性的影响表现为地弹和电源反弹。

地弹噪声:它是同步开关噪声对电源完整性影响的表现之一。

是指芯片上的地参考电压的跳动。

当大量芯片的输出同时开启时,将有一个较大的瞬态电流在芯片与板的电源平面流过,芯片封装与电源平面的电感和电阻会引发电源噪声,这样会在真正的地平面(0V)上产生电压的波动和变化,这个噪声会影响其它元器件的动作。

电路设计中的信号完整性SI问题分析与解决

电路设计中的信号完整性SI问题分析与解决

电路设计中的信号完整性SI问题分析与解决引言:在现代电子设备中,信号完整性是一个至关重要的问题。

由于信号的传输速度越来越高,信号完整性问题变得尤为突出。

本文将分析信号完整性(Signal Integrity,简称SI)问题在电路设计中的重要性,并介绍一些常见的SI问题及其解决方法。

一、信号完整性的重要性信号完整性是指在信号传输过程中保持信号波形的准确性和完整性,确保信号的正确传递和解读。

如果信号受到干扰、衰减或失真,可能会导致数据的错误传输或丢失。

这对于各种电子设备,尤其是高速数据传输的系统来说,都是一项极其重要的考虑因素。

二、常见的SI问题1. 反射干扰反射干扰是信号在多个传输线之间传播时产生的一种干扰现象。

当信号到达传输线末端时,一部分信号能够反射回来,与输入信号相叠加,引起波形失真。

这种干扰主要由于阻抗不匹配引起。

2. 串扰干扰串扰干扰是指在多条相邻的传输线上,信号在传输过程中相互影响的现象。

这种干扰主要由于电磁场相互耦合引起,导致信号波形失真,降低信号质量。

3. 时钟抖动时钟抖动是指时钟信号在传输中出现的随机时移现象。

时钟抖动可能导致时序错误,使系统无法正确同步,进而影响整个系统的性能。

三、SI问题的解决方法1. 降低阻抗不匹配为了解决反射干扰问题,可以通过匹配传输线和负载的阻抗,减少信号反射。

采用合适的终端电阻,可以使信号在传输线上的反射最小化。

2. 优化布线方式在设计电路板布线时,应尽量避免传输线之间的相互干扰。

合理安排和分隔传输线的布局,使用屏蔽层和地平面层等技术手段,可有效减少串扰干扰。

3. 使用信号完整性分析工具借助信号完整性分析工具,可以模拟和分析信号在电路板上的传输过程,帮助发现潜在的SI问题。

通过调整设计参数,优化电路板布线,可以提前预防并解决SI问题。

4. 时钟校准技术对于时钟抖动问题,可以采用时钟校准技术来调整时钟信号的时序和相位。

通过使用高精度的时钟源和时钟校准电路,可以有效减少时钟抖动带来的问题。

《信号完整性与电源完整性的仿真分析与设计》

《信号完整性与电源完整性的仿真分析与设计》

信号完整性与电源完整性的仿真分析与设计1简介信号完整性是指信号在通过一定距离的传输路径后在特定接收端口相对指定发送端口信号的还原程度。

在讨论信号完整性设计性能时,如指定不同的收发参考端口,则对信号还原程度会用不同的指标来描述。

通常指定的收发参考端口是发送芯片输出处及接收芯片输入处的波形可测点,此时对信号还原程度主要依靠上升/下降及保持时间等指标来进行描述。

而如果指定的参考收发端口是在信道编码器输入端及解码器输出端时,对信号还原程度的描述将会依靠误码率来描述。

电源完整性是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。

同样,对于同一系统中同一个器件的正常工作条件而言,如果指定的端口不同,其工作电源要求也不同(在随后的例子中将会直观地看到这一点)。

通常指定的器件参考端口是芯片电源及地连接引脚处的可测点,此时该芯片的产品手册应给出该端口处的相应指标,常用纹波大小或者电压最大偏离范围来表征。

图一是一个典型背板信号传输的系统示意图。

本文中“系统”一词包含信号传输所需的所有相关硬件及软件,包括芯片、封装与PCB板的物理结构,电源及电源传输网络,所有相关电路实现以及信号通信所需的协议等。

从设计目的而言,需要硬件提供可制作的支撑及电信号有源/无源互联结构;需要软件提供信号传递的传输协议以及数据内容。

图1 背板信号传输的系统示意图在本文的以下内容中,将会看到由于这些支撑与互联结构对电信号的传输呈现出一定的频率选择性衰减,从而会使设计者产生对信号完整性及电源完整性的担忧。

而不同传输协议及不同数据内容的表达方式对相同传输环境具备不同适应能力,使得设计者需要进一步根据实际的传输环境来选择或优化可行的传输协议及数据内容表达方式。

为描述方便起见以下用“完整性设计与分析”来指代“信号完整性与电源完整性设计与分析”。

2 版图完整性问题、分析与设计上述背板系统中的硬件支撑及无源互联结构基本上都在一种层叠平板结构上实现。

集成电路中电源完整性与信号完整性分析

集成电路中电源完整性与信号完整性分析

集成电路中电源完整性与信号完整性分析哎呀,说起集成电路中的电源完整性和信号完整性分析,这可真是个让人又爱又恨的“家伙”。

就拿我之前经历的一件事儿来说吧。

有一次,我参与了一个小型电子设备的研发项目。

那时候,我们团队满心欢喜地设计好了整个集成电路的架构,觉得大功告成。

可谁知道,在实际测试的时候,问题接二连三地冒了出来。

先是电源方面,设备运行没多久,就出现了电压不稳定的情况。

这就好比你正在跑步,突然有人给你使绊子,让你的脚步变得踉踉跄跄。

我们开始仔细排查,发现是电源布线不合理,导致电流在传输过程中出现了损耗和波动。

再说说信号完整性。

明明发送出去的是清晰准确的信号,可接收端却总是出现误码和失真。

这感觉就像是你给朋友精心准备了一份礼物,结果快递给你弄破了包装,里面的东西也坏了。

那咱们先来说说电源完整性。

电源完整性简单来说,就是要确保集成电路中的电源供应稳定、干净,没有杂波和干扰。

这就像我们家里的电,如果电压一会儿高一会儿低,那电器能正常工作吗?肯定不行!在集成电路里也是一样,如果电源不稳定,那各个元器件就像失去了主心骨,没法好好干活。

比如说,在多层电路板的设计中,如果电源层和地层的间距不合理,就会产生寄生电容和电感。

这就好比在一条马路上,突然多了一些障碍物,让电流的通行变得不顺畅。

还有,电源分配网络的设计也至关重要。

如果电阻过大,电流就会遇到“堵车”,导致电压下降。

再讲讲信号完整性。

信号在集成电路中传播,就像是一场旅行。

如果路径不好,信号就会“迷路”或者“受伤”。

比如说,高速信号在传输线上传播时,如果传输线的特征阻抗不匹配,就会发生反射,这就像声音在空旷的山谷中回荡,影响了信号的质量。

还有串扰问题。

相邻的信号线就像住在隔壁的邻居,如果靠得太近,彼此之间就会互相干扰。

想象一下,你正在专心看书,旁边有人大声吵闹,你能静下心来吗?信号也是一样,被干扰了就没法准确传达信息。

为了保证电源完整性和信号完整性,我们在设计的时候要特别小心。

ADS信号完整性与电源完整性的仿真分析与设计

ADS信号完整性与电源完整性的仿真分析与设计

信号完整性与电源完整性的仿真分析与设计李荔博士leo_le@安捷伦科技1简介信号完整性是指信号在通过一定距离的传输路径后在特定接收端口相对指定发送端口信号的还原程度。

在讨论信号完整性设计性能时,如指定不同的收发参考端口,则对信号还原程度会用不同的指标来描述。

通常指定的收发参考端口是发送芯片输出处及接收芯片输入处的波形可测点,此时对信号还原程度主要依靠上升/下降及保持时间等指标来进行描述。

而如果指定的参考收发端口是在信道编码器输入端及解码器输出端时,对信号还原程度的描述将会依靠误码率来描述。

电源完整性是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。

同样,对于同一系统中同一个器件的正常工作条件而言,如果指定的端口不同,其工作电源要求也不同(在随后的例子中将会直观地看到这一点)。

通常指定的器件参考端口是芯片电源及地连接引脚处的可测点,此时该芯片的产品手册应给出该端口处的相应指标,常用纹波大小或者电压最大偏离范围来表征。

图一是一个典型背板信号传输的系统示意图。

本文中“系统”一词包含信号传输所需的所有相关硬件及软件,包括芯片、封装与PCB板的物理结构,电源及电源传输网络,所有相关电路实现以及信号通信所需的协议等。

从设计目的而言,需要硬件提供可制作的支撑及电信号有源/无源互联结构;需要软件提供信号传递的传输协议以及数据内容。

1001010…图1 背板信号传输的系统示意图在本文的以下内容中,将会看到由于这些支撑与互联结构对电信号的传输呈现出一定的频率选择性衰减,从而会使设计者产生对信号完整性及电源完整性的担忧。

而不同传输协议及不同数据内容的表达方式对相同传输环境具备不同适应能力,使得设计者需要进一步根据实际的传输环境来选择或优化可行的传输协议及数据内容表达方式。

为描述方便起见以下用“完整性设计与分析”来指代“信号完整性与电源完整性设计与分析”。

2 版图完整性问题、分析与设计上述背板系统中的硬件支撑及无源互联结构基本上都在一种层叠平板结构上实现。

电源完整性

电源完整性

引言电源完整性这一概念是以信号完整性为基础的,两者的出现都源自电路开关速度的提高。

当高速信号的翻转时间和系统的时钟周期可以相比时,具有分布参数的信号传输线、电源和地就和低速系统中的情况完全不同了。

与信号完整性是指信号在传输线上的质量相对应,电源完整性是指高速电路系统中电源和地的质量。

它在对高速电路进行仿真时,往往会因信号参考层的不完整造成信号回流路径变化多端,从而引起信号质量变差和产品的EMI性能变差,并直接影响信号完整性。

为了提高信号质量、产品的EMI性能,人们开始研究怎样为信号提供一个稳定、完整的参考平面,并随之提出了电源完整性的概念。

EDA厂商Cadence公司资深技术工程师曾指出,在未来的三到五年内,电源完整性设计将取代信号完整性设计成为高速PCB设计新的难点和重点。

电源完整性的影响因素及措施电源完整性的作用是为系统所有的信号线提供完整的回流路径。

但在技术高速发展以及生产成本的控制下,往往不能为所有的信号线提供理想而完整的回流路径,这就是说,在高速电路中,不能够简单地将电源和地当作理想的情况来处理。

这主要是因为地弹噪声太大、去耦电容设计不合理、回流影响严重、多电源/地平面的分割不当、地层设计不合理、电流分配不均匀、高频的趋肤效应导致系统阻抗变化等诸多因素都会破坏电源完整性。

地弹噪声地弹噪声也称为同步开关噪声(SSN),通常认为是由电路的感应引起的。

当电路中有较大的瞬态电流出现时(比如多条信号线上的信号同时翻转),会在电路分布参数所引起的感性阻抗上产生瞬态电压,进而便引起SSN。

芯片封装结构的SSN是由于突变的电流流过封装结构的引脚、引线和焊盘等寄生电感所导致。

如芯片的多个输出管脚同时触发时,将有一个较大的瞬态电流在芯片与板的电源平面流过,芯片封装与电源平面的电感和电阻会引发电源噪声,这样会在真正的地平面(0V)上产生电压波动,此波动对其他共电源/地总线的静态驱动将构成严重的干扰,甚至引起误触发。

信号完整性和电源完整性分析

信号完整性和电源完整性分析

An Integrated Signal and Power Integrity Analysis for Signal Traces Through the Parallel Planes Using Hybrid Finite-Element andFinite-Difference Time-Domain TechniquesWei-Da Guo,Guang-Hwa Shiue,Chien-Min Lin,Member,IEEE,and Ruey-Beei Wu,Senior Member,IEEEAbstract—This paper presents a numerical approach that com-bines the?nite-element time-domain(FETD)method and the?-nite-difference time-domain(FDTD)method to model and ana-lyze the two-dimensional electromagnetic problem concerned in the simultaneous switching noise(SSN)induced by adjacent signal traces through the coupled-via parallel-plate structures.Applying FETD for the region having the source excitation inside and FDTD for the remaining regions preserves the advantages of both FETD ?exibility and FDTD ef?ciency.By further including the transmis-sion-line simulation,the signal integrity and power integrity is-sues can be resolved at the same time.Furthermore,the numer-ical results demonstrate which kind of signal allocation between the planes can achieve the best noise cancellation.Finally,a com-parison with the measurement data validates the proposed hybrid techniques.Index Terms—Differential signaling,?nite-element and?nite-difference time-domain(FETD/FDTD)methods,power integrity (PI),signal integrity(SI),simultaneous switching noise(SSN), transient analysis.I.I NTRODUCTIONI N RECENT years,considerable attention has been devotedto time-domain numerical techniques to analyze the tran-sient responses of electromagnetic problems.The?nite-differ-ence time-domain(FDTD)method proposed by Yee in1966 [1]has become the most well-known technique becauseit pro-vides a lot of attractive advantages:direct and explicit time-marching scheme,high numerical accuracy with a second-order discretization error,stability condition,easy programming,and minimum computational complexity[2].However,it is often in-ef?cient and/or inaccurate to use only the FDTD method to dealManuscript received March3,2006;revised November6,2006.This work was supported in part by the National Science Council,Republic of China,under Grant NSC91-2213-E-002-109,by the Ministry of Education under Grant93B-40053,and by Taiwan Semiconductor Manufacturing Company under Grant 93-FS-B072.W.-D.Guo,G.-H.Shiue,and R.-B.Wu are with the Department of Electrical Engineering and Graduate Institute of Communication Engi-neering,National Taiwan University,10617Taipei,Taiwan,R.O.C.(e-mail: f92942062@.tw;d9*******@.tw;rbwu@.tw).C.-M.Lin is with the Packaging Core Competence Department,Advanced Assembly Division,Taiwan Semiconductor Manufacturing Company,Ltd., 30077Taiwan,R.O.C.(e-mail:chienmin_lin@).Color versions of one or more of the?gures in this paper are available online at .Digital Object Identi?er10.1109/TADVP.2007.901595with some speci?c structures.Hybrid techniques,which com-bine the desirable features of the FDTD and other numerical schemes,are therefore being developed to improve the simula-tion capability in solving many realistic problems.First,the FDTD(2,4)method with a second-order accuracy in time and a fourth-order accuracy in space was incorporated to tackle the subgridding scheme[3]and a modi?ed form was employed to characterize the electrically large structures with extremely low-phase error[4].Second,the integration with the time-domain method of moments was performed to analyze the complex geometries comprising the arbitrary thin-wire and inhomogeneous dielectric structures[5],[6].Third,the?exible ?nite-element time-domain(FETD)method was introduced locally for the simulation of structures with curved surfaces [6]–[8].With the advent of high-speed digital era,the simultaneous switching noise(SSN)on the dc power bus in the multilayer printed circuit boards(PCBs)causes paramount concern in the signal integrity and power integrity(SI/PI)along with the electromagnetic interference(EMI).One potential excitation mechanism of this high-frequency noise is from the signal traces which change layers through the via transition[9]–[11]. In the past,the transmission-line theory and the two-dimen-sional(2-D)FDTD method were combined successfully to deal with the parallel-plate structures having single-ended via transition[12],[13].Recently,the differential signaling has become a common wiring approach for high-speed digital system designs in bene?t of the higher noise immunity and EMI reduction.Nevertheless,for the real layout constraints,the common-mode currents may be generated from various imbal-ances in the circuits,such as the driver-phase skew,termination diversity,signal-path asymmetries,etc.Both the differential-and common-mode currents can in?uence the dc power bus, resulting in the SSN propagating within the planes.While applying the traditional method to manage this case,it will need a much?ner FDTD mesh to accurately distinguish the close signals transitioning through the planes.Such action not only causesthe unnecessary waste of computer memory but also takes more simulation time.In order to improve the computa-tional ef?ciency,this paperincorporates theFETD method to the small region with two or more signal transitions inside,while the other regions still remain with the coarser FDTD grids.While the telegrapher’sequations of coupled transmission lines are further introduced to the hybrid FETD/FDTD techniques,the1521-3323/$25.00?2007IEEEFig.1.A typical four-layer differential-via structure.SI/PI co-analysis for differential tracesthrough the planes can be accomplished as demonstrated in Section II and the numerical results are shown in Section III.For a group of signal vias,the proposed techniques can also tell which kind of signal alloca-tion to achieve the best performance as presented in Section III. Section IV thus correlates the measurement results and their comparisons,followed by brief conclusions in Section V.II.S IMULATION M ETHODOLOGYA typical differential-via structure in a four-layer board is il-lustrated in Fig.1.Along the signal-?ow path,the whole struc-ture is divided into three parts:the coupled traces,the cou-pled-via discontinuities,and the parallel plates.This section will present how the hybrid techniques integrate the three parts to proceed with the SI/PI co-simulation.At last,the stability consideration and computational complexity of the hybrid tech-niques are discussed as well.A.Circuit SolverWith reference to Fig.2,if the even/odd mode propagation coef?cients and characteristic impedances are given,it is recog-nized that the coupled traces can be modeled by the equivalent ladder circuits,and the lossy effects can be well approxi-mated with the average values of individual and over the frequency range of interest.The transient signal propagation is thus characterized by thetelegrapher’s equations with the cen-tral-difference discretization both in time and space domains. The approach to predict the signal propagation through the cou-pled-via discontinuities is similar to that through the coupled traces except for the difference of model-extracting method.To characterize the coupled-via discontinuities as depicted in Fig.1,the structure can be separatedinto three segments:the via between the two solid planes,and the via above(and under)the upper(and lower)plane.Since the time delay of signals through eachsegment is much less than the rising edge of signal,the cou-pled-via structure can be transformed into a SPICE passive net-work sketched in Fig.3by full-wave simulation[14],where represents the voltage of SSN induced by the current on Ls2. By linking the extracted circuit models of coupled-via disconti-nuities,both the top-and bottom-layer traces together with suit-able driving sources and load terminations,the transient wave-forms throughout the interconnects are then characterized and can be used for the SI analyses.Fig. 2.The k th element of equivalent circuit model of coupled transmission lines.Fig.3.Equivalent circuit model of coupled-via structures.B.Plane SolverAs for the parallel-plate structure,because the separation between two solid planes is much smaller than the equiva-lent wavelength of signals,the electromagnetic?eld inside is supposed to be uniform along the vertical direction.Thence, the2-D numerical technique can be applied to characterize the SSN effects while the FETD method is set for the small region covering the signal transitions and the FDTD scheme is constructed in the most regular regions.The FETD algorithm[15]starts from Maxwell’s two curl-equations and the vector equation is obtained byin(1)where and denote the electric?eld and current density,re-spectively,in the lossless volume.Applying the weak-form formulation or the Galerkin’s procedure to(1)gives(2) where is the weighting function that can be arbitrarily de-?ned.In use of the?nite-element method,the variational for-mula is thus discretized to implement the later numerical com-putation.In the present case,the linear basis function is chosen to express the?elds inside eachtriangular element.After taking the volume integration over each element and assembling theFig.4.FEM mesh in the source region and its interface with the FDTD grids.integrals from all the elements,(2)can be simpli?ed into a ma-trix form of(3) where and are the coef?cient vectors of electric?eld andcurrent density,respectively.In addition,the values of all matrix elements in(3)are formulated asand(4)For the mesh pro?le as illustrated in Fig.4,the FETD re-gion is chosen to be a block replacing the prime FDTD region into which the via transition penetrates.This is an initial value problem in time with the previous and being the initial conditions aswell as the boundary value problem in space with being Dirichlet boundary condition.To solve the initial value problem in(3),the time derivative of electric?eld is approximated by the central difference,that is(5) As for the electric?eld in the second term of(3),it can be for-mulated by the Newmark–Beta scheme[16]to be read as(6)Fig.5.Simulation?owchart of hybrid FETD and FDTD techniques to perform the SI/PI co-analysis for the coupled-via structure as illustrated in Fig.1.Moreover,in the triangular elements with the via transition inside,the term in(3)as expressed bygrid area(7)is needed to serve asthe excitation of the parallel-plate structure with the current shown in Fig.3through the via structure between Layers2and3.It is worth noting that the via transition should be placed on the bary-center of each triangular element to achieve better accuracy.The hand-over schemefor the?eld in the overlapped region of FDTD and FETD can be depicted in Fig.5.Given the boundary ?eld calculated by the FDTD algorithm atthe time step ,all the?eld in the FETD region can be acquired through the matrix solution of(3).The SSN voltage in Fig.3 is then determined by(8)where is the averaging value of nodal electric-?elds enclosing the via transition,and is the separation between the planes.Once and at the FETD mesh nodes(node 1,2,3,and4in Fig.4)become available,together with the ob-tained voltage/current values from the circuit solver andelectric/ magnetic?elds of the FDTD region,the hybrid time-marching scheme for the next time step can be implemented and so on.As a result of using the integrated schemes,the current, arisen from the input signal through the via structure,can have the ability to induce the voltage noise propagating within theFig. 6.Physical dimensions of coupled traces and via pair.(a)Top view (Unit=mil).(b)Side view.parallel plates.After a period of time,owing to the plane reso-nanceand return path,the induced noise will causethe unwanted voltage?uctuation on the coupled traces by the presence of the ?nite SSN voltage.C.Stability Problem and Computational ComplexityIt is not dif?cult to manifest that the FETD algorithm is un-conditionally stable.Substituting(5),(6),and(7)into(3)yields the following difference equation:(9) where(10) the superscript“1”denotes the matrix inverse and the factorgrid areaWithout loss of generality,the time-stepping scheme in(9)is restated as(11)Applying the-transform technique to(11)and solving for ,de?ned as the-transform of,the result reads(12)along with the dependent,de?ned as the-transform of in(11).Regardless of the time step,it can be easily de-duced that the poles of(12)is just on the unit circle of plane. This proves that the time marching by(9)is absolutely stable. The stability condition of these hybrid techniques is thus gov-erned by the transmission-line theory and the FDTD algorithm in the regular region,which are already known.Concerning the computational complexity,because of the consistence of simulation engines used for the circuit solver,parison of differential-mode S-parameters from HFSS simulation and the equivalent circuit as depicted in Fig.3.the only work is to compare the ef?ciency of the hybrid FETD/FDTD technique with that of the traditional FDTD method.In use of only the FDTD scheme for cell discretization, the grid size should be chosen at most the spacing between the adjacent via transitions.However,as depicted in Fig.4, the hybrid techniques adopting the FEM mesh for the source region exhibit the great talent to segment the whole plane with the coarser FDTD grids.Owing to the sparsity of the FETD matrices in(4)and the much smaller number of unknowns,the computational time needed for each FETD operation can be negligible.The complexity of the hybrid techniques is therefore dominated by the FDTD divisions in the regular region.It is ev-ident that the total simulation time of the2-D FDTD algorithm is,where denotes the number of the division in the whole space[7].The coarser the FDTD grids,the smaller the number of the grids and unknowns.Hence,the present hybrid techniques can preserve high accuracy without sacri?cing the computational ef?ciency.III.N UMERICAL R ESULTSA.Coupled via TransitionConsider the geometry in Fig.1but with the coupled-via structure being2cm away from the center of parallel plates, which is set as the origin of the–plane.The size of the plane is1010cm and the separation between the two metal planes is20mils(0.05cm).The physical dimensions of the coupled traces and via pair are depicted in Fig.6.After extracting the -parameters from the full-wave simulation,their equivalent circuit models of coupled-via structures as sketched in Fig.3 can be thus constructed.In Fig.7,it is found that the differen-tial-mode-parameters of equivalent circuit models are in good agreement with those from the HFSS simulations[14]and the extracted parasitic values of inductive and capacitive lumped-el-ements are also listed in the attached table.The top-layer coupled traces are driven by differential Gaussian pulses with the rise time of100ps and voltage ampli-tude of2V while the traces are terminated with the matchedFig.8.Simulated TDR waveforms on the positive-signaling trace.(a)Late-time response for the signal skew of10ps excluding the multire?ection phe-nomenon of common-mode signal.(b)Late-time response while no signal skew.TABLE IC OMPARISON OF C OMPUTATIONAL C OMPLEXITY B ETWEEN THE T WO M ETHODS(T IME D URATION=2:5ns)(CPU:Intel P43.0GHz,RAM:2GHz)loads at their ends.For simplicity,the transmission-line losses are not considered in the following analyses for the transient responses.By using the same mesh discretization as illustrated in Fig.4,the resultant segmentation for the plane con?nes the ?exible FEM mesh in the vicinity of via transitions and the coarser FDTD division with the size of22mm elsewhere. Employing the perfect magnetic conductors for boundary conditions of the parallel-plate structure,the simulated TDR waveforms with and without the signal skew on the posi-tive-signaling trace are presented in Fig.8.In comparison of hybrid FETD/FDTD techniques and?ner FDTD method with center-to-center via spacing(0.66mm)as the grid size,the simulation results are in good agreement.Note that the voltage ?uctuation before900ps is induced by the incident signal passing through the coupled-via structure while the occurrence of late-time response is accompanied by the parallel-plate resonances.As for the signal skew of10ps,the voltage level of late-time response is found to be greater than that of no signal skew because of the existence of common-mode currents produced by the timing skew of differential signals.Moreover,the simulation time of both methods should be pro-portional to the number of grids multiplied by the total time steps.As the physical time duration is?xed,the decreaseof the FDTD division size would correspond to the increase of the total Fig.9.Parallel plane with three current sources inside.(a)3-D view.(b)Zoom-in view of three sources on the plane in(a).(c).FETD/FDTD mesh discretization.Fig.10.Simulated noise waveforms at the preallocated probe in reference to Fig.9(a).time steps.Consequently,asshown in Table I,it is demonstrated that the computational ef?ciency of the hybrid techniques is in-deed much better than that of the?ner FDTD method.B.Multiple Source TransitionIn addition to a pair of differential-via structure,there can be a group of signaling vias distributed in the various regions of planes.Considering the parallel-plate structure in Fig.9(a), three current sources are distributed around the center(0,0) and a probe is located at(1mm,9mm)to detect the voltage noise induced on the planes.The FEM meshes for the source region and the interface with the FDTD region are shown inFig.11.Parallel-plate structure with two differential pairs of current sources inside in reference to Fig.9(a).(a)Two differential pairs of sources on the plane in Fig.9(a).(b)FETD/FDTD mesh discretization.parison of the simulated noise waveforms between three casesof differential-sources on the plane as in Fig.9(a).Fig.9(c).The current sources are Gaussian pulses with the rise time of100ps and different current amplitudes of0.5,0.25, and0.3A.With the same settings of boundary conditions,the simulated voltage noise waveforms at the preallocated probe re-ferred to Fig.9(a)are presented in Fig.10.It is indicated that the hybrid FETD/FDTD techniques still reservesthe great accuracyin predicting the traveling-wave behavior of plane noise.In the modern digital systems,many high-speed devices employ the multiple differential-traces for the purpose of data transmission.These traces are usually close to each other and may simultaneously penetrate the multilayered planes through via transitions.Hence,it is imperious for engineers to know how to realize the best power integrity by suitably arranging the positions of differential vias.Reconsidering the parallel plates in Fig.9(a),instead,two dif-ferential-current sources around the center and the probe is re-located at(25mm,25mm)as shown in Fig.11along with their corresponding mesh pro?le.After serving for the same Gaussian pulses as input signals,the simulated waveforms at Fig.13.At time of400ps,the overall electric-?eld patterns of three cases of differential-source settings in reference to Fig.12.(a)Case1:one pair of dif-ferential sources.(b)Case2:two pairs of differential sources with the same polarity.(c)Case3:two anti-polarity pairs of differential sources.the probe are presented in Fig.12while three cases of source settings are pared with the noise waveform of one pair of differential sources,the signal allocations of mul-tiple differential-sources diversely in?uencethe induced voltage noise.For the more detailed understanding,Fig.13displays the overall electric-?eld patterns at the time of400ps for three casesFig.14.Speci?cations and measurement settings of test board.(a)Top view.(b)Side view.parisons between the simulated and measured waveforms at both the TDR end and the probe as in Fig.14.(a)The TDR waveforms.(b)The waveforms at the probe.of differential-source settings on the plane.Note that the out-ward-traveling electric?eld of Case3(the differential-sources with antipolarity)is the smallest?uctuation since the appear-ance of two virtual grounds provided by the positive-and-nega-tive polarity alternates the signal allocation.IV.E XPERIMENTAL V ERIFICATIONIn order to verify the accuracy of hybrid techniques,a test board was fabricated and measured by TEK/CSA8000B time-domain re?ectometer.The designed test board comprises the single-ended and differential-via structures,connecting with the corresponding top-and bottom-layer traces.The design speci?-cations and measurement settings of test board are illustrated in Fig.14.To perform the time-domain simulation,the launching voltage sources are drawn out of re?ectometer.As the driving Fig.16.Frequency-domain magnitude of the probing waveforms corre-sponding to Fig.15(b)and the plane resonances.signals pass through the differential vias,the parallel-plate structure is excited,incurring the SSN within the ter, the quiet trace will suffer form this voltage noise through the single-ended via transition.After extracting the equivalent circuit models of coupled-via structures and well dividing the parallel plates,the SI/PI co-analysis for test board can be achieved.Simulation results are compared with the measure-ment data as shown in Fig.15accordingly.As observed in Fig.15(a),the differential signals have the in-ternal skew of about30ps and the bulgy noise arising at about 500ps is due to the series-wound connector usedin the measure-ment.The capacitive effect of via discontinuities is occurred at about900ps,while the deviations between the simulation and measurement are attributed to the excessive high-frequency loss of input signals.For the zoom-in view of probing waveforms as in Fig.15(b),it is displayed that the comparison is still in good agreement except for the lossy effect not included in the time-domain simulation.Applying the fast Fourier transform, the frequency-domain magnitude of probing waveforms is ob-tained in Fig.16.In addition to the similar trend of time-domain simulation and measurement results,the peak frequencies cor-respond to the parallel-plate resonances of test board exactly. Hence,the exactitude of the proposed hybrid techniques can be veri?ed.V.C ONCLUSIONA hybrid time-domain technique has been introduced and applied successfully to perform the SI/PI co-analysis for the differential-via transitions in the multilayer PCBs.The signalpropagation on the differential traces is characterized by the known telegrapher’s equations and the parallel-plate structure is discretized by the combined FETD/FDTD mesh schemes.The coarser FDTD segmentation for most of regular regions inter-faces with an unconditionally stable FETD mesh for the local region having the differential-via transitions inside.In use of hybrid techniques,the computational time and memory requirement are therefore far less than those of a traditional FDTD space with the?ner mesh resolution but preserve the same degrees of numerical accuracy throughout the simulation.In face of the assemblages of multiple signal transitions in the speci?c areas,the hybrid techniques still can be adopted by slightly modifying the mesh pro?les in the local FETD re-gions.Furthermore,the numerical results demonstrate that the best signal allocation for PI consideration is positive-and-nega-tive alternate.Once the boundary conditions between the FETD and FDTD regions are well de?ned,it is expected that the hy-brid techniques have a great ability to deal with the more real-istic problems of high-speed interconnect designs concerned in the signal traces touted through the multilayer structures.R EFERENCES[1]K.S.Yee,“Numerical solution of initial boundary value problemsinvolving Maxwell’s equations in isotropic media,”IEEE Trans.Antennas Propag.,vol.AP-14,no.3,pp.302–307,May1966.[2]K.S.Kunz and R.J.Luebbers,The Finite Difference Time DomainMethod for Electromagnetics.Boca Raton,FL:CRC,1993,ch.2,3.[3]S.V.Georgakopoulos,R.A.Renaut,C.A.Balanis,and C.R.Birtcher,“A hybrid fourth-order FDTD utilizing a second-order FDTD subgrid,”IEEE Microw.Wireless Compon.Lett.,vol.11,no.11,pp.462–464,Nov.2001.[4]M. F.Hadi and M.Piket-May,“A modi?ed FDTD(2,4)scheme formodeling electrically large structures with high-phase accuracy,”IEEETrans.Antennas Propag.,vol.45,no.2,pp.254–264,Feb.1997.[5] A.R.Bretones,R.Mittra,and R.G.Martin,“A hybrid technique com-bining the method of moments in the time domain and FDTD,”IEEEMicrow.Guided Wave Lett.,vol.8,no.8,pp.281–283,Aug.1998.[6] A.Monorchio, A.R.Bretones,R.Mittra,G.Manara,and R.G.Martin,“A hybrid time-domain technique that combines the?nite element,?-nite difference and method of moment techniques to solve complexelectromagnetic problems,”IEEE Trans.Antennas Propag.,vol.52,no.10,pp.2666–2674,Oct.2004.[7]R.-B.Wu and T.Itoh,“Hybrid?nite-difference time-domain modelingof curved surfaces using tetrahedral edge elements,”IEEE Trans.An-tennas Propag.,vol.45,no.8,pp.1302–1309,Aug.1997.[8] D.Koh,H.-B.Lee,and T.Itoh,“A hybrid full-wave analysis of via-hole grounds using?nite-difference and?nite-element time-domainmethods,”IEEE Trans.Microw.Theory Tech.,vol.45,no.12,pt.2,pp.2217–2223,Dec.1997.[9]S.Chun,J.Choi,S.Dalmia,W.Kim,and M.Swaminathan,“Capturingvia effects in simultaneous switching noise simulation,”in Proc.IEEEpat.,Aug.2001,vol.2,pp.1221–1226.[10]J.-N.Hwang and T.-L.Wu,“Coupling of the ground bounce noise tothe signal trace with via transition in partitioned power bus of PCB,”in Proc.IEEE pat.,Aug.2002,vol.2,pp.733–736.[11]J.Park,H.Kim,J.S.Pak,Y.Jeong,S.Baek,J.Kim,J.J.Lee,andJ.J.Lee,“Noise coupling to signal trace and via from power/groundsimultaneous switching noise in high speed double data rates memorymodule,”in Proc.IEEE pat.,Aug.2004,vol.2,pp.592–597.[12]S.-M.Lin and R.-B.Wu,“Composite effects of re?ections and groundbounce for signal vias in multi-layer environment,”in Proc.IEEE Mi-crowave Conf.APMC,Dec.2001,vol.3,pp.1127–1130.[13]“Simulation Package for Electrical Evaluation and Design(SpeedXP)”Sigrity Inc.,Santa Clara,CA[Online].Available:[14]“High Frequency Structure Simulator”ver.9.1,Ansoft Co.,Pittsburgh,PA[Online].Available:[15]J.Jin,The Finite Element Method in Electromagnetics.New York:Wiley,1993,ch.12.[16]N.M.Newmark,“A method of computation for structural dynamics,”J.Eng.Mech.Div.,ASCE,vol.85,pp.67–94,Jul.1959.Wei-Da Guo was born in Taoyuan,Taiwan,R.O.C.,on September25,1981.He received the B.S.degreein communication engineering from Chiao-TungUniversity,Hsinchu,Taiwan,R.O.C.,in2003,andis currently working toward the Ph.D.degree incommunication engineering at National TaiwanUniversity,Taipei,Taiwan,R.O.C.His research topics include computational electro-magnetics,SI/PI issues in the design of high-speeddigital systems.Guang-Hwa Shiue was born in Tainan,Taiwan,R.O.C.,in1969.He received the B.S.and M.S.de-grees in electrical engineering from National TaiwanUniversity of Science and Technology,Taipei,Taiwan,R.O.C.,in1995and1997,respectively,and the Ph.D.degree in communication engineeringfrom National Taiwan University,Taipei,in2006.He is a Teacher in the Electronics Depart-ment of Jin-Wen Institute of Technology,Taipei,Taiwan.His areas of interest include numericaltechniques in electromagnetics,microwave planar circuits,signal/power integrity(SI/PI)and electromagnetic interference (EMI)for high-speed digital systems,and electrical characterization of system-in-package.Chien-Min Lin(M’92)received the B.S.degreein physics from National Tsing Hua University,Hsinchu,Taiwan,R.O.C.,the M.S.degree in elec-trical engineering from National Taiwan University,Taipei,Taiwan,R.O.C.,and the Ph.D.degree inelectrical engineering from the University of Wash-ington,Seattle.He was with IBM,where he worked on the xSeriesserver development and Intel,where he worked onadvanced platform design.In January2004,he joinedTaiwan Semiconductor Manufacturing Company, Ltd.,Taiwan,as a Technical Manager in packaging design and assembly vali-dation.He has been working on computational electromagnetics for the designs of microwave device and rough surface scattering,signal integrity analysis for high-speed interconnect,and electrical characterization of system-in-package.Ruey-Beei Wu(M’91–SM’97)received the B.S.E.E.and Ph.D.degrees from National Taiwan Univer-sity,Taipei,Taiwan,R.O.C.,in1979and1985,respectively.In1982,he joined the faculty of the Departmentof Electrical Engineering,National Taiwan Univer-sity,where he is currently a Professor and the De-partment Chair.He is also with the Graduate Instituteof Communications Engineering established in1997.From March1986to February1987,he was a Vis-iting Scholar at the IBM East Fishkill Facility,NY. From August1994to July1995,he was with the Electrical Engineering Depart-ment,University of California at Los Angeles.He was also appointed Director of the National Center for High-Performance Computing(1998–2000)and has served as Director of Planning and Evaluation Division since November2002, both under the National Science Council.His areas of interest include computa-tional electromagnetics,microwave and millimeter-wave planar circuits,trans-mission line and waveguide discontinuities,and interconnection modeling for computer packaging.。

信号完整性与电源完整性的仿真分析与设计.doc

信号完整性与电源完整性的仿真分析与设计.doc

信号完整性与电源完整性的仿真分析与设计信号完整性是指信号在通过一定距离的传输路径后在特定接收端口相对指定发送端口信号的还原程度。

在讨论信号完整性设计的性能时,如果指定不同的收发参考端口,就要用不同的指标来描述信号还原程度。

通常情况下指定的收发参考端口是发送芯片输出处及接收芯片输入处的波形可测点,此时,主要使用上升/下降及保持时间等指标来描述信号还原程度。

当指定的参考收发端口是信道编码器输入端及解码器输出端时,就要用误码率来描述信号还原程度。

电源完整性是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。

同样,对于同一系统中的同一个器件,如果指定的端口不同,那么对正常工作的电源要求也不同。

通常情况下指定的器件参考端口是芯片电源及地连接引脚处的可测点,此时该芯片的手册中应给出该端口处的相应指标,常用的有纹波大小或电压最大偏离范围。

一个典型背板信号传输的系统示意图如图1所示。

本文中系统一词包含信号传输所需的所有相关硬件及软件,包括芯片、封装与PCB板的物理结构,电源及电源传输网络,所有相关电路实现以及信号通信所需的协议等。

在设计时,需要硬件提供可制作的支撑及电信号有源/无源互联结构;需要软件提供信号传递的传输协议以及数据内容。

但是,由于这些支撑与互联结构会对电信号的传输呈现出一定的频率选择性衰减,因此,会对信号及电源的完整性产生影响。

同时,在相同的传输环境下,不同传输协议及不同数据内容的表达方式具有不同的适应能力,因此,需要进一步根据实际的传输环境来选择或优化可行的传输协议及数据内容表达方式。

图1 背板信号传输的系统示意图版图完整性问题、分析与设计上述背板系统中的硬件支撑及无源互联结构基本上都在一种层叠平板结构上实现。

这种层叠平板结构可以由3类元素组成:正片结构、负片结构及通孔。

正片结构有时也被称为信号层,该层上的走线大多为不同逻辑连接的信号线或离散的电源线,在制版光刻中所有的走线都会以相同图形的方式出现;负片结构有时也被称为平面层(细分为电源平面层和地平面层),该层上基本是相同逻辑的一个或少数几个连接(通常是电源连接或地连接),用大面积敷铜的方式实现,在光刻工艺中用相反图形来表示;通孔用来进行不同层之间的物理连接。

《SFP+串行通道的信号和电源完整性联合分析》范文

《SFP+串行通道的信号和电源完整性联合分析》范文

《SFP+串行通道的信号和电源完整性联合分析》篇一一、引言随着高速数据传输需求的增长,SFP+(Small Form-factor Pluggable plus)光模块已成为高速网络连接的必备技术。

其高性能和模块化的特点使其广泛应用于服务器、交换机等高速数据通信设备中。

在SFP+串行通道的传输过程中,信号完整性和电源完整性对于系统性能至关重要。

本文将对SFP+串行通道的信号和电源完整性进行联合分析,以期提高系统性能,减少传输误差。

二、SFP+串行通道概述SFP+是一种高速可插拔光模块接口,支持多模和单模光纤连接,具有高带宽、低功耗、热插拔等特点。

在SFP+串行通道中,数据通过光模块和光纤进行传输,信号的稳定性和准确性直接影响着数据传输的可靠性和效率。

三、信号完整性分析信号完整性是衡量SFP+串行通道性能的重要指标。

信号在传输过程中会受到多种因素的影响,如传输线的阻抗不匹配、电磁干扰等。

这些因素可能导致信号失真、衰减或产生噪声,从而影响数据的准确传输。

为了确保信号完整性,需要对SFP+串行通道进行以下分析:1. 阻抗匹配:确保传输线的阻抗与驱动器和接收器的阻抗相匹配,以减小反射和干扰。

2. 电磁干扰分析:评估外部电磁场对信号的影响,采取屏蔽措施以降低干扰。

3. 信号衰减:分析信号在传输过程中的衰减情况,采取合适的放大措施以保持信号强度。

4. 时序分析:确保信号在接收端具有正确的时序关系,以避免数据混乱和误码。

四、电源完整性分析电源完整性是保证SFP+串行通道正常工作的关键因素。

电源系统的稳定性和噪声抑制能力直接影响着系统的性能。

为了确保电源完整性,需要对SFP+串行通道进行以下分析:1. 电源噪声分析:评估电源系统中的噪声水平,采取滤波措施以降低噪声。

2. 电源稳定性:确保电源系统能够提供稳定的电压和电流,以满足系统的工作需求。

3. 功率分配:合理分配电源功率,以避免局部过载或欠载。

4. 热设计:考虑电源系统的散热问题,采取适当的散热措施以保持系统稳定运行。

信号完整性分析范文

信号完整性分析范文

信号完整性分析范文信号完整性分析(Signal Integrity Analysis)是指对数字电路、高速信号传输、功耗分布等进行综合考虑的电路设计步骤。

在现代电路设计中,信号完整性的问题日益凸显,尤其是在高速通信和高性能计算中的应用。

信号完整性分析的目的是要确保信号在传输过程中能够保持原有的质量,不受噪声、时钟偏移、时序失真等问题的影响。

信号完整性分析是一个复杂的过程,它涉及到多个方面的考虑和分析。

首先,需要考虑信号的传输线特性。

在高速设计中,传输线会产生反射、衰减和串扰等问题。

因此,必须对传输线的阻抗匹配、终端匹配和信号层次分割等进行精确计算和模拟,以确保传输线上的信号质量达到要求。

其次,信号完整性分析还需要考虑时钟偏移和时序失真等问题。

时钟偏移是指信号的时钟源和接收器之间存在的时间差异,会导致信号的采样时机发生偏移,进而影响到信号的稳定性和可靠性。

时序失真是指信号在传输过程中,由于信号传播速度的有限性而导致的时序错位和失真问题。

这些问题都需要通过精确的电路模拟和时序仿真来进行分析。

此外,信号完整性分析还需要考虑功耗分布和电磁干扰等问题。

功耗分布是指电路中各个模块和子电路的功率分布情况,对功耗密度的分析能够帮助设计师优化电路结构和提高效能。

而电磁干扰是指信号传输过程中由于电磁场的相互作用而产生的干扰问题,需要通过电磁模拟和电磁兼容性分析来解决。

面对复杂的信号完整性问题,现代电路设计通常采用一系列的设计和验证流程来确保信号的完整性。

首先,对电路进行设计规范和约束的制定,包括信号的最大频率、时序要求、电压幅度等。

然后,在设计阶段对电路进行仿真和分析,利用电磁场分析、传输线模型、时钟源校准等手段对信号的完整性进行评估。

最后,在芯片或电路板的制造和调试阶段,需要进行物理测量和分析,对实际的电路性能进行验证。

综上所述,信号完整性分析是现代电路设计中不可或缺的一环。

它不仅需要考虑传输线特性、时序失真等问题,还需要关注功耗分布和电磁干扰等方面的因素。

高速数字电路中信号和电源完整性分析的开题报告

高速数字电路中信号和电源完整性分析的开题报告

高速数字电路中信号和电源完整性分析的开题报告一、选题背景随着电子技术的发展,高速数字电路已成为现代电子系统中不可或缺的部分,应用广泛,例如高速计算机、通信系统、数字信号处理器等。

然而,在高速数字电路中,信号和电源完整性问题是影响系统性能和可靠性的重要因素之一。

信号完整性问题主要包括传输线上的反射和信号失真,而电源完整性问题则涉及电源波动和电源噪声干扰等问题。

为了确保高速数字电路系统的稳定性和可靠性,需要进行信号和电源完整性分析。

通过对信号和电源完整性进行分析,可以找出可能存在的问题,采取相应的措施进行优化和改进,保证系统的稳定性和性能。

二、研究内容本次研究的主要内容包括以下几个方面:1. 高速数字电路信号完整性分析:对于传输线上的反射和信号失真问题,本研究将采用有限差分方法进行建模和仿真,并对传输线参数进行优化设计,以减少反射和信号失真问题的影响。

2. 高速数字电路电源完整性分析:对于电源波动和噪声干扰等问题,本研究将采用SPICE仿真工具进行建模和仿真,并对电源系统进行优化设计,以减少电源波动和噪声干扰对系统的影响。

3. 统计分析:通过对仿真结果进行统计分析,得出信号和电源完整性的指标和规律,为后续的优化和改进提供科学的依据。

三、研究方法本次研究将采用以下方法:1. 理论分析:对于高速数字电路中信号和电源完整性问题的理论研究和分析,为后续的仿真和实验提供理论依据。

2. 仿真模拟:将信号和电源完整性问题转化为电路建模和仿真问题,采用相关的仿真工具进行模拟和分析,得出模拟结果和结论。

3. 统计分析:对仿真结果进行统计分析,获取信号和电源完整性的相关指标和规律,为后续的优化和改进提供科学依据。

四、研究意义通过本次研究,可以对高速数字电路中信号和电源完整性问题进行深入的分析和研究,找出存在的问题和进行相应的优化和改进,提高系统性能和稳定性。

此外,本次研究可为高速数字电路的相关领域提供有价值的理论和实践研究成果,为行业的发展和技术升级提供支持和指导,具有重要的理论和实践意义。

电源完整性基础讲解

电源完整性基础讲解

电源完整性基础讲解1.从信号完整性角度分析电源将SI以大类来看,其SI&PI&EMI三者的关系:2.电源完整性系统框图3.电源分配网络PDN讲解:电源完整性(PI)更关注于电源路径及终端,也就是电源分配网络(PDN)。

从源端稳压模块(VRM)经过路径(单层直达或过孔转换的几个层面),到达终端,最终流向使用芯片或经过线缆到使用设备。

电源路径与信号路径是有区别的,电源分配网络中一个电源路径可以在一个节点分成多个路径,或者说转换成多个电源,终端挂多个元器件,可以理解为一对多。

而信号路径只能一对一。

既然电源分配网络是为终端设备提供所需电源,那就是有要求,就需要对电源分配网络管控。

如信号路径,除了保证返回电流,还要尽量保证返回路径的低阻抗。

由于是一对多的情况,这样的管控,才能保证返回电流不相互重叠,不会发生地弹,即尽量避免开关噪声(SSN)。

基本要求是,保证供电电压稳定,至少能够维持在一个很小的容差范围内,通常在+/-5%以内。

电源的测试中有纹波测试,这个纹波测试标准就是+/-5%。

讲到返回电流,这里就要分为直流部分和交流部分。

直流部分:终端设备需要稳定的电压输出,电源分配网络互连之间串联电阻的存在,直流部分通过,就会产生压降,通常称为IR 压降。

当电流发生波动时,压降也会随之波动,从而影响终端设备的识别。

之前的USB设备好像最低电压值4.75 V。

交流部分:当交流电流通过电源路径时,电源分配网络上也将产生电压降,这个压降会随着频率发生变化:电源路径的不同(层数&Shape宽度等),造成的压降变化是不同的,输出稳定电压到终端的难度很大,我们所要做的只是保证电压的变化在一定的范围之内,也就是所谓的噪声容差。

上式就可能转换为目标阻抗:既然保证不了路径上电压的稳定,那么电源分配网络的电流在波动的情况下,就需要保持电源分配网络阻抗低于目标阻抗。

需要注意的是,即使同一个电源芯片或模块,针对不同的产品,也会给出不同的标准。

ADS信号完整性与电源完整性的仿真分析与设计

ADS信号完整性与电源完整性的仿真分析与设计

ADS信号完整性与电源完整性的仿真分析与设计ADS(Advanced Design System)是一种强大的电子设计自动化(EDA)软件,用于电路和系统级设计。

在电路设计中,信号完整性(SI)和电源完整性(PI)是非常重要的因素。

因此,进行ADS信号完整性和电源完整性的仿真分析与设计是必不可少的。

信号完整性是指在高速数字信号传输的过程中,保持信号的完整性,避免信号的损失和失真。

电源完整性是指在高速数字电路中,保持电源电压稳定和电源噪声控制在可接受的范围内。

信号完整性和电源完整性在高速数字设计中相互影响,因此需要进行综合的仿真分析和设计。

首先,进行ADS信号完整性仿真分析与设计。

在进行信号完整性仿真时,主要考虑以下因素:1.传输线特性:对于高速信号传输,传输线特性是非常重要的。

可以通过ADS中的传输线模型来模拟传输线参数,如阻抗、延迟等。

通过仿真分析传输线的特性,可以确定合适的传输线设计参数。

2.反射和串扰:在高速信号传输过程中,反射和串扰是常见的问题。

可以通过ADS中的S参数仿真来分析信号的反射和串扰情况。

根据仿真结果,可以进行线路调整和匹配设计,减少反射和串扰产生的影响。

3.功耗和功耗分布:在高速数字设计中,功耗和功耗分布对信号完整性有着重要的影响。

可以通过仿真分析电路的功耗和功耗分布,根据仿真结果进行优化设计,提高信号完整性。

同时,进行ADS电源完整性仿真分析与设计。

在进行电源完整性仿真时,主要考虑以下因素:1.电源电压稳定:在高速数字电路中,电源电压的稳定性对电路性能有着重要的影响。

可以通过ADS中的电源仿真模块来分析电源电压的稳定性,并根据仿真结果进行电源电路设计和优化。

2.电源噪声:在高速数字电路中,电源噪声是一个常见的问题。

可以通过ADS中的噪声仿真模块来分析电源噪声的影响,并根据仿真结果进行滤波器设计和优化,降低电源噪声对电路性能的影响。

3.电源供电线路:在进行电源完整性设计时,还需要考虑电源供电线路的设计。

信号完整性与电源完整性的详细分析

信号完整性与电源完整性的详细分析

信号完整性与电源完整性的详细分析最近在论坛里看到一则关于电源完整性的提问,网友质疑大家普遍对信号完整性很重视,但对于电源完整性的重视好像不够,主要是因为,对于低频应用,开关电源的设计更多靠的是经验,或者功能级仿真来辅助即可,电源完整性分析好像帮不上大忙,而对于50M -100M以内的中低频应用,开关电源中电容的设计,经验法则在大多数情况下也是够用的,甚至一些芯片公司提供的Excel表格型工具也能搞定这个频段的问题,而对于100M以上的应用,基本就是IC的事情了,和板级没太大关系了,所以电源完整性仿真,除非能做到芯片到芯片的解决方案,加上封装以及芯片的模型,纯粹做板级的仿真意义不大,真是这样吗?其实电源完整性可做的事情还很多,下面就来了解了解吧。

信号完整性与电源完整性分析信号完整性(SI)和电源完整性(PI)是两种不同但领域相关的分析,涉及数字电路正确操作。

在信号完整性中,重点是确保传输的1在接收器中看起来就像1(对0同样如此)。

在电源完整性中,重点是确保为驱动器和接收器提供足够的电流以发送和接收1和0。

因此,电源完整性可能会被认为是信号完整性的一个组成部分。

实际上,它们都是关于数字电路正确模拟操作的分析。

分析的必要性如果计算资源是无限的,这些不同类型的分析可能不存在。

整个电路将会被分析一次,而电路某一部分中的问题将会被识别并消除。

但除了受实际上可仿真哪些事物的现实束缚之外,具有不同领域分析的优点在于,可成组解决特定问题,而无需归类为“可能出错的任何事物”。

在信号完整性中,例如,重点是从发射器到接收器的链路。

可仅为发射器和接收器以及中间的一切事物创建模型。

这使得仿真信号完整性变得相当简单。

另一方面,要仿真电源完整性可能有点困难,因为“边界”有点不太明确,且实际上对信号完整性领域中的项目具有一定的依赖性。

在信号完整性中,目标是消除关于信号质量、串扰和定时的问题。

所有这些类型的分析都。

信号完整性的分析报告

信号完整性的分析报告

信号完整性的分析报告关于信号完整性的分析报告篇一:信号完整性分析--信号反射信号沿传输线向前传播时,每时每刻都会感受到一个瞬态阻抗,这个阻抗可能是传输线本身的,也可能是中途或末端其他元件的。

对于信号来说,它不会区分到底是什么,信号所感受到的只有阻抗。

如果信号感受到的阻抗是恒定的,那么他就会正常向前传播,只要感受到的阻抗发生变化,不论是什么引起的(可能是中途遇到的电阻,电容,电感,过孔,PCB转角,接插件),信号都会发生反射。

那么有多少被反射回传输线的起点?衡量信号反射量的重要指标是反射系数,表示反射电压和原传输信号电压的比值。

反射系数定义为:ρ= Z2Z1。

其中:Z1为变化前的阻 Z2Z1抗,Z2为变化后的阻抗。

假设PCB线条的特性阻抗为50欧姆,传输过程中遇到一个100欧姆的贴片电阻,暂时不考虑寄生电容电感的影响,把电阻看成理想的纯电阻,那么反射系数为:ρ=100501,信号有1/3被反射回源端。

如果传输信号的电压是3.3V电压,100503 反射电压就是1.1V。

纯电阻性负载的反射是研究反射现象的基础,阻性负载的变化无非是以下四种情况:阻抗增加有限值、减小有限值、开路(阻抗变为无穷大)、短路(阻抗突然变为0)。

阻抗增加有限值:反射电压上面的例子已经计算过了。

这时,信号反射点处就会有两个电压成分,一部分是从源端传来的3.3V电压,另一部分是在反射电压1.1V,那么反射点处的电压为二者之和,即4.4V。

阻抗减小有限值:仍按上面的例子,PCB线条的特性阻抗为50欧姆,如果遇到的电阻是30欧姆,则反射系数为ρ=3050=-0.25,反射电压为3.3*(-0.25)V= -0.825V。

此时反射点电压为3.3V+3050(-0.825V)=2.475V。

开路:开路相当于阻抗无穷大,反射系数按公式计算为1。

即反射电压3.3V。

反射点处电压为6.6V。

可见,在这种极端情况下,反射点处电压翻倍了。

短路:短路时阻抗为0,电压一定为0。

信号完整性分析

信号完整性分析

《信号完整性分析》作者以实践专家的视角提出了造成信号完整性问题的根源,特别给出了在设计前期阶段的问题解决方案。

这是面向电子工业界的设计工程师和产品负责人的一本具有实用价值的参考书,其目的在于帮助他们在信号完整性问题出现之前能提前发现并及早加以解决,同时也可作为相关专业本科生及研究生的教学指导用书。

《信号完整性分析》全面论述了信号完整性问题。

主要讲述了信号完整性和物理设计概论,带宽、电感和特性阻抗的实质含义,电阻、电容、电感和阻抗的相关分析,解决信号完整性问题的四个实用技术手段,物理互连设计对信号完整性的影响,数学推导背后隐藏的解决方案,以及改进信号完整性推荐的设计准则等。

该书与其他大多数同类书籍相比更强调直观理解、实用工具和工程实践。

它以入门式的切入方式,使得读者很容易认识到物理互连影响电气性能的实质,从而可以尽快掌握信号完整性设计技术。

信号完整性与电源完整性分析信号完整性(SI)和电源完整性(PI)是两种不同但领域相关的分析,涉及数字电路正确操作。

在信号完整性中,重点是确保传输的1在接收器中看起来就像1(对0同样如此)。

在电源完整性中,重点是确保为驱动器和接收器提供足够的电流以发送和接收1和0。

因此,电源完整性可能会被认为是信号完整性的一个组成部分。

实际上,它们都是关于数字电路正确模拟操作的分析。

分析的必要性如果计算资源是无限的,这些不同类型的分析可能不存在。

整个电路将会被分析一次,而电路某一部分中的问题将会被识别并消除。

但除了受实际上可仿真哪些事物的现实束缚之外,具有不同领域分析的优点在于,可成组解决特定问题,而无需归类为“可能出错的任何事物”。

在信号完整性中,例如,重点是从发射器到接收器的链路。

可仅为发射器和接收器以及中间的一切事物创建模型。

这使得仿真信号完整性变得相当简单。

另一方面,要仿真电源完整性可能有点困难,因为“边界”有点不太明确,且实际上对信号完整性领域中的项目具有一定的依赖性。

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An Integrated Signal and Power Integrity Analysis for Signal Traces Through the Parallel Planes Using Hybrid Finite-Element andFinite-Difference Time-Domain TechniquesWei-Da Guo,Guang-Hwa Shiue,Chien-Min Lin,Member,IEEE,and Ruey-Beei Wu,Senior Member,IEEEAbstract—This paper presents a numerical approach that com-bines thefinite-element time-domain(FETD)method and thefi-nite-difference time-domain(FDTD)method to model and ana-lyze the two-dimensional electromagnetic problem concerned in the simultaneous switching noise(SSN)induced by adjacent signal traces through the coupled-via parallel-plate structures.Applying FETD for the region having the source excitation inside and FDTD for the remaining regions preserves the advantages of both FETD flexibility and FDTD efficiency.By further including the transmis-sion-line simulation,the signal integrity and power integrity is-sues can be resolved at the same time.Furthermore,the numer-ical results demonstrate which kind of signal allocation between the planes can achieve the best noise cancellation.Finally,a com-parison with the measurement data validates the proposed hybrid techniques.Index Terms—Differential signaling,finite-element andfinite-difference time-domain(FETD/FDTD)methods,power integrity (PI),signal integrity(SI),simultaneous switching noise(SSN), transient analysis.I.I NTRODUCTIONI N RECENT years,considerable attention has been devotedto time-domain numerical techniques to analyze the tran-sient responses of electromagnetic problems.Thefinite-differ-ence time-domain(FDTD)method proposed by Yee in1966 [1]has become the most well-known technique because it pro-vides a lot of attractive advantages:direct and explicit time-marching scheme,high numerical accuracy with a second-order discretization error,stability condition,easy programming,and minimum computational complexity[2].However,it is often in-efficient and/or inaccurate to use only the FDTD method to dealManuscript received March3,2006;revised November6,2006.This work was supported in part by the National Science Council,Republic of China,under Grant NSC91-2213-E-002-109,by the Ministry of Education under Grant93B-40053,and by Taiwan Semiconductor Manufacturing Company under Grant 93-FS-B072.W.-D.Guo,G.-H.Shiue,and R.-B.Wu are with the Department of Electrical Engineering and Graduate Institute of Communication Engi-neering,National Taiwan University,10617Taipei,Taiwan,R.O.C.(e-mail: f92942062@.tw;d9*******@.tw;rbwu@.tw).C.-M.Lin is with the Packaging Core Competence Department,Advanced Assembly Division,Taiwan Semiconductor Manufacturing Company,Ltd., 30077Taiwan,R.O.C.(e-mail:chienmin_lin@).Color versions of one or more of thefigures in this paper are available online at .Digital Object Identifier10.1109/TADVP.2007.901595with some specific structures.Hybrid techniques,which com-bine the desirable features of the FDTD and other numerical schemes,are therefore being developed to improve the simula-tion capability in solving many realistic problems.First,the FDTD(2,4)method with a second-order accuracy in time and a fourth-order accuracy in space was incorporated to tackle the subgridding scheme[3]and a modified form was employed to characterize the electrically large structures with extremely low-phase error[4].Second,the integration with the time-domain method of moments was performed to analyze the complex geometries comprising the arbitrary thin-wire and inhomogeneous dielectric structures[5],[6].Third,theflexible finite-element time-domain(FETD)method was introduced locally for the simulation of structures with curved surfaces [6]–[8].With the advent of high-speed digital era,the simultaneous switching noise(SSN)on the dc power bus in the multilayer printed circuit boards(PCBs)causes paramount concern in the signal integrity and power integrity(SI/PI)along with the electromagnetic interference(EMI).One potential excitation mechanism of this high-frequency noise is from the signal traces which change layers through the via transition[9]–[11]. In the past,the transmission-line theory and the two-dimen-sional(2-D)FDTD method were combined successfully to deal with the parallel-plate structures having single-ended via transition[12],[13].Recently,the differential signaling has become a common wiring approach for high-speed digital system designs in benefit of the higher noise immunity and EMI reduction.Nevertheless,for the real layout constraints,the common-mode currents may be generated from various imbal-ances in the circuits,such as the driver-phase skew,termination diversity,signal-path asymmetries,etc.Both the differential-and common-mode currents can influence the dc power bus, resulting in the SSN propagating within the planes.While applying the traditional method to manage this case,it will need a muchfiner FDTD mesh to accurately distinguish the close signals transitioning through the planes.Such action not only causes the unnecessary waste of computer memory but also takes more simulation time.In order to improve the computa-tional efficiency,this paper incorporates the FETD method to the small region with two or more signal transitions inside,while the other regions still remain with the coarser FDTD grids.While the telegrapher’s equations of coupled transmission lines are further introduced to the hybrid FETD/FDTD techniques,the1521-3323/$25.00©2007IEEEFig.1.A typical four-layer differential-via structure.SI/PI co-analysis for differential traces through the planes can be accomplished as demonstrated in Section II and the numerical results are shown in Section III.For a group of signal vias,the proposed techniques can also tell which kind of signal alloca-tion to achieve the best performance as presented in Section III. Section IV thus correlates the measurement results and their comparisons,followed by brief conclusions in Section V.II.S IMULATION M ETHODOLOGYA typical differential-via structure in a four-layer board is il-lustrated in Fig.1.Along the signal-flow path,the whole struc-ture is divided into three parts:the coupled traces,the cou-pled-via discontinuities,and the parallel plates.This section will present how the hybrid techniques integrate the three parts to proceed with the SI/PI co-simulation.At last,the stability consideration and computational complexity of the hybrid tech-niques are discussed as well.A.Circuit SolverWith reference to Fig.2,if the even/odd mode propagation coefficients and characteristic impedances are given,it is recog-nized that the coupled traces can be modeled by theequivalentladder circuits,and the lossy effects can be well approxi-mated with the average values ofindividualand overthe frequency range of interest.The transient signal propagationis thus characterized by the telegrapher’s equations with the cen-tral-difference discretization both in time and space domains.The approach to predict the signal propagation through the cou-pled-via discontinuities is similar to that through the coupledtraces except for the difference of model-extracting method.To characterize the coupled-via discontinuities as depicted inFig.1,the structure can be separated into three segments:the viabetween the two solid planes,and the via above(and under)theupper(and lower)plane.Since the time delay of signals througheach segment is much less than the rising edge of signal,the cou-pled-via structure can be transformed into a SPICE passive net-work sketched in Fig.3by full-wave simulation[14],whererepresents the voltage of SSN induced by thecurrent on Ls2.By linking the extracted circuit models of coupled-via disconti-nuities,both the top-and bottom-layer traces together with suit-able driving sources and load terminations,the transient wave-forms throughout the interconnects are then characterized andcan be used for the SIanalyses.Fig.2.The k th element of equivalent circuit model of coupled transmissionlines.Fig.3.Equivalent circuit model of coupled-via structures.B.Plane SolverAs for the parallel-plate structure,because the separationbetween two solid planes is much smaller than the equiva-lent wavelength of signals,the electromagneticfield inside issupposed to be uniform along the vertical direction.Thence,the2-D numerical technique can be applied to characterizethe SSN effects while the FETD method is set for the smallregion covering the signal transitions and the FDTD scheme isconstructed in the most regular regions.The FETD algorithm[15]starts from Maxwell’s two curl-equations and the vector equation is obtainedbyin(1)whereand denote the electricfield and current density,re-spectively,in the losslessvolume.Applying the weak-formformulation or the Galerkin’s procedure to(1)gives(2)where is the weighting function that can be arbitrarily de-fined.In use of thefinite-element method,the variational for-mula is thus discretized to implement the later numerical com-putation.In the present case,the linear basis function is chosento express thefields inside each triangular element.After takingthe volume integration over each element and assembling theFig.4.FEM mesh in the source region and its interface with the FDTD grids. integrals from all the elements,(2)can be simplified into a ma-trix formof(3)whereand are the coefficient vectors of electricfield andcurrent density,respectively.In addition,the values of all matrixelements in(3)are formulatedasand(4)For the mesh profile as illustrated in Fig.4,the FETD re-gion is chosen to be a block replacing the prime FDTD regioninto which the via transition penetrates.This is an initial valueproblem in time with thepreviousand being theinitial conditions as well as the boundary value problem in spacewith being Dirichlet boundary condition.To solve theinitial value problem in(3),the time derivative of electricfieldis approximated by the central difference,thatis(5)As for the electricfield in the second term of(3),it can be for-mulated by the Newmark–Beta scheme[16]to be readas(6)Fig.5.Simulationflowchart of hybrid FETD and FDTD techniques to performthe SI/PI co-analysis for the coupled-via structure as illustrated in Fig.1.Moreover,in the triangular elements with the via transitioninside,the term in(3)as expressedbygridarea(7)is needed to serve as the excitation of the parallel-plate structurewith thecurrent shown in Fig.3through the via structurebetween Layers2and3.It is worth noting that the via transitionshould be placed on the bary-center of each triangular elementto achieve better accuracy.The hand-over scheme for thefield in the overlapped region ofFDTD and FETD can be depicted in Fig.5.Given the boundaryfield calculated by the FDTD algorithm at the timestep,all thefield in the FETD region can be acquiredthrough the matrix solution of(3).The SSNvoltage in Fig.3is then determinedby(8)where is the averaging value of nodal electric-fieldsenclosing the via transition,and is the separation between theplanes.Onceand at the FETD mesh nodes(node1,2,3,and4in Fig.4)become available,together with the ob-tained voltage/current values from the circuit solver and electric/magneticfields of the FDTD region,the hybrid time-marchingscheme for the next time step can be implemented and so on.As a result of using the integrated schemes,thecurrent,arisen from the input signal through the via structure,can havethe ability to induce the voltage noise propagating within theFig.6.Physical dimensions of coupled traces and via pair.(a)Top view (Unit =mil ).(b)Side view.parallel plates.After a period of time,owing to the plane reso-nance and return path,the induced noise will cause the unwanted voltage fluctuation on the coupled traces by the presence of the finite SSNvoltage .C.Stability Problem and Computational Complexity It is not dif ficult to manifest that the FETD algorithm is un-conditionally stable.Substituting (5),(6),and (7)into (3)yields the following differenceequation:(9)where(10)the superscript “1”denotes the matrix inverse and thefactorgridareaWithout loss of generality,the time-stepping scheme in (9)is restatedas(11)Applyingthe -transform technique to (11)and solvingfor,de fined asthe -transformof ,the resultreads(12)along with thedependent ,de fined asthe -transformof in (11).Regardless of the timestep ,it can be easily de-duced that the poles of (12)is just on the unit circleof plane.This proves that the time marching by (9)is absolutely stable.The stability condition of these hybrid techniques is thus gov-erned by the transmission-line theory and the FDTD algorithm in the regular region,which are already known.Concerning the computational complexity,because of the consistence of simulation engines used for the circuitsolver,parison of differential-mode S -parameters from HFSS simulation and the equivalent circuit as depicted in Fig.3.the only work is to compare the ef ficiency of the hybrid FETD/FDTD technique with that of the traditional FDTD method.In use of only the FDTD scheme for cell discretization,the grid size should be chosen at most the spacing between the adjacent via transitions.However,as depicted in Fig.4,the hybrid techniques adopting the FEM mesh for the source region exhibit the great talent to segment the whole plane with the coarser FDTD grids.Owing to the sparsity of the FETD matrices in (4)and the much smaller number of unknowns,the computational time needed for each FETD operation can be negligible.The complexity of the hybrid techniques is therefore dominated by the FDTD divisions in the regular region.It is ev-ident that the total simulation time of the 2-D FDTD algorithmis,where denotes the number of the division in the whole space [7].The coarser the FDTD grids,the smaller the number of the grids and unknowns.Hence,the present hybrid techniques can preserve high accuracy without sacri ficing the computational ef ficiency.III.N UMERICAL R ESULTSA.Coupled via TransitionConsider the geometry in Fig.1but with the coupled-via structure being 2cm away from the center of parallel plates,which is set as the origin ofthe–plane.The size of the plane is1010cm and the separation between the two metal planes is 20mils(0.05cm).The physical dimensions of the coupled traces and via pair are depicted in Fig.6.After extractingthe -parameters from the full-wave simulation,their equivalent circuit models of coupled-via structures as sketched in Fig.3can be thus constructed.In Fig.7,it is found that the differen-tial-mode -parameters of equivalent circuit models are in good agreement with those from the HFSS simulations [14]and the extracted parasitic values of inductive and capacitive lumped-el-ements are also listed in the attached table.The top-layer coupled traces are driven by differential Gaussian pulses with the rise time of 100ps and voltage ampli-tude of 2V while the traces are terminated with the matchedFig.8.Simulated TDR waveforms on the positive-signaling trace.(a)Late-time response for the signal skew of 10ps excluding the multire flection phe-nomenon of common-mode signal.(b)Late-time response while no signal skew.TABLE IC OMPARISON OF C OMPUTATIONAL C OMPLEXITY B ETWEEN THE T WO M ETHODS(T IME D URATION =2:5ns)(CPU:Intel P43.0GHz,RAM:2GHz)loads at their ends.For simplicity,the transmission-line losses are not considered in the following analyses for the transient responses.By using the same mesh discretization as illustrated in Fig.4,the resultant segmentation for the plane con fines the flexible FEM mesh in the vicinity of via transitions and the coarser FDTD division with the size of22mm elsewhere.Employing the perfect magnetic conductors for boundary conditions of the parallel-plate structure,the simulated TDR waveforms with and without the signal skew on the posi-tive-signaling trace are presented in Fig.8.In comparison of hybrid FETD/FDTD techniques and finer FDTD method with center-to-center via spacing(0.66mm)as the grid size,the simulation results are in good agreement.Note that the voltage fluctuation before 900ps is induced by the incident signal passing through the coupled-via structure while the occurrence of late-time response is accompanied by the parallel-plate resonances.As for the signal skew of 10ps,the voltage level of late-time response is found to be greater than that of no signal skew because of the existence of common-mode currents produced by the timing skew of differential signals.Moreover,the simulation time of both methods should be pro-portional to the number of grids multiplied by the total time steps.As the physical time duration is fixed,the decrease of the FDTD division size would correspond to the increase of thetotalFig.9.Parallel plane with three current sources inside.(a)3-D view.(b)Zoom-in view of three sources on the plane in (a).(c).FETD/FDTD meshdiscretization.Fig.10.Simulated noise waveforms at the preallocated probe in reference to Fig.9(a).time steps.Consequently,as shown in Table I,it is demonstrated that the computational ef ficiency of the hybrid techniques is in-deed much better than that of the finer FDTD method.B.Multiple Source TransitionIn addition to a pair of differential-via structure,there can be a group of signaling vias distributed in the various regions of planes.Considering the parallel-plate structure in Fig.9(a),three current sources are distributed around the center (0,0)and a probe is located at (1mm,9mm)to detect the voltage noise induced on the planes.The FEM meshes for the source region and the interface with the FDTD region are shown inFig.11.Parallel-plate structure with two differential pairs of current sources inside in reference to Fig.9(a).(a)Two differential pairs of sources on the plane in Fig.9(a).(b)FETD/FDTD meshdiscretization.parison of the simulated noise waveforms between three cases of differential-sources on the plane as in Fig.9(a).Fig.9(c).The current sources are Gaussian pulses with the rise time of 100ps and different current amplitudes of 0.5,0.25,and 0.3A.With the same settings of boundary conditions,the simulated voltage noise waveforms at the preallocated probe re-ferred to Fig.9(a)are presented in Fig.10.It is indicated that the hybrid FETD/FDTD techniques still reserves the great accuracy in predicting the traveling-wave behavior of plane noise.In the modern digital systems,many high-speed devices employ the multiple differential-traces for the purpose of data transmission.These traces are usually close to each other and may simultaneously penetrate the multilayered planes through via transitions.Hence,it is imperious for engineers to know how to realize the best power integrity by suitably arranging the positions of differential vias.Reconsidering the parallel plates in Fig.9(a),instead,two dif-ferential-current sources around the center and the probe is re-located at (25mm,25mm)as shown in Fig.11along with their corresponding mesh pro file.After serving for the same Gaussian pulses as input signals,the simulated waveformsatFig.13.At time of 400ps,the overall electric-field patterns of three cases of differential-source settings in reference to Fig.12.(a)Case 1:one pair of dif-ferential sources.(b)Case 2:two pairs of differential sources with the same polarity.(c)Case 3:two anti-polarity pairs of differential sources.the probe are presented in Fig.12while three cases of source settings are pared with the noise waveform of one pair of differential sources,the signal allocations of mul-tiple differential-sources diversely in fluence the induced voltage noise.For the more detailed understanding,Fig.13displays the overall electric-field patterns at the time of 400ps for three casesFig.14.Speci fications and measurement settings of test board.(a)Top view.(b)Sideview.parisons between the simulated and measured waveforms at both the TDR end and the probe as in Fig.14.(a)The TDR waveforms.(b)The waveforms at the probe.of differential-source settings on the plane.Note that the out-ward-traveling electric field of Case 3(the differential-sources with antipolarity)is the smallest fluctuation since the appear-ance of two virtual grounds provided by the positive-and-nega-tive polarity alternates the signal allocation.IV .E XPERIMENTAL V ERIFICATIONIn order to verify the accuracy of hybrid techniques,a test board was fabricated and measured by TEK/CSA8000B time-domain re flectometer.The designed test board comprises the single-ended and differential-via structures,connecting with the corresponding top-and bottom-layer traces.The design speci fi-cations and measurement settings of test board are illustrated in Fig.14.To perform the time-domain simulation,the launching voltage sources are drawn out of re flectometer.As thedrivingFig.16.Frequency-domain magnitude of the probing waveforms corre-sponding to Fig.15(b)and the plane resonances.signals pass through the differential vias,the parallel-plate structure is excited,incurring the SSN within the ter,the quiet trace will suffer form this voltage noise through the single-ended via transition.After extracting the equivalent circuit models of coupled-via structures and well dividing the parallel plates,the SI/PI co-analysis for test board can be achieved.Simulation results are compared with the measure-ment data as shown in Fig.15accordingly.As observed in Fig.15(a),the differential signals have the in-ternal skew of about 30ps and the bulgy noise arising at about 500ps is due to the series-wound connector used in the measure-ment.The capacitive effect of via discontinuities is occurred at about 900ps,while the deviations between the simulation and measurement are attributed to the excessive high-frequency loss of input signals.For the zoom-in view of probing waveforms as in Fig.15(b),it is displayed that the comparison is still in good agreement except for the lossy effect not included in the time-domain simulation.Applying the fast Fourier transform,the frequency-domain magnitude of probing waveforms is ob-tained in Fig.16.In addition to the similar trend of time-domain simulation and measurement results,the peak frequencies cor-respond to the parallel-plate resonances of test board exactly.Hence,the exactitude of the proposed hybrid techniques can be veri fied.V .C ONCLUSIONA hybrid time-domain technique has been introduced and applied successfully to perform the SI/PI co-analysis for the differential-via transitions in the multilayer PCBs.The signalpropagation on the differential traces is characterized by the known telegrapher’s equations and the parallel-plate structure is discretized by the combined FETD/FDTD mesh schemes.The coarser FDTD segmentation for most of regular regions inter-faces with an unconditionally stable FETD mesh for the local region having the differential-via transitions inside.In use of hybrid techniques,the computational time and memory requirement are therefore far less than those of a traditional FDTD space with thefiner mesh resolution but preserve the same degrees of numerical accuracy throughout the simulation.In face of the assemblages of multiple signal transitions in the specific areas,the hybrid techniques still can be adopted by slightly modifying the mesh profiles in the local FETD re-gions.Furthermore,the numerical results demonstrate that the best signal allocation for PI consideration is positive-and-nega-tive alternate.Once the boundary conditions between the FETD and FDTD regions are well defined,it is expected that the hy-brid techniques have a great ability to deal with the more real-istic problems of high-speed interconnect designs concerned in the signal traces touted through the multilayer structures.R EFERENCES[1]K.S.Yee,“Numerical solution of initial boundary value problemsinvolving Maxwell’s equations in isotropic media,”IEEE Trans.Antennas Propag.,vol.AP-14,no.3,pp.302–307,May1966.[2]K.S.Kunz and R.J.Luebbers,The Finite Difference Time DomainMethod for Electromagnetics.Boca Raton,FL:CRC,1993,ch.2,3.[3]S.V.Georgakopoulos,R.A.Renaut,C.A.Balanis,and C.R.Birtcher,“A hybrid fourth-order FDTD utilizing a second-order FDTD subgrid,”IEEE Microw.Wireless Compon.Lett.,vol.11,no.11,pp.462–464,Nov.2001.[4]M.F.Hadi and M.Piket-May,“A modified FDTD(2,4)scheme formodeling electrically large structures with high-phase accuracy,”IEEETrans.Antennas Propag.,vol.45,no.2,pp.254–264,Feb.1997.[5]A.R.Bretones,R.Mittra,and R.G.Martin,“A hybrid technique com-bining the method of moments in the time domain and FDTD,”IEEEMicrow.Guided Wave Lett.,vol.8,no.8,pp.281–283,Aug.1998.[6]A.Monorchio,A.R.Bretones,R.Mittra,G.Manara,and R.G.Martin,“A hybrid time-domain technique that combines thefinite element,fi-nite difference and method of moment techniques to solve complexelectromagnetic problems,”IEEE Trans.Antennas Propag.,vol.52,no.10,pp.2666–2674,Oct.2004.[7]R.-B.Wu and T.Itoh,“Hybridfinite-difference time-domain modelingof curved surfaces using tetrahedral edge elements,”IEEE Trans.An-tennas Propag.,vol.45,no.8,pp.1302–1309,Aug.1997.[8]D.Koh,H.-B.Lee,and T.Itoh,“A hybrid full-wave analysis of via-hole grounds usingfinite-difference andfinite-element time-domainmethods,”IEEE Trans.Microw.Theory Tech.,vol.45,no.12,pt.2,pp.2217–2223,Dec.1997.[9]S.Chun,J.Choi,S.Dalmia,W.Kim,and M.Swaminathan,“Capturingvia effects in simultaneous switching noise simulation,”in Proc.IEEEpat.,Aug.2001,vol.2,pp.1221–1226.[10]J.-N.Hwang and T.-L.Wu,“Coupling of the ground bounce noise tothe signal trace with via transition in partitioned power bus of PCB,”in Proc.IEEE pat.,Aug.2002,vol.2,pp.733–736.[11]J.Park,H.Kim,J.S.Pak,Y.Jeong,S.Baek,J.Kim,J.J.Lee,andJ.J.Lee,“Noise coupling to signal trace and via from power/groundsimultaneous switching noise in high speed double data rates memorymodule,”in Proc.IEEE pat.,Aug.2004,vol.2,pp.592–597.[12]S.-M.Lin and R.-B.Wu,“Composite effects of reflections and groundbounce for signal vias in multi-layer environment,”in Proc.IEEE Mi-crowave Conf.APMC,Dec.2001,vol.3,pp.1127–1130.[13]“Simulation Package for Electrical Evaluation and Design(SpeedXP)”Sigrity Inc.,Santa Clara,CA[Online].Available:[14]“High Frequency Structure Simulator”ver.9.1,Ansoft Co.,Pittsburgh,PA[Online].Available:[15]J.Jin,The Finite Element Method in Electromagnetics.New York:Wiley,1993,ch.12.[16]N.M.Newmark,“A method of computation for structural dynamics,”J.Eng.Mech.Div.,ASCE,vol.85,pp.67–94,Jul.1959.Wei-Da Guo was born in Taoyuan,Taiwan,R.O.C.,on September25,1981.He received the B.S.degreein communication engineering from Chiao-TungUniversity,Hsinchu,Taiwan,R.O.C.,in2003,andis currently working toward the Ph.D.degree incommunication engineering at National TaiwanUniversity,Taipei,Taiwan,R.O.C.His research topics include computational electro-magnetics,SI/PI issues in the design of high-speeddigitalsystems.Guang-Hwa Shiue was born in Tainan,Taiwan,R.O.C.,in1969.He received the B.S.and M.S.de-grees in electrical engineering from National TaiwanUniversity of Science and Technology,Taipei,Taiwan,R.O.C.,in1995and1997,respectively,and the Ph.D.degree in communication engineeringfrom National Taiwan University,Taipei,in2006.He is a Teacher in the Electronics Depart-ment of Jin-Wen Institute of Technology,Taipei,Taiwan.His areas of interest include numericaltechniques in electromagnetics,microwave planar circuits,signal/power integrity(SI/PI)and electromagnetic interference (EMI)for high-speed digital systems,and electrical characterization ofsystem-in-package.Chien-Min Lin(M’92)received the B.S.degreein physics from National Tsing Hua University,Hsinchu,Taiwan,R.O.C.,the M.S.degree in elec-trical engineering from National Taiwan University,Taipei,Taiwan,R.O.C.,and the Ph.D.degree inelectrical engineering from the University of Wash-ington,Seattle.He was with IBM,where he worked on the xSeriesserver development and Intel,where he worked onadvanced platform design.In January2004,he joinedTaiwan Semiconductor Manufacturing Company, Ltd.,Taiwan,as a Technical Manager in packaging design and assembly vali-dation.He has been working on computational electromagnetics for the designs of microwave device and rough surface scattering,signal integrity analysis for high-speed interconnect,and electrical characterization ofsystem-in-package.Ruey-Beei Wu(M’91–SM’97)received the B.S.E.E.and Ph.D.degrees from National Taiwan Univer-sity,Taipei,Taiwan,R.O.C.,in1979and1985,respectively.In1982,he joined the faculty of the Departmentof Electrical Engineering,National Taiwan Univer-sity,where he is currently a Professor and the De-partment Chair.He is also with the Graduate Instituteof Communications Engineering established in1997.From March1986to February1987,he was a Vis-iting Scholar at the IBM East Fishkill Facility,NY. From August1994to July1995,he was with the Electrical Engineering Depart-ment,University of California at Los Angeles.He was also appointed Director of the National Center for High-Performance Computing(1998–2000)and has served as Director of Planning and Evaluation Division since November2002, both under the National Science Council.His areas of interest include computa-tional electromagnetics,microwave and millimeter-wave planar circuits,trans-mission line and waveguide discontinuities,and interconnection modeling for computer packaging.。

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