AT89C51单片机 外文翻译

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AT89C51的外文文献及翻译

AT89C51的外文文献及翻译

原文:The Introduction of AT89C51DescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC:Supply voltage.GND:Ground.Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal pullups.Port 2 emits the high-orderaddress byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Figure 1. Oscillator Connections Figure 2. External Clock Drive ConfigurationIdle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chipRAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below.When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.译文:AT89C51的介绍描述AT89C51是一个低电压,高性能CMOS 8位单片机带有4K字节的可反复擦写的程序存储器(PENROM)。

外文翻译--AT89C51单片机的介绍

外文翻译--AT89C51单片机的介绍

专业文献翻译题目: AT89C51单片机的介绍姓名:学院:专业: 电子信息科学与技术班级: 班学号:指导教师: 职称:20 年月日原文:The Introduction of AT89C51DescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, one 5 vector two-level interrupt architecture, a full duplex serial port, one-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC:Supply voltage.GND:Ground.Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed address/data bus during accesses to external program and data memory. In this mode P0 has internal Pull-up resistor. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during Program verification. External Pull-up resistors are required during Program verification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal Pull-up resistors. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal Pull-up resistors and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal Pull-up resistors. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal Pull-up resistor. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal Pull-up resistor and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current, because of the internal Pull-up resistor. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal Pull-up resistor when emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3 is an 8-bit bi-directional I/O port with internal Pull-up resistor. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal Pull-up resistor and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the Pull-up resistor. Port 3 also serves the functions of various special features of the AT89C51 as listed below:Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bitset, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum andmaximum voltage high and low time specifications must be observed.Figure 1. Oscillator Connections Figure 2. External Clock Drive ConfigurationIdle ModeIn idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit frompower-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below.When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.译文:AT89C51的介绍描述AT89C51是一个低电压,高性能CMOS 8位单片机带有4K字节的可反复擦写的程序存储器(PENROM)。

AT89C51中文资料

AT89C51中文资料

A T89C51中文资料A T89C51是美国A TMEL公司生产的低电压,高性能CMOS8位单片机,片内含4k bytes的可反复擦写的只读程序存储器(PEROM)和128 bytes的随机存取数据存储器(RAM),器件采用A TMEL公司的高密度、非易失性存储技术生产,兼容标准MCS-51指令系统,片内置通用8位中央处理器(CPU)和Flash存储单元,功能强大A T89C51单片机可为您提供许多高性价比的应用场合,可灵活应用于各种控制领域。

主要性能参数:·与MCS-51产品指令系统完全兼容·4k字节可重擦写Flash闪速存储器·1000次擦写周期·全静态操作:0Hz-24MHz·三级加密程序存储器·128×8字节内部RAM·32个可编程I/O口线·2个16位定时/计数器·6个中断源·可编程串行UART通道·低功耗空闲和掉电模式功能特性概述:A T89C51提供以下标准功能:4k字节Flash闪速存储器,128字节内部RAM,32个I/O口线,两个16位定时/计数器,一个5向量两级中断结构,一个全双工串行通信口,片内振荡器及时钟电路。

同时,A T89C51可降至0Hz的静态逻辑操作,并支持两种软件可选的节电工作模式。

空闲方式停止CPU的工作,但允许RAM,定时/计数器,串行通信口及中断系统继续工作。

掉电方式保存RAM中的内容,但振荡器停止工作并禁止其它所有部件工作直到下一个硬件复位。

A T89C51方框图引脚功能说明·Vcc:电源电压·GND:地·P0口:P0口是一组8位漏极开路型双向I /O 口,也即地址/数据总线复用口。

作为输出口用时,每位能吸收电流的方式驱动8个TTL 逻辑门电路,对端口写“1”可作为高阻抗输入端用。

在访问外部数据存储器或程序存储器时,这组口线分时转换地址(低8位)和数据总线复用,在访问期间激活内部上拉电阻。

51单片机英文及其翻译

51单片机英文及其翻译

英文翻译原文:51 Microcontroller IntroductionMicrocontrollers basic component is a central processing unit (CPU in the computing device and controller), read-only memory (usually expressed as a ROM), read-write memory (also known as Random Access Memory MRAM is usually expressed as a RAM) , input / output port (also divided into parallel port and serial port, expressed as I / O port), and so composed. In fact there is also a clock circuit microcontroller, so that during operation and control of the microcontroller, can rhythmic manner. In addition, there are so-called "break system", the system is a "janitor" role, when the microcontroller control object parameters that need to be intervention to reach a particular state, can after this "janitor" communicated to the CPU, so that CPU priorities of the external events to take appropriate counter-measures.Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performance was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller, but not ideal because the cost has not been very widely used. After 90 years with the great development of consumer electronics, microcontroller technology has been a huge increase. With INTEL i960 series, especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter the mainstream market. The traditional 8-bit microcontroller performance have been therapid increase capacity increase compared to 80 the number of times. Currently, high-end 32-bit microcontroller clocked over 300MHz, the performance catching the mid-90s dedicated processor, while the average model prices fall to one U.S. dollar, the most high-end model is only 10 dollars. Modern SCM systems are no longer only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM. The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.SCM relies on the program, and can be modified. Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some are great efforts are very difficult to achieve. A not very complex functions if the 50's with the United States developed 74 series, or the 60's CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70's with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financiallyProhibitive. Redesign costs can run as high as a $500K, much more if the fix means back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components are extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully.Intel Chandler Platform Engineering group provides postSilicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.The AT89C51 provides the following standard features: 4Kbytes of flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, five vector two-level interrupt architecture, a full duple ser -ail port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the social -labor disabling all other chip functions until the next hardware reset.Pin DescriptionVCC Supply voltage.GND Ground.Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed lowered address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups’.Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/so -urge four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI); Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/soul -race four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory.This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dui -nag each access to external DataMemory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. A should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.The AT89C51 code memory array is programmed byte-by byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, andThe next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved byobserving that their features are enabled.A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps.An analog-to-digital converter (ADC) is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the microcomputer itself.Output interfaces take a similar form, the obvious difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for a digital-to-analog converter (DAC). This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned (usually amplified) to a form suitable for operating an actuator.The signals used within microcomputer circuits are almost always too small to be connected directly to the “outside world” and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator.To solve real-world problems, a microcontroller must have more than just a CPU, a program, and a data memory. In addition, it must contain hardware allowing the CPU to access information from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. T hese hardware devices, called peripherals, are the CPU’s window t o the outside.The most basic form of peripheral available on microcontrollers is the general purpose I70 port. Each of the I/O pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions.Some type of serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously.Its applicationsSCM is widely used in instruments and meters, household appliances, medical equipment, aerospace, specialized equipment, intelligent management and process control fields, roughly divided into the following several areas:SCM has a small size, low power consumption, controlling function, expansion flexibility, the advantages of miniaturization and ease of use, widely used instrument, combining different types of sensors can be realized, such as voltage, power, frequency, humidity, temperature, flow, speed, thickness, angle, length, hardness, elemental, physical pressure measurement. SCM makes use of digital instruments, intelligence, miniaturization, and functionality than the use of more powerful electronic or digital circuits. Such as precision measuring equipment (power meter, oscilloscope, various analytical instrument).译文:51单片机简介单片机的基本组成是由中央处理器(即CPU中的运算器和控制器)、只读存贮器(通常表示为ROM)、读写存贮器(又称随机存贮器通常表示为RAM)、输入/输出口(又分为并行口和串行口,表示为I/O口)等等组成。

AT89C51的外文文献及翻译

AT89C51的外文文献及翻译
Pin Description
VCC:Supply voltage.
GND:Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internalpullups.ThePort1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can Байду номын сангаасe used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.

单片机外文翻译----AT89C51单片机控制的恒温水域温控系统

单片机外文翻译----AT89C51单片机控制的恒温水域温控系统

中文2528字AT89C51 single-chip temperature-controlled watertemperature control systemEarly contact thermometers for chemical water temperature thermostat shortcomings, this paper introduces an approach based on AT89C51 single-chip microcomputer-based controller, combined with integrated temperature sensor AD590J composed of constant temperature water temperature control system.Chemical, chemical experiments and research on water temperature requirements of high performance and accuracy, the current market face chemistry, chemical experiments and study the high price of heated water systems. In this paper, the design of single-chip component AT89C51 from the temperature control system for people with low-cost, high precision, intelligent control, etc.The water temperature of the performance indicators are: Temperature range: 0 ~ 1O0 ℃; temperature range: 0 ~ 99.9 ℃; temperature: 0.4 ℃; heating power: 1000W.Part of the hardware circuitAT89C51 selected as the system CPU, it is a low-power, high performance, 4kB flash chip programmable / erasable read-only memory 8-bit microcontroller COMS.Block diagram of the system AT89C51 single-chip by chip, IO expansion port 8255 chip, 8032 chip digital-to-analog conversion, analog-to-digital conversion chip 0809, keyboard control, status indication circuit, sampling circuit temperature thermostat control circuit, driver circuit and display circuit, such as group into.1.1 temperature sampling circuitTemperature sampling circuit using AD590 current-mode temperature-sensitive device of its stability and linearity are better. When in AD590 for the current 273.2uA, temperature increase 1℃, the current increase in 1uA. The current is converted to voltage signal by analog-to-digital converter ADC0809, AT89C51 single-chip temperature monitoring and conversion. One resistor R measurement using a low temperature coefficient of resistance, temperature coefficient of 10 x l0_6 / ℃. When monitoring the temperature of lO0 ℃when generated in the resistor voltage 18.66V about, when the temperature is 0 ℃when generated in the resistance of about 13.66V voltage, that is, at a temperature of 0 ~ 1O0 ℃in resistance on pressure drop resulting from bad to 5v. However, when the temperature is 0 ℃demodulation IC2 potential output allows for OV, the time when 1O0 ℃for IC2 output 5v, in the constant temperature water tank 3 installed AD590, which are located under the sink in the various parts, using its monitoring of temperature changes in the market tank in order to control the stirring motor to ensure uniform temperature sink.1.2 thermostat control circuitConstant temperature control circuit from heating thermostat temperature setting and the composition of the two parts of the circuit. The thermostat circuit settings temperature to provide the working conditions of the heating circuit, the circuit set by the keyboard combination of software programming to achieve common. In addition to each button and set the IO port connected to 8255, but also through a door with the AT89C51 and T0 timer connected so that when the button is depressed immediately after the interruption to the application AT89C51, 8255 inquiry, and at the same time the functions of the corresponding control . One set is the key type from the set and the AT89C51, D / A converter analog voltage measurement is the AD590, after the detection signal AT89C51, D / A converter provides analog, IC3 constitute a comparison amplifier, IC4 ratio amplifier , BG1, BG2, T constitutes a thyristor conduction angle control circuit, a single bipolar transistor oscillator circuit the lower the frequency, SCR's on-the shorter the time the smaller the heating power, on the contrary higher. Single-junction transistors and the oscillation frequency by the ratio of amplifier output voltage control, AT89C51 single-chip temperature settings through the sample and the temperature difference after the value, after amplification by comparison with the temperature change to mediate voltage thyristor the conduction angle in order to achieve the adjustment of heating power to meet the temperature requirements of the waters of the thermostat.1.3 Drive CircuitWhen the 8255 high output corresponding IO port, the drive transistor turn-on 9013, so that the relay action, in order to drive the work of the relevant circuit. Significant choice for a show so that the display to choose between the "settings" and "measurement".1.4 Keyboard control and status indication circuitWith the 8255 connected to the IO port 8 and 9 LED button to complete thecommon waters of the control thermostat and the instructions state. In addition to each button with the 8255 connected to the IO port, but also with AT89C51 it connected the timer so that when the button is depressed immediately after the interruption of AT89C51 applications, and query the status of 8255 in order to carry out the functions of the corresponding control. 1.5 shows the circuit Display circuit using a half the number of table 4 show the temperature head waters of the measurement of temperature and set temperature.2 Software designSkeleton of the software, contains initialization, configuration subroutine, subroutines to deal with temperature, showing subroutine. Completion of system initialization after power-on reset 8255 and software initialization and pre-heated water for the water to wait for work, and open the inlet solenoid valve, when the corresponding button press interrupted when AT89C51, read 8255 the status of the population to determine the function keys in order to call the corresponding subroutine. Subroutine completed one set of the set temperature function. Initialization settings for the "0o.0o", when the choice set and to identify key addition and subtraction operations for each click on the Settings button software settings for the corresponding temperature of the addition and subtraction operation count, and the value storage and display. Subroutine to deal with the role of temperature is the temperature set values and the difference to the SCR trigger circuit heating thermostat control.2.1 The use of Pro / E to establish mold standard parts library FamilyPro/E is part of the family table (or assembly, or the characteristics of) a collection of these parts (or assembly or characteristics) are broadly similar, but in 12 some small differences, for example, fastening screws Hexagon many kinds of specifications, but they seem to be like and to implement the same function, so in the Pro / E in them as a part family is a very useful table in the family the same as a table-driven components parts to be identified. In Pro / E use group table has the following advantages:1) simple and compact to create and store a large number of objects.2) For the generation of standard parts to save a great deal of time and work.3) parts from a series of documents to generate change, do not have to re-create and generate for each part.4) In the parts to create tiny changes in the relationship do not have to use to changethe model.Table feature allows three-dimensional mold standard parts library and standard library mold the development and use of things become very easy. The following guide to commonly used as an example to create a lead-chu-chu series of standard parts. First, Pro / E in the completion of the three-dimensional modeling guide column, and the need to change the size parameters defined as symbols. To mark the size of symbol table for the family members did not indicate the size of the features of a non-changing, dependent on the existence of other features.Family Table is essentially constituted by the rows and columns of the table to start, you can use the Pro / TABLE to create and modify. Here contains examples and their appropriate values, the use of specific projects were listed. Generic model is not in the group table of the project be included in each instance will be automatically generated in accordance with design intent, Family Table, regardless of the merits of another to create a new table or modify an existing table, you can add to the table project. The use of the above-mentioned methods. Enterprises can die design in accordance with the need to build their own three-dimensional mold standard parts library.2.2 The use of Pro / E to establish the standard mold base libraryIn the use of Pro / E to establish the mold standard parts library, in order to further improve the efficiency of die design, quality and standardization, it is necessary to consider the establishment of standard mold base library, the following discussion of how to use Pro / E to establish the standard mold base. The establishment of standard mold base the first thing to consider is the business of processing capacity punching equipment, punching equipment to the processing capacity as well as equipment based on the work table to consider the standard form of mold, practicality and versatility will be higher. In the three-dimensional mold standard parts library has been established under the premise of the establishment of standards mold-base much to the convenience and quick. First of all, to enter the Pro / ASSMBLY equipped) mode, with the establishment of similar communities standard parts, the specific path for the operation: ASSMBLY (components) -- Family Tab (Family Table add-item (additional items)) -- Component (component), and then choose to change to take place in the assembly of parts or components as the assembly of the project group table, and in the assembly do not need to change family (such as fasteners) you do not need to select. instances in the assembly of the assemblyaccording to the agreed relationship between the automatically generated . other aircraft such as the bending modulus, tensile modulus planes.Taking full account of this, pressing equipment and typical performance parameters under the premise of stamping parts, you can use the same solution to create a standard mold base.3 ConclusionAt present, some colleges and universities as a result of provincial funding in the strained devices, laboratory equipment, more backward, in chemistry and chemical engineering laboratories still use a contact thermometer to control water temperature. In order to overcome the factors that a lot of inconvenience to the original based on the old thermostat has been designed transformation of waters. Proved by the use of the design,to meet the current chemistry, chemical engineering and research needs of the experimental results.AT89C51单片机控制的恒温水域温控系统针对化工早期接点温度计恒温水域控温存在的缺点,本文介绍了一种基于AT89C51单片机为主控制器,结合AD590J集成温度传感器等组成的恒温水域温控系统。

单片机交通灯中英文对照外文翻译文献

单片机交通灯中英文对照外文翻译文献

中英文对照外文翻译原文DESIGN OF TRAFFIC LIGHT BASED ON MCUBecause of the rapid development of our economy resulting in the car number of large and medium-sized cities surged and the urban traffic, is facing serious test, leading to the traffic problem increasingly serious, its basically are behaved as follows: traffic accident frequency, to the human life safety enormous threat, Traffic congestion, resulting in serious travel time increases, energy consumption increase; Air pollution and noise pollution degree of deepening, etc. Daily traffic jams become people commonplace and had to endure. In this context, in combination with the actual situation of urban road traffic, develop truly suitable for our own characteristics of intelligent signal control system has become the main task.PrefaceIn practical application at home and abroad, according to the actual traffic signal control application inspection, planar independent intersection signal control basic using set cycle, much time set cycle, half induction, whole sensor etc in several ways. The former two control mode is completely based on planar intersection always traffic flow data of statistical investigation, due to traffic flow the existence of variable sex and randomicity, the two methods have traffic efficiency is low, the scheme, the defects of aging and half inductive and all the inductive the two methods are in the former two ways based on increased vehicle detector and according to the information provided to adjust cycle is long and green letter of vehicle, it than random arrived adaptability bigger, can make vehicles in the parking cord before as few parking, achieve traffic flowing effectIn modern industrial production,current,voltage,temperature, pressure, and flow rate, velocity, and switch quantity are common mainly controlled parameter. For example: in metallurgical industry, chemical production, power engineering, the papermaking industry, machinery and food processing and so on many domains, people need to transport the orderlycontrol. By single chip microcomputer to control of traffic, not only has the convenient control, configuration simple and flexible wait for an advantage, but also can greatly improve the technical index by control quantity, thus greatly improve product quality and quantity. Therefore, the monolithic integrated circuit to the traffic light control problem is an industrial production we often encounter problems.In the course of industrial production, there are many industries have lots of traffic equipment, in the current system, most of the traffic control signal is accomplished by relays, but relays response time is long, sensitivity low, long-term after use, fault opportunity increases greatly, and adopts single-chip microcomputer control, the accuracy of far greater than relays, short response time, software reliability, not because working time reduced its performance sake, compared with, this solution has the high feasibility.About AT89C511.function characteristics description:AT89C51 is a low power consumption, high performance CMOS8 bit micro-controller, has the 8K in system programmable Flash memory. Use high-density Atmel company the beltpassword nonvolatile storage technology and manufacturing, and industrial 80S51 product instructions and pin fully compatible. Chip Flash allow program memory in system programmable, also suitable for conventional programmer. In a single chip, have dexterous 8 bits CPU and in system programmable Flash, make AT89C51 for many embedded control application system provides the high flexible, super efficient solution. AT89C51 has the following standard function: 8k bytes Flash, 256 bytes RAM, 32-bit I/O mouth line, the watchdog timer, two data pointer, three 16 timer/counter, a 6 vector level 2 interrupt structure, full-duplex serial port, piece inside crystals timely clock circuit. In addition, AT89C51 can drop to 0Hz static logic operation, support two software can choose power saving mode. Idle mode, the CPU to stop working, allowing the RAM, timer/counter, serial ports, interruption continue to work. Power lost protection mode, RAM content being saved, has been frozen, microcontroller all work stop, until the next interruption or hardware reset so far. As shown in figure 1 for the AT89C51 pins allotment.Figure 1 the AT89C51 pins allotment2.interrupt introductionAT89C51 has six interrupt sources: two external interruption, (and), three timer interrupt (timer 0, 1, 2) and a serial interrupts. Each interrupt source can be passed buy bits or remove IE the relevant special register interrupt allow control bit respectively make effective or invalid interrupt source. IE also includes an interrupt allow total control bit EA, it can be a ban all interrupts. IE. Six is not available. For AT89C51, IE. 5 bits are also not be used. User software should not give these bits write 1. They AT89 series for new product reserved. Timer 2 can be TF2 and the T2CON registers EXF2 or logical triggered. Program into an interrupt service, the sign bit can be improved by hardware qing 0. In fact, the interrupt service routine must determine whether TF2 or EXF2 activation disruption, the sign bit must also by software qing 0. Timer 0 and 1 mark a timer TF0 and TF1 has been presented in the cycle count overflow S5P2 074 bits. Their value until the next cycle was circuit capture down. However, the timer 2 marks a TF2 in count overflow of the cycle of S2P2 074 bits, in the same cycle was circuit capture down3.external clock driving characteristicsTable 14.leisure and power lost pattern external pins stateTable 2About 8255 chip1.8255 features:(1)A parallel input/output LSI chips, efficacy of I/O devices, but as CPU bus and peripheral interface.(2)It has 24 programmable Settings of I/O mouth, even three groups of 8 bits I/O mouth to mouth, PB mouth and PA PC mouth. They are divided into two groups 12 I/O mouth, A group including port A and C mouth (high four, PC4 ~ PC7), including group B and C port B mouth (low four, PC0 ~ PC3). A group can be set to give basic I/O mouth, flash control (STROBE) I/O flash controlled, two-way I/O3 modes, Group B can only set to basic I/O or flash controlled the I/O, and these two modes of operation mode entirely by controlling registers control word decision.2. 8255 pins efficacy:(1). RESET: RESET input lines, when the input outside at high levels, all internal registers (including control registers) were removed, all I/O ports are denoting input methods.(2). CS: chip choose a standard lamp line 1, when the input pins for low levels, namely/CS = 0, said chip is selected, allow 8255 and CPU for communications, / CS = 1, 8255 cannot with CPU do data transmission.(3). RD: read a standard lamp line 1, when the input pins for low levels, namely/RD = 0 and/CS = 0, allow 8255 through the data bus to the CPU to send data or state information, namely the CPU 8255 read from the information or data.(4). The WR: write a standard lights, when the input pins for low levels, namely/WR = 0 and/CS = 0, allows the CPU will data or control word write 8255.(5). D7: three states D0 ~ two-way data bus, 8255 and CPU data transmission channel, when the CPU execution input/output instruction, through its realization 8 bits of data read/write operation, control characters and status information transmitted through the data bus.(6). PA0 ~ PA7: port A input and output lines, A 8 bits of data output latches/buffers, an 8 bits of data input latches.(7). PB0 ~ PB7: port B input and output lines, a 8 bits of I/O latches, an 8 bits of input and output buffer.(8). PC0 ~ PC7: port C input and output lines, a 8 bits of data output latches/buffers, an 8 bits of data input buffer. Port C can through the way of working setting into two four ports, every 4 digit port contains A 4 digit latches, respectively with the port A and port B cooperate to use, can be used as control standard lights output or state standard lights input ports.(9). A0, A1: address selection line, used to select the PA 8255 mouth, PB mouth, PC mouth and controlling registers.When A0=0, A1= 0, PA mouth be chosen;When A0=0, A1 = 1, PB mouth be chosen;When A0=0, A1 = 1, PC mouth be chosen;When A0=1, A1= 1, control register is selected.Concerning seven section LED display introductionThrough light emitting diode chip appropriate link (including series and parallel) andappropriate optical structure. May constitute a luminous display light-emitting segments or shine points. By these luminous segments or shine point can be composed digital tube, symbols tube, m word pipe, tube, multilevel matrix display tube etc. Usually the digital tube, symbols tube, m word tube were called stroke display, but the stroke displays and matrix tube collectively referred to as character displays.1. The LED display classification(1) by word high marks: stroke monitors word high least 1mm (monolithic integrated type more digital tube word high in commonly 2 ~ 3mm). Other types of stroke display tiptop1.27 mm (0.5 inch) even up to hundreds of mm.(2) color-coded score red, orange, yellow, green and several kinds.(3) according to the structure points, reflecting cover type, a single point-elastic and monolithic integrated type.(4) from the luminous section electrode connection mode of points of anode and cathode two kinds.2. LED display parametersDue to the LED display is LED based, so its light, and the electrical characteristics and ultimate meaning of the parameters with most of the same light emitting diode. But because the LED monitor containing multiple light emitting diode, it must has the following specific parameters:(1) the luminous intensity ratioDue to the digital tube paragraphs in the same driving voltage, each are not identical, so positive current each different. The luminous intensity All segments of the luminous intensity values the ratio of the maximum and minimum values for the luminous intensity ratio. The ratio between 2.3 in 1.5 ~, the maximum cannot exceed 2.5.(2) pulse positive currentIF each segment of typical strokes displays for positive dc working current IF, then the pulse, positive current can be far outweigh.someotherwordpeopledontthinkoffirst. Pulse 390v smaller, pulse positive current can be bigger.Traffic signal control typeThe purpose of the traffic signal control are three: first,in time and space space intersection traffic in different directions,control traffic operation order; Second, make onplanar cross the road network on the people and objects of transport at the highest efficiency, Third, as the road users to provide necessary information, and help them to effectively use the traffic facilities. Road traffic signal control of basic types have many points method.According to the control geometry characteristic is divided into: single intersection control - point control, the traffic trunk lines of coordinated control - wire, traffic network coordination control surface controlling; -- According to the control principle differentiates: timing control, induced control and adaptive control.About watch-dog circuitBy single-chip computers.the micro computer system, because of single chip work often can be affected by external electromagnetic interference, causing program run fly while into dead circulation, the program's normal operation be interrupted by single chip microcomputer control system was unable to work, can cause the whole system of come to a standstill, happen unpredictable consequences, so out of microcontroller running status real-time.according consideration, they generate a specially used for monitoring microcontroller program running state of the chip, commonly known as "watchdog" (watchdog).MAX692 was slightly system monitoring circuit chip, have back-up battery switching, power lost discriminant functions monitoring, the watchdog. The encapsulation and pin instructions as figure2shows.Figure 2 MAX692 encapsulation and pinsWatch-dog circuit application, make SCM can in no condition to achieve continuous work, its working principle is: the watchdog chip and MCU an I/O pins are linked together, the I/O pins through program control it regularly to the watchdog of the pins on into high level (or the low level), this program statement is scattered on SCM other control statements,once among single-chip due to the interference makes application run into a fly after the procedures section into dead circulation state, write the watchdog pins program cannot be executed, this time, the watch-dog circuit will be without microcontroller sent signals, then at it and MCU reset pin connected pin reset signal give out a a, make SCM reposition occurs, namely the program from program memory splittext started, so we realized the MCU automatic reset.Infrared detection circuitThe infrared radiation photon in semiconductor materials stimutes the non-equilibrium carriers (electronic or holes), cause electrical properties change. Because carrier does not escape in vitro, so called within the photoelectric effect. Quantum photoelectric effect high sensitivity, response speed heat detectors much faster, is optional detectors. In order to achieve the best performance, generally need worked in low temperature. Photoelectric detector can be divided into:(1) optical type: also called photoconductive resistance. The incident photon stimulate the valence band uniform semiconductor electronic across forbidden band into the conduction band and left in valence band, cause cavitation increases, for electric conductance eigen light conductivity. From the band gaps of impurity level also can stimulate light into the conduction band or born carriers valence band, and for impurities light conductivity. The cutoff wavelength by impurity ionization energy (ie) decision. Quantum efficiencies below eigen optical and require lower working temperature.(2) photovoltaic type: mainly p - n knot of light born volts effect. Energy more than the width of infrared photonic band gaps in "area and its nearby of electrons cavitation. Existing "electric field make hole into p area, electronic into n area, two parts appear potentials. Deoxidization device have voltage or current signal. Compared with optical detectors, pv detector detect rate more than forty percent of figure limit, Don't require additional bias electric field and load resistance, no power consumption, having a high impedance. These characteristics of preparation and use of the focal plane array bring great benefits.(3) light emitting - Schottky potential barrier detector: metal and semiconductor contact, typically include PtSi/Si structure and form was Schott potential barrier, infrared photon through Si layer for PtSi absorption, electronic Fermi level, obtain energy leap over left cavitation potential barrier into the Si substrate, PtSi layer of electronic was collected,complete infrared detection. Make full use of Si integration technology, facilitate production, with lower cost and good uniformity wait for an advantage, but make it mass (1024 x 1024 even greater) focal plane array to make up for the defect of quantum low efficiency. Have strict low temperature requirements. With this kind of detector, both at home and abroad has already produced as qualitative good thermography. Pt Si/Si structure made of FPA is the earliest IRFPA.Timing counting and traffic calculationUsing MCS - 51 internal timer/counter for timing, cooperate software delay realizes the timer. This method hardware cost saving, cut allows the reader in timer/counter use, disruptions and programming get exercise and improve. Computation formula is as follows: TC = M - CType in, M for counter touch value, the value and the counter working way concerned.For a traffic intersection, it can in the shortest possible time to achieve maximum traffic, even reached the best performance, we call in unit of time to achieve the maximum flow multi-energy for cars.Use the equation: (traffic = traffic/time) to represent.译文:基于单片机的交通灯设计我国经济快速发展,汽车数量猛增,大中型城市的城市交通正面临着严峻的考验,交通问题日益严重,其主要表现如下:交通事故频发,对人类生命安全造成极大威胁;交通拥堵严重,导致出行时间增加,能源消耗加大;空气污染和噪声污染程度日益加深等。

AT89C51单片机简介

AT89C51单片机简介

AT89C51单片机简介AT89C51是一种带4K字节闪烁可编程可擦除只读存储器(FPEROM—FalshProgrammableandErasableReadOnlyMemory)的低电压,高性能CMOS8位微处理器,俗称单片机。

AT89C2051是一种带2K字节闪烁可编程可擦除只读存储器的单片机。

单片机的可擦除只读存储器可以反复擦除100次。

该器件采用ATMEL高密度非易失存储器制造技术制造,与工业标准的MCS-51指令集和输出管脚相兼容。

由于将多功能8位CPU和闪烁存储器组合在单个芯片中,ATMEL·5个中断源·可编程串行通道·低功耗的闲置和掉电模式·片内振荡器和时钟电路2.管脚说明:VCC:供电电压。

GND:接地。

P0口:P0口为一个8位漏级开路双向I/O口,每脚可吸收8TTL门电流。

当P1口的管脚第一次写1时,被定义为高阻输入。

P0能够用于外部程序数据存储器,它可以被定义为数据/地址的第八位。

在FIASH编程时,P0口作为原码输入口,当FIASH进行校验时,P0输出原码,此时P0P1门电流。

P1P2门电流,当口的16位口在P3P3口写入P3P3.0RXD(串行输入口)P3.1TXD(串行输出口)P3.2/INT0(外部中断0)P3.3/INT1(外部中断1)P3.4T0(记时器0外部输入)P3.5T1(记时器1外部输入)P3.6/WR(外部数据存储器写选通)P3.7/RD(外部数据存储器读选通)P3口同时为闪烁编程和编程校验接收一些控制信号。

FLASH0。

此时,/PSENXTAL1和XTAL2分别为反向放大器的输入和输出。

该反向放大器可以配置为片内振荡器。

石晶振荡和陶瓷振荡均可采用。

如采用外部时钟源驱动器件,XTAL2应不接。

有余输入至内部时钟信号要通过一个二分频触发器,因此对外部时钟信号的脉宽无任何要求,但必须保证脉冲的高低电平要求的宽度。

4.芯片擦除:整个PEROM阵列和三个锁定位的电擦除可通过正确的控制信号组合,并保持ALE管脚处于低电平10ms来完成。

AT89C51单片机英文文献附带翻译

AT89C51单片机英文文献附带翻译

AT89C51的概况一 AT89C51应用单片机广泛应用于商业:诸如调制解调器,电动机控制系统,空调控制系统,汽车发动机和其他一些领域。

这些单片机的高速处理速度和增强型外围设备集合使得它们适合于这种高速事件应用场合。

然而,这些关键应用领域也要求这些单片机高度可靠。

健壮的测试环境和用于验证这些无论在元部件层次还是系统级别的单片机的合适的工具环境保证了高可靠性和低市场风险。

Intel 平台工程部门开发了一种面向对象的用于验证它的AT89C51 汽车单片机多线性测试环境。

这种环境的目标不仅是为AT89C51 汽车单片机提供一种健壮测试环境,而且开发一种能够容易扩展并重复用来验证其他几种将来的单片机。

开发的这种环境连接了AT89C51。

本文讨论了这种测试环境的设计和原理,它的和各种硬件、软件环境部件的交互性,以及如何使用AT89C51。

1.1 介绍8 位AT89C51 CHMOS 工艺单片机被设计用于处理高速计算和快速输入/输出。

MCS51 单片机典型的应用是高速事件控制系统。

商业应用包括调制解调器,电动机控制系统,打印机,影印机,空调控制系统,磁盘驱动器和医疗设备。

汽车工业把MCS51 单片机用于发动机控制系统,悬挂系统和反锁制动系统。

AT89C51 尤其很好适用于得益于它的处理速度和增强型片上外围功能集,诸如:汽车动力控制,车辆动态悬挂,反锁制动和稳定性控制应用。

由于这些决定性应用,市场需要一种可靠的具有低干扰潜伏响应的费用-效能控制器,服务大量时间和事件驱动的在实时应用需要的集成外围的能力,具有在单一程序包中高出平均处理功率的中央处理器。

拥有操作不可预测的设备的经济和法律风险是很高的。

一旦进入市场,尤其任务决定性应用诸如自动驾驶仪或反锁制动系统,错误将是财力上所禁止的。

重新设计的费用可以高达500K 美元,如果产品族享有同样内核或外围设计缺陷的话,费用会更高。

另外,部件的替代品领域是极其昂贵的,因为设备要用来把模块典型地焊接成一个总体的价值比各个部件高几倍。

单片机AT89C51

单片机AT89C51

AT89C51是一种带4K字节闪烁可编程可擦除只读存储器(FPEROM—Falsh Programmable and Erasable Read Only Memory)的低电压,高性能CMOS8位微处理器,俗称单片机。

该器件采用ATMEL高密度非易失存储器制造技术制造,与工业标准的MCS-51指令集和输出管脚相兼容。

由于将多功能8位CPU和闪烁存储器组合在单个芯片中,ATMEL的AT89C51是一种高效微控制器,为很多嵌入式控制系统提供了一种灵活性高且价廉的方案。

1.主要特性:·8031 CPU与MCS-51 兼容· 4K字节可编程FLASH存储器(寿命:1000写/擦循环)· 全静态工作:0Hz-24KHz· 三级程序存储器保密锁定· 128*8位内部RAM· 32条可编程I/O线· 两个16位定时器/计数器·6个中断源· 可编程串行通道· 低功耗的闲置和掉电模式· 片内振荡器和时钟电路2.管脚说明:VCC:供电电压。

GND:接地。

P0口:P0口为一个8位漏级开路双向I/O口,每脚可吸收8TTL门电流。

当P1口的管脚第一次写1时,被定义为高阻输入。

P0能够用于外部程序数据存储器,它可以被定义为数据/地址的第八位。

在FIASH 编程时,P0 口作为原码输入口,当FIASH进行校验时,P0输出原码,此时P0外部必须被拉高。

P1口:P1口是一个内部提供上拉电阻的8位双向I/O口,P1口缓冲器能接收输出4TTL门电流。

P1口管脚写入1后,被内部上拉为高,可用作输入,P1口被外部下拉为低电平时,将输出电流,这是由于内部上拉的缘故。

在FLASH编程和校验时,P1口作为第八位地址接收。

P2口:P2口为一个内部上拉电阻的8位双向I/O口,P2口缓冲器可接收,输出4个TTL门电流,当P2口被写“1”时,其管脚被内部上拉电阻拉高,且作为输入。

最新AT89C51单片机毕业论文外文翻译

最新AT89C51单片机毕业论文外文翻译

拉高并可作为输入端口。 作输入端时,被外部拉低的 P3口将用上拉电阻输出电流。
P3口除了作为一般的 I/O 口线外,更重要的用途是它的第二功能。如表
端口引脚 P3.0 P3.1
表 1 P3口的第二功能
第二功能 RXD (串行输入口) TXD (串行输出口)
1所示。
P3.2
0 (外中断 0)
P3.3
P3.4 P3.5 P3.6
要求外妆上拉电阻。

P1口:P1口是一个带内部上拉电阻的 8位双向 I/O 口,P1口的输出缓冲级可驱动 (吸 收或输出电流) 4个TTL 逻辑门电路。对端口写 ―1,‖通过内部的上拉电阻把端口
拉到高电平,此时可作输入口,作输入口使用时,因为内部存在上拉电阻,某个 引脚被外部信号拉低时会输出一个电流。 Flash编程和程序校验期间, P1接收低 8
建议选择 40pF±10pF。
用户也可采用外部时钟 .采用外部时钟的电路如图 5所示。这种情况下,外部时钟
脉冲接到 XTAL1 端,即内部时钟发生器的输入端, XTAL2 则悬空。
由于外部时钟信号是通过一个 2分频触发器后作为内部时钟信号的,所以对
外部时钟信号的占空比没有特殊的要求, 但最小高电平持续时间和最大的低电平
1 (外中断 1)
T0(定时 /计数器 0) T1(定时 /计数器 1)
WR (外部数据存储器写选能)
P3.7
RD (外部数据存储器读选能)
P3口还接收一些用于 Flash闪速存储器编程和程序校验的控制信号
RST :复位输入。当振荡器工作时, RST引脚出现两个机器周期以上高电平将使 单片机复位。 ALE/PROG :当访问外部程序存储器或数据存储器时, ALE (地址锁存允许) 输出脉冲用于锁存地址的低 8位字节。即使不访问外部存储器, ALE 仍以时钟振 荡频率的 1/16输出固定的正脉冲信号,因此它可对输出时钟或用于定时目的。要 注意的是:每当访问外部数据存储器时将跳过一个 ALE 脉冲。 PSEN:程序储存允许输出是外部程序存储器的读选通信号,当 AT89C51 由外部 程序存储器取指令(或数据)时,每个机器周期两次 PSEN有效,即输出两个脉 冲。在此期间,当访问外部数据存储器,这两次有效的 PSEN信号不出现。 EA/VPP :外部访问允许。欲使 CPU仅访问外部程序存储器( 0000H—FFFFH), EA 端必须保持低电平(接地)。需注意的是:如果加密位 LB1 被编程,复位时 内部会锁存 EA 端状态。如 EA 端为高电平(接 V CC端), CPU则执行内部程序存 储器中的指令。 Flash存储器编程时, 该引脚加上 +12V的编程允许电源 V PP,当然这必须是该器件 是使用 12V编程电压 VPP。 XTAL1 :振荡器反相放大器及内部时钟发生器的输入端。 XTAL2 :振荡器反相放大器的输出端 时钟振荡器

单片机简介_AT89C51中文资料

单片机简介_AT89C51中文资料

单片机简介_AT89C51中文资料单片机是嵌入式系统中重要的组成部分,它是一种具有特定功能并带有输入输出端口的微型计算机系统。

单片机的内部集成了CPU、RAM、ROM、I/O接口等部件,具有小体积、低功耗和高集成度等优点,被广泛应用于各种工业控制、家具控制以及电子仪表等领域。

AT89C51是一种常见的单片机,下面将对它进行详细介绍。

一、AT89C51的基本介绍AT89C51是一款由Atmel公司生产的8位单片机,它采用CMOS技术制造,具有16KB FLASH程序存储器和512B RAM数据存储器。

该单片机支持包括ISP(In-System-Programming)、IAP(In-Application-Programming)、DebugWire在内的多种编程方式,可用于各种应用领域,如汽车电子、家用电器、计算机外围设备、物流跟踪等。

AT89C51的主要特征:1、8位8051微控制器架构;2、具有16KB程序存储器和512B数据存储器;3、支持ISP、IAP和DebugWire等多种编程方式;4、支持12MHz内部晶体振荡器和外接振荡器,外接时钟频率为0~24MHz;5、支持一般I/O和特殊功能I/O,如双重中断、三重定时器等;6、可升级固件程序。

AT89C51共有40个引脚,分别是VCC、GND、P0.0~P0.7、P1.0~P1.7、P2.0~P2.7、P3.0~P3.7、RST、ALE、EA、PSEN、XTAL1、XTAL2,其中VCC是芯片的正电源,GND是芯片的负电源。

1、ISP编程方式:ISP编程即在芯片内部直接进行编程,无需将芯片取出进行编程。

这种编程方式需要使用ISP编程器和软件,将芯片与编程器连接后,在电脑上设置好所需的程序,即可进行编程。

2、IAP编程方式:IAP编程即在芯片内部进行程序更新、修改等操作,无需替换整个芯片。

该编程方式适用于已经安装在板子上的芯片,如果需要更新程序,直接通过串口通信上传新程序即可,无需拆卸芯片。

AT89C51单片机性能介绍

AT89C51单片机性能介绍

AT89C51是一种带4K字节闪烁可编程可擦除只读存储器(FPEROM—Falsh Programmable and Erasable Read Only Memory)的低电压,高性能CMOS8位微处理器,俗称单片机。

该器件采用ATMEL高密度非易失存储器制造技术制造,与工业标准的MCS-51指令集和输出管脚相兼容。

由于将多功能8位CPU和闪烁存储器组合在单个芯片中,ATMEL的AT89C51是一种高效微控制器,为很多嵌入式控制系统提供了一种灵活性高且价廉的方案。

1.主要特性:·与MCS-51 兼容·4K字节可编程闪烁存储器寿命:1000写/擦循环数据保留时间:10年·全静态工作:0Hz-24Hz·三级程序存储器锁定·128*8位内部RAM·32可编程I/O线·两个16位定时器/计数器·5个中断源·可编程串行通道·低功耗的闲置和掉电模式·片内振荡器和时钟电路2.管脚说明:VCC:供电电压。

GND:接地。

P0口:P0口为一个8位漏级开路双向I/O口,每脚可吸收8TTL门电流。

当P1口的管脚第一次写1时,被定义为高阻输入。

P0能够用于外部程序数据存储器,它可以被定义为数据/地址的第八位。

在FIASH编程时,P0 口作为原码输入口,当FIASH进行校验时,P0输出原码,此时P0外部必须被拉高。

P1口:P1口是一个内部提供上拉电阻的8位双向I/O口,P1口缓冲器能接收输出4TTL门电流。

P1口管脚写入1后,被内部上拉为高,可用作输入,P1口被外部下拉为低电平时,将输出电流,这是由于内部上拉的缘故。

在FLASH编程和校验时,P1口作为第八位地址接收。

P2口:P2口为一个内部上拉电阻的8位双向I/O口,P2口缓冲器可接收,输出4个TTL门电流,当P2口被写“1”时,其管脚被内部上拉电阻拉高,且作为输入。

基于单片机的智能小车外文文献翻译

基于单片机的智能小车外文文献翻译

毕业设计(论文)外文文献翻译系部机电工程系专业车辆工程学生姓名学号指导教师职称讲师2013年2 月Electric intelligent car based on SCMThrough research and to realize a photoelectric sensor for sensitive components ,with AT89C51 as control core electric tracing of intelligent control carbonylation-the car ,the system is also including dc motor ,L9110 chips and LM324 comparator etc. The design USES AT89C51 as intelligent car core controller.The system takes microcontroller as control core and realization of electric before Enter ,back ,turn left and right turn function .Through the Angle sensor detection the seesaw Angle change ,use incremental pl algorithm to control the electric car for balance ,and using photoelectric sensor detection black line ,make the electricity Actuation vehicle in the course of driving keep linear motion and don’t skip from atrium .1. Project DesignLight buy a sensor ,the reality of the electric car is moving quickly degrees ,bit ,buy, transportation line shape when measured quantity of real condition ,and will be measured quantity number according to preach sent to monolithic machine into line processing, but buy single chip machine according to the measured buy root different forms of several inspection according to real now to electric actuation vehicle wisdom can control system .This kind of square case real now to electric actuation vehicle dynamic shape state into the shipment do real possession in system ,control system spirit alive ,can depend ,pure degree is high ,can full foot of each item of the stockings to bed .(1)straight epidemiological speed is tasseled straight epidemiological speed department with pulse width modulation experience .meanwhile gather speed is experience .meanwhile ,its main electrical pulse width modulation by road system type variable change device ,Jane says PWM variable change device .Adjustable speed by in the department of PWM experience .Meanwhile open shut frequency rate is high ,only on electricity barnado electricity sense of filter wave can be use to get to move very small straight pulse electric flow ,electricity flow barnado electric capacity easily even tantras, department of low speed operation flat experience .meanwhile ,adjustable speed stability van is surrounded relatively wide ,can reach 1000 left light .By on electrical flow wave shape than V-M system .be in phase with flat to all electrical flow dynamic machine ,electric heat consumption and hair loss than a small .with the sample buy in open shut frequency rate is high ,and if a fast speed electrical machine ring should match close ,fasten tasseled phase can be to get very wide frequency band ,because of the fast speed ring should be good ,dynamic configuration sexual can perturbation resistance can force is powerful .According to the root ,with more than ensemble close and this set of electrical machine control project by tolerance of the quantity and electrical machine speed straight flow of hair ,the exhibitor to adopt the project with a single extremely H type can be changed into change device inverse PWM line speed .1.1 photoelectric detection module designThe intelligent car was stuck on the black line running on white paper “road”, so this module design need to detect shop on the black rubber belt drive area , including Run straight along the arc district and driving district two area .Because f the black and white paper to light reflection coefficient is different ,can according to receive reflected light .The strength of the judge “road”-the black line .this paper USES is simple and practical detection methods, namely the infrared detection method.Infrared detection method ,I use infrared ray in different colors of physical surface with different reflection properties characteristics .In the car driving process Continually to the ground to launch the infrared ,when the infrared met white ground occurs when the reflected light ,aimless and launch packed on the car of receiving tube receiving ; if Fruit is met black line is absorbed ,and than the infrared cars receiving tube receiving less than signal .1.2 signal comparative module designThis part design USES a LM324 comparator ,of sensor signal voltage received compare and amplified ,and will compare the results after Feed to the microcontroller ,used to detect sensor sensitivity ,diagram shown in figure 5 shows .When two sensors simultaneously detect light ,straight forward .When the sensor can’t detect light ,in cut-off state ,double LM324 operational amplifier output low level to microcontroller ,by program processing ,If left not detected light ,then left correct direction; If the right has not been detected light ,then turn correct direction .1.3 motor control and driving module designBecause use is double drive cars ,this part of the circuit must be able to output of two different voltage values ,respectively to controlling trolley right and left two motor drive ,the two of the wheel speed and direction of the same or different ,thus to control its advance and turning .In system design process ,use two L9110 chips to connect SCM and dc motor respectively .L9110 is for control and drive motor design two channels push-pull power amplifier application-specific integrated circuit device ,discrete circuits in monolithic IC integrated such that the peripheral equipments in lower cost and the whole machine can carry on sexual high .The core slice two a TTL/CMOS and let electricity flat lose into ,have good anti-jamming ,two output terminal can pick flooding dynamic electric machine straight to the shipment of positive reverse move and it has had a big electricity flow flooding dynamic can force ,each call way can pass over 800mA continuous current ,peak current capacity of 1.5 ~OA ; At the same time it has lower output saturation pressure drop and the static electricity ,The built-in clamp a diode can release the perceptual load of reverse current impulse ,making it the drive relays ,dc motors ,stepping motor or switch power tube the useof safe and reliable .Follow tracing car system to common AT89C51, complementarywith relatively simple components and circuit design ,the smooth completion of follow under the premise of tracing function ,and fully considered appearance ,costs ,so most of the circuit car by manual welding is complete .In the design ,we never in a circuit increase redundant functions ,but retained various hardware interface and software subroutines interface to facilitate the expansion and development after.2. System hardware design2.1 motor driver module designIn making intelligent car, right wheel respectively with two speed and Torque basic identical dc motor driven deceleration. bolt-on trunk-lid spoiler Department to install a direction wheel, then through the I/O mouth to control tow dc slowing down Motor speed and steering can be achieved on the car to the left, turn right and straight line.Motor drive using a integrated electrical machine flooding dynamic core slice L 298 N. L298N is ST the production of the company, the internal containing four channel logical drive circuit, it is a kind of tow phase four phase motor drive, namely the special contains tow H bridge of high voltage large current commander bridge type drive,acceptance criteria TTL logic level signals, be driven 46V, 2A below the motor.2.2 tracing module designTracing module mainly composed by photoelectric sensor reflex, Photoconductive resistance of the resistance of the light with the surrounding environment changes, when the LTT white lines above, light emission strongly; The LTT black line above, light emission are relatively weak. So when photoconductive resistance in white line and black line above the elements will occur significantly changes, the resistance changes value after comparator can output high level. But this way environmental influences big, work is not stable. This article actual use is RPP220 type reflex sensors made tracing module.RPR220 is an integration of reflective photoelectric detector, transmitter is a gas infrared light emitting diode and the receiver is a high sensitivity silicon photoelectric triode flat. When the light emitting diode reflected back, triode conduction and output low level2.3 obstacle avoidance module designObstacle avoidance module mainly composed by infrared reflection sensor. Infrared reflection sensor by one infrared tubes and photoelectric diode constitute, infrared tubes out to meet the infrared object reflective sex strong after be turned back, by photoelectric diode receiving, causephotoelectric diode current increases, light born this change into voltage signal, it could be processor receives and processing.2.4 remote control module designThis module will launch end USES high sensitive HL-5000 type universal television remote control, the receiver using receive frequency for 38kH receiving head 1838, this module and the single chip computer interface is very convenient. In addition, for the red outside meet after harvest of plait code letter number the department tasseled set when shipped with project of AT89C52 single chip microcomputer external interruption. In order to recognize a complete key signal, must for each coding pulse width were measured with discriminate receives the pulse is o still 1. the microcontroller timer/counter to measuring pulse width. Timer/counter except points than can be set, from except 2 to except 2048, measurable pulse width can reach 500m/s. This paper set except point for 12, namely than 12 points frequency, because the external clock is about 12MH, clock cycle for 1s, so the timer/counter for 1 per timing once s.2.5 alarm module designAlarm module core chip 110 IC, can choose application in automobile, motorcycle, alarms, personal riot device, door magnetic alarm device and etc.3. System software designThis system software modular structure, he main program, initial anti-fuzzy procedures, interrupt subroutines, delay subroutines, buttons pronunciation subroutines, buttons scanning subroutines constitutes.3.1 tracing subroutines designTracing module is designed by the left right photoelectric sensor output terminal receiving monolithic respectively, p22 and p23 tube feet, then through the microcontroller programming, produce PWM control signal. Through L 298 control motor speed, let the car to move forward, left turn, turn right and stop driving purpose.3.2 avoid barrier of programmingObstacle avoidance module is designed by the infrared reflection sensor module around the output terminal receiving MCU respectively p20 and p21 tube feet, then through the microcontroller programming, produce PWM control signal, through L298 control motor speed, let the car to move forward, left turn, turn right and stop driving purpose.3.3 remote subroutines designRemote control module is designed by the infrared sensor 1838 an output terminal of the receiving MZUp32 tube feet, then use all-purpose remote control on the remote control, then letmicrocontroller decoding, produce PWM control signal, through L298 control motor speed, let the car move forward, left turn, turn right and stop driving purpose.4. Summar yAdopts singlechip, using photoelectric senor and infrared reflection senor was designed as a detection system, can realize automatic homing line to walk, automatic obstacle avoidance, alarm and remote control functions such as intelligent car. This design is the obvious advantage of simple circuit, reliability, low cost, and easy to function of further perfecting and expansion.From 基于单片机的智能小车通过研发实现了一种一光电传感器为敏感元件,以AT89C51单片机为控制核心的电机循迹小车的智能控,该系统还包括直流电机、L9110芯片和LM324比较器等。

AT89c51型单片机简述

AT89c51型单片机简述

AT89C51简介AT89C51是一种带4K字节FLASH存储器(FPEROM—Flash Programmable and Erasable Read Only Memory)的低电压、高性能CMOS 8位微处理器,俗称单片机。

AT89C2051是一种带2K字节闪存可编程可擦除只读存储器的单片机。

单片机的可擦除只读存储器可以反复擦除1000次。

该器件采用ATMEL高密度非易失存储器制造技术制造,与工业标准的MCS-51指令集和输出管脚相兼容。

由于将多功能8位CPU和闪烁存储器组合在单个芯片中,ATMEL的AT89C51是一种高效微控制器,AT89C2051是它的一种精简版本。

AT89C单片机为很多嵌入式控制系统提供了一种灵活性高且价廉的方案。

外形及引脚排列如图所示主要特性:·与MCS-51 兼容·4K字节可编程FLASH存储器·寿命:1000写/擦循环·数据保留时间:10年·全静态工作:0Hz-24MHz·三级程序存储器锁定·128×8位内部RAM·32可编程I/O线·两个16位定时器/计数器·5个中断源·可编程串行通道·低功耗的闲置和掉电模式·片内振荡器和时钟电路管脚说明:VCC:供电电压。

GND:接地。

P0口:P0口为一个8位漏级开路双向I/O口,每脚可吸收8TTL门电流。

当P0口的管脚第一次写1时,被定义为高阻输入。

P0能够用于外部程序数据存储器,它可以被定义为数据/地址的第八位。

在FIASH编程时,P0 口作为原码输入口,当FIASH进行校验时,P0输出原码,此时P0外部必须被拉高。

P1口:P1口是一个内部提供上拉电阻的8位双向I/O口,P1口缓冲器能接收输出4TTL门电流。

P1口管脚写入1后,被内部上拉为高,可用作输入,P1口被外部下拉为低电平时,将输出电流,这是由于内部上拉的缘故。

单片机AT89C51的概况毕业论文外文文献翻译及原文

单片机AT89C51的概况毕业论文外文文献翻译及原文

毕业设计(论文)外文文献翻译文献、资料中文题目:AT89C51的概况_____________文献、资料英文题目:The General Situation of AT89C51 文献、资料来源:__________________________文献、资料发表(出版)日期:____________________院(部):专业:_________________________________________班级:_________________________________________姓名:_________________________________________学号:_________________________________________指导教师:翻译日期:2017.02.14The General Situation of AT89C511 The application of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.1.1 IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, muchmore if the fix means 2 back annotating it across a product family that share the same coreand/or peripheral design flaw. In addition, field replacementsof components are extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitatesnot only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.1.2 The AT89C51 provides the following standard features:4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture, a full duple serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1.3 Pin DescriptionVCC: Supply voltage.GND: Grou nd.Port 0: Port 0 is an 8-bit ope n-drain bi-direct ional I/O port. As an output port, each pin can sink eight TTL in puts. Whe n 1s are writte n to port 0 pins, the pins can be used as high impeda nee in puts. Port 0 may also be con figured to be the multiplexed low order address/data bus duri ng accesses to exter nal program and data memory .In this mode P0 has internal pull ups. Port 0 also receives the code bytes duri ng Flash program ming, and outputs the code bytes during program verification. External pull ups are required during program verification.號前v LJTGH 1P 时EF 应卫酊ERfUhD TH 田 EtXIGk LTOFTT 1为確雜 寸+卜…—曲 OFT r 二貝 FCFT 2 DFliIFSI^:REWEK1T=JPORT 3LA*-:TlklNGAND •Hug AEGI5TEFFo?r iUtTCH E 心一略T AMD ■口 BJfFERPORT 3 □弥E 殆r r f T TP1.0』Pl 』Figure 1-2-1 Block DiagramPort 1: Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external program memory and during accessesto external data memory that uses 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accessesto external data memory that uses 8-bit addresses(MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull ups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:RST: Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG: Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN: Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twice each。

单片机 AT89C51的介绍[翻译]

单片机 AT89C51的介绍[翻译]

AT89C51的介绍描述AT89C51是一个低电压,高性能CMOS 8位单片机带有4K字节的可反复擦写的程序存储器(PENROM)。

这种器件采用ATMEL公司的高密度、不容易丢失存储技术生产,并且能够与MCS-51系列的单片机兼容。

片内含有8位中央处理器和闪烁存储单元,有较强的功能的AT89C51单片机能够被应用到控制领域中。

功能特性AT89C51提供以下的功能标准:4K字节闪烁存储器,128字节随机存取数据存储器,32个I/O口,2个16位定时/计数器,1个5向量两级中断结构,1个串行通信口,片内震荡器和时钟电路。

另外,AT89C51还可以进行0HZ的静态逻辑操作,并支持两种软件的节电模式。

闲散方式停止中央处理器的工作,能够允许随机存取数据存储器、定时/计数器、串行通信口及中断系统继续工作。

掉电方式保存随机存取数据存储器中的内容,但震荡器停止工作并禁止其它所有部件的工作直到下一个复位。

引脚描述VCC:电源电压GND:地P0口P0口是一组8位漏极开路双向I/O口,即地址/数据总线复用口。

作为输出口时,每一个管脚都能够驱动8个TTL电路。

当“1”被写入P0口时,每个管脚都能够作为高阻抗输入端。

P0口还能够在访问外部数据存储器或程序存储器时,转换地址和数据总线复用,并在这时激活内部的上拉电阻。

P0口在闪烁编程时,P0口接收指令,在程序校验时,输出指令,需要接电阻。

P1口P1口一个带内部上拉电阻的8位双向I/O口,P1的输出缓冲级可驱动4个TTL电路。

对端口写“1”,通过内部的电阻把端口拉到高电平,此时可作为输入口。

因为内部有电阻,某个引脚被外部信号拉低时输出一个电流。

闪烁编程时和程序校验时,P1口接收低8位地址。

P2口P2口是一个内部带有上拉电阻的8位双向I/O口,P2的输出缓冲级可驱动4个TTL电路。

对端口写“1”,通过内部的电阻把端口拉到高电平,此时,可作为输入口。

因为内部有电阻,某个引脚被外部信号拉低时会输出一个电流。

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附件2:外文原文(复印件)
Features
Compatible with MCS-51™ Products、4K Bytes of In-System Reprogrammable Flash Memory、Endurance: 1,000 Write/Erase Cycles、Fully Static Operation: 0 Hz to 24 MHz、Three-level Program Memory Lock、128 x 8-bit Internal RAM、
掉电模式:
在掉电模式下,振荡器停止工作,进入掉电模式的指令是最后一条被执行的指令,片内RAM和特殊功能寄存器的内容在终止掉电模式前被冻结。退出掉电模式的唯一方法是硬件复位,复位后将重新定义全部特殊功能寄存器但不改变RAM中的内容,在Vcc恢复到正常工作电平前,复位应无效,且必须保持一定时间以使振荡器重启动并稳定工作。
其二是通过硬件复位也可将空闲工作模式终止。需要注意的是,当由硬件复位来终止空闲工作模式时,CPU通常是从激活空闲模式那条指令的下一条指令开始继续执行程序的,要完成内部复位操作,硬件复位脉冲要保持两个机器周期(24个时钟周期)有效,在这种情况下,内部禁止CPU访问片内RAM,而允许访问其它端口。为了避免可能对端口产生意外写入,激活空闲模式的那条指令后一条指令不应是一条对端口或外部存储器的写入指令。
引脚功能说明
Vcc:电源电压
GND:地
P0口:P0口是一组8位漏极开路型双向I/O口,也即地址/数据总线复用口。作为输出口用时,每位能吸收电流的方式驱动8个TTL逻辑门电路,对端口写“1”可作为高阻抗输入端用。
P1口:P1是一个带内部上拉电阻的8位双向I/O口,P1的输出缓冲级可驱动(吸收或输出电流)4个TTL逻辑门电路。对端口写“1”,通过内部的上拉电阻把端口拉到高电平,此时可作输入口。作输入口使用时,因为内部存在上拉电阻,某个引脚被外部信号拉低时会输出一个电流(IIL)。
P2口:P2是一个带有内部上拉电阻的8位双向I/O口,P2的输出缓冲级可驱动(吸收或输出电流)4个TTL逻辑门电路。对端口写“1”,通过内部的上拉电阻把端口拉到高电平,此时可作输入口,作输入口使用时,因为内部存在上拉电阻,某个引脚被外部信号拉低时会输出一个电流(IIL)。
在访问外部程序存储器或16位地址的外部数据存储器(例如执行MOVX@DPTR指令)时,P2口送出高8位地址数据。在访问8位地址的外部数据存储器(如执行MOVX@RI指令)时,P2口线上的内容(也即特殊功能寄存器(SFR)区中R2寄存器的内容),在整个访问期间不改变。
空闲节电模式:
AT89C51有两种可用软件编程的省电模式,它们是空闲模式和掉电工作模式。这两种方式是控制专用寄存器PCON(即电源控制寄存器)中的PD(PCON.1)和IDL(PCON.0)位来实现的。PD是掉电模式,当PD=1时,激活掉电工作模式,单片机进入掉电工作状态。IDL是空闲等待方式,当IDL=1,激活空闲工作模式,单片机进入睡眠状态。如需同时进入两种工作模式,即PD和IDL同时为1,则先激活掉电模式。
数据查询:
AT89C51单片机用数据查询方式来检测一个写周期是否结束,在一个写周期中,如需读取最后写入的那个字节,则读出的数据的最高位(P0.7)是原来写入字节最高位的反码。写周期完成后,有效的数据就会出现在所有输出端上,此时,可进入下一个字节的写周期,写周期开始后,可在任意时刻进行数据查询。
Ready/Busy:字节编程的进度可通过RDY/BSY输出信号监测,编程期间,ALE变为高电平“H”后P3.4(RDY/BSY)端电平被拉低,表示正在编程状态(忙状态)。编程完成后,P3.4变为高电平表示准备就绪状态。
P3口:P3口是一组带有内部上拉电阻的8位双向I/O口。P3口输出缓冲级可驱动(吸收或输出电流)4个TTL逻辑门电路。对P3口写入“1”时,它们被内部上拉电阻拉高并可作为输入端口。作输入端时,被外部拉低的P3口将用上拉电阻输出电流(IIL)。
RST:复位输入。当振荡器工作时,RST引脚出现两个机器周期以上高电平将使单片机复位。
32 Programmable I/O Lines、Two 16-bit Timer/Counters、Six Interrupt Sources、
Programmable Serial Channel、Low-power Idle and Power-down Modes.
Description
The AT89C51 is a low-power,high-performance CMOS 8-bitmicrocosmputer with 4K bytes of Flash programmable and erasable read only memory(PEROM).The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with industry-standard MS-51instruction set and pinout. The on-chipFlash allows the program memory to be reprogrammed in-system or by a conventionalnonvolatile memory programmer. By combining a versatile 8-bit CPU with Flashon a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which providesa highly-flexible and cost-effective solution to many embedded control applications.
AT89C51提供以下标准功能:4K字节Flash闪速存储器,128字节内部RAM,32个I/O口线,两个16位定时/记数器,一个5向量两级中断结构,一个全双工串行通信口,片内振荡器及时钟电路。同时,AT89C51可降至0HZ的静态逻辑操作,并支持两种软件可选的节电工作模式。空闲方式停止CPU的工作,但允许RAM,定时/计数器,串行通信口及中断系统继续工作。掉电方式保存RAM中的内容,但振荡器停止工作并禁止其它所有部件工作直到下一个硬件复位。
附件1:外文资料翻译译文
AT89C51
AT89C51是美国ATMEL公司生产的低一个低电压,高性能CMOS 8位单片机,片内含4k bytes的可反复擦写的只读程序存储器(PEROM)和128 bytes的随机存取数据存储器(RAM),器件采用ATMEL公司的高密度、非易失性存储技术生产,兼容标准MCS-51指令系统,片内置通用8位(RAM)和Flash存储单元,功能强大AT89C51单片机可为您提供许多高性价比的应用场合,可灵活应用于各种控制领域。
程序校验:如果加密位LB1、LB2没有进行编程,则代码数据可通过地址和数据线读回原编写的数据,采用下图的电路,程序存储器的地址由P1和P2口的P2.0-P2.3输入,数据由P0口读出,P2.6、P2.7和P3.6、P3.7的控制信号见表6,PSEN保持低电平,ALE、EA和RST保持高电平。校验时,P0口须接上10k左右的上拉电阻。
主要功能特性:
与MCS—51产品指令系统完全兼容、4k字节可重擦写Flash闪速存储器、1000次擦写周期、全静态操作:0Hz—24MHz、三级加密程序存储器、128x8字节内部RAM、32个可编程I/O口线、2个16位定时/计数器、6个中断源、可编程串行UART通道、低功耗空闲和掉电模式。
功能特性概述:
程序存储器的加密:
AT89C51可使用对芯片上的3个加密位LB1、LB2、LB3进行编程(P)或不编程(U)来得到如下表所示的功能加密位保护功能表:
当加密位LB1被编程时,在复位期间,EA端的逻辑电平被采样并锁存,如果单片机上电后一直没有复位,则锁存为止。为使单片机能正常工作,被锁存的EA电平值必须与该引脚当前的逻辑电平一致。此外,加密位只能通过整片擦除的方法清除。
在空闲工作模式状态,CPU保持睡眠状态而所有片内的外设仍保持激活状态,这种方式由软件产生。此时,片内RAM和所有特殊功能寄存器的内容保持不变。空闲模式可由任何允许的中断请求或硬件复位终止。
终止空闲工作模式的方法有两种,其一是任何一条被允许中断的事件被激活,IDL(PCON.0)被硬件清除,即刻终止空闲工作模式。程序会首先响应中断,进入中断服务程序,执行完中断服务程序并紧随RETI(中断返回)指令后,下一条要执行的指令就是使单片机进入空闲模式那条指令后面的一条指令。
用户也可以采用外部时钟。采用外部时钟的电路如图5右图所示。这种情况下,外部时钟脉冲接到XTAL1端,即内部时钟发生器的输入端,XTAL2则悬空。
由于外部时钟信号是通过一个2分频触发器后作为内部时钟信号的,所以对外部时钟信号的占空比没有特殊要求,但最小高电平持续时间和最大的低电平持续时间应符合产品技术条件的要求。
ALE/PROG:当访问外部程序存储器或数据存储器时,ALE(地址锁存允许)输出脉冲用于锁存地址的低8位字节。即使不访问外部存储器,ALE仍以时钟振荡频率的l/6输出固定的正脉冲信号,因此它可对外输出时钟或用于定时目的。要注意的是:每当访问外部数据存储器时将跳过一个ALE脉冲。
PSEN:程序储存允许(PSEN)输出是外部程序存储器的读选通信号,当AT89C51由外部程序存储器取指令(或数据)时,每个机器周期两次PSEN有效,即输出两个脉冲。在此期间,当访问外部数据存储器,这两次有效的PSEN信号出现。
Pin Configurations
Block Diagram
The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture,a full duplex serial port, on-chip oscillator and clock circuitry.In addition, the AT89C51 is designed with static logicfor operation down to zero frequency and supports twosoftware selectable power saving modes. The Idle Modestops the CPU while allowing the RAM, timer/countersserial port and interrupt system to continue functioning. ThePower-down Mode saves the RAM contents but freezestheoscillator disabling all other chip functions until the next hardware reset
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