计算机系统结构 北大计算机系
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--可编程存贮系统的组成 数据类型 & 数据结构: 编码 & 表示
软件
-----
指令格式
指令 (或操作码) 集合 对数据项和指令进行寻址和访问的模式 意外情况 5
北京大学微处理器研究开发中心
北京大学计算机科学技术系
What is an “ISA”?
... the attributes of a system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls, the logic design, and the physical implementation. - Amdahl, Blaaw, and Brooks, 1964
•七十年代~八十年代:
计算机组织与系统结构课程
计算机算逻设计
计算机组织与系统结构课程
指令系统设计,
特别是针对编译的ISA设计
• 九十年代: 计算机组织与系统结构课程
CPU设计、存储系统、I/O系统、
多处理器、网络 等
•2005--:
北京大学计算机科学技术系
计算机组织与系统结构课程 CPU设计、存储系统、I/O系统、 多处理器、网络 、SoC 等 7 北京大学微处理器研究开发中心
Domain of recent computer architecture („90s)
Parallel computing, security, …
Reliability, power, …
Reinvigoration of computer architecture, mid-2000s onward.
RISC II (1983): 32-bit, 5 stage pipeline, 40,760 transistors, 3 MHz, 3 micron NMOS, 60 mm2 chip 125 mm2 chip, 0.065 micron CMOS = 2312 RISC II+FPU+Icache+Dcache
Patterson and Hennessy
机械工业出版社(影印本)
主讲教师:
程旭 教授 易江芳 博士 北京大学微处理器研究开发中心
助课教师:魏鹏、卢欣、余跃、王万红
时间地点:周一(双周)
北京大学计算机科学技术系
5\6 周三 5\6 二教109
2
北京大学微处理器研究开发中心
本讲进度安排
课程概述
课程特点和结构
北京大学计算机科学技术系
8
北京大学微处理器研究开发中心
Uniprocessor Performance
10000
From Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th edition, October, 2006
The End of the Uniprocessor Era
Βιβλιοθήκη Baidu
Single biggest change in the history of computing systems
北京大学计算机科学技术系
10
北京大学微处理器研究开发中心
Old Conventional Wisdom: Power is free, Transistors expensive New Conventional Wisdom: “Power wall” Power expensive, Transistors free (Can put more on chip than can afford to turn on) Old CW: Sufficient increasing Instruction-Level Parallelism via compilers, innovation (pipelining, superscalar, out-of-order, speculation, VLIW, …) New CW: “ILP wall” law of diminishing returns on more HW for ILP Old CW: Multiplies are slow, Memory access is fast New CW: “Memory wall” Memory slow, multiplies fast (200 clock cycles to DRAM memory, 4 clocks for multiply) Old CW: Uniprocessor performance 2X / 1.5 yrs New CW: Power Wall + ILP Wall + Memory Wall = Brick Wall Uniprocessor performance now 2X / 5(?) yrs Sea change in chip design: multiple “cores” (2X processors per chip / ~ 2 years) More, simpler processors are more power efficient
计算机组织与系统结构
课程介绍
(第一讲)
程旭 易江芳
2011年9月7日
北京大学计算机科学技术系
1
北京大学微处理器研究开发中心
主要教材:
Computer Organization and Design: The Hardware/Software Interface,
3rd Edition 2005 or 4th Edition 2010
What is Computer Architecture?
Application
Gap too large to bridge in one step
Physics
In its broadest definition, computer architecture is the design of the abstraction layers that allow us to implement information processing applications efficiently using available manufacturing technologies.
Need a reworking of all the abstraction layers in the computing system stack
北京大学计算机科学技术系
13
北京大学微处理器研究开发中心
Abstraction Layers in Modern Systems
Application Algorithm
北京大学计算机科学技术系
Conventional Wisdom in Computer Architecture
11
北京大学微处理器研究开发中心
Sea Change in Chip Design
Intel 4004 (1971): 4-bit processor, 2312 transistors, 0.4 MHz, 10 micron PMOS, 11 mm2 chip
Algorithms, Programming Languages, Compilers, Operating Systems, Architectures, Libraries, … not ready to supply Thread-Level Parallelism or Data-Level Parallelism for 1000 CPUs / chip, Architectures not ready for 1000 CPUs / chip
Unlike Instruction-Level Parallelism, cannot be solved by computer architects and compiler writers alone, but also cannot be solved without participation of architects
Applications
Technology
Cost of software development makes compatibility a major force in market
Programming Language
Original domain of the computer architect („50s-‟80s)
Operating System/Virtual Machines Instruction Set Architecture (ISA) Microarchitecture Gates/Register-Transfer Level (RTL) Circuits Devices Physics
计算机组成和系统结构
3
北京大学计算机科学技术系
北京大学微处理器研究开发中心
“计算机系统结构(Computer Architecture)”
计算机系统结构 = +
指令系统体系结构 机器组成 + …
Computer Architecture = Instruction Set Architecture + Machine Organization + …
北京大学计算机科学技术系
4
北京大学微处理器研究开发中心
指令系统体系结构(Instruction Set Architecture)
. . . the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. Amdahl, Blaaw, and Brooks, 1964
RISC II shrinks to ~ 0.02 mm2 at 65 nm Caches via DRAM or 1 transistor SRAM?
• Processor is the new transistor?
北京大学计算机科学技术系
12
北京大学微处理器研究开发中心
Problems with Sea Change
北京大学计算机科学技术系
14
北京大学微处理器研究开发中心
Architecture continually changing
Applications suggest how to improve technology, provide revenue to fund development Improved technologies make new applications possible
... the portion of the machine visible to the programmer or compiler writer. - Hennessey and Patterson, 1990
北京大学计算机科学技术系
6
北京大学微处理器研究开发中心
计算机系统结构的定义变化
• 五十年代~六十年代:
Performance (vs. VAX-11/780)
??%/year
1000 52%/year 100
10 25%/year
1 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006
• VAX : 25%/year 1978 to 1986 • RISC + x86: 52%/year 1986 to 2002 • RISC + x86: ??%/year 2002 to present 9 北京大学微处理器研究开发中心 北京大学计算机科学技术系
软件
-----
指令格式
指令 (或操作码) 集合 对数据项和指令进行寻址和访问的模式 意外情况 5
北京大学微处理器研究开发中心
北京大学计算机科学技术系
What is an “ISA”?
... the attributes of a system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls, the logic design, and the physical implementation. - Amdahl, Blaaw, and Brooks, 1964
•七十年代~八十年代:
计算机组织与系统结构课程
计算机算逻设计
计算机组织与系统结构课程
指令系统设计,
特别是针对编译的ISA设计
• 九十年代: 计算机组织与系统结构课程
CPU设计、存储系统、I/O系统、
多处理器、网络 等
•2005--:
北京大学计算机科学技术系
计算机组织与系统结构课程 CPU设计、存储系统、I/O系统、 多处理器、网络 、SoC 等 7 北京大学微处理器研究开发中心
Domain of recent computer architecture („90s)
Parallel computing, security, …
Reliability, power, …
Reinvigoration of computer architecture, mid-2000s onward.
RISC II (1983): 32-bit, 5 stage pipeline, 40,760 transistors, 3 MHz, 3 micron NMOS, 60 mm2 chip 125 mm2 chip, 0.065 micron CMOS = 2312 RISC II+FPU+Icache+Dcache
Patterson and Hennessy
机械工业出版社(影印本)
主讲教师:
程旭 教授 易江芳 博士 北京大学微处理器研究开发中心
助课教师:魏鹏、卢欣、余跃、王万红
时间地点:周一(双周)
北京大学计算机科学技术系
5\6 周三 5\6 二教109
2
北京大学微处理器研究开发中心
本讲进度安排
课程概述
课程特点和结构
北京大学计算机科学技术系
8
北京大学微处理器研究开发中心
Uniprocessor Performance
10000
From Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th edition, October, 2006
The End of the Uniprocessor Era
Βιβλιοθήκη Baidu
Single biggest change in the history of computing systems
北京大学计算机科学技术系
10
北京大学微处理器研究开发中心
Old Conventional Wisdom: Power is free, Transistors expensive New Conventional Wisdom: “Power wall” Power expensive, Transistors free (Can put more on chip than can afford to turn on) Old CW: Sufficient increasing Instruction-Level Parallelism via compilers, innovation (pipelining, superscalar, out-of-order, speculation, VLIW, …) New CW: “ILP wall” law of diminishing returns on more HW for ILP Old CW: Multiplies are slow, Memory access is fast New CW: “Memory wall” Memory slow, multiplies fast (200 clock cycles to DRAM memory, 4 clocks for multiply) Old CW: Uniprocessor performance 2X / 1.5 yrs New CW: Power Wall + ILP Wall + Memory Wall = Brick Wall Uniprocessor performance now 2X / 5(?) yrs Sea change in chip design: multiple “cores” (2X processors per chip / ~ 2 years) More, simpler processors are more power efficient
计算机组织与系统结构
课程介绍
(第一讲)
程旭 易江芳
2011年9月7日
北京大学计算机科学技术系
1
北京大学微处理器研究开发中心
主要教材:
Computer Organization and Design: The Hardware/Software Interface,
3rd Edition 2005 or 4th Edition 2010
What is Computer Architecture?
Application
Gap too large to bridge in one step
Physics
In its broadest definition, computer architecture is the design of the abstraction layers that allow us to implement information processing applications efficiently using available manufacturing technologies.
Need a reworking of all the abstraction layers in the computing system stack
北京大学计算机科学技术系
13
北京大学微处理器研究开发中心
Abstraction Layers in Modern Systems
Application Algorithm
北京大学计算机科学技术系
Conventional Wisdom in Computer Architecture
11
北京大学微处理器研究开发中心
Sea Change in Chip Design
Intel 4004 (1971): 4-bit processor, 2312 transistors, 0.4 MHz, 10 micron PMOS, 11 mm2 chip
Algorithms, Programming Languages, Compilers, Operating Systems, Architectures, Libraries, … not ready to supply Thread-Level Parallelism or Data-Level Parallelism for 1000 CPUs / chip, Architectures not ready for 1000 CPUs / chip
Unlike Instruction-Level Parallelism, cannot be solved by computer architects and compiler writers alone, but also cannot be solved without participation of architects
Applications
Technology
Cost of software development makes compatibility a major force in market
Programming Language
Original domain of the computer architect („50s-‟80s)
Operating System/Virtual Machines Instruction Set Architecture (ISA) Microarchitecture Gates/Register-Transfer Level (RTL) Circuits Devices Physics
计算机组成和系统结构
3
北京大学计算机科学技术系
北京大学微处理器研究开发中心
“计算机系统结构(Computer Architecture)”
计算机系统结构 = +
指令系统体系结构 机器组成 + …
Computer Architecture = Instruction Set Architecture + Machine Organization + …
北京大学计算机科学技术系
4
北京大学微处理器研究开发中心
指令系统体系结构(Instruction Set Architecture)
. . . the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. Amdahl, Blaaw, and Brooks, 1964
RISC II shrinks to ~ 0.02 mm2 at 65 nm Caches via DRAM or 1 transistor SRAM?
• Processor is the new transistor?
北京大学计算机科学技术系
12
北京大学微处理器研究开发中心
Problems with Sea Change
北京大学计算机科学技术系
14
北京大学微处理器研究开发中心
Architecture continually changing
Applications suggest how to improve technology, provide revenue to fund development Improved technologies make new applications possible
... the portion of the machine visible to the programmer or compiler writer. - Hennessey and Patterson, 1990
北京大学计算机科学技术系
6
北京大学微处理器研究开发中心
计算机系统结构的定义变化
• 五十年代~六十年代:
Performance (vs. VAX-11/780)
??%/year
1000 52%/year 100
10 25%/year
1 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006
• VAX : 25%/year 1978 to 1986 • RISC + x86: 52%/year 1986 to 2002 • RISC + x86: ??%/year 2002 to present 9 北京大学微处理器研究开发中心 北京大学计算机科学技术系