基于单片机的智能晾衣架控制系统的设计与实现外文文献原稿和译文

基于单片机的智能晾衣架控制系统的设计与实现外文文献原稿和译文

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外文文献原稿和译文

原稿

TheＤeｓcriｐtiｏn of AT89Ｓ51

1 General Ｄeｓcription

The AT89S５1 is a low-poｗer，ｈiｇh－perfｏrmaｎce CMＯS ８－ｂiｔｍｉcroｃontｒｏlleｒwitｈ4K bｙteｓof In－Ｓystem Pｒｏgramｍａble Fｌasｈmemorｙ．The deｖice is manuｆａctured usinｇAtmel’ｓhｉgh-ｄensiｔy nonvolatile memoｒy technolｏgy and iｓcoｍpａtible wiｔh ｔhe ｉnduｓtry-standａrｄ80C５1insｔrucｔioｎset anｄpinout. Ｔhe on－ｃhip Flasｈaｌlowｓｔhe pｒogram memory to be rｅproｇｒａmｍeｄin-ｓyｓtem or by a convｅntioｎal nｏnvolaｔile meｍorｙpｒｏgｒａｍmeｒ. Bｙcombinｉng ａveｒsａtｉｌe8－bｉt CPＵwiｔｈIn-ＳysｔemＰrogｒａmmablｅＦｌaｓh on a moｎｏlｉtｈiｃcｈip，the AtmｅｌAＴ８9Ｓ５1is a ｐoｗerfｕl mｉcrｏｃｏntrolｌer whiｃｈprovidｅｓ a highly-fl ｅxｉble ａnd coｓt-ｅffecｔivｅｓoｌuｔｉon ｔo maｎy emｂedｄｅd cｏntrolａpplicａｔions．

ThｅAT89Ｓ５１pｒｏｖｉdｅｓthe following stanｄarｄfeａtures: 4K bｙtes oｆＦlasｈ, 128ｂytes oｆRＡM, ３2Ｉ/Ｏliｎes, Ｗatchdog ｔimer, twｏdａｔa pｏintｅｒs，two 16-bｉt tiｍer/counters, a ｆiｖe-vｅctoｒtｗo-level iｎterｒuｐt archiｔecture, ａfull dｕplex ｓeriａl pｏｒt, ｏn-ch ｉpｏscillaｔor，ａnｄclock ｃｉｒcuitry. Inａdditioｎ, thｅAT８9S5１iｓｄeｓignｅｄwith staｔic logｉc for oｐeｒation doｗn to zeｒo freq ｕｅnｃy aｎｄｓupports two softｗaｒe selectable power ｓａｖiｎｇmodｅs．Ｔhe Idle Ｍodｅｓｔｏps ｔhe CPＵｗｈile alloｗiｎg tｈe RAM, ｔimeｒ／couｎters, seｒｉal port,ａnd interrupt ｓystem ｔo conｔｉｎuｅfu ｎctioning. ThｅＰｏｗｅｒ-ｄown mode saves ｔhe RAM contents bｕt frｅezes the ｏscｉllator，ｄiｓａbling ａｌl other chip fｕnctioｎs until tｈe ｎext externaｌinteｒruｐtｏr hardware rｅset.

2 Ports

Port 0 is an 8-bit open drain ｂｉ-dire ｃti ｏn ａl Ｉ／O port ． As an o

ｕｔpu ｔ p ｏr ｔ, each p ｉn ca ｎ sink ei ｇht TTL inputs ． Whe ｎ 1s ａre

w ｒi ｔten ｔｏ po ｒｔ 0 pins, the pins can be ｕｓed as ｈｉg ｈ-ｉm ｐ

edance ｉｎputs. Ｐort 0 can ａls ｏ be configured to be the ｍulti ｐl ｅxed

low -ord ｅr addr ｅss/data bu ｓ d ｕｒing ａｃcess ｅs to ｅxtern ａl ｐrogram

and d ａta memory. I ｎ th ｉs mode, P0 ｈas intern ａｌ p ｕｌl -up ｓ. Port 0 als

ｏ re ｃeives th ｅ code b ｙtes d ｕring Flash pro ｇrammi ｎg and out ｐuts ｔ

ｈe code ｂy ｔe ｓ duri ｎg ｐrogram verifica ｔｉon. E ｘte ｒna ｌ pull -ups

are r ｅq ｕired du ｒing ｐro ｇram ｖｅrification.

Port 1 is an 8-bit bi -ｄirecti ｏｎal I/O ｐo ｒt with i ｎternal p ｕll -ｕps.

The Ｐort 1 ｏutp ｕｔ ｂuff ｅｒs c ａｎ sink ／sour ｃe four TTL inp ｕｔs.

When 1s ar ｅ w ｒi ｔt ｅn to Po ｒt 1 ｐins, t ｈey are ｐu ｌｌed hi ｇｈ b

ｙ ｔｈｅ ｉｎte ｒｎal pull -ups and c ａn be ｕse ｄ as inpu ｔs. As inp

ｕｔｓ, Port １ pins tha ｔ ａｒe exter ｎa ｌｌy being pull ｅd l ｏw wi ｌｌ

ｓourc ｅ curr ｅnt (I I Ｌ) b ｅc ａuse of the ｉntern ａl pull -ｕp ｓ.

Port １ als ｏ receiv ｅｓ ｔｈe l ｏw -ｏrder address by ｔe ｓ d ｕri ｎｇ

Flash pr ｏgramm ｉｎg ａn ｄ v ｅrification.

Ｐｏｒt 2 ｉs a ｎ 8-bit bi -ｄirectiona ｌ I/O port ｗith interna ｌ ｐul

ｌ－ups. Ｔhe P ｏrt ２ ｏutpu ｔ ｂuf ｆer ｓ c ａn sink/s ｏu ｒce fo ｕr

TTL inp ｕt ｓ. W ｈｅn 1s ar ｅ writ ｔen to Port 2 p ｉns, t ｈey are pull ｅｄ high

b ｙ ｔhe i ｎte ｒｎal pul ｌ-ｕp ｓ an ｄ can be use ｄ as ｉnp ｕts. As input ｓ,

Port 2 pin ｓ th ａt ａr ｅ extern ａlly be ｉng pulled l ｏｗ wi ｌｌ ｓｏurce c ｕ

ｒre ｎt (I ＩL ） becaus ｅ of the inte ｒｎal ｐu ｌｌ-ｕp ｓ．Ｐｏrt ２ emits

ｔhe h ｉｇｈ－ord ｅr addre ｓs byte du ｒing fe ｔches fr ｏm e ｘｔe ｒｎal

prog ｒam memo ｒy and duri ｎg a ｃcesses t ｏ ｅxter ｎａl data ｍemory th ａt

use 16-b ｉt addr ｅsses (MO ＶX ＠ DPTR). I ｎ ｔｈis appli ｃa ｔion ， Ｐort Port Pin

A ｌter ｎａte Ｆｕｎction ｓ P1.5

ＭOSI (used ｆo ｒ Ｉn －System Ｐｒogra ｍmi ｎg ） Ｐ１．6

MOS Ｏ (us ｅd for I ｎ-Ｓｙs ｔem Programm ｉng) Ｐ１.7 SCK(ｕsed for Ｉn -Ｓyste ｍ Ｐｒｏgr ａmming)