步长可变的加减计数器

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library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_unsigned.all;

entity buchang is

generic(N: integer:=4);

port(

clk,f1,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,a16:in std_logic;

--k :std_logic;

--cq :out std_logic_vector(7 downto 0);

q :out std_logic_vector(7 downto 0);

ledag,ledag1 :out std_logic_vector(6 downto 0)

);

end buchang;

Architecture a of buchang is

signal cnt: integer range 0 to n-1;

signal k: integer range 0 to 15;

signal clkout: std_logic;

signal cq: std_logic_vector(7 downto 0);

--q1<=q(3 downto 0);

--q2<=q(7 downto 4);

signal q1,q2: std_logic_vector(3 downto 0);

Begin

process(clk)

begin

if(clk'event and clk='1') then

if(cnt

cnt <= cnt+1;

else

cnt <= 0;

end if;

end if;

end process;

--------------------------------

process(cnt)

begin

if(cnt

clkout <= '1';

else

clkout <= '0';

end if;

end process;

--------------------------------------------------------

process(clkout)

begin

if(clkout'event and clkout='1') then

if f1='1' then

cq<=cq+1+k;

if cq="11111111"then cq<="00000000";

end if;

end if;

end if;

if(clkout'event and clkout='1') then

if f1='0' then

cq<=cq-1-k;

if cq="00000000"then cq<="11111111";

end if;

end if;

end if ;

-- else

--cq<=cq-1-k;

--if cq="00000000"then cq<="11111111";

-- end if;

--end if;

end process;

q<= cq;

q1<=cq(7 downto 4);

q2<=cq(3 downto 0);

process(k)

begin

if a1='1'then k<= 0;

elsif a2='1' then k<= 1;

elsif a3='1' then k<= 2;

elsif a4='1' then k<= 3;

elsif a5='1' then k<= 4;

elsif a6='1' then k<= 5;

elsif a7='1' then k<= 6;

elsif a8='1' then k<= 7;

elsif a9='1' then k<= 8;

elsif a10='1' then k<= 9;

elsif a11='1' then k<= 10;

elsif a12='1' then k<= 11;

elsif a13='1' then k<= 12;

elsif a14='1' then k<= 13;

elsif a15='1' then k<= 14;

elsif a16='1' then k<= 15;

end if;

end process;

process(q1)

begin

case q1 is

when "0000" => ledag <="0111111"; when "0001" => ledag <="0000110"; when "0010" => ledag <="1011011"; when "0011" => ledag <="1001111"; when "0100" => ledag <="1100110"; when "0101" => ledag <="1101101"; when "0110" => ledag <="1111101"; when "0111" => ledag <="0000111"; when "1000" => ledag <="1111111"; when "1001" => ledag <="1101111"; when "1010" => ledag <="1110111"; when "1011" => ledag <="1111100"; when "1100" => ledag <="0111001"; when "1101" => ledag <="1011110"; when "1110" => ledag <="1111001"; when "1111" => ledag <="1110001"; when others => null;

end case;

end process;

process(q2)

begin

case q2 is

when "0000" => ledag1 <="0111111"; when "0001" => ledag1 <="0000110"; when "0010" => ledag1 <="1011011"; when "0011" => ledag1 <="1001111"; when "0100" => ledag1 <="1100110"; when "0101" => ledag1 <="1101101";

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