USB-chirp序列测试

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USB2.0信号测试指导

USB 2.0 Compliance Testing with Agilent Infiniium OscilloscopesApplication Note 1400Who Should Read This Application Note?Digital designers and developers working towards USB 2.0 compliance.IntroductionUniversal Serial Bus (USB) burst on the scene in 1995 delivering a revolutionary way to connect personal computers and devices. Allowing hot-plug capability, USB has introduced ease-of-use to the PC device market by providing a simple connection scheme and protocol for a wide variety of computer devices, ranging from keyboards and mice to high-bandwidth devices such as printers, scanners, and cameras.USB has now successfullyreplaced aging serial and parallel ports as the connection of choice for both device manufacturers and end users. Whereas cable length and device expansionwere limitations with older serial and parallel connections, they are no issue for USB. Amazingly,it allows devices to exist up to 30-meters away from the host, and allows up to 127 devices to be connected to a single host and port at once through a series of USB hubs. The ability to talk directly to devices or to devices through hubs allows for this incredible expansion B 1.1 worked best for slower human-interface devices such as mice and keyboards, with low-speed operating at 1.5-Mb/s and full-speed operating at12-Mb/s. Higher-bandwidth devic-es were severely limited by these relatively slow data transfer rates. As a result, the USB-Implementers Forum (USB-IF) introduced the fully backward compatible USB 2.0 in May 2000, which resulted in a 40-fold increase in datathroughput for hi-speed over full-speed. USB 2.0 operates at 480-Mb/s—ideal for devices such as video-conferencing cameras and high-resolution printers. For more information, see the official USB-IF (USB Interoperability Forum) website at .Basic SpecificationsAs listed previously, USB 2.0 comprises three different data transfer rates—low-speed,full-speed, and hi-speed.Four wires compose the cable system—V BUS, D+, D-, and ground. Devices may be either bus-powered, with 500-mA maximum bus current withdraw, or self-powered, meaning they have their own power supply.D- and D+ is a differential signal pair that serves as the primary information carrier between the host, hubs, and devices. USB 2.0 supports three different types of data transfer: interrupt, bulk, or isochronous. Control packets containing commands or query parameters may also be sent by the host.The flexibility inherent in USB is a direct result of the specifica-tions above and the stringent regulations and compliance testing mandated by the USB-IF. There are three kinds of compliance tests: framework test,interoperability test, and electri-cal test. This document onlydiscusses Infiniium’s electricaltest solution.Low, full, and hi-speed USBrequire compliance with thesignal quality, in-rush currentcheck, droop/drop and backdrive voltage electrical tests. Hi-speed requires compliance withan additional suite ofelectrical tests—hi-speed sig-nal quality, receiver sensitivity,CHIRP timing, and packetparameters. Older methods ofcompliance testing included firstcapturing the signals on a scope,then moving the data to a PC so itcould be cropped, stored in a .tsvformat, and finally analyzed inMATLAB®. The Agilent InfiniiumUSB Test Option is the first scopesolution in the industry that uti-lizes the official USB-IF MATLABscript. As the result, it providesan affordable, trustworthy, single-box, compliance solution—allow-ing you to say, as did one of ourcustomers, “I know I’m going topass!”23Full/Low-Speed Test SuiteAgilent test equipment has beenapproved by the USB-IF.Figure 1. Agilent Infiniium at official USB-IF Plugfest.The basic USB 2.0 electrical test suite includes signal quality,in-rush current check, and droop/drop tests. A SQiDD (Signal Quality inrush Droop Drop) fix-ture must be used for these tests. Agilent provides a SQiDD boardFull/Low-Speed Test Fixturethat is orderedseparately as part numberE2646A. The USB-IF exclusively uses the Agilent SQiDD board for official compliance testing.Figure 2. Agilent SQiDD board.Wire loopWire loop‘B’ Socket‘A’ Socket‘B’ Socket‘B’ Socket‘A’ Socket‘A’ SocketSwitchSwitch4Signal Quality TestUsing an oscilloscope to measure transceiver characteristics, the signal quality test looks at:• Signal eye• End of Packet (EOP) width • Signaling Rate • Rise/Fall Times• Cross-over Voltage Range • Consecutive Jitter • Paired JK Jitter • Paired KJ JitterSignal quality testing can beperformed for either upstream data or downstream data. In the case of upstream testing, signals travelling from the device to the host are captured and analyzed. Downstream testing performs just the opposite, capturing signals travelling from the host towards the device or terminating hub. Figure 3 shows a captured down-stream packet on the Infiniiumscope with the USB Test Option.Figure 3. Captured downstream packet.Signal Quality Test (continued)launched, other conditions mustalso be set in the software. Forsignal quality tests, these addi-tional conditions include tierand near end/far end. The tierrefers to the distance between thedevice and the host computer. Ifthe device is connected directly tothe host computer, the tier equals1. If the device is separated fromthe host computer by 3 hubs, thetier equals 4. Compliance testingmandates that testing occur ata minimum tier of 6; therefore,Agilent recommends that testsalways be performed with a tierFigure 4. Infiniium USB test menu.of 6. Test results may be storedin a data file on the Infiniium’sC: drive, or may also be stored toa USB flash drive.Infiniium displays all test resultsin an html format, including theeye diagram.Figure 5. Infiniium signal quality test results.5In-Rush Current Checkdictates that a surge of currentwill occur, followed by a lessersteady-state current level, whenpower is applied to a device.The hot-pluggable nature of USBrequires that the total inrushsurge current be tested to ensurethat it remains within the limitsfor the device. If the inrushcurrent does not remain withinits limits (100 mA), not only canit cause damage to the device, butit can also take power from otherdevices connected to the sameport.The USB 2.0 specification out-lines a total inrush surge currentlimit of 50-uC. A waiver is grant-ed at 150 μC.Figure 7. In-rush current spike.67Droop and Drop TestingBack-Drive Voltage TestDroop and drop testing proce-dures vary based on whether the device is self-powered or bus powered.Hosts and Self-Powered Hubs Drop testing measures the DC voltage drop across each load board attached to the SQiDD board. To get a good indication of voltage drop, the test is per-formed under two conditions—no load and load. Under no load testing, all downstream ports remain open, while the V BUS voltage test points on the SQiDD board are probed. Load testing tests the V BUS voltage test points with 500-mA loads applied to all downstream ports. The lowest measured loaded value should be used for the droop test.Droop testing involves measuring the AC voltage drop on V BUS that occurs when all but one port are under 500-mA loads; The unload-ed port is then connected to the SQiDD board. Once the instantan-cous AC voltage drop is captured on the display, markers are used to bracket the area between the lowest point and steady-state voltage point of V BUS . Infiniium then uses the bracketed data toperform the droop test.Figure 8. Droop setup for hosts and self-powered hubs.The droop test for bus-powered hubs again uses the 100-mA-load board. This load board is con-nected to all but one port on the bus-powered device. The SQiDD board is then attached to the unloaded port. Once again,markers are used to bracket the area between the lowest point on the captured data and the steady-state voltage. TheInfiniium then uses the bracketed data to run the drop test.Bus-Powered HubsDrop tests for bus-powered hubs use 100-mA load boards instead of the 500-mA load boards used in the self-powered hub proce-dure. These 100-mA boards are connected to all downstream ports. The V BUS voltage is then measured at the hub upstream port and at each downstream port. The lowest measured downstream value is used for the drop test.The back-drive voltage test is performed to ensure that a device only draws and does not sourcecurrent from V BUS on its upstream facing port at all times. If a device supplies current at this port, a number of consequences can occur, including hub enumerationfailure, PC boot failure, and motherboard failure. This test measures the DC voltages ofV BUS , D+, and D- before and after device enumeration. The voltages are then recorded on the back-drive voltage fixture. Any voltage exceeding 400-mV is considered a failure.8On the hi-speed USB Test Bed Computer, the USB hi-speedElectrical Test Tool is required.Figure 9. USB-IF hi-speed electrical test tool.Hi-Speed Electrical Test SuiteAn additional suite of tests was added to the USB 2.0 compliance procedure to accommodate the new hi-speed mode. These tests include hi-speed signal quality, receiver sensitivity, CHIRP timing, and packet parameter.Hi-Speed Electrical Test Tool9The hi-speed signal quality test utilizes the hi-speed signal quality board, as shown in Figure 10.The nomenclatures of the test points differ between the Agilent hi-speed test fixture and the Intel test fixture. The official USB test procedure is written with reference to Agilent’s test fixtures. Refer to Table 5, the cross-reference chart, whenusing Intel’s test fixture.Figure 10. Hi-speed signal quality boards (Agilent fixture andIntel fixture—device signal quality test).Hi-Speed Test Fixture10Hi-Speed Signal Quality TestInvoke the Hi-speed Electrical Test Tool software on Electrical Test bed computer and select TEST_PACKET to perform the sig-nal quality test. Figure 11 shows a hi-speed test packet captured on an Infiniium oscilloscope.Prior to testing, it must be deter-mined if the device incorporates a captive cable, or if it contains a series B or mini-B connector. During upstream tests, captive cables require that tests be run at the far end. B-connector cables require that tests be run at the near end. Figure 12 shows a hi-speed eye pattern result displayed on an Infiniiumoscilloscope.Figure 11. Hi-speed test packet.Figure 12. Hi-speed signal quality eye diagram.MonotonicityMonotonicity tests if a transmit-ted signal increases or decreases in amplitude without reversal in the opposite direction. The monotonicity characteristic of a signal can be viewed using the hi-speed signal quality eye template (Figure 12). There is no indepen-dent monotonicity test mandated by the USB-IF.Receiver SensitivityThe receiver sensitivity tests verify sensitivity of the receivers of a device on both the upstream and downstream data ports in noisy environments. The Agilent 81130A/81134A Pulse/Pattern Generator is used to emulate IN commands from the port to the device address 1. IN commands are sent from the computer to the device under test, which should be in an unsquelched mode. The noise is represented by a pre-set level, whereby a signal meeting and exceeding this level responds to the IN command with anNAK. All packets from the data generator must be NAK’d by the port under test. The amplitude of the data generator packets is then reduced in 20-mV increments as the test is run. The amplitude of these packets should be reduced until the NAK packets become infrequent. The data generator amplitude is then immediately increased to the point where the Figure 14. Receiver sensitivity test.Data generator packet Device responsegenerator packetPacket Parameters TestAnother test using the hi-speedsignal quality board tests thedevice packet parameters. Thehi-speed signal quality test boardallows for better reception of thepackets coming from the device.This test measures parameterssuch as sync field length, end ofpacket (EOP) width, and inter-packet gap.Figure 13. Device inter-packet gap.NAK packets are not intermittent. This indicates the points of minimum receiver sensitivity levels before squelch.When the device receives IN packets with a signal amplitude in excess of 150-mV, all packets should be NAK’d. When the device receives IN packetswith a signal amplitude below 100-mV, all packets should be squelched. A waiver is granted for squelch at +/- 50-mV for each level.11CHIRP Timing TestThe CHIRP test utilizes thehi-speed signal quality test fixture to measure timing and voltage on both upstream and downstream ports. The deviceis hot-plugged to the port andis immediately enumerated to capture the CHIRP handshake. Within the handshake, the CHIRP-K duration is measured to verify that it is within the 1.0-ms and 7.0-ms allowable latency. After the CHIRP K-J, K-J, K-J sequence, the device responds by turning on its hi-speed termina-tions. A drop of amplitude from800-mV nominal to 400-mV nominal occurs. The time between the beginning of thelast J in the CHIRP K-J, K-J, K-J sequence and the time whenthe device turn on initiates its hi-speed terminations must be mea-sured to verify that it is less than or equal to 500-μs.In addition to measuring thetime between the last J in CHIRP and the initiation of hi-speed termination, the CHIRPtest also measures device suspend/resume/reset timing as well as the K and J amplitudes.Figure 15. CHIRP test.Device’s chip latency(2.5 µs <-> 3 ms)Device hi-speedtermination ONFigure 16. Time between last J in CHIRP and hi-speed termination initiation.CHIRP K(1 ms <-> 7 ms)12Impedance Measurements In this test, differential time domain reflectometer (TDR) mea-surements are taken tomeasure the impedance of the hi-speed signaling path andactive terminations of the device under test. The TDR measure-ments are compared with the USB-IF specification require-ments. The device under testis powered, placed in SE0-NAK mode, and isolated from the system. D+ and D- are measuredto verify that they are 0-V ±10-mV.A 400-ps edge is then driven into the device. The resulting wave-form indicates whether or not the termination impedance and the through impedance meet the requirements. The TDR measure-ment is not required for compli-ance testing. A PASS signal quality test will suffice for the TDR measurement.Figure 17. TDR measurement.USB connectorTermination resistor1314SummaryAgilent provides a comprehen-sive, easy-to-use solution for USB compliance testing. The compli-ance testing that once took days now takes only minutes. The indi-vidualized test boards provideflexibility and affordability for the laboratory choosing to test facets of the USB specification simultaneously.In conclusion, the AgilentInfiniium USB Test Option has been described this way:“The term ‘God Send’ comes to mind. Before the arrival of this scope, a USB test was something to be avoided! It often required half a day to set up the test and an additional 30 minutes to massage the numbers into anacceptable MATLAB format.Needless to say only the minimum number of tests required was ever actually performed.“In a nutshell, this product has revolutionized the way in which we look at USB. We now have a designated test system that is reliable and easy to use and fast. The main result is that we can now provide real-time feedback, and the amount of testing we perform is probably up 30-fold or more. And as you may have guessed, the additional testing has turned up a myriad of inter-esting opportunities for future improvements. Just for fun we have even started looking at our competitor’s products!”MATLAB ® is a U.S. registered trademark of Math Works, Inc.Windows ® is a U.S. registered trademark of Microsoft Corporation.Agilent Technologies OscilloscopesMultiple form factors from 20 MHz to >90 GHz | Industry leading specs | Powerful applications15Remove all doubtOur repair and calibration services will get your equipment back to you, performing like new, when promised. You will get full value out of your Agilent equipment throughout its lifetime. Your equipment will be serviced by Agilent-trained technicians using the latest factory calibration procedures, automated repair diagnostics and genuine parts. You will always have the utmost confidence in your measurements.Agilent offers a wide range of additionalexpert test and measurement servicesfor your equipment, including initialstart-up assistance, onsite educationand training, as well as design, systemintegration, and project management.For more information on repair andcalibration services, go to:/find/removealldoubt/find/openAgilent Open simplifies the process of connecting and programming test systems to help engineers design, validate and manufacture electronic products. Agilent offers open connectivity for a broad range of system-ready instruments, open industry software, PC-standard I/O and global support, which are combined to more easily integrate test system development./find/emailupdates Get the latest information on the products and applications you select./find/agilentdirect Quickly choose and use your test equipment solutions with confidence.Agilent Email UpdatesAgilent DirectLXI is the LAN-based successor to GPIB, providing faster, more efficient connectivity. Agilent is a founding member of the LXI consortium./ﬁ nd/usb2_compliance For more information on Agilent Technologies’ products, applications or services, please contact your local Agilent office. The complete list is available at:/ﬁ nd/contactusAmericasCanada (877) 894-4414 Latin America 305 269 7500United States (800) 829-4444Asia Paciﬁ c Australia 1 800 629 485China 800 810 0189Hong Kong 800 938 693India 1 800 112 929Japan 0120 (421) 345K orea 080 769 0800Malaysia 1 800 888 848Singapore 1 800 375 8100Taiwan 0800 047 866Thailand 1 800 226 008Europe & Middle EastAustria 01 36027 71571Belgium 32 (0) 2 404 93 40 Denmark 45 70 13 15 15Finland 358 (0) 10 855 2100France 0825 010 700* *0.125 €/minute Germany 07031 464 6333****0.14 €/minuteIreland 1890 924 204Israel 972-3-9288-504/544Italy 39 02 92 60 8484Netherlands 31 (0) 20 547 2111Spain 34 (91) 631 3300Sweden 0200-88 22 55Switzerland 0800 80 53 53United Kingdom 44 (0) 118 9276201Other European Countries: /ﬁ nd/contactusRevised: July 17, 2008Product speciﬁ cations and descriptions in this document subject to change without notice.© Agilent Technologies, Inc. 2008Printed in USA, August 1, 20085988-6219EN。

测试指导类-USB接口指标测试指导书

USB接口指标测试指导书最小部门：(企业业务BG—企业数通产品线一企业数通研发管理部一企业数通硬件开发部)评审记录：所属产品：来源：关键词：USB接口指标：USB眼图测试；Chirp测试；Droop测试。

1、USB接口指标描述为了顺应市场的要求，目前的产品大部分都出的是USB2.0的接口，而且我们产品都是作为HOST端，USB2.0一共提供3种速率，如下表。

当我们的设备是作为HOST端是，数拯方向是Down Stream,其关注的指标有:1、信号质量1)眼图测试(Eye-Diagram testing)2)信号速率(Signal Rate)3)包结尾宽度(End of Packet Width)4)JK抖动(JK jitter)5)KJ抖动(KJ jitter)6)连续抖动(Consecutive jitter)7)单i周性测试(Monotonic test (for HS))8)上升与下降时间(Rise and Fall times)2、Droop(电压跌落)3、Chirp (Shake Hands)2、USB接口指标测试方法(1)信号质量测试由于我们的设备都是作为HOST 端，在这里只介绍HOST 端的接口指标测试方法。

1) USB High Speed 信号质量测试方法a) 连接好被测设备(DUT)、测试夹具和示波器，具体的连接示意图如图1所示。

图1 High Speed 信号质量测试连接示意图b)DUT 上电，启动USB 测试包，发送测试命令，使USB 端口能够发送岀测试码 c) 运行示波器上的USB 测试软件，在Analyze 菜单中选择USB2.0 Test 启动后的界而如图3所示。

在软件的Measurements 菜单中选择Select,然后选择High Speed,选择测试项，在这里可以点击Select All.将信号质量的测试项全部选上。

在这个界而上还有一个选项Config,该选项是用来初始化MonotonicBnrtmh Droop(k»v»c<* Or script n>nPCI-Mp»trosusB?图2 High Speed 信号质量测试波形Tektronix Oscilloscope with Application running流.具体的码流波形如图2所示。

最全的USBType-C?互连一致性测试方案

最全的USBType-C®互连一致性测试方案USB-IF协会于2014年发布的Type-C接口是具有突破性的互连标准，其优异的性能、极简连接以及可扩展和多功能受到整个业内消费者的瞩目。

近几年Type-C技术更是凭借以下的诸多优点，在消费类电子行业得到蓬勃发展：·极简连接：相比之前A/B/Mini-B/Micro-B口可以实现约8.3mm x 2.5mm 小尺寸、扁平轻薄、支持正反连接。

·可扩展性：可用于不同终端设备诸如电脑，手机，显示器，U盘，扩展坞等等。

·多功能性：支持USB2.0、USB3.2、USB4、DP1.4a、DP 2.0/2.1、PCIe和PD功能。

·生态多样：包括芯片和终端产品，比如台式机及笔记本、手机、扩展坞、U 盘、显示器、嵌入式板卡、无源线缆、有源线缆等。

2021年9月，欧盟委员会正式提出一项议案，将USB Type-C®作为智能手机、平板电脑、耳机、便携式音响、摄像头和一些电子游戏机的标准接口，此举旨在减少充电器生产相关的浪费；2021年6月新的USB PD3.1规范，扩展PD3.0支持的供电最大供电瓦数100W到240W(EPR: Extended Power Range)，可以为游戏本、大显示器等装置供电。

这一系列新的法规的发布将更大地促进Type-C互连技术在整个行业的推广和普及。

USB Type-C®连接器和电缆组件简介USB用于连接和供电设备的几种电缆连接器类型包括：Type-A、Type-B、Micro-B、Mini-B 等。

与这些现有类型的USB电缆相比，USB Type-C®电缆具有对称和可逆的独特可用性优势。

任何使用计算机和外围设备的人都知道，USB 标准 A/B 连接器必须单向插入，并且可能需要尝试几次才能找到正确的方向。

USB Type-C®连接器更容易插入，因为它是对称的并且可以在任何USB Type-C®设备之间的任一方向插入。

测试指导类-USB接口指标测试指导书

USB接口指标测试指导书最小部门：（企业业务BG—企业数通产品线—企业数通研发管理部—企业数通硬件开发部）评审记录：所属产品：来源：关键词：USB接口指标；USB眼图测试；Chirp测试；Droop测试。

1、USB接口指标描述为了顺应市场的要求，目前的产品大部分都出的是的接口，而且我们产品都是作为HOST 端，一共提供3种速率，如下表。

当我们的设备是作为HOST端是，数据方向是Down Stream，其关注的指标有：1、信号质量1)眼图测试(Eye-Diagram testing)2)信号速率(Signal Rate)3)包结尾宽度(End of Packet Width)4)JK抖动(JK jitter)5)KJ抖动(KJ jitter)6)连续抖动(Consecutive jitter)7)单调性测试(Monotonic test (for HS))8)上升与下降时间(Rise and Fall times)2、Droop(电压跌落)3、Chirp (Shake Hands)2、USB接口指标测试方法（1）信号质量测试由于我们的设备都是作为HOST端，在这里只介绍HOST端的接口指标测试方法。

1)USB High Speed信号质量测试方法a)连接好被测设备(DUT)、测试夹具和示波器，具体的连接示意图如图1所示。

图 1 High Speed信号质量测试连接示意图b)DUT上电，启动USB测试包，发送测试命令，使USB端口能够发送出测试码流，具体的码流波形如图2所示。

图 2 High Speed信号质量测试波形c)运行示波器上的USB测试软件，在Analyze菜单中选择Test 启动后的界面如图3所示。

在软件的Measurements菜单中选择Select，然后选择High Speed，选择测试项，在这里可以点击Select All，将信号质量的测试项全部选上。

在这个界面上还有一个选项Config，该选项是用来初始化Monotonic Property，选择后的界面如图4所示，是用来初始化边沿的单调性是从高低电平的多少百分比开始Check。

USB 2.0 实体层测试操作

USB 2.0 實體層測試的理解與實際操作(上)〈主筆室〉前言參與USB 2.0 裝置設計、分析和驗證工作的設計人員，每天都面臨著縮短新產品上市時間的壓力。

Tektronix 的各種測試儀器，可使設計人員快速而精確地進行USB 建置者論壇(USB Implementers Forum，簡稱USB-IF) 建議的所有相容性認證測試。

通用串列匯流排(USB 2.0) 是一種連接技術規格，旨在連接電腦外面的週邊裝置，可在不打開電腦外殼安裝所需裝置，免除了開機箱插卡的麻煩。

USB 相容裝置為使用者提供使用方便、擴充性和高傳輸速度。

USB 2.0 技術已被今天的市場廣泛接受，它將資料處理速率提升了40 倍。

資料處理量的增加為許多新型週邊產品打開新天地，包括全動態視訊至輔助性的、只有錢包大小的硬碟機。

但是，隨著資料速率的急速升高，也出現了新的測試和量測方面的挑戰。

USB 2.0 規格推出了新的相容性要求。

在製造商將USB-IF「認證」標誌標籤貼在產品包裝之前，USB 2.0 裝置的設計人員必須恰當地鑑定其設計並檢驗產品是否符合業界標準。

因此，恰當的測試工具對USB-IF 相容性測試極其重要，這些測試項目包括低速、全速和高速裝置和集線器的眼狀圖和參數測試。

本文章將重點介紹對USB 2.0 實體層量測和電相容性測試（電測試和高速測試）的解說和實際操作，並介紹各項測試所需的儀器。

USB 2.0 的基本原理USB 2.0 是一種串列匯流排，使用四條線- VBUS、D-、D+ 和接地。

D- 和D+ 傳送資料。

VBUS 為來自主機(Host) 或集線器(hub) 的電源。

USB 2.0 規定了下列速度選擇和上升時間：USB 2.0 裝置可以自行供電（有自己的電源供應器），可由匯流排供電（電源來自主機）。

自行供電裝置須盡量少用電。

USB 2.0 規格中列有這方面的詳細測試規格。

USB 2.0 電測試USB 2.0 電測試包括訊號品質、峰值電流檢查以及壓降(Drop) 和浮動(Droop) 電壓測試。

USB 2.0测试

USB 2.0Pre-Compliance Physical Layer TestingBrief Introduction to USB 2.0fFour wire system (D+, D-, VBUS, GND)f USB2.0 provides the following speed selectionsfSelf powered and Bus powered devices VBUS supplies power to devices that driver their primary power from the host or hub. f The USB-IF has instituted a certification and marking program–Persuade developers to fully test their USB devices. –New USB trademark logo that indicates a device is certified and conforms to all applicable USB 2.0 specifications.500 ps 480 Mbps High Speed4 –20 ns 12 Mbps Full Speed75 to 300 ns 1.5 Mbps Low SpeedRise Time Data RateUSB2.0一致性测试4Three categories of Compliance testing 0Physical layer (Electrical Test)0Protocol layer0Interoperability testing0USB 2.0 legacy tests0Signal Quality Test0Droop & Drop Test0Inrush Current Test0HS Specific Tests0Chirp Test0Monotonic Test0Receiver sensitivity Test0Impedance Test (TDR)USB2.0 信号质量测试信号质量测试包括：f眼图测试(Eye-Diagram testing)f信号速率(Signal Rate)f包结尾宽度(End of Packet Width)f交叉点电压范围(Cross-over voltage range (for LS and FS)) f JK抖动(JK jitter)f KJ抖动(KJ jitter)f连续抖动(Consecutive jitter)f单调性测试(Monotonic test (for HS))f上升与下降时间(Rise and Fall times)测试环境需求f500 MHz PC with Windows 2000 (English) or XP OS f High-Speed Host Controllerf USB-IF furnished Test Mode Softwaref Good quality USB cablesf Good quality USB Hub– 1.1 –Belkin F5U100 / F5U101– 2.0 –Belkin F5u221 / IOGer GUH-204 ‘Gold’ATEN UH-204 ‘Gold’f Mouse (any listed on USB-IF mouse)当DUT为Host时所测试的信号均为Host设备发出，其信号方向为下行(Down Stream)测试项1. Signal Quality–High speed test 480Mbit/S–Full speed test 12Mbit/S–Low speed test 1.5Mbit/S2. Droop( 压落)3. Chirp (Shake Hands)Host High-Speed Signal Qualityconnector ,测Host High-Speed Signal Qualityf Win 2K (英文版) or XP PC 运行HSElecticalTestTool软件,选择HOST 然后按TEST.f进入下一个窗口在Port Control 内选择Test_packet, 在Port 内选择所要测试的Port 然后按EXECUTE.f Scope 执行TDSUSB2 软件,选择High Speed 然后将Signal quality 的六个项目全部点选.f Eye diagram, Signal rate, Rise time, Fall Time, EOP Width, Monotonic.f按下Configure 点选Configure 然后选择Tier 6, Down-stream, Near End. 点选Source 选择所要用的Input Channel.f点选RUN 的符号此时可看到TEST_PACKET 的波形f按下OK 既可完成测试Host High-Speed Signal QualityHost High-Speed Signal QualityRUNHost High-Speed Signal QualityÅWaveform Eye Diagram ÆHost High-Speed Signal Quality f Results: SummaryHost High-Speed Signal Quality f Results: DetailsReport GeneratorUtilities ÆReport GeneratorSelect 1. Tektronix Specific2. Plug-fest Specific3. CSV FormatFile nameHost Full-Speed Signal Quality1.1 HubSwitch set to INIT此connector直接,接到Hub1Host Full-Speed Signal Qualityf Win 2K ( ) or XP PC 不执行HSElecticalTestTool软f测试 , Switch 切 INITf Scope 执行TDSUSB2 软选择Full Speed 将Signal quality 项选.f Eye diagram, Signal Rate, Rise time, Fall Time, EOP Width, Paired JK Jitter, Paired KJJitter, Consecutive Jitter, Cross Overf Configure 选Configure 选择Tier 6, Down-stream, Far End. 选Source 选择Input Channel.f 选RUN 时 Full-Speedf OK 测试Host Full-Speed Signal QualityHost Full-Speed Signal QualityÅWaveform Eye DiagramÆHost Low-Speed Signal Quality此connector直接,接到待测口Host Low-Speed Signal Qualityf Win 2K (英文版) or XP PC 不可执行HSElecticalTestTool软件f执行TDSUSB2 软件,选择Low Speed 然后将Signal quality 的九个项目全部点选.f Eye diagram, Signal Rate, Rise time, Fall Time, EOP Width, Paired JK Jitter,Paired KJ Jitter, Consecutive Jitter, Cross Overf按下Configure 点选Configure 然后选择Tier 6, Down-stream, Far End。

USB 2.0一致性测试

待測件為Device 待測件為
所要測試的訊號為Device送出的訊號訊號的方向為上傳送出的訊號, 訊號的方向為上傳(Up Stream目 1. Signal Quality
• • High speed test 480Mbit/S Full speed test 12Mbit/S
4
USB2.0 Signal Quality Testing
Signal Quality testing includes: Eye-Diagram testing Signal Rate End of Packet Width Cross-over voltage range (for LS and FS) JK jitter KJ jitter Consecutive jitter Monotonic test (for HS) Rise and Fall times
Win 2K (英文版 or XP PC 不可執行 HSElecticalTestTool 軟體英文版) 英文版軟體,選擇執行 TDSUSB2 軟體選擇 Low Speed 然後將 Signal quality 的九個項目全部點選. 九個項目全部點選 • Eye diagram, Signal Rate, Rise time, Fall Time, EOP Width, Paired JK Jitter, Paired KJ Jitter, Consecutive Jitter, Cross Over 按下 Configure 點選 Configure 然後選擇Tier 6, Down-stream, 然後選擇 Far End. 點選 Source 選擇所要用的 Input Channel. 點選 RUN 的符號此時可看到 Low-Speed 的波形按下 OK 既可完成測試 *如果如果Rise Time有問題可用的方式. 如果有問題可用cursor的方式的方式 File Preference Advance 將 Packet identification by user using cursors 勾選 , 如下兩張圖的例子

USB测试方案_YY

用户专用专用, 4Plug fest, 用户专用泰克
自动报告生成
4自动相差校正，保证测量的精确性自动相差校正相差校正， 4联机帮助提供了帮助功能联机帮助提供了帮助功能
二期星日月年
16
2009 12 22
Confidential
USB 2.0 Customers
Computers Semi-conductors Consumer Electronics Peripherals
具有USB功能的设备是PC行业内增长最快的细分市场之一
2000年月美国零售数据) 2000年4月美国零售数据)
(来源 – PCห้องสมุดไป่ตู้Data
具有USB功能的PC将从1996年仅600万台PC，增长到2003年底的7亿台
2000年 (来源 – Dataquest 2000年8月)
USB Implementers Forum公司 (USB-IF) 在COMDEX上宣布了两个受商标保护的新型徽标及徽标使用要求的一致性测试。(来源 – USB-IF 2000年 USB- 2000年
USB2.0 Compliance Test Solution from Tektronix
Tektronix (China) Co.Ltd 余洋 yang.yu@
二期星日月年
1
2009 12 22
Confidential
Agenda
USB Introduction& Compliance Testing USB Compliance Testing from Tektronix USB Compliance Testing
Confidential
Host Full-Speed Signal Quality

USB2.0从物理层到协议层的测试方案

基于Infiniium 9000系列示波器的从物理层到协议层USB2.0的测试方案安捷伦科技中国有限公司马卓凡概述自从1995年USB（Universal Serial Bus，通用串行总线）诞生起，由于USB接口的简单易用、支持热插拔、速度快等特点被广泛应用于当今的电子产品中，USB堪称是PC平台上最成功的I/O技术，除PC及外设外，也成为打印机、手机及各种消费电子产品标准的扩展接口。

USB标准规范历经多年的发展从第一代的1.0 Low Speed/1.1 Full Speed，演进到2.0 High Speed标准，补充标准On-The-Go（OTG）允许便携设备之间直接交换数据，在2008年底USB 3.0 Super Speed规范也已经发布。

这些接口标准都是向下兼容的，接口速度也由1.5Mbps，12Mbps，480Mbps发展到5Gbps。

随着接口传输速度的提高，对于设计和开发者来说，信号完整性的问题也越来越突显，另外以串行的传输结构，在协议层和互操作方面也有更大的挑战。

USB-IF（USB Implementers Forum，USB实施者论坛）制定了一致性测试规范，在电气层面、功能层面、互操作层面规定认证测试方案，并授权测试实验室认证测试，USB相关产品通过测试取得USB徽标的认证。

这就要求USB开发人员能够在实验室研发阶段，进行满足一致性规范要求的预测试，及早的发现和解决问题，从而加快产品的量产速度。

本文介绍了基于集示波器和协议分析功能为一身的安捷伦Infiniium 9000系列示波器用来测试和分析USB2.0物理电气层和协议层的完整解决方案*。

USB 2.0基本规范USB 2.0规范定义了三种信号速率，分别是低速，全速和高速，电气特性如表1所示：速率幅度上升时间**低速(Low Speed) 1.5 Mb/s 3.3 V 75 ns - 300 ns全速(Full Speed) 12 Mb/s 3.3 V 4 ns – 20 ns高速(High Speed) 480 Mb/s 400 mV 500 ps表1 USB 2.0电气特性规范* 由于篇幅所限，本文只介绍针对USB2.0总线的测试方案，USB3.0的测试方案另文介绍。

USB2.0&OTG简介

High speed device detect 1 下图为高速设备的内部线路，其中在HUB/HOST和Device端都有低速全速驱动器。高速电流源驱动器在Device端
High speed device detect 2
USB高速的信号传输速率为480Mbps,因此为了有很好的信号需要每根信号传输线对地的单端阻抗为45欧姆，D+ D-的差分阻抗为90欧姆。如page 18图所示，在device和HUB/HOST 端都有一个低速全速驱动器，在D+ D-上串联一个Rs电阻，Rs电阻值的大小为45欧姆。下图为高速设备连接到USB Hub的过程
CH1: DCH2: D+
High speed device detect 4 3. Hub 或者host 检测到device chirp信号, 产生一个交替的Chirp K-J-K-JKJ .(K:表示驱动电流到D-,J:表示驱动电流到D+).
4. Device 检测到序列Chirp K-J-K-J-K-J, 去掉D+ 的上拉，去掉上拉之后，为了保证高速信号对阻抗的要求，驱动Device端的低速全速驱动器到SE0状态，即连接D+ D-上的高速终端电阻Rs(45欧姆)到地，和HUB端的终端电阻并联后为 22.5欧姆，因此Chirp信号幅值变为400mv，此后进入high speed模式，此后 USB高速信号的电压幅值即为400mv. 注：HOST/HUB和Device端的低速高速驱动器在高速模式时的作用就是提供D+ D-对地的单端45欧姆和差分阻抗90欧姆，满足高速信号传输阻抗匹配的目的。 Full Speed: Device如果为一个全速设备，在侦测到复位信号后不会有电流源来驱动，因此一直保持D+ 3.3V的上拉。

转 Tektronix USB 测量知识

测试设备
信号质量测试要求带宽在 2.5 GHz 以上的实时示波器 (如 DPO7254)和单端(低速和全速)探头，差分(高速)探头(如分别对应的 P6243*1、P6245*1 和 P6248*1 以及 TAP2500 和 TAP1500)。此外，这一测试要求测试软件和测试夹具，如 TDSUSB2 一致性测试软件。
一般来说，可以预计在插入设备时会急剧吸收电流。在急剧吸收电流之后，会出现陡峭程度相对下降的衰落，如图 4 所示。可能会在电流曲线中观察到小的驼峰或微扰，具体视设备复位时间而定。
在理论上，检查浪涌电流需要计算特定时间周期上的电流积分(以示波器上两个垂直光标位置为界)。USB 2.0 规范规定，对 5.15 V 的 VBUS 值，设备吸收的总电荷应小于等于 51.5 uC。(这一测试的放弃极限是小于 150 uC)。
USB 2.0 高速测试
从本质上看，USB 2.0设备一致性测试全面遵守USB 1. 1 设备一致性测试协议，增加的主要内容是 USB 2.0 高速模式。高速模式给 USB 设备设计增加了全新的复杂度。USB 2.0 高速测试包括接收机灵敏度、CHIRP、单调性和阻抗测试。
接收机灵敏度测试
为提高在噪声环境中操作的强健性，在信号电平大于等于指定电平时，USB 2.0 高速设备必须对 IN* 数据包给予应答 N A K s * 。这一测试要求把 D U T 置于 T e s t _SE0_NAK 模式下。然后用来自信号发生器的信号代替主机，继续传送 IN 数据包。信号幅度以等于或高于 150 mV 的电平出现在 DUT 上。在这些电平水平上，DUT 必须处于非静噪模式，对 IN 包应答 NAKs。然后幅度降低到<100 mV，在这种电平水平上，DUT 必须静噪，不会对 IN 令牌应答 NAKs。

关于USB高速（HighSpeed）和中速（FullSpeed）的区分

关于USB高速（HighSpeed）和中速(FullSpeed)的区分USB中区分当前设备是低速还是中速（初始时，高速也被当做中速）的方法是检查D+ 或者D- 上的电阻。

如果发现时中速设备，还要有额外的动作来区分是中速还是高速设备。

具体的做法是：“主机识别一个中速设备是否支持高速。

要知道一个设备是否支持高速，需使用两个特殊的信号状态。

在Chirp J 状态时只有D+线会被驱动，在Chirp K 状态时只有D-线会被驱动。

在重置期间，支持高速的设备会送出一个Chirp K。

高速的集线器检测到该Chirp后，会反映遗传的交替Chirp K与J。

当设备检测到KJKJKJ的样式后，它会移除它的中速上升，然后在高速执行所有的通信。

如果集线器没有对设备的Chirp K做出相应，设备知道它必须继续使用中速通信。

高速的设备必须能够在中速时，相应检测设备的请求”【注释1】使用Ellisys USB 分析仪查看，其中的一个例子：Mass-storage USB 2.0 HS.ufo 可以看到这样一个握手。

上面的解释是“High speed Detection HandshakeHigh speed Detection Handshake state detectedStatusThe handshake completed successfully.When does this state occur?All high speed devices start at full speed to ensure USB 1.1 backward compatibility. If the upstream port(device) supports high speed signaling, it will generate a Chirp K state on the bus after Reset. If the downstream port (host) also supports high speed signaling, it will generate Chirps to change the link speed into high speed. If the downstream port (host) does not support high speed signaling, it will never see the upstream port (device) Chirp and the link speed will stay at full speed.”可惜的是无法看清楚具体的电气特性。

USB2.0&OTG简介

mon mode choke会影响到高速信号的质量，因此可以采取和0欧姆共lay 的形式，如果采用0欧姆时EMI测试通过的话则可以不用choke。
2. 应选择共模阻抗为80到90欧姆的共模扼流圈共模干扰信号经过两个绕向相反线圈时，产生两个相互抵消的磁场 H1、 H2 。
USB ESD protection 因为USB设备为热插拔设备，所以极易产生ESD对主板的电子元件造成损害。 USB 2。0具有可达480Mbps的传输速率，所以USB信号对于线路上的寄生电容非常的敏感，就算是PF级可能也会造成USB信号失真导致USB设备不能工作。所以要选择电容最小的ESD保护器件。下面是理想的ESD保护器件的要求 1. 至少能够承受8KV的ESD 2. 低电容。<2pf能够很好的减少对USB信号的干扰 3. 响应迅速。从最开始的ESD pulse rise能够快速的响应 4. 低漏电流，减小电源的损耗
High speed device detect 1 下图为高速设备的内部线路，其中在HUB/HOST和Device端都有低速全速驱动器。高速电流源驱动器在Device端
High speed device detect 2
USB高速的信号传输速率为480Mbps,因此为了有很好的信号需要每根信号传输线对地的单端阻抗为45欧姆，D+ D-的差分阻抗为90欧姆。如page 18图所示，在device和HUB/HOST 端都有一个低速全速驱动器，在D+ D-上串联一个Rs电阻，Rs电阻值的大小为45欧姆。下图为高速设备连接到USB Hub的过程
பைடு நூலகம்
USB connector Protocol and pin define
OTG-On The Go

一致性测试软件

LeCroy, ActiveDSO, ProBus, SMART Trigger, JitterTrack, WavePro, WaveMaster, WaveSurfer和Waverunner均为力科公司注册商标。

本文中的信息代替此前所有版本。

技术数据如有变更，恕不另行通告。

制造商厂经过ISO 9000质量管理体系认证。

如需查看证书，请访问网址：。

本电子产品应根据各个国家和地区规定的不同法规进行回收和处理。

许多国家禁止以标准废品回收方式处理废弃的电子设备。

如需了解与正确处理和回收力科产品有关的更多信息，请访问网址：。

USB2-OM-E Rev D 903076目录引言 (5)主机测试 (5)设备测试 (5)集线器测试 (5)设备清单 (6)USB测试夹具 (6)安装 (8)USB-IF测试脚本 (8)测试台计算机 (8)MATLAB (8)USB测试向导和HS测试工具 (8)高速信号质量 (10)主机和集线器下行高速信号质量 (10)设备和集线器上行高速信号质量 (10)高速分组参数 (11)高速暂停恢复复位定时 (12)设备高速暂停恢复复位 (12)集线器高速暂停恢复复位定时 (12)主机和集线器断开连接 (13)集线器高速上行继电器 (14)集线器高速下行继电器 (15)接收机灵敏度 (16)全速和低速测试 (19)设备要求 (19)标准USB产品 (19)标准测试设备 (19)集线器和主机下跌测试 (20)自行供电的集线器或主机 (20)总线供电的集线器 (21)测试标准 (21)衰落测试 (21)测试步骤 (22)测试标准 (22)测试结果 (22)报告结果 (22)主机低速下行信号质量 (23)主机全速下行信号质量 (23)涌入电流 (24)集线器下行低速信号质量 (25)集线器全速下行信号质量 (25)设备和集线器全速上行信号质量测试 (26)引言USB2是一种自动测试套件，它执行USB-IF要求所有测试，确定主机、集线器和设备物理层是否满足标准。

嵌入式Linux的USB Chirp无线网卡驱动设计

嵌入式Linux的USB Chirp无线网卡驱动设计叶学程;郑霖【期刊名称】《单片机与嵌入式系统应用》【年(卷),期】2014(14)7【摘要】给出一种嵌入式 Linux下 USB接口的Chirp无线通信网卡驱动的设计与实现。

分析了 Linux下无线网卡的驱动模型，为含有微处理器、射频发射模块和USB接口的无线网络节点编写网卡驱动。

与嵌入式 Linux系统配合，成功组建了嵌入式 AODV自组织无线网络。

测试效果表明：该网卡驱动实现了上层 TCP/IP 应用的透明网络传输，下层实现了基于 AODV路由的自组织多跳网络通信，提高了无线节点应用的可移植性和复用性。

%This paper introduces the design and implementation of Chirp USB wireless network card driver in embedded Linux operating system.We analyze the driver model of wireless network card in Linux,and then the card driver is written in the wireless network nodes which contains microprocessor,RF transmitter module and USB interface.Cooperated with embedded Linux system,the system sets up the embedded AODV self-organized wireless network successfully.Test results show that the network card driver in the upper layer has achieved TCP/IP application transparent network transmission,in the lower layer it has realized self-organization and multi-hop network communication based on AODV routing,and it improves the portability and reusability of the application of the wireless transceiver.【总页数】4页(P53-56)【作者】叶学程;郑霖【作者单位】桂林电子科技大学信息与通信学院，桂林 541004;桂林电子科技大学信息与通信学院，桂林 541004【正文语种】中文【中图分类】TP311【相关文献】1.嵌入式Linux的USB驱动设计 [J], 李丽宏;郝志刚2.嵌入式Linux下USB主控制器驱动设计 [J], 杨磊;蒋念平3.基于嵌入式linux的USB驱动设计 [J], 杨建华;黄字东;陈安;胡跃明4.嵌入式Linux下USB2.0海量存储设备驱动设计 [J], 冯韬;李广军5.基于嵌入式Linux的USB键盘驱动设计 [J], 李小琦;汪红因版权原因，仅展示原文概要，查看原文内容请购买。

USB-chirp序列测试

USB2.0信号测试指导

测试指导类-USB接口指标测试指导书

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