数字集成电路分析与设计 第三章答案

CHAPTER 3
P3.1. The general approach for the first two parameters is to figure out which variables should
remain constant, so that when you have two currents, you can divide them, and every variable but the ones you want to calculate remain. In this case, since the long-channel transistor is in saturation for all values of V GS and V DS , only one equation needs to be considered:
()()2
112DS N OX GS T DS W I C V V V L
μλ=
-+ For the last two parameters, now that you have enough values, you can just choose one
set of numbers to compute their final values.
a. The threshold voltage, V T0, can be found by choosing two sets of numbers with the same V DS ’s but with different V GS ’s. In this case, the first two values in the table can be used.
()()()()()()2
11122
222
2
01022001121121.2 1.210000.8280
0.8DS N OX GS T DS DS N OX GS T DS T DS T DS T T W I C V V V L W I C V V V L
V I V I V V μλμλ=-+=-+-⎛⎫-===
⎪--⎝⎭ 00.35V T V ∴=
b. The channel modulation parameter, λ, can be found by choosing two sets of numbers
with the same V GS ’s but with different V DS ’s. In this case, the second and third values in the table can be used.
()()221 1.2250
10.8247
DS DS I I λλ+==+ -10.04V λ∴=
c. The electron mobility, µn , can now be calculated by looking at any of the first three sets of numbers, but first, let’s calculate C OX .
631062
-3
1m 10μm
22?.210μm
1m 10 0.0351 1.610/2.210OX OX t C F cm
--=⨯⨯===⨯
Now calculate the mobility by using the first set of numbers.
()()()()()()()()()()()()
22
111021262101111 1.21 1.222210002cm 348V-s 1.610(4.75)1.20.3510.04 1.21DS N OX GS T DS N OX T DS N OX GS T DS W W I C V V V C V L L
A I W C V V V L μλμλμμλ-=
-+=-+===⨯-+-+
d. The body effect coefficient gamma, γ, can be calculated by using the last set of numbers since it is the only one that has a V SB greater than 0V.
()()()()
2
4412
4
414411221 1.20.468V
DS N OX GS T DS DS GS T N OX DS GS T T GS W I C V V V L
I V V W C V L
V V V V μλμλ=-+-=+-=
=-
==
1
2
000.6V
T T T T V V V V γγ
γ=+-==
=
=
P3.2. The key to this question is to identify the transistor’s region of operation so that gate
capacitance may be assigned appropriately, and the primary capacitor that will discharged
at a rate of V I
t C ∂∂= by the current source may be identified. Then, because the nodes are
changing, the next region of operation must be identified. This process continues until the transistor reaches steady state behavior. Region 1:
Since 0V GS V = the transistor is in the cutoff region. The gate capacitance is allocated to GB C . Since no current will flow through the transistor, all current will come from the source capacitor and the drain node remains unchanged.
68-151010V V 6.67100.6671510s ns
SB V I I t C C -∆⨯====⨯=∆⨯ The source capacitor will discharge until 1.1V GS T V V == when the transistor enters the
saturation region. This would require that the source node would be at 3.3 1.1 2.2V S G GS V V V =-=-=.
()159
6
1510 3.3 2.2 1.6510s 1.65ns 1010
C t V I ---⨯∆=∆=-=⨯=⨯ Region 2:
The transistor turns on and is in saturation. The current is provided from the capacitor at
the drain node, while the source node remains fairly constant. The capacitance at the drain node is the same as the source node so the rate of change is given by:
68-151010V V 6.67100.6671510s ns
SB V I I t C C -∆⨯====⨯=∆⨯ Since the transistor is now in the saturation region, GS V can be computed based on the
current flowing through the device.
(
)
2
2 1.1 1.37V 3.
3 1.37 1.93V
GS T GS
T S G GS kW I V V L
V V V V V =-==
+==-=-=
This is where the source node settles. This means that most of the current is discharged through the transistor until the drain voltage reaches a value that puts the transistor at the edge of saturation.
3.3 1.1 2.2V
DS GS T
D G T V V V V V V =-=-=-=
If we assume that all the current comes from the transistor, and the source node remains fixed, the drain node will then discharge at a rate equal to that of the source node in the first region. Region 3:
The transistor is now in the linear region the gate capacitance is distributed equally to both GS C and GD C . and both capacitors will discharge at approximately the same rate.
-151510V
0.286
21510510ns
V I A t C μ-∆===∆⨯⨯+⨯
The graph is shown below.
00.511.522.5
33.50
2
4
6
8
10
12
Time (ns)
V o l t a g e (V )
P3.3. The gate and drain are connected together so that DS GS V V = which will cause the
transistor to remain in saturation. This is a dc measurement so capacitances are not required. Connect the bulk to ground and run SPICE. P3.4. Run SPICE. P3.5. Run SPICE. P3.6. Run SPICE. P3.7. Run SPICE.
P3.8. First, let’s look at the various parameters and identify how they affect V T .
∙ L – Shorter lengths result in a lower threshold voltage due to DIBL. ∙ W – Narrow width can increase the threshold voltage.
∙ V SB – Larger source-bulk voltages (in magnitude) result in a higher threshold voltage. ∙ V DS –Larger drain-source voltages (in magnitude) result in a lower threshold voltage due to DIBL. The transistor with the lowest threshold voltage has the shortest channel, larger width, smallest source-bulk voltage and largest drain-source voltage. This would be the first transistor listed.
The transistor with the highest threshold voltage has the longest channel, smallest width,largest source-bulk voltage and smallest drain-source voltage. This would be the last transistor listed. P3.9. Run SPICE.
P3.10. Run SPICE. The mobility degradation at high temperatures reduces I on and the increase
mobile carriers at high temperatures increase I off . P3.11. The issues that prompted the switch from Al to Cu are resistance and electromigration.
Copper wires have lower resistances and are less susceptible to electromigration problems. Copper on the other hand, reacts with the oxygen in SiO 2 and requires cladding around the wires to prevent this reaction.
For low-k dielectrics, the target value future technologies is 2.
High-k dielectrics are being developed as the gate-insulator material of MOSFET’s. This is because the current insulator material, SiO 2, can not be scaled any longer due to tunneling effects.
P3.12. Self-aligned poly gates are fabricated by depositing oxide and poly before the source and
drain regions are implanted. Self-aligned silicides (salicides) are deposited on top of the source and drain regions using the spacers on the sides of the poly gate. P3.13. To compute the length, simply use the wire resistance equation and solve for L .
L
R TW
RTW
L ρρ
==
First convert the units of ρ to terms of μm. Aluminum:
2.7μΩρ=cm 6Ω10μΩ⨯610μm
100cm ⨯()()()0.027Ωμm
1000.812963μm 2.96mm
0.027
RTW
L ρ
==
=
==
Copper:
1.7μΩρ=cm 6Ω10μΩ⨯610μm
100cm ⨯()()()0.017Ωμm
1000.814706μm 4.71mm
0.017
RTW
L ρ
==
=
==
P3.14. Generally, the capacitance equation in terms of permittivity constants and spacing is:
k C WL t
ε=
a. 4k = ()()
()()23
00
48.8510 3.54
1100SiO k k C WL TL t S S S
εε-====
b. 2k = ()()
()()3
00
28.8510 1.77
1100k k C WL TL t S S
S
εε-====
The plots are shown below.
Capacitance vs. Spacing
01234567
80
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Spacing (um)
C a p a c i t a n c e (f F
)。