基于FPGA的数字滤波器

学士学位论文论文题目: 基于FPGA的数字滤波器设计

院 (部)名称:电气信息工程学院

学生姓名:

专业:测控技术与仪器学号:

指导教师姓名:

摘要

本论文设计了一个基于FPGA（现场可编程逻辑门阵列）FIR（有限脉冲响应）31阶低通滤波器，通带截止频率为0.1MHz，通带波纹最大1dB，阻带最小衰减-50dB，数据的输入输出宽度为8位，采样频率5MHz。

滤波器分为模拟滤波器和数字滤波器，在信号系统邻域中，一般除了A/D 转换前期的滤波和D/A转换后的滤波使用模拟滤波器，基本上其他的滤波一般优先考虑数字滤波器。数字滤波器与模拟滤波器相比有许多的优点：频域易控制，性能指标好；容易实现线性相位的系统，而且稳定，基本上不受外界影响；可重用性和灵活性比较高，只需编程就可以修改其特性，设计周期短。

数字滤波是推动数字信号处理与相关芯片快速发展的一个要素。本论文的FPGA芯片选用Altera公司Cyclone2系列的EP2C8Q208C8N芯片，模数转换使用ADC9280，数模转换使用DAC9708，来实现数字滤波器，FPGA与ASIC、DSP相比，具有明显的优势，在功耗，体积，成本都优于ASIC、DSP，并且处理效率高，可编程性好，并行处理能力非常强，能完成DSP很难完成的许多功能。

本论文首先简单的介绍数字滤波器、FIR滤波器、FIR的窗口函数选择以及FPGA分布式算法的实现，并对系统硬件各功能模块进行了说明；然后根据系统总体设计的要求指标，使用MATLAB来设计确定系数，因为FPGA不能表示浮点数，所以对系数进行了量化，使用verilog HDL硬件语言编程，Modelsim进行功能仿真；最后使用实物来验证结果，并达到预期的目的。

关键词：FPGA，FIR滤波器，MATLAB，分布式算法

ABSTRACT

In this thesis, the FIR(Finite Impulse Response )31 -order low-pass filter based on FPGA(programmable logic device),passband cutoff frequency of 0.1MHz,the maximum passband ripple 1dB,stopband minimum attenuation -50dB, input data The output width is 8,the sampling frequency 5MHz.

Filter into the analog and digital filters,in the neighborhood of the signal system,generally in addition to A/D conversion using the analog filter pre- filter filtering and D/A conversion,substantially the other digital filtering is generally preferred pared with the analog filter digital filter has many advantages: easy to control the frequency domain,a good performance;easy to achieve linear phase systems,and stable,essentially free from outside influence;reusability and flexibility is relatively high,only programming can be required to modify its properties,short design cycle.

Digital filtering is an important element to promote the rapid development of digital signal processing and related chips.In this paper, Altera's FPGA chip selection Cyclone2 series EP2C8Q208C8N chips,analog to digital conversion using ADC9280,digital to analog conversion using the DAC9708,to implement digital filters,FPGA compared to ASIC,DSP,has obvious advantages in power consumption, size,costs are better than ASIC, DSP,and high efficiency,good programmable parallel processing capability is very strong,able to complete many of the features DSP difficult to accomplish.

This paper first introduces,digital FIR filter and FIR filters and window function selection and FPGA distributed algorithms,and system hardware of the functional modules are described;then index system

according to the requirements of the overall design,the use of MATLAB to designed to determine the coefficients can not be represented.

Key words:FPGA,FIR filter,MATLAB,Distributed algorithms