TN92驱动板原理图
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C
LCD_PWR SDA SCL VM VFRAME VLINE VCLK TSXM TSXP TSYM TSYP
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
1
A
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC)
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC)
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC) Vgl
1
Vgl GND
1
GND GND0
1
GND
Rev 0.2 1 of 1
5
4
3
2
1 2 3 4
J4 C26
B
TSXP TSYP TSXM TSYM
U/D GND VCC GND VCC
R/L VCC GND GND VCC TSYM TSYP
Scanning direction Up to down, left to right Down to up, right to left Up to down, right to left Down to up, left to right 0 R24
2
R15 C25 330K 22pF
1
1K,1% 16.4V--0.5mA C24 100nF
CN4 R16 1uF 6K8,1%
CN5 100nF
1 2 2 3
SW GND FB
Vin
5
10uF100nF
1 44.2K1%
2
2
EN
4
2
K=7.456 TPS61040 CON4 CON4 CON4
A
1
D
SW
IN
1
VDD_IN1 VDD_IN2 VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 GND0 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 GND1 VD16 VD17 VD18 VD19 VD20 VD21 VD22 VD23 GND2 LCD_PWR I2CSDA I2CSCL VM VFRAME VLINE VCLK TSXM TSXP TSYM TSYP
VDD5V
1 2 2 2 2 1 2
J3 C5 10uF/16V
D
BL
1
1 2
J5
2
D10 SMB58
C37 10uF
C38 R26 100nF 100K
6
2
1
VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VD16 VD17 VD18 VD19 VD20 VD21 VD22 VD23
RESET VD1 VD3 VD5 VD7 VD9 VD11 VD12 VD14 VD16 VD18 VD20 VD22 SDA VFRAME VCLK TSXM
1
2 3
2
2
R9 100K
LX GND VOout EN
来自百度文库
5 4
C15
1 1
0 R8
2 2
C13 10uF C14 100nF
VDD33V
TSYM
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
VDD_5V VDD_5V RESET VD1 VD3 VD5 VD7 VD9 VD11 VD12 VD14 VD16 VD18 VD20 VD22 GND I2CSDA 35 VS VCLK 41 TSXM 45 TSYM 49
CON50
VDD_5V GND VD0 VD2 VD4 VD6 VD8 VD10 GND VD13 VD15 VD17 VD19 VD21 VD23 LCD_PWREN I2CSCL ENABLE HS 40 GND TSXP GND TSYP GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
LCD 7/8"
C12 C11 D2 + R10 100nF 2 30pF(NC) 330pF(NC) 330pF(NC)
10K
2
1
3K,1%
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC)
R25
0
2
C27
C28
C29
1 1
2 2
INT STD VDD33V AVdd
1
R13
1
1
1uF
1 2 3 4
J6 C43 C44 C45
TSXP TSYP TSXM TSYM J7 C46
1 2 3 4
TSXP TSYP TSXM TSYM J9 C55 C54 C52 C53
1 2 3 4
TSXP TSYP TSXM TSYM BL C51 C50 C48 C49
1
BL Vcom
1
Vcom AVdd
5
4
3
2
1
VDD5V
VDD33V MODE:DE/SYNC mode select, Normally pull high. H: DE mode. L: HS/VS mode. CON1 1 RN2 BL 2 NC0 NC1 3 10K(NC) 4 NC2 5 NC3 3.8V Vcom 6 GND0 5.5mA VDD33V 7 Vcom1 8 VCC MODE 9 MODE VM 10 DE VFRAME 11 VS R3 VLINE 12 HS VD7 13 B7 10K VD6 14 B6 VD5 15 B5 VD4 16 B4 VD3 17 B3 VD2 18 B2 VD1 19 B1 VD0 20 B0 VD15 21 G7 VD14 22 G6 VD13 23 G5 VD12 24 G4 VD11 25 G3 VD10 26 G2 VD9 27 G1 VD8 28 G0 VD23 29 R7 VD22 30 R6 VD21 31 R5 VDD33V VDD33V VD20 32 R4 VD19 33 R3 VD18 34 R2 VD17 35 R1 RN3 R7 VD16 36 R0 10K(NC) 10K 37 GND1 VCLK 38 DCLK 39 GND2 L/R 40 L/R U/D 16v 41 U/D Vgh -7v 42 Vgh Vgl 10.4v 43 Vgl AVdd 44 AVdd R12 RN4 RESET 45 RESET 10K 10K(NC) 46 NC4 Vcom DITHB=1,18bit 47 Vcom2 DITHB=0,24bit 48 DITHB 49 GND3 50 NC5 NC6 L5 4.7uH D9 CON2 BL 1N5822 U1 CON2
1
AVdd Vgh
1
Vgh
1.VCLK时钟线尽量短，不弯曲，靠近末端加电容，不形成天线辐射 2.HS,VS信号尽量短，靠近末端加电容，不形成天线辐射 3.40P接口位置上拉，50接口位置上拉，保证LCD线拉直不弯曲 4.去掉50P座子上多余的复位信号
Title <LCD_8"> Size A3 Date: Document Number <1> Monday, April 23, 2012 Sheet
15K,1% 15K+ C32 100nF
1
C47 100nF
R18 R14 Vcom
1
2
D6 4.3V稳压管
AVdd
DAN217 1 0
3 1
MBR0530 R17
CON4
10uF
1
3
C18
1
DAN217
D5
2
C21 C22
1
1
R19 6K8+ 8K2
C33 1uF
C34 100nF
Vgh C23 100nF
2
D4
1
2 1K,1%
Vgl -7v---1mA -6.8-7.1V
B
2
TOUCH 8"
SHUTDOWN VDD GND INT SDA SCL NC NC NC NC
J8
1
1 2 3 4 5 6 7 8 9 10
2
STD VDD33V INT SDA SCL
3 2
RN5 1uF D8 10.4v--32mA 2 C19 100nF C20 100nF L4 4.7uH VDD5V
LCD_40P
FSE EN SS
FB
1
2
7 3 8
5
VDD5V
J1
2
C35
1
R28 10K
R27 10K
R22 69.9K,1%
GND
1
COMP
1
2.2nF
2
LCD_PWR
VDD5V
R21 10K,1%
2
R23 100K
MP1542 C36 10nF
J2
2
4
2
R20 15K
VDD5V
C9 C10 100nF S2 10uF 1 Vin VDD33V L3 10uH
1
VD0 VD2 VD4 VD6 VD8 VD10 VD13 VD15 VD17 VD19 VD21 VD23 LCD_PWR SCL VLINE TSXP TSYP
C
1
1
1
XC9216A33CMR
1
2
2
1
2
33nF(NC)
CON4
LCD_50P
VDD33V VCLK VFRAME VLINE D7 MBR0530 RESET D3 1uF DAN217 C30 C31 100nF 20-22V 20.6V C17 1uF 3V稳压管 1 -11v R11 -10V CN1 CN2 CN3 C16
LCD_PWR SDA SCL VM VFRAME VLINE VCLK TSXM TSXP TSYM TSYP
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
1
A
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC)
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC)
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC) Vgl
1
Vgl GND
1
GND GND0
1
GND
Rev 0.2 1 of 1
5
4
3
2
1 2 3 4
J4 C26
B
TSXP TSYP TSXM TSYM
U/D GND VCC GND VCC
R/L VCC GND GND VCC TSYM TSYP
Scanning direction Up to down, left to right Down to up, right to left Up to down, right to left Down to up, left to right 0 R24
2
R15 C25 330K 22pF
1
1K,1% 16.4V--0.5mA C24 100nF
CN4 R16 1uF 6K8,1%
CN5 100nF
1 2 2 3
SW GND FB
Vin
5
10uF100nF
1 44.2K1%
2
2
EN
4
2
K=7.456 TPS61040 CON4 CON4 CON4
A
1
D
SW
IN
1
VDD_IN1 VDD_IN2 VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 GND0 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 GND1 VD16 VD17 VD18 VD19 VD20 VD21 VD22 VD23 GND2 LCD_PWR I2CSDA I2CSCL VM VFRAME VLINE VCLK TSXM TSXP TSYM TSYP
VDD5V
1 2 2 2 2 1 2
J3 C5 10uF/16V
D
BL
1
1 2
J5
2
D10 SMB58
C37 10uF
C38 R26 100nF 100K
6
2
1
VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VD16 VD17 VD18 VD19 VD20 VD21 VD22 VD23
RESET VD1 VD3 VD5 VD7 VD9 VD11 VD12 VD14 VD16 VD18 VD20 VD22 SDA VFRAME VCLK TSXM
1
2 3
2
2
R9 100K
LX GND VOout EN
来自百度文库
5 4
C15
1 1
0 R8
2 2
C13 10uF C14 100nF
VDD33V
TSYM
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
VDD_5V VDD_5V RESET VD1 VD3 VD5 VD7 VD9 VD11 VD12 VD14 VD16 VD18 VD20 VD22 GND I2CSDA 35 VS VCLK 41 TSXM 45 TSYM 49
CON50
VDD_5V GND VD0 VD2 VD4 VD6 VD8 VD10 GND VD13 VD15 VD17 VD19 VD21 VD23 LCD_PWREN I2CSCL ENABLE HS 40 GND TSXP GND TSYP GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
LCD 7/8"
C12 C11 D2 + R10 100nF 2 30pF(NC) 330pF(NC) 330pF(NC)
10K
2
1
3K,1%
1nF(NC) 1nF(NC) 1nF(NC) 1nF(NC)
R25
0
2
C27
C28
C29
1 1
2 2
INT STD VDD33V AVdd
1
R13
1
1
1uF
1 2 3 4
J6 C43 C44 C45
TSXP TSYP TSXM TSYM J7 C46
1 2 3 4
TSXP TSYP TSXM TSYM J9 C55 C54 C52 C53
1 2 3 4
TSXP TSYP TSXM TSYM BL C51 C50 C48 C49
1
BL Vcom
1
Vcom AVdd
5
4
3
2
1
VDD5V
VDD33V MODE:DE/SYNC mode select, Normally pull high. H: DE mode. L: HS/VS mode. CON1 1 RN2 BL 2 NC0 NC1 3 10K(NC) 4 NC2 5 NC3 3.8V Vcom 6 GND0 5.5mA VDD33V 7 Vcom1 8 VCC MODE 9 MODE VM 10 DE VFRAME 11 VS R3 VLINE 12 HS VD7 13 B7 10K VD6 14 B6 VD5 15 B5 VD4 16 B4 VD3 17 B3 VD2 18 B2 VD1 19 B1 VD0 20 B0 VD15 21 G7 VD14 22 G6 VD13 23 G5 VD12 24 G4 VD11 25 G3 VD10 26 G2 VD9 27 G1 VD8 28 G0 VD23 29 R7 VD22 30 R6 VD21 31 R5 VDD33V VDD33V VD20 32 R4 VD19 33 R3 VD18 34 R2 VD17 35 R1 RN3 R7 VD16 36 R0 10K(NC) 10K 37 GND1 VCLK 38 DCLK 39 GND2 L/R 40 L/R U/D 16v 41 U/D Vgh -7v 42 Vgh Vgl 10.4v 43 Vgl AVdd 44 AVdd R12 RN4 RESET 45 RESET 10K 10K(NC) 46 NC4 Vcom DITHB=1,18bit 47 Vcom2 DITHB=0,24bit 48 DITHB 49 GND3 50 NC5 NC6 L5 4.7uH D9 CON2 BL 1N5822 U1 CON2
1
AVdd Vgh
1
Vgh
1.VCLK时钟线尽量短，不弯曲，靠近末端加电容，不形成天线辐射 2.HS,VS信号尽量短，靠近末端加电容，不形成天线辐射 3.40P接口位置上拉，50接口位置上拉，保证LCD线拉直不弯曲 4.去掉50P座子上多余的复位信号
Title <LCD_8"> Size A3 Date: Document Number <1> Monday, April 23, 2012 Sheet
15K,1% 15K+ C32 100nF
1
C47 100nF
R18 R14 Vcom
1
2
D6 4.3V稳压管
AVdd
DAN217 1 0
3 1
MBR0530 R17
CON4
10uF
1
3
C18
1
DAN217
D5
2
C21 C22
1
1
R19 6K8+ 8K2
C33 1uF
C34 100nF
Vgh C23 100nF
2
D4
1
2 1K,1%
Vgl -7v---1mA -6.8-7.1V
B
2
TOUCH 8"
SHUTDOWN VDD GND INT SDA SCL NC NC NC NC
J8
1
1 2 3 4 5 6 7 8 9 10
2
STD VDD33V INT SDA SCL
3 2
RN5 1uF D8 10.4v--32mA 2 C19 100nF C20 100nF L4 4.7uH VDD5V
LCD_40P
FSE EN SS
FB
1
2
7 3 8
5
VDD5V
J1
2
C35
1
R28 10K
R27 10K
R22 69.9K,1%
GND
1
COMP
1
2.2nF
2
LCD_PWR
VDD5V
R21 10K,1%
2
R23 100K
MP1542 C36 10nF
J2
2
4
2
R20 15K
VDD5V
C9 C10 100nF S2 10uF 1 Vin VDD33V L3 10uH
1
VD0 VD2 VD4 VD6 VD8 VD10 VD13 VD15 VD17 VD19 VD21 VD23 LCD_PWR SCL VLINE TSXP TSYP
C
1
1
1
XC9216A33CMR
1
2
2
1
2
33nF(NC)
CON4
LCD_50P
VDD33V VCLK VFRAME VLINE D7 MBR0530 RESET D3 1uF DAN217 C30 C31 100nF 20-22V 20.6V C17 1uF 3V稳压管 1 -11v R11 -10V CN1 CN2 CN3 C16