parameter参数传递的16位乘法器.docx

parameter参数传递的16位乘法器

选用课后习题设计

题目：设计一个4位乘法器，为此首先设计一个4位加法器，用例化语句调用这个加法器，用移位相加的方式完成乘法。并以此为基础，使用parameter参数传递的功能, 设计一个16位乘法器。

加法器采用行波进位的方法。4位加法器设计如下：

module ripple_carry_adder(x, y, cin, sum, cout);

parameter N = 4;

input cin;

input [N-l:0] x, y;

output [N-l:0] sum;

output cout;

reg cout;

reg [NT:0] sum;

reg q[N:0];

always @(x or y or cin)begin:ADDER integer i;

q[0] = cin;

for(i=0; i<=N~l; i=i+l)begin

q[i+l] = (x[i]&y[ij) | (x[i]&q[ij)

sum[i] = x[i]八 y[i] " q[i];

end

cout = q[N];

end

endmodule

以此为棊础的4位乘法器如下:

module top (load,

parameter input

input rst, elk, dataa, datab, sum); n = 4;

load;

rst;

input elk;

input [n~l:0] dataa;

input [nT :0] datab;

output [2*nT:0] sum;

pareimeter [1:0] state_sl = 0,

state_s2 二1;

reg [1:0] ncxt_statc;

reg [2*nT:0] dataa_register;

reg [n-1:0] databregister;

reg [2*nT:0] sum tmp, sum_tmp2;

wire cout;

assign sum = sum tmp;

always @(negedge rst or posedge elk)

begin:

integer i;

if (rst == V bO)

begin

for (i = 0; i <= 2 * n - 1; i = i + 1) begin

dataa_register[i]〈二1'bO; sum_tmp[i] <= l，b0;

end

for (i = 0; i <= n - 1; i = i + 1) dcitab_register[i] <= 1'bO;

next_state <= state_sl;

end

else

case (next_state)

state_sl :

if (load == r bl)

begin

dataa_register[n - 1:0]〈二dataa; datab_register <= datab;

for (i = 0; i <= 2 * n - 1; i = i + 1) sum_tmp[i] <= 1'bO;

next state <= statc s2;

MM

end

state_s2 :

begin

if (datab_register[0]二二1" bl)

// sum_tmp <= sum_tmp + dataa_register; sum_tmp<={(n-1)' bO,

cout, sum_tmp2[n-1:0]};

if (datab_rcgister 二二4" hO) next_state 〈二state_sl;

else

begin

datab_register[n - 2:0] <= datab_register[n - 1:1];

datab_registcr[n - 1]〈二l，b0;

dataa_register[2 * n - 1:1]〈二dataa_register[2 * n

-2:0];

dataa_register[0] <= 1'bO; end

end

endcase

end

ripple_carry_adder # (N

uO(? x(sum_tmp)、. y(dataa_register)、. cin(l" bO)、endmodule

以此为基础的16位乘法器为:

parameter n = 16;

input load;

integer i;

assign sum 二sum_tmp;? sum(sum_tmp2),

4)

? cout

modul e top (load, rst, elk, dataa, datab, sum, ready);

in put input in put [nT :0] input

[n~l:0] output

[2*n-l:0] output parameter [1:0]

reg [1:0] reg

[2*nT:0] reg [n-

1:0] reg [2*nT:0] reg

wire [2*n-1:0] wire cout; rst; elk; dataa; datab;

sum; ready;

state_sl = 0, state_s2 = 1; next state; dataa_register; datab_register; sum_tnip;

ready; sum

tmp2;

always @(negedge rst or posedge elk)

begin

if (rst == V bO)

begin

ready<=T bO;

for (i 二0; i 〈二 2 * n - 1; i 二i + 1)

begin

dataa_register[i] <= 1"bO;

sum_tmp[i]〈二1'bO;

end

for (i 二0; i <= n - 1; i 二i + 1) datab_register[i] <= 1'bO;

next statc 〈二state si;

MM

end

else

case (next_state)

state_sl :

if (load 二二 f bl)

begin

dataa_register[2*n - l:n]〈=0;

deitaa_register [n - 1:0] <= dataa; datab_register <= datab;

rcady<=r bO;

for (i = 0; i 〈二 2 * n - 1; i 二i + 1)

sum_tmp[i] <= 1'bO;

next_state <= state_s2;

end

statc s2 :

begin

if (datab register[0] == l'bl)

// sum_tmp <= sum_tmp + dataa_register;

sum_tmp<={sum_tmp2};

if (datab register == 4,hO) begin

next_state <= state_sl; ready<=r bl;

end

else

begin

datab_register[n - 2:0] <= datab_register[n - 1:1]; datab

register[n - 1] <= l'bO;

dataa_register[2 * n - 1:1]〈二dataa_register[2 * n

-2:0];

dataa_register[0] <= 1'bO;

end

end

endcase

end

ripple_carry_adder#(2*n)

uO (? x (sum_tmp), ? y (dataa_register), ? cin (T bO), ? sum

? cout (cout));

(sum_tmp2), endmodule

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4位乘法器

16位乘法器