封装产业以及制程介绍

➢Co-work with VisEra to allow M-Project release.(2008/04)
Major Accomplishments
Productivity improvement(2008~2009/03):IDL reduce 5HC
➢Design new robot for PP stage, capacity improve 30% (55die to 80die/min) ➢Developer wet bench mode for De-flux process
PIE 2.8 Year TSMC
(Shanghai)
34 Sec.
Xintec 2.3 Year (Backend) Manager
➢ 06/2002 獲得台積傑出工程師獎 ➢ photo rework rate 0.8% from 4.3%, running 3 years , TSMC 1st ➢ Mask manager system (Repeating defect=0 running 13 months) ➢ Support PIE to gain 3% yield at PHOTO process
Continue reduce cost & good productivity to gain high profit.
Setup strong training system to reduce business trade Cycle impact
Developer dispatch system to enhance the efficiency for Saw & Notch &
Personality & attributes:
Good Observation & Execute to achieve the targets
En
Responsibility & Conscientious
g
M
Potential scope:
FG
Managerial skills
Nice work style of the leadership
➢ manual to auto (1 to 25 pcs), capacity improve 70% ; saving 1 HC/Shift. ➢ cost saving 0.6M/Year ➢Apply Auto notch and dicing function ➢ Productivity improvement 100% (1:5 to 1:10), saving 6 DL/Shift, ➢ cost saving NT$3.4M/Year ➢ OCAP rate < 5%
Continuously improve performance through innovations
CycleБайду номын сангаасtime improve (2.5 day)
Productivity & Capacity improve >30%
MO reduce (Goal=0) &
System Training system
Grinding stage
SMF stage
LL stage
Notch stage
LE stage
BGA stage
Dicing stage
ShellCase – CSP Technology
Passivation & Pad Extension Layer Glass 1 Attachment
➢Maintain capability promotion by Eng.
$
Quality improvement
➢Improve : Glass Scrap(0.46% 0.39%) &
Glass Crack defect ( 0.6% 0.2%) & Particle (35%0.0%) at grinding process
Discipline raise
➢Enhance self audit and find out the Operation handing risk and take action
➢Modify tooling & Machine (wet bench) ➢Rack manager system
Developer system
Auto
Major Accomplishments
DL Productivity improvement (2009/06~Now) ➢Line_A with Line_B Operation merge (SMF~FVI): Saving 20 HC ➢Raise FVI OMI Inspection rate (48% to 70%) and reduce simplify (25 to 3pcs by lot (1pcs:50dies)), reduce 80%; Saving 8 HC ➢Reduce in-process measure frequency 65% & simplify rate 68% : Saving 12 HC ➢One cassette on line: ➢ reduce 2hr cycle time ;Capacity improve 20% at wet bench process. ➢ Cost saving NT$ 3M/year
Backside Grinding & Scribe Line etch Glass 2 Attachment
Barrier Layer Formation Notch
Optical Sensitive Area
Epoxy
Pad Extension Layer
Bond Pad
Glass 1
Passivation Layer
Tooling & Machine modify
➢Laser marking automation; reduce miss operation and 20 % capacity upgrading
➢Revision software bug to reduce dicing abnormal issue (MO:3 to 0/year)
Chip 1
Chip 2
Glass 2
“T” Contacts
Epoxy
Barrier Layer
External Lead
Solder Mask Layer
Solder Bump
External Lead Formation
BGA Formation
External Passivation
Dicing
➢B1&B2 cure process (28 to 12 hr) ➢Notch cure process( 9 to 6 hr ) ➢One tape on-line (1.6 hr)
Add Capacity:
➢Blade feed rate 8 to 13mm/sec, Capacity Improve >25% ➢PP robot modify ,capacity improve >50% ➢Improve ETCH available time (83% to 92%) ➢Reduce alarm code of saw (8.5/wafer to 2.8/wafer) ➢Raise efficiency at Saw (76% to 85% /Aligner (90% to
Personal Information.
PIE 2.8 Year
Name : 陳明生 (Mishen) Ming-Shen Chen, Manager, MFG
TSMC
Employment date: 2007/12/20 Education :台北科技大學機電所 (1997/9~1999/6);
Record High
New low
DM+IDM material cost reduction from us$93 to us$ 64, cost saving 31.18% (2008/03~2009/05) ➢Base on MRP, build up daily material requisite check list to make sure daily MOL. (Safety stock：1 day) ➢Prolong chemical lift time ➢Developer MOL system to review usage by wafer ➢2nd source evaluation & price down (Tape & blade & gas & glass)
Wafer 成品
顯微鏡下的IC 一角
If you are a company boss what you care about is
Major Accomplishments
Lead Xintec Backend development
Base on TSMC/MIC expert experience in Engineering , The essence of self-reliance and innovate to enhance the technological promotion :
➢Dicing feed rate to 10 from 6mm/sec, capacity improve 60%
Parts localization: Saw (90%) ;Grinding (70%)
➢Reduce lead time (2 week to 1 day)
➢Cost down (3.5 M/Year) for saw
➢Process time & Q-time monitor system ➢Multi-skill certify ➢Batch wafer track in / out system for ETCH and
Bond process ➢Training system setup
Potential for Broader Scope & Responsibilities
knowledge.
Developer smart monitor system to reduce miss operation and pick up a
good yield.
Improve manufacturing capability to enhance the competitiveness of operation and customer service
Be the packaging manufacturing leader Fostering a Dynamic and Fun Work Environment
Total plan saving 89.1 HC, accomplish rate: 67.3% (60/89.1)
Hard cure process time reduce 1 day :
(Shanghai)
34 Sec.
台灣技術學院機械系 (1993/9 ~ 1997/6)
2008 PMD :O
Xintec
(MFG)
Experience:
2.5 Year DP.Manager
PHOTO EE 3 Year TSMC 32 Eng.
PHOTO PE 3.5Year
TSMC Group Section
台灣半導體相關產業在世界扮演的腳色
系統級封裝（System in package, SiP）
Wafer Level CSP Process flow
Wafer Level Chip Scale Packaging (WLCSP)
Dam stage
Bond 1 stage
Research and developer the new knowledge.
PIE &
Future Plan:
RD
Continuously provide better manufacturing service for RD & Eng. Programs
Co-work with RD & Eng. to improve operator & productivity for new