STC89C52处理芯片-毕业论文外文翻译
at89c52单片机简介中英文对照外文翻译文献
at89c52单片机简介中英文对照外文翻译文献中英文资料对照外文翻译A T89C52 Single-chip microprocessor introductionSelection of Single-chip microprocessor1. Development of Single-chip microprocessorThe main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。
Storage RAM immediately﹑memoy read ROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。
Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。
毕业论文基于STC89C52单片机的太阳能智能充电系统外文翻译
毕业论文(设计)文献翻译本翻译源自于：维基百科/wiki/Microcontroller毕业设计名称:基于STC89C52单片机的太阳能智能充电系统外文翻译名称：学生姓名：院 (系)：专业班级：指导教师：辅导教师：时间：至微控制器英特尔8742的核心, 片上集成12 MHz的CPU, 128字节的RAM, 2048字节EPROM, 以及I/O设备。
微控制器，也称单片机（有时缩写为μC，UC或MCU）是一种在单个集成电路上包含一个控制器核心，内存和可编程输入/输出外设的小型计算机。
类型为NOR Flash或OTP ROM的存储器也往往包括在芯片上，以及通常少量的RAM。
微控制器(MCU)是专为嵌入式应用，而相比之下，个人电脑或其他一般用途的应用中使用微控制器(CPU)。
微控制器用于自动控制产品和设备，如汽车发动机控制系统，植入式医疗设备，遥控器，办公设备，家用电器，电动工具，玩具。
比起使用一个单独的微控制器，内存和输入/输出设备，微控制器通过降低尺寸和成本来更经济地数控更多的设备和流程。
混合信号微控制器是很常见的，整合了需要控制非数字电子系统的模拟组件。
有些微控制器可使用四位字长，操作频率的时钟速率低至4 kHz来实现低功耗（毫瓦或微瓦）。
他们通常在等待一个事件，如按一个按钮或其它中断时进入节能状态，处于节能状态（CPU时钟和大部分的外设关闭）时功耗可能只有纳瓦级别，使得他们很适合用电池供电长期工作。
其他微控制器，像数字信号控制器（DSP），可能需要注重性能，他们有更大的计算量，更高的时钟速度和更大的功耗。
历史在1971年第一款单片机4位英特尔4004被发布, 在随后的数年时间里英特尔8008和其它功能更为强大微控制器也开始出现。
然而,控制器需要外部芯片来实现某工作方式,这就提高了整个系统的成本,使它不能成为经济的电子器件。
史密森尼学会表示Gary Boone 和 Michael Cochran工程师在1971年成功地创造了第一款单片机。
外文翻译---STC89C52 数据手册
外文翻译---STC89C52 数据手册STC89C52 Date XXXThe STC89C52 is a high-performance and low-power CMOS 8-bit microcontroller that comes with 8K bytes of in-system programmable Flash memory。
It is manufactured using Atmel's high-density XXX and is compatible with the industry-standard 80C51 n set and pinout。
The device's on-chip Flash enables the program memory to be reprogrammed in-XXX STC89C52 XXX combines a versatile 8-bit CPU with in-system programmable Flash on a single chip。
This makes it a highly-flexible and cost-XXX.In n。
the STC89C52 XXX for a wide range of embedded control ns。
Its in-system programmable Flash XXX industry-standard 80C51 n set make it an XXX.The STC89C52 microcontroller is equipped with us standard features。
including 8Kbytes of Flash。
256 bytes of RAM。
32I/O lines。
a watchdog timer。
two data pointers。
STC89C52处理芯片——单片机类毕业设计外文翻译、中英文翻译
STC89C52处理芯片——单片机类毕业设计外文翻译、中英文翻译外文资料翻译STC89C52 processing chip Prime features: With MCS - 51 SCM product compatibility, 8K bytes in the system programmable Flash memory, 1000 times CaXie cycle, the static operation: 0Hz ~ 33Hz, triple encryption program memory, 32 programmed I/O port, three 16 timer/counter, the eight uninterrupted dual-career UART serial passage, low power consumption, leisure and fall after fall electric power mode can be awakened and continuous watchdog timer and double-number pointer, power identifier. Efficacy: characteristics STC89C52 is one kind of low power consumption, high CMOS8 bit micro-controller, 8K in system programmable Flash memory. Use high-density nonvolatile storage technology, and industrial 80C51 product instruction and pin fully compatible. The Flash memory chips allows programs in the system, also suitable for programmable conventional programming. In a single chip, have clever 8 bits CPU and online system programmable Flash, increase STC89C52 for many embedded control system to provide high vigorous application and useful solutions. STC89C52 has following standard efficacy: 8k byte Flash RAM, 256 bytes, 32 I/O port, the watchdog timer, two, three pointer numerical 16timer/counter, a 6 vector level 2 continuous structure, the serial port, working within crystals and horological circuit. In addition, 0Hz AT89S52 can drop to the static logic operation, support two software can choose power saving mode. Idle mode, the CPU to stop working, and allows the RAM, timer/counters, serial, continuous to work. Protection asana pattern, RAM content is survival, vibrators frozen, SCM, until all the work under a continuous or hardware reset. 8-bit microcontrollers 8K bytes in the system programmable Flash AT89S52 devices. Mouth: P0 P0 mouth is a two-way open drain I/O. As export, each can drive eight TTL logic level. For P0 port to write "1", foot as the high impedance input. When access to external programs and numerical memory, also known as low P0 mouth eight address/numerical reuse. In this mode, with the internal P0 resistor. In the flash when programming, also used for P0 mouth; absorb instruction bytes In the process, the output command byte calibration. When the program requires external, calibration on pull-up resistors. Mouth: P1 mouth P1 is an internal resistance of the eight two-way I/O buffers can drive, P1 output four TTL logic level. To write "1" P1 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In addition, P1.0 and P1.2 respectively timer/counter 2 external counting input (P1.0 / T2) and when the trigger editor/counter P1.1 input (2), specific T2EX/are shown below. In programming and calibration, flash P1mouth absorb eight address low byte. Efficacy: the foot. P1.0 T2 (timer/counter T2 external counting input), clock output P1.1 T2EX (timer/counter T2 capture/overloaded triggered signals and direction control), P1.5 MOSI (with) online system programming, P1.6 MISO (with) online system programming, P1.7 SCK (with) online system programming, Mouth: P2 P2 mouth is an internal resistance of the eight two-way I/O buffers and P2 output can drive four TTL logic level. To write "1" P2 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In the external program memory access or use 16bit external numerical memory address read (for example MOVX execution DPTR @), P2 mouth send out high 8 address. In this application, P2 mouth on the internal use strong pull send 1. In using 8-bit address (such as MOVX @ RI) access to external numerical memory, P2 mouth output P2 latches content. In programming and calibration, flash P2 mouth also absorb high eight address byte and some control signal. P3: a P3 mouth on the inside of the eight two-way pull-up resistors I/O buffers can drive, p2 output four TTL logic level. For P3 port to write "1", the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). P3 mouth AT89S52 special functions (also as the second efficacy), are shown below. In programming and calibration, flash also absorb some P3 mouth controlsignals. Port pin second efficacy: P3.0 RXD (serial input) P3.1 TXD (serial export), P3.2 INTO the discontinuous (0) P3.3 INT1 (1) the discontinuous P3.4 (time/counter TO 0) P3.5 T1 (1) time/counter, P3.6 WR (external numerical memory write for) P3.7 RD (external numerical memory read for) In addition, also absorb some used in mp3 mouth FLASH memory programming and calibration of program control signals. RST, reset input: when the vibrator, RST pin appeared two machine cycle above high level will be reset the chip. ALE/PROG - when access to external program memory or numerical memory, ALE (address latch allow) output pulses are used to latch address of low eight bytes. Normally, ALE with clock frequencies are 1/6 output pulse si。
外文文献及翻译：基于STC89C52单片机的多路抢答器设计
2010 International Conference on Intelligent Computation Technology and Automation Design and Implement of Responder Based on Freescale HCS12 Single ChipMicrocomputerCheng Qiming, Cheng Yinman, Wang Mingmei, Chang LinCollege of Electric Power and AutomationShanghai University of Electric PowerChangyang 2588 road, Yandpu district, Shanghai 200090, ChinaE-mail :Abstract—An 8-channel responder based on Freescale HCS12single chip microcomputer is designed. The responder candisplay the number of the first player correctly. It also can countthe scores and show the player with the highest score. Thesystem includes four modules: CPU12, the SCI serialcommunication, digital display tube and timer. Whencompetition signal input, it is been caught and then causeinterruption, the timer is used to time accurately, the serial portis used to send and receive the start answer signal, judgmentsignal and other signals, the digital display tube is used to showthe scores of the current player . LCD display tube showssubjects and answers. So the basic functions of the responder areachieved.Keywords--responder; single chip microcomputer; timer; inputcapture; interruptionI.I NTRODUCTIONResponder is also known as the first signal discriminator,which is widely used in various competitions. It can judge thenumber of the first player accurately, fairly and intuitively.Currently, a variety of quiz responder has emerged on themarket, in which a small responder is commonly designed withsmall-scale digital integrated circuit. Although the technologyhas been quite mature, but it is simple function, lowintelligence, high fault, simple display, less flexibility, notconvenience for upgrade, it has been unable to meet all kindsof requirements for intellectual competitions and varietyshows. Therefore, it is necessary to develop some kinds ofresponder which are more suitable for applications.In recent years, with the rapid development of science andtechnology, the applications of single-chip microcomputer arebecoming widely, which promotes the development oftraditional measurement and control technology. In this paper,Freescale HCS12 [1-3] is designed as a core component toachieve an intelligent digital responder with 8-channel [4-8], ithas some breakthroughs on technology, function and otheraspects, comparing with the past responder. It is characterizedby simple structure, powerful, good reliability, practicability,so that the competition can really carried out on just, fair andopen rules.II.F UNCTION OF RESPONDERThe basic functions of responder designed in this paper are:(1)The system can limit the competition time and answertime of the alarm;1 This work is supported by Leading Academic Discipline Project ofShanghai Municipal Education Commission (Project Number: J510301，J510303)978-0-7695-4077-1/10 $26.00 © 2010 IEEE DOI 10.1109/ICICTA.2010.128 1127(2)The system can identify the answer signal and identifythe player’s number;(3)The system can calculate score for each player anddisplay the scores.Responder can accommodate 8 players numbered 1 to 8. In addition, LED digital tubes are designed to display the latched data. After race host clears the system, if participants press switch, and after answer is certificated whether it is correct or not, the number of first player to answer in action is immediately shown by digital tubes. Responder should have a strong ability to distinguish players to answer in the action, its resolution reaches at least a few ms.III.I DEAS OF RESPONDER DESIGNAfter the requirements and functions of responder are analyzed, the following circuits are required in general:A Responder circuitThe circuit has two functions: one is to identify the number of the player who press button, and to save the number; the other is to prohibit the other players from buttoning or to make other buttons not available.B Timing circuitsHost can set competition time and answer time by the time pre-set-circuit. If nobody can answer question within the set time, all players will not get score, then the host will announce the answer. Besides, if someone gets the chance to answer the question, but does not give the right result before the allowable time, he or she won’t get the score, the overtime signal will be also send, the host will declare the right answer. Freescale HCS12 contains timer module, the timer module can be directly used.C Overtime circuitHCS12 will send overtime signal when time goes beyond the set time, this signal will be transferred to the PC computer by the serial port. The next question will be proceeded to answer.D Scores count and display circuit.When host presses the answer key, it is time to start to answer, if one player presses the answer key, his or her number will be recorded, his or her score will be counted and displayed on the LED digital tubes.Bedside the circuits designed above, some necessary logic designs are also necessary. The logic designs are as following:First, the host will read the question which will show in the LCD; next, the PC computer will send letter “k”, which means that play is beginning to competition. At the same time, timing circuit starts to work, if nobody gets the chance to answer the question within permitted time, microcontroller will send the word “chao shi”to PC computer; If someone presses the competition key within the specified time, microcontroller will send his or her number. If the time goes beyond the permitted time, PC computer will send “next”which means turning to the next question, the next question will be automatically showed to answer. If some player gets the chance to answer the question, his or her number and scores will decrease 1 automatically and show in the digital tubes, then microcontroller sends “next” to go on the next question. If the score is few than 0 after decreasing, player is eliminated. The right answer will show on the LCD. Finally, if all the questions are done, microcontroller will send “e”to end the game, then the scores of all players will be computed, the highest one will be shown on the digital tubes.IV.D ESIGN OF RESPONDER HARDWARE Responder hardware is firstly designed; Responder hardware is taken directly from the hardware resources of Freescale HCS12 development board developed by Suzhou University. The development board takes MC9S12DG128 as the core, using modular design approach, it extracts part of I/O resources, and it also provides each module with a corresponding interface circuit. It also provides A/D input channels, PWM low-pass filter circuits, 16-key keyboard input channels, 8-bit digital I/O circuits, SPI I/O circuits, SCI communication circuits, I2C bus I/O expansion circuits and so on.In this paper, the hardware modules, the pin connections and the corresponding interfaces of the development board are listed and unified to redesign by actual needs of the system. Figure 1 shows the hardware structure diagram of the selected part of development board.Figure 1. Diagram of hardware structureA Selection of hardware modulesThe responder designed in this paper is relatively simple, the I/O ports and the modules involved are not many.(1)The system uses push-button switch as the competition key, which is generally used as a switch input, there are 0 and 1. Here, the system need know whether the button is switched by somebody, the system need not care about the switch on or off.(2)Timer module is indispensable in timing circuit. Here, the timer module's functions are to limit time, and to capture input signals. This will be followed some of the circuit design described in detail.(3)LED digital tubes are used to show the participant’s number and scores in the display circuit. The system records the player's number and the corresponding score, and then transmits to the LED digital tubes through I/O ports. LCD is achieved by external connection module; it is used to display questions and answers.(4)LED small light is used to show whether somebody presses the competition button. If player answer, the small light will be bright, otherwise, it will not light.(5)SCI module is necessary in serial communication port. Since the signal that starts to answer needs to be send by PC computer, if there is no serial communication port, the whole system will be paralyzed. The function of SCI module is that receives the signal to HCS12, and then sends the player’s number to PC.B Design of hardware circuits1) Competition circuit designCompetition circuit captures competition signals by means of input capturing; there will be a interruption once the push- button switch jumps. 8 push-button switches are connected with 8 channels, so the system can know which player competes to answer the question by reading corresponding channel. In this paper, the 8 channels connect with input capture channels PT0~ PT7 of HCS12.2)Timing circuitAs the HCS12 has its own timing module, timing circuit don’t need to be designed, and internal timing module of HCS12 can be directly used.3)Overtime reminding circuitSmall light or buzzer could connect with any I/O port, but the system should ensure the selected I/O ports have not conflict with the I/O ports occupied by the module. Once the specified time is over, I / O port send a high level, and the LED small light is on. In this paper, the first pin of PA port is chosen as the alarm signal port; this pin is connected to the testing of small light.4)Electronic counter and display circuitThe scoring scores can be resolved by programming, but the displaying scores needs hardware connection, LED digital tubes and LCD are connected with corresponding I/O ports of HCS12, external LCD module should have the function of displaying Chinese characters.5)Communication connectThe development board has a 9-pin cable of RS232 serial port; it can be connected with PC computer by the cable.V.D ESIGN OF RESPONDER SOFTWAREA Design of software subprogram1)SCI subprogram(1)SCI initialization functionSCI initialization is to set corresponding register, mainly to set serial port baud rate, here baud rate is set to 9600 bps, the baud rate is:B t = f BUS / (16 * B R) (1) where, B R is set by SCI baud rate register, and it is a 16-bit register, is assigned twice, first set the low 8 bits, and then setthe higher 5 bits, the first three of high 8 bits are meaningless;f BUS is the bus frequency.The next is to set control registers (SCICR1 and SCICR2), here SCI serial port be allowed to run, and the normal code, 8- bit, no parity data is output. The D6 bit of the SCICR1 (SCISWAI) is a SCI allowing bit, SCI module is prohibited at SCISWAI=1, SCI module is allowed when SCISWAI=0; D4 bit (M bit) is a choice bit of pattern/character length, it is used to define the sending/receiving data format, 9-bit data transfer is allowed at M=1, 8-bit data transfer is allowed at M= 0; D1 bit (PE) is the parity enabling bit, PE=1 allows parity, PE = 0 does not allow parity. SCICR2 needs also to be set in order to receive and send data, the D3 bit of SCICR2 (TE) is a transmitter allowing bit, TE=1 allows to send, TE=0 prohibits to send; D2 bit is receiver allowing bit, RE=1 allows to receive, RE=0 prohibits to receive.(2)SCI sending functionFirstly, 1 bit sending function of serial port should be programmed. At the beginning, SCI status register 1 (SCISR1) needs to be judged, its D7 bit (TDRE) sends the empty flag of data register at TDRE=1, which means that the data to send has already moved into the sending shift register, if the data register is empty, the new data that is written into the data register can be sent. More bits data sending function calls repeatedly 1 bit sending functions until the sending is over.(3)SCI receiving functionSimilarly, 1 bit receiving function of serial port is programmed. Here, SCI status register 1 (SCISR1) is judged, its D5 bit (RDRF) represents the full flag of the receiving data register. RDRF=1 means that the receiver is full, the received data can be read from the SCI data register, then, the data needs to be read out from data register (SCIDR). The receiving data is one more step than the sending data, which it is to determine whether any data has been received. If the receiving process is failed, FFH data will be returned. More bits data receiving function call repeatedly 1 bit receiving function, and the system will report the receiving error as long as there is 1 bit receiving failure.2)Timer subprogram(1)Timer initializationWhen timer is initialized, timer is prohibited to work until timer is used. The D7 bit (TEN) of timer control register 1(TSCR1) is an enabling bit of timer, timer is enabled at TEN=1, and timer is disabled at TEN=0. The following step is to allow the timer interrupt and to prohibit the timer reset. The D7 bit (TOI) and the D3 bit (TCRE) of timer control register 2 (TSCR2) are respectively the enabling bit of timer overflow interrupt and the reset enabling bit of timer counter, timer interrupt is allowed at TOI=1, otherwise, timer interrupt is not allowed at TOI=0. When OC7 is successfully compared, the counter can be reset at TCRE=1, it can’t be reset at TCRE=0; D2 ~ D0 bits (PR2 ~ PR0) of TSCR2 are the selection bits of frequency factor, they are used to set the division factor of bus clock frequency, frequency division factor p can be 1,2,4,8,16, 32, 64 or 128. The overflow time of timer can be described as following:t=np/f BUS (2) where, n is the count value of counter; f BUS is the bus clock frequency; p is the frequency division factor. In this paper, n = 216 = 65536, p is chosen to be 2, t≈0.03s, t is much closed to 1/38s, 38 interruptions is about 1s.(2)Input capturing initializationFirst, the option is to capture input or to compare output. The select register of input capturing/output comparing (TIOS) is used to do this work, the Dx bit (IOSx) of the register is the select bit of x channel, the x channel is set as the output comparing channel at IOSx = 1, and it is set as the input capturing channel at IOSx = 0. In our design, because 8 players take pert in the competition, 8 channels should all be set as input capturing channels, namely TIOS = 0x00.After input capturing is set, the interruption also needs to be open, which it should be done after the competition is allowed.3)Subprogram of LED digital tubes(1)Initialization of LED digital tubesLED digital tubes are used to dynamic display, its initialization is the I/O port initialization, the direction registers of corresponding I/O ports (the pins of 8-bit data port are connected with 7-segment digits and decimal point of digital tubes; the pins of 4-bit bit choice are connected with 4 digital tubes) are set to be output, that is, data port is 0xFF, bit choice port is 0xF0.(2)Display of LED digital tubesThe basic idea of LED digital tubes display is that the display codes of all the numbers and the chip select code of the displaying bits are stored into the corresponding registers, when display functions are called, the parameter numbers of functions can match with the numbers and the bits in the tables of number display code and chip select code4)LCD display(1)LCD initializationThe module is enabled and the lattice size is defined as 8*8 or 8*10, the display format is defined as 1 row or 2 rows, the display of Chinese characters is used.(2)Subprogram of LCD displayThe emphasis of the program is the display of Chinese characters. Chinese characters are identified by two ASCII codes. The ASCII codes of Chinese characters to be displayed are recorded into data registers.B Design of interrupt service subprogram1)Subprogram of overflow interruptionThe frequency division factor has been set in the program of timer initialization, 38 interruptions is about 1s, so the counter variable needs to be set, it adds 1 automatically after each interruption, it calls the second accumulating function after 38 interruptions. It needs to be noted that the interruption flag register 2 (TFLG2) is set to 0 after each overflow interruption. Otherwise, the system is always identified as overflow interrupt. D7 bit of the register is TOF bit, when the 16-bit running counter changes from $FFFF to $0000, the overflow interrupt occurs, this bit is set to 1, this bit can be cleared by writing 0 to it, other 7 bits are invalid. The flow of overflow interrupt is shown in Figure 2.2)Subprogram of input capturing interruptionThe main task of input capturing interruption program is to judge whether player competes to answer and to record the player’s number. The interrupt flag bit needs to be set, it is set to 1 when an interrupt happens, which means that someonecompetes to answer, and then the person number will be read.Interrupt flag register 1 (TFLG1) of main timer is used to readthe interrupt channel. Its Dx bit (CxF) is the interrupt flag ofinput capturing / output comparing channel x, when an inputcapturing / output comparing event happen, the correspondingbit is set to 1, the channel number of correspondinginterrupting can read from TFLG1 register and it is also thenumber of competition player. To note that, the flag registerneeds to be cleared after the flag register is read. The flagregister can be cleared when the appropriate channel is set to 1.The flow of input capturing interrupt is shown in Figure 3.VI.C ONCLUSIONSResponder is one of the essential devices in variousknowledge and intellectual contests, the development of betterand more intelligent digital responder is very significant.Responder designed in this paper can achieve a responder'sbasic functions through experimental prototype testing.It reaches the design target with reasonable design, simplestructure, good commonality, strong function, reliable answerand quick reaction. However, as hardware limitations ofdevelopment board, some functions have not been able toachieve, such as the development board does not have enoughLED digital tubes to display all player’s scores simultaneously,the host can not adjust answer time according the difficulty ofthe question and so on. These issues will remain to beaddressed in future development.Figure 2. Flow of overflow Figure 3. Flow of input capturinginterrupt interruptC The main program designBefore the start of the main program, the total interruptionsare turned off and each module is initialized. The initializationof each module has been done in the correspondinginitialization subprogram of each module. Here we only needcall the corresponding initialization subprogram. After theinitialization of each module is completed, the totalinterruptions should be turned on. The main body of the mainprogram is a loop structure; there are also several sub-cycles inthe main loop, which are used for the cycle waiting of eachloop. The flow of the main program is shown in Figure 4.After the completion of the initialization, the system has beenwaited for the signal of competition start with the circularmode until the signal comes. When this signal is received, thesystem checks whether the cycle time is overtime, if it isovertime, the system changes to the next question, otherwise,the system checks the competition signal, if some playercompetes to answer, then the system checks whether theanswer time is out, if the time is not out, the system judgeswhether the result is true, if the result is right, the player isadded 1 point, otherwise, the player is subtracted 1 point, andthe system enters the next question. To the player whose scorewill be subtracted, the system needs to check whether the scoreis low than 0, if it does, this player’s input channel is turnedoff. To be noted that, if the competition flag is 1, it should becleared.Figure 4. Flow of the main programR EFERENCES[1] Steven F B, Daniel J P. Embedded systems–using the HCS12microcontroller design and application [M]. NewYork: PublishingHouse of Electronics Industry, America, 2006.[2] Wang Yihuai, Liu Xiao. Embedded systems–the design and applicationof HCS12 micro controller [M]. Beijing: Beijing University ofAeronautics and Astronautics Press, 2008.[3] Wang Wei. Principle and applications of HCS12 microcontrollers [M].Beijing: Beijing University of Aeronautics and Astronautics Press,2007.[4] Zhang Ruixi. Design of quiz responder [J]. Mechanical and ElectricalEngineering and Technology, 2007, vol.36, no.8, pp.51-52.[5] Li Ming, Tan Andrew, Zhu Shunli. 8-way intelligent responder basedon the LPC932 single chip microcontroller [J]. Ordnance Automation,2007, vol.26, no.7, pp.70-71.[6] Chou Kungming, Zhou Chenchen. Design of 9-way multi-functionalquiz responder based on the single chip microcontroller AT89C2051 [J].Modern electronic technology, 2006, vol.25, no.20, pp.4-6.[7] Wang Gongtang, Yang Shanying. 16-way responder based on thePIC16F873 [J]. Computer Development & Applications, 2006, vol.19 ,no.9, pp.9-13.[8] Gong Changlay. Design of intelligent responder controlled by singlechip microcomputer [J]. Guangdong Automation and InformationEngineering, 2003, no.3, pp.28-30.基于飞思卡尔HCS12单片机设计和实施的抢答器程启明，程尹曼，汪明媚，常林上海电力学院电力与自动化工程学院,上海,200090摘要——基于飞思卡尔HCS12单片机的八通道抢答器设计。
电气工程及其自动化专业AT89S52单片机应用大学毕业论文英文文献翻译及原文
毕业设计（论文）外文文献翻译文献、资料中文题目：AT89S52单片机应用文献、资料英文题目： AT89S52 MCU Applications文献、资料来源：文献、资料发表（出版）日期：院（部）：专业：电气工程及其自动化班级：姓名：学号：指导教师：翻译日期： 2017.02.14本科毕业设计（论文）AT89S52单片机应用中英文翻译专业名称：电气工程及其自动化年级班级：学生姓名：指导老师：AT89S52 MCU ApplicationsFunction Characteristic DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-syste m programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.Pin DescriptionVCC ：Supply voltage.GND ：Ground.Port 0：Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-ing program verification. External pull-ups are required during program verification.Port 1：Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 outputbuffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table 1. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and dur-ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash program-ming and verification.Port 3：Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 3 pins that areexternally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the fol-lowing table 2.RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.ALE/PROG：Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during eachaccess to exter-nal data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2：Output from the inverting oscillator amplifier.Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H, #data. Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #data. Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.。
单片机居家安全报警系统外文文献翻译
单片机居家安全报警系统外文文献翻译(含：英文原文及中文译文)英文原文Design of Home Safety Alarm System Based on Single Chip MicrocomputerAbstractThis design is to study the field of home safety alarm based on single-chip microcomputer, and design a home safety alarm system that is based on STC89C52 single chip microcomputer and is cost-effective and easy to install. The alarm system adopts the communication mode of wireless communication and GSM communication and the modular design concept. It detects different types of risk factors in the home environment through different types of sensor units, and feedbacks the environmental parameters of different rooms to the main control unit. The control unit makes corresponding decisions and issues alarm instructions when necessary to ensure the safety of the home environment. The system is simple and convenient to operate and has a high degree of intelligence. It can detect home risk factors and prevent dangerous accidents.Keywords: home security alarm system; wireless communication; GSM1 Introduction1.1 Hidden dangers and detection in modern home lifeIn the modern home life, people cannot live without convenient living materials such as running water, electricity, and natural gas. However, they bring convenience to us and also increase the unsafe factors in the home life, leaking water pipes, accidental fires, gas leaks, etc. An accident can bring irreparable damage to the family. With the increasing population of the city and the increasing mobility of the population, the crime rate of theft and house robbery has been high for many years. Traditional anti-theft doors and windows have a certain preventive effect, and there are also many security risks. A wide variety of decoration materials, furniture, and decorative items provide us with convenience and beautify the home while alsocontaminating formaldehyde. Therefore, the safety of the home environment has received increasing attention in recent years. How to create a comfortable, healthy and safe home environment has become a hot topic of common concern. In recent years, electronic technology has been changing with each passing day, and communication technology is flourishing. Among them, the development of chip technology and sensor technology is particularly prominent, which provides new options for the solution of home security issues. The use of a home safety alarm device with a microcontroller and a sensor as its core enables the detection of various risk factors in the home, such as gas concentration, formaldehyde content, leakage of water pipes, and theft of rooms, etc. The system can perform remote alarms in a timely manner and notify the user Solve it.1.2 Selected topics and meaningWith the rapid development of science and technology and economic level, people's requirements for the home environment have evolved from the initial satisfaction of simple housing development to the emphasis on the human needs of residential housing. As a result, many safe, comfortable, fast, and convenient smart communities have emerged. where safety is the primary goal. In addition to human factors, the establishment of security systems is an indispensable and important measure for the realization of smart residential security.At present, there are many types of home security products on the market, which can be roughly divided into several relatively independent categories such as anti-theft alarms, video surveillance, and access control systems. Some products have fewer functions, and products with more comprehensive functions have relatively higher prices. Installation is complicated. In other words, there is an urgent need for a product that requires a price to be popular, strong functions, simple installation, easy use, reliable work, and low false alarm rate. Therefore, starting from the actual application, this article systematically elaborates that the use of the system does not need to change the power lines in the home. It has low cost, does not affect aesthetics, wireless communication, and is easy to use. It is suitable for general househo ld use. Home security is closely related to each of us. The use of home security alarm devicescan improve the quality of life of people and make life more secure and convenient. Because of the advantages of the system and the unmatched price/performance ratio of the 51 series microcontrollers, it will be used in future development. Has a broad market prospects and development potential.1.3 Research Status and Development Trends at Home and AbroadIn recent years, with the rapid development of electronic information technology, computer technology, communication technology and sensor technology, there are more and more products related to home security alarms. Domestic and foreign companies such as Siemens, Honeywell, Bosch, Shenzhen Yingmao and many other companies have developed a series of home security alarm products. They generally have wired or wireless communication functions to complete some alarm functions and have carried out Successful application. For example, Siemens' product portfolio includes general-purpose security and security solutions and services, including access control systems, intrusion detection, video surveillance systems, on-site service control centers, and emergency management systems. Thanks to the installation of the Siemens fire and voice evacuation system, the Jinmao Tower and the Grand Hyatt Shanghai, the world's top hotel, provide safe and comfortable working and living environments for thousands of people. It can be foreseen that the smart residential community will become the development trend of the construction industry in the future, and the home security alarm system will become an integral part of the intelligent residential community. In particular, as people's living standards improve, people using home security alarm system equipment will More and more, people's lives will be more comfortable and safer.2 home security alarm system overall design2.1 Overall Design Scheme of Home Security Alarm SystemThe design of this system is a new home security alarm system that integrates single-chip microcomputer control technology, sensor detection technology, and communication technology. The system is based on the single-chip microcomputer and consists of various detection units placed in different rooms and main control units responsible for decision-making. Each detection unit is responsible for detectingvarious conditions of the indoor environment, such as temperature, humidity, formaldehyde content, leaking water, etc., and then sending the collected data to the main control unit through wireless communication, and the main control unit makes a decision and issues a corresponding The instruction controls the operation of the system, thus realizing the automatic detection and automatic alarm of the indoor environment and maintaining the safety of the indoor environment. The hardware of the system consists of eight parts: main control unit, fire detection unit, water leakage detection unit, anti-theft detection unit, gas leak detection unit, formaldehyde content detection unit, wireless communication module, and GSM network communication module. Ensure the normal operation of the system. The circuit of the system is mainly composed of a power supply module, a microcontroller module, a sensor module, a wireless module, a display module, and an alarm module.2.2 main control unitThe main control unit, as the control center of the system, is responsible for receiving the information of each detection unit through the wireless module, processing the information, finding the alarm information to issue a corresponding alarm, and promptly notifying the user for processing. The main control unit can complete tasks such as GSM network SMS alarm, sound and light alarm, LED screen display, and keyboard control. The GSM short message module is used to send and receive short messages so as to monitor home security. A variety of sensors are used to collect home information, and information fusion technology is used to obtain more reliable alarm information. After receiving the alarm information, the owner responded to the SMS to control and handle the situation on the site, so as to ensure home security and theft prevention. The system is simple in structure, easy to install and debug, and easy to use.DetectorThe detector is used to detect various environmental information in the room. The environmental information is sent to the main control unit so that the main control unit can process the information in time according to the information. The sensor is the core component of the detector. According to the detection situation,sensors of different types and different principles constitute different detectors. The detectors involved in the system mainly include the following types:(1) Fire detectorFire detectors are mainly installed in the kitchen. It uses a combination of smoke sensors and temperature and humidity sensors. Smoke sensors mainly include ion smoke sensors and photoelectric smoke sensors. The system uses ion smoke sensors. The ionized smoke sensor contains an internal radiation source 241. The current and voltage of the ionization chamber inside and outside the sensor are stable under normal conditions. When a fire occurs, the ionization chamber ionizes positive and negative ions under the action of an electric field. The two io ns move toward the positive and negative poles, and the internal current and voltage change to generate an alarm signal. The temperature and humidity sensor can convert the temperature and humidity of the environment into analog signals. These analog signals are converted into digital signals that can be processed by the MCU under the action of their own processing chip. In the event of a fire, the temperature and humidity in the room will rise sharply within a short period of time. Comprehensive temperature and humidity conditions can prevent false alarms due to external interference from the smoke sensor.(2) Water leak detectorThe leak detector is mainly installed in the bathroom. Its working principle is mainly to use the conductive characteristics of water. The two probes of the detector are installed slightly higher than the ground, and are respectively connected to an I/O pin and GND pin of the microcontroller. When water leakage occurs, the water level is higher than the height of the probe. The two probes of the detector are turned on, and the level of the I/O pin of the microcontroller is set low to generate an alarm signal.(3) Theft detectorThe anti-theft detector is installed above the window. The detection part is mainly composed of pyroelectric and infrared sensors. When a gangster enters through the window, pyroelectric and infrared laser sensors can generate alarm signalsat the same time. The combination of the two sensors can prevent false alarms caused by small animals or accidents. An important component of a pyroelectric sensor is a piezoelectric ceramic dielectric that maintains its polarization after being poled, known as spontaneous polarization. Spontaneous polarization decreases with increasing temperature and drops to zero at the Curie point. Therefore, when this material is exposed to infrared radiation and the temperature rises, the surface charge will decrease, which corresponds to the release of a part of the charge and is therefore called pyroelectricity. The released charge can be converted to a voltage output via an amplifier, thereby generating an alarm signal. When radiation continues to act on the pyroelectric element to balance its surface charge, it no longer releases charge. Therefore, pyroelectric sensors cannot detect constant infrared radiation. The infrared detector employs a photoelectric switch. The photoelectric switch (photoelectric sensor) is an abbreviation of the photoelectric proximity switch. It uses the object to block or reflect the light beam and strobes the circuit by a synchronous circuit to detect the presence or absence of an object. The photoelectric switch converts the input current into an optical signal on the transmitter, and the receiver then detects the target object according to the received light intensity or presence or absence.(4) Gas leak detectorThe gas is mainly composed of hydrogen, methane, carbon monoxide, and ethylene, and the natural gas is mainly composed of methane, ethane, propane, and other components. It can be seen that in both gases, methane is an important component of them. By detecting the methane content, it can be determined whether gas or natural gas leaks occur. The methane sensor converts the information related to the methane concentration into analog signals. These analog signals can be converted into digital signals by the A/D chip and sent to the microcontroller. The microcontroller can obtain the indoor methane content according to the size of the digital data. Calculate the concentration of gas and natural gas so that detection and alarm can be achieved.(5) Formaldehyde detectorFormaldehyde is generally considered to be the number one killer of the indoorenvironment. Its release period is generally 3-15 years, and its harm is very serious for the human body, especially infants, pregnant women, the elderly and chronic patients. Formaldehyde mainly exists on the floor, decoration plates, furniture, carpets, paints, and glue. People can easily overlook its existence, but it can cause serious damage to people's health. The formaldehyde sensor uses the electrochemical formaldehyde gas sensor HCHO produced by Dart Sensor. This sensor is developed based on a breath alcohol sensor and is suitable for monitoring in most environments (-20°C~+50°C) (for special applications, it can be used at higher temperatures). This sensor is simple in design, with few components and its cost is reduced. It does not require power supply excitation. It only requires power during signal processing and display, so it is only a simple small battery cell.communication deviceThis system mainly adopts wireless communication methods, which avoids complicated laying of lines and is both beautiful and convenient. The main control unit and each subunit communicate with the wireless module 24L01. The effective range is 60 meters, which fully meets the needs of home use. The communication between the main control unit and the user adopts the GSM (mobile phone network) method. The alarm system can send the information in the home to the user as a short message. The user can also control the running of the home system by sending an SMS.Home Security Alarm System Functions and Working PrinciplesThe main control unit of the system can be placed in the living room, and the detection unit can be installed in different rooms of the house. For example, the fire detection unit is installed in the kitchen, the leak detection unit may be installed in the toilet, the anti-theft alarm detection unit is installed above the door and window, the gas leak detection unit is installed in the kitchen, and the formaldehyde content detection unit is placed in the living room or the bedroom. The detection unit placed in different locations sends information to the main control unit in real time through the wireless device. Once a fire, leaking water pipe, burglary, or gas leak occurs, the main control unit will immediately receive an alarm signal. Then the main control unitThe unit will judge and process the alarm signal, get the alarm type, make an audible and visual alarm, and notify the user through the GSM network. The home security alarm system has six main functions: Mobile phone network intelligent alarm. When an unexpected situation in the home is detected, an alarm is sent through a text message. It can monitor the concentration of gas or natural gas in the home, discover gas leaks, and promptly report an alarm. Anti-theft function, when a thief enters, immediately makes an alarm, and promptly informs the police and the household head; Intelligent fire alarm, immediately when the fire occurs in the home, to alarm, to reduce the loss of property; Intelligent waterproof detection function, found a leak in the home, timely closure of the main valve, And notify the owner by SMS to avoid the loss; The system can be controlled by the remote controller, which is easy to use and easy to operate.3 Hardware Design of Home Security Alarm System3.1 Design of the main control unitThe main controller consists of power supply, GSM communication module, wireless communication module, display device, button, and remote controller. The structure is shown in the figure.Figure 3 main control unit system diagram Power section uses the AC220/DC5V power supply module, after the power supply voltage transformer voltage regulator, and finally get a stable 5V voltage to the microcontroller and other electrical equipment. The display device uses 12864 liquid crystal, 12864 is the abbreviation of dot matrix number of 128*64 dot matrix LCD module, 12864 LCD with Chinese font library can display 4 rows and 8 columns of 32 characters with 16 16 dot matrix, each The display RAM can display 1 Chinese character or 2 16×8 lattice full height ASCII code characters, that is, each display can display up to 32 Chinese characters or 64 ASCII characters. The display of indoor and outdoor temperature, humidity, light intensity, and system working status is realized through the liquid crystal, so that people can understand the working status of the system in real time. The basic circuit for displaying the liquid crystal is shown in Figure 4. Figure 4 LCD connection circuit diagram The GSM mobile network communication module is selected from theSiemens TC35 module, which is a dual-band 900/1800MHz highly integrated GSM module, it is easy to integrate, cost-effective, good product quality and performance The system guarantees that the system communicates with the user's mobile phone via SMS, which is convenient and quick. The GSM module can transmit voice and data signals and connect the SIM card reader and antenna respectively through the interface connector and antenna connector. The automatic baud rate is 1.2kb/s~115kb/s. It supports Short Message Service (SMS) in Text and PDU formats, and can send text messages and make phone calls. The module expansion circuit is shown in Figure 5, and the features are described below. Information transmission content: V oice and data power: Single power supply 3.3V ~ 5.5V Frequency band: Dual-band GSM900MHz and DCS1800MHz (Phase 2+) Transmitting power: 2W (GSM900MHz Class 4) 1W (DCS1800MHz Class 1) 8SIM Card Connection: External Antenna: External antenna connected by antenna connector Talk mode: 300mA (Typ.) Figure 5 TC35 peripheral expansion circuit diagram The wireless communication device uses the 24L01 wireless module, and the maximum operating speed is 2Mbps. It is highly efficient GFSK modulation and has strong anti-interference ability. Up to 126 available channels to meet the needs of multi-point communication and frequency hopping communication, built-in hardware CRC error detection and point-to-multipoint communication address control; Low power consumption 1. 9 - 3. 6V operation, 22uA in standby mode Under power-down mode is 900nA; Built-in 2. 4Ghz antenna, small and exquisite; The module can be set by software address, can be directly used by various microcontrollers, software programming is very convenient. When connecting with P0 port of 51 series single-chip microcomputer, it needs to add 10K pull-up resistor and it is not necessary to connect with other ports. For other series of microcontrollers, if it is 5V, please refer to the output current of the IO of this series of microcontrollers. If it exceeds 10mA, series resistor divider is required. If it is 3. 3V, it can be directly connected to the IO line of the RF2401 module. For example, if A VR series microcontrollers are 5V, they are generally connected in series with 2K resistors. The keypad is used to set the basic parameters of the main control unit. It can also set the parameters through theSAA3010T remote control. The remote control receiver uses HS0038. The connection circuit with the microcontroller is shown in Figure 6. Figure 6 Infrared remote control receiver circuit we use the receiver head, its drive circuit is simple, easy to control the microcontroller. Its operation method is the same as that of an ordinary TV remote controller, and the operation is simple and easy to use.3.2 Design of fire detection unitThe fire alarm unit is composed of a smoke sensor and a temperature and humidity sensor. The increase of the temperature and humidity sensor can enhance the reliability of the alarm and reduce the occurrence of false alarms. The composition of the fire alarm unit is shown in Figure 8. Fig. 8 System diagram of fire detection unit The smoke sensor converts the collected smoke concentration into an analog signal. After the A/D chip, the analog signal is converted into a digital signal and sent to the microcontroller. Temperature and humidity sensor The DH11 can send temperature and humidity in digital form to the microcontroller, so the signal does not have to be processed. The MCU sends the received information to the master control unit through the wireless communication module 24L01. The type of smoke sensor used in the system is MQ-2. The gas sensitive material used by MQ-2 is tin dioxide (SnO2) with low conductivity in clean air, and its sensitivity to smoke is very high.3.3 Design of leak detection unitThe unit's design mainly utilizes the conductive properties of water. There are two detection probes connected to the microcontroller, which are connected to the I/O pin and the GND pin of the microcontroller. When in use, put the two probes above the bathroom floor. When there is water leakage, the toilet will produce water. The two probes of the detector are connected to the stagnant water. The preset high-level I/O pins are set low. , Generate an alarm signal, the microcontroller then sends the alarm signal to the main control unit through the wireless communication module, thus completing the entire alarm process. The specific structure of the alarm unit is shown in Figure 11.3.4 Design of Gas Leak Detection UnitThe gas leak detection unit is mainly composed of a methane content displayliquid crystal, a methane sensor, a wireless communication module, and a buzzer alarm. The structure is shown in FIG. Figure 12 shows the gas leakage detection unit system. Among them, the liquid crystal display is a 5110 liquid crystal display. Its features are: Cost-effective, LCD1602 can display 32 characters, and Nokia5110 can display 15 Chinese characters, 30 characters, Nokia5110 bare screen only 8. 8 yuan, LCD1602 generally about 15 yuan, LCD12864 generally 50 to 70 yuan; interface is simple, only four I / O lines can drive, LCD1602 need 11 I / O lines, LCD12864 need 12 root. The speed is 20 times that of the LCD12864 and 40 times that of the LCD1602. The model selected for the methane sensor is GJ4. Its output is analog and needs to be sent to the microcontroller via A/D conversion. Its use is similar to the smoke sensor.3.5 Design of formaldehyde monitoring unitFormaldehyde detection unit is mainly composed of formaldehyde sensor, operational amplifier, wireless communication module and sound and light alarm. The formaldehyde sensor converts the formaldehyde concentration into electrical signals. The signal is processed by the operational amplifier and then input to the single-chip microcomputer. The single-chip microcomputer judges the signal and sends the formaldehyde content signal to the main control unit through the wireless communication module. The sensor contains a conventional two-electrode fuel cell sensor. The working electrode discharges electrons to the counter electrode through an external circuit and is consumed at the counting electrode end with the reduction of oxygen. The internal circuit is realized by the ion current in the electrolyte. Well-designed to facilitate the growth of electrolyte. The rise and fall of the electrolyte varies with the changes in ambient temperature and humidity, but the normal operation will not affect the calibration value. The specific circuit shown in Figure.3.6 Design of anti-theft alarm unitThe anti-theft alarm unit is a double detector consisting of a pyroelectric sensor and an infrared sensor. Compared with conventional pyroelectric or infrared single sensor systems, Shuangjian detectors have significantly reduced their false alarm rates.When the Shuangjian detector works, the two signals of the pyroelectric sensor and the infrared sensor are processed by the NAND gate and sent to the SCM. When only two sensors respond at the same time, the detector sends an alarm signal to the microcontroller, otherwise no alarm signal is generated. In addition, when designing, Fresnel lens is added to the pyroelectric sensor, and the principle diagram of false alarms that can reduce the external interference signal by changing the lens division method is shown in Fig.16. Fig. 16 System diagram of the anti-theft alarm unit When the double-detection detector works, the pyroelectric sensor and the infrared sensor signal are sent to the single-chip microcomputer after being processed by a NAND gate. When only two sensors respond at the same time, the detector sends an alarm signal to the microcontroller, otherwise no alarm signal is generated. In addition, Fresnel lens is added to the pyroelectric sensor during design. By changing the lens segmentation mode, false alarms due to external interference signals can be reduced. 3.7 Design of Communication SectionThe communication part of this system is mainly composed of GSM mobile network communication module and 24L01 wireless communication module. The GSM module communicates with the user's mobile phone through the mobile phone network of the mobile phone, and the user can understand the security situation at home at any time. Each detection unit communicates with the main control unit through the wireless communication module and feeds back the detected information to the main control unit in time. System Communication Structure Diagram The GSM mobile network communication module uses the TC35 module. Its main features are wide coverage, low cost, reliable quality, and high security. It inherits the standard A T instruction set and RS232 interface standard internally, which makes it easie r for the microcontroller system to control it. It reduces the design of external circuits and simplifies the programming of the program. The hardware circuit is not complicated, but there are many modules used, which increases the complexity of programming and the difficulty of debugging. Therefore, it is necessary to debug each module individually after being debugged by the single chip microcomputer. Communication module application circuit diagram SIM CARD is a mobile communication networkuser identification module. SIM CARD contains the user's user information and is an indispensable tool for communication with mobile phones. There are 6 pins corresponding to each other on the SIM card and the card holder. This is the interface between SIM CARD and TC35. The wireless communication part adopts 24L01 wireless communication module, which has built-in 2. 4Ghz antenna, small size, software address, software programming is very convenient, built-in special voltage regulator circuit, using a variety of power supply including DC/DC switching power supply are very good The communication effect, when connected to the P0 port of the 51 series single-chip microcomputer, requires a pull-up resistor of 10K, and it is not necessary to connect to other ports. The user can set the alarm phone number, alarm mode, work mode, etc. through the keypad. Through the liquid crystal display, you can clearly understand the operating conditions of the system and the environmental parameters in your home, such as temperature, humidity, gas concentration, formaldehyde concentration, leaks, and communication conditions.中文译文基于单片机的居家安全报警系统的设计摘要本设计是对基于单片机的居家安全报警领域进行研究，设计出以STC89C52 单片机为核心的高性价比，易于安装的居家安全报警系统。
外文翻译stc89c52的介绍
外文原文Introduction to STC89C52General DescriptionThe STC 89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmel’s high density nonvo latile memory technology and is compatible with the industry standard MCS-51™ instruction-set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel STC89C52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.STC89C52 has the following features: 40-pin, 4k Bytes Flash chip program memory, 128 bytes of random access data memory (RAM), 32 external bi-directional input / output (I / O) ports, interrupt priority level 2 5 Interrupt nesting level interrupts, two 16-bit programmable timer counters, two full duplex serial port, watchdog (WDT) circuit, the on-chip clock oscillator. In addition, STC89C52 design and configuration of the oscillation frequency can be set to 0Hz and through the software power-saving mode. Idle mode, CPU to suspend work, and RAM timing counters, serial port, and interrupt system to continue, but freezes the oscillator power-down mode save RAM, disabling all other chip functions until the next interrupt or hardware reset. Meanwhile, the chip also has PDIP, TQFP and PLCC packages such as three, to accommodate different productsFeatures OverviewThe STC89C52 provides the following standard features: 4K bytes of Flash,128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the STC89C52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interruptsystem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Features• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-Level Program Memory Lock• 128 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Two 16-Bit Timer/Counters• Six Interrupt Sources• Programmab le Serial Channel• Low Power Idle and Power Down ModesPin Function Description:VCC：Supply voltage.·GND：Ground.·Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.Port 0 may also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internalpullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the STC89C52 as listed below:Port 3 also receives some control signals for Flash programming and verification. RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external DataMemory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low timespecifications must be observed.From：STC89C52的介绍综合描述STC89C52是美国ATMEL公司生产的低功耗，高性能CMOS 8位单片机，片内含4k bytes的可系统编程的Flash只读程序存储器，器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准8051指令系统及引脚。
STC89C52处理芯片中英文对照外文翻译文献
中英文对照外文翻译文献(文档含英文原文和中文翻译)翻译：STC89C52处理芯片首要性能：与MCS-51单片机产物兼容、8K字节在系统可编程视频存储器、1000次擦拭周期，全静态操作：0Hz~33Hz、三级加密程序存储器，32个可编程I/O接口线、三个16位定时器（计数器），八个中断源、低功能耗空闲和掉电模式、掉电后间断可唤醒，看门狗定时器、双数值指针，掉电标示符。
关键词：单片机，UART串行通道，掉电标示符等前言可以说，二十世纪跨越了三个“点”的时代，即电气时代，电子时代和现已进入的电脑时代。
不过，这种电脑，通常指的是个人计算机，简称PC机。
还有就是把智能赋予各种机械的单片机（亦称微控制器）。
顾名思义，这种计算机的最小系统只用了一片集成电路，即可进行简单的运算可控制。
因为它体积小，通常都是藏在被控机械的内部里面。
它在整个装置中，起着有如人类头脑的作用，他出了毛病，整个装置就会瘫痪。
现在，单片机的种类和适用领域已经十分广泛，如智能仪表、实施工控、通讯设备、导航系统、家用电器等。
各种产品一旦用上了单片机，就你能起到产品升级换代的功效，常在产品名称前冠以形容词——“智能型”，如智能洗衣机等。
接下来就是关于国产STC89C52单片机的一些基本参数。
功能特性描述:STC89C52单片机是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程视频播放存贮器使用高密度非易失性存储器技术制造，与工业80C51 产物指令和引脚完全兼容。
片上反射速度允许程序存储器在系统可编程，也适用于常规的程序编写器。
在其单芯片上，拥有灵敏小巧的八位中央处理器和在线系统可编程反射，这些使用上STC89C52微控制器为众多嵌入式的控制应用系统提供高度矫捷的、更加有用的解决方案。
STC89C52微控制器具有以下的标准功效：8K字节的反射速度，256字节的随机存取储存器，32位I/O串口线，看门狗定时器，2个数值指针，三个16为定时器、计数器，一个6向量2级间断结构，片内晶振及钟表电路。
基于单片机的外文翻译、中英文翻译
英文原文DescriptionThe at89s52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM) and 128 bytes RAM. The device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard MCS-51™ instruction set and pinout. The chip combines a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel at89s52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.Features:• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory• Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-Level Program Memory Lock• 128 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Two 16-Bit Timer/Counters• Six Interrupt Sources• Programmable Serial Channel• Low Power Idle and Power Down ModesThe at89s52 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the at89s52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description:VCC Supply voltage.GND Ground.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is are written to port 0 pins, the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs theduring accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When the at89s52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through adivide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Idle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access toport pin or to external memory.RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Chip Erase: T he entire Flash Programmable and Erasable Read Only Memory array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except thatP3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion.中文翻译描述at89s52是美国ATMEL公司生产的低电压，高性能CMOS8位单片机，片内含4Kbytes的快速可擦写的只读程序存储器（PEROM）和128 bytes 的随机存取数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准MCS-51产品指令系统，片内置通用8位中央处理器（CPU）和flish存储单元，功能强大at89s52单片机可为您提供许多高性价比的应用场合，可灵活应用于各种控制领域。
89C51单片机英文说明论文英文翻译部份
89C51 Microcontroller IntroductionMicrocontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems automotive engine and among others. The high processing speed and enhaneed peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools en vironment for the validation of these microcontrollers both at the comp on ent and at the system level. Intel Plaform Engineering department developed an object-onented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers・ The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers・ The environment was developed in conjunct!on with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environme nt, its interactions with various h a rd wa re/softwa re en vironme ntal components and how to use AT89C51 ・Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performanee was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller but not ideal because the cost has not been very widely used・After 90 years with the great development of consumer electronics, microcontroller tech no logy has been a huge increase. With INTEL i960 series especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter the mainstream market. The traditional8-bit microcontroller performance have been the rapid increase capacity in crease compared to 80 the number of times. Curre ntly, high-e nd 32-bit microcontroller clocked over 300MHz z the performa nee catchi ng the mid-90s dedicated processor, while the average model prices fall to one . dollar, the most high-end model is only 10 dollars ・ Modern SCM systems are no Ion ger only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM・The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.SCM relies on the program, and can be modified・Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some are great efforts are very difficult to achieve. A not very complex functions if the 50's with the United States developed 74 series, or the 60's CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70's with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations・ MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications in elude modems, motor-control systems printers, photocopiers, air conditioner control systems, disk drives；and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension system® and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control vehicle dynamic suspension, antilock braking z and stability control applications. Because of these critical applications the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package・ The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financiallyprohibitive. Redesign costs can 「un as high as a $500« much more if the fix means back annotating it across a product family that share the same core and/or peripheral design flaw.I n additi on, field replacements of comp on ents is extremely expe nsive. as the devices are typically sealed in modules with a total value several times that of the component To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the comp orient level and system level un der worst case environmentai and voltage complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully・Intel Chandler Platform Engineering group provides postsilicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major type of the device and its application requirements determine which types of testing are performed on the device・The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines f two 16-bittimer/counters； a five vector two-level interrupt architecture^ full duple ser -ial port, on-chip oscillator and clock addition z the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable powersaving modes. The Idle Mode stops the CPU while allowing the RAM, timer/countersserial port and interrupt sys -tern to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscil -lator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC Supply voltage・GND Ground.Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When Is are written to port 0 pins, the pins can be used as highimpedance in puts ・Port 0 may also be con figured to be the multiplexed loworder address/data bus during accesses to external program and data memory・ In this mode PO has internal pullups ・Port 0 also receives the code bytes during Flash programming’and outputs the code bytes during program verification. External pullups are required during program verificatio n.Port 1Port 1 is an 8-bit bi-directional I/O port with internal Port 1 output buffers can sink/so -urce four TTL Is are written to Port 1 pins they are pulled high by the internal pullups and can be used as in puts ・ As in puts, Port 1 pins that are externally being pulled low will source current (HL) because of the internal pullups・Port 1 also receives the low-order address bytes during Flash programming and verificatio n.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL Is are written to Port 2 pins they are pulled high by the in ter nal pullups and can be used as inputs. As in puts, Port 2 pins that are exter nally being pulled low will source current (IIL) because of the internal pullups・Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups・Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application/ it uses strong internal pull-ups when emitting Is. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals durin Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/sou -rce four TTL Is are written to Port 3 pins they are pulled high by the internal pullups and can be used as in puts ・ As inputs.Port 3 pins that are exte「n ally being pulled low will source current (HL) because of the pullups・RSTReset in put A high on this pin for two machi ne cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address duringaccesses to external memory・This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped duri -ng each access to external desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode・PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory・EA/VPPExternal Access Enable・ EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed/ EA will be internally latched on should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require12-volt VPP.The AT89C51 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complementof the written datum on ・ Once the write cycle has been completed, true data are valid on all outputs andthe next cycle may begin. Data Polling may begin any time after a write cycle has been initiated・Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal, is pulled low after ALE goes high during programming to indicate BUSY. is pulled high again when programming is done to indicate READY・Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly・ Verification of the lock bits is achieved by observing that their features are enabled.A microcomputer interface converts information between two forms. Outside the microcomputer the info rmation han died by an electronic system exists as a physical signal, but within the program/ it is represented nu merically ・ The fun ctio n of any in terface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps・An analog-to-digital converter(ADC) is used to convert a continuously variable signal toa corresponding digital form which can take any one of a fixed number of possible binary values・ If the output of the transducer does not vary continuously, no ADC is n ecessary .In this case the signal conditi oning section must convert the in coming signal to a form whichcan be connected directly to the next part of the interface, the input/output section of the microcomputer itself.Output in terfaces take a similar form, the obvious differe nee being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of theinterface and performs the scaling numbers which may be needed for a digital-to-analog converter(DAC). This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned(usually amplified) to a form suitable for operating an actuator.The signals used within microcomputer circuits are almost always too small to be connected directly to the "outside world" and some kind of interface must be used to translate them to a more appropriate form・ The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator.To solve real-world problems, a microcontroller must have more than just a CPU/a program, and a data memory. In addition, it must contain hardware allowing the CPU to access info「mation from the outside world ・ Once the CPU gathers informatio n and processes the data, it must also be able to effect change on some portion of the outside world. These hardware devices, called peripherals, are the CPU' s window to the outside.The most basic form of peripheral available on microcontrollers is the general purpose 170 port. Each of the I/O pins can be used as either an in put or an output The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions.Some type of serial unit is included on microcontrollers to allow the CPU to communicatebit-serially with external devices ・ Using a bit serial format in stead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously・Its applicationsSCM is widely used in instruments and meters, household appliances, medical equipment, aerospace, specialized equipment, intelligent management and process control fields/ roughly divided into the following several areas:SCM has a small size, low power consumption, controlling function, expansion flexibility, the advantages of miniaturization and ease of use, widely used instrument, combining different types of sensors can be realized, such as voltage, power; frequency, humidity temperature, flow, speed z thicknes® angle, length, hardness, elementa- physical pressure measurement. SCM makes use of digital instruments, intelligence, miniaturization, and functionality than the use of more powerful electronic or digital circuits・ Such as precision measuring equipment (power meter, oscilloscope, variousanalytical instrument).89C51单片机简介单片机普遍应用于商业：诸如调制解调器,电动机操纵系统,空调操纵系统,汽车发动机和其他一些领域。
外文翻译--AT89C52单片机的介绍
中文4800字附录3：外文翻译AT89C52 monolithic integrated circuit introduction AT89C52 is the low voltage which American ATMEL Corporation produces, the high performance CMOS 8 monolithic integrated circuits, internal may repeatedly scratch read-only program memory (PEROM) and 256bytes random access data-carrier storage (RAM) including 8k bytes which writes, the component uses ATMEL Corporation the high density, the non-volatility memory technology production, is compatible with the standard MCS-51 command system and 8052 product pins, internal sets at general 8 central processor (CPU) and the Flash memory cell, the function formidable AT89C52 monolithic integrated circuit suits in many comparatively plurality of controls application situation.Main performance parameter:Are completely compatible with the MCS-51 product instruction and the pinThe 8k byte may again scratch writes Flash to dodge the fast memory1000 times scratches the write cycleEntire static operation: 0Hz—24MHzThree level of encryption program memory256×8 In byte RAM32 programmable I/O mouth line3 16 fixed time/counters8 interrupt sourcesProgrammable serial UART channelThe low power loss idle and falls the electricity patternFunction characteristic outline:Below AT89C52 provides the standard function: 8k byte Flash dodges the fast memory, 256 byte internal RAM,32 I/O mouth line, 3 16 fixed time/counters, 6 vector two level of interrupt structures, A full-duplex serial passes unguardedly, internal oscillator and clock electric circuit.At the same time, AT89C52 may fall to the 0HZ static state logical operation, and supports the electricity saving working pattern which two kind of softwares may elect.The idle way stops CPU the work, but permits RAM, fixed time/the counter, serial passes unguardedly and the interruption system continues to work.Falls the electricity way to preserve in RAM the content, but the oscillator knock off and forbids other all part work to reposition until the next hardware.The pin function showsVcc: Supply voltageGND: GroundingP0 mouth: The P0 mouth is one group of 8 leaks leads the way extremely the bidirectional I/O mouth, also is the address/data bus multiplying mouth.As outlet with when, each potential energy absorption current way actuates 8 TTL logic gate, when writes “1” to port P0, may take the high impedance input end uses.When visits exterior data-carrier storage or the program memory, when this group of mouth line segment transforms the address (low 8) and the data bus multiplying, pulls the resistance in the visit activation interior.When Flash programming, P0 mouth receive instruction byte, but when program check, when output order byte, verification, outside the request joins pulls the resistanceP1 mouth: P1 is in a belt interior pulls the resistance 8 bidirectional I/O mouth, the P1 output buffer may actuate (absorption or output current) 4 TTL logic gate.Writes “1” to the port, pulls the resistance through internal on to pull the port tothe high level, this time may make the input port.When makes the input port use, because in internal existence pulls the resistance, some pin is pulled lowly by exterior signal when can output electric current (IIL).With at89C51 similarity is, P1.0 and P1.1 also may take separately fixed time/the counter 2 exterior countings inputs (P1.0/T2) and inputs (P1.1/T2EX), see also table 1.Flash programming and program check period, P1 receives the low 8 bit address.P2 mouth: P2 is one has in the interior to pull the resistance 8 bidirectional I/O mouth, the P2 output buffer may actuate (absorption or output current) 4 TTL logic gate.Writes “1” to port P2, pulls the resistance through internal on to pull the port to the high level, this time may make the input port, when makes the input port use, because in internal existence pulls the resistance, some pin is pulled lowly by exterior signal when can output electric current (IIL).When visits exterior program memory or 16 bit address exterior data-carrier storage (e.g. carries out the MOVX@DPTR instruction), the P2 mouth sends out the high 8 bit address data.When visits 8 bit addresses exterior data-carrier storage (for example carries out the MOVX@RI instruction), the P2 mouth outputs the P2 latch the contentWhen Flash programming or verification, P2 also receives the top digit address and some control signal.P3 mouth: The P3 mouth is a group has in the interior to pull the resistance 8 bidirectional I/O mouth.The P3 mouth output buffer may actuate (absorption or output current) 4 TTL logic gate.Reads in “1” when to the P3 mouth, they the position resistance are pulled by the interior in Gao Bingke the achievement to input the port.This time, will be pulled by the outside the low P3 mouth to use to pull resistance output current (IIL).The P3 mouth besides took the general I/O mouth line, a more important use isIn addition, the P3 mouth also receives some to use in Flash dodging the fast memory programming and the program check control signal.RST: Replacement input.When the oscillator works, the RST pin will appear above two machine cycles the high level to cause the monolithic replacement.ALE/PROG: When visits exterior program memory or the data-carrier storage, ALE (address lock saves permission) to output the pulse to use in the lock saving the address the low 8 bytes.In ordinary circumstances, ALE still by clock oscilation frequency 1/6 output fixed pulse signal, therefore it may the foreign output clock or uses in fixed time the goal.Must pay attention: When visits exterior data-carrier storage will jump over a ALE pulse.To Flash memory programming period, this pin also uses in inputting programming pulse (PROG).If has the necessity, may through to in special function register (SFR) area 8EH the unit D0 position position, be possible to forbid the ALE operation.After this position position, only then MOVX and the MOVC instruction can activate ALE.In addition, this pin can pull weakly high, when the monolithic integrated circuit carries out exterior procedure, should establish the ALE prohibition position to be invalid PSEN: The procedure storage permits the (PSEN) output is exterior program memory reads the gating signal, when AT89C52 takes the instruction by exterior program memory (or data), each machine cycle two PSEN is effective, namely outputs two pulses.When visits exterior data-carrier storage, will jump over two RSEN signals.EA/VPP: Exterior visit permission.Wants to cause CPU only to visit exterior program memory (address is 0000H-FFFFH), the EA end must maintain the low level (earth).Must pay attention: If adds mil LB1 to program, when replacement the interiorcan lock saves the EA end condition.If the EA end (meets the Vcc end) for the high level, CPU carries out in the internal procedure memory instruction.When the Flash memory programs, this pin adds on 12V programming permission power source VPP, certainly this must be this component is uses 12V to program voltage VPP.XTAL1: Oscillator inverting amplifier and internal clock generator input end.XTAL2: Oscillator inverting amplifier out-port. Special function register:In at89C52 internal memory, the 80H-FFH altogether 128 units for special function register (SFE), SFR address basement reflection as shown in Table 2.All addresses all are defined by no means, only then a part is defined from the 80H-FFH altogether 128 bytes, but also has quite a part not to define.To the definition unit read-write will not have been Yuan Xiao, the read-out value will be indefinite, but will read in the data will also lose.Should not “1” not read in the data the definition unit, then will possibly entrust with the new function in these units in the future product, in this case, after replacement these unit value always “0”.AT89C52 besides with AT89C51 all fixed time/counters 0 and fixed time/counter 1, but also increased a fixed time/counter 2.Fixed time/the counter 2 control statusbyte is located T2CON、T2MOD (to see Table 4), the register to (RCA02H, RCAP2L) is the timer 2/automatic loads the register again under 16 capture ways or 16 automatic heavy loading way capture.Interrupt register:AT89C52 has 6 interrupt sources, 2 interrupt priorities, the IE register controls each interrupt position, in the IP register 6 interrupt source each may decide as 2 superiordata-carrier storages:AT89C52 has 256 byte internal RAM,80H-FFH high 128 bytes and the special function register (SFR) address is overlap, also is high 128 byte RAM and the special function register address is same, but in physics they are separated.When an instruction visits the 7FH above dummy home address unit, in the instruction uses the addressing way is different, also is the addressing way decision is visits high 128 byte RAM to visit the special function register.If the instruction is the direct addressing way for the visit special function register.For example, following direct addressing instruction visit special function register 0A0H (i.e. P2 mouth) address unit.MOV 0A0H,#dataThe indirect addressing instruction visits high 128 byte RAM, for example, in following indirect addressing instruction, the R0 content is 0A0H, then the visit data byte address is 0A0H, but is not the P2 mouth (0A0H).MOV the @R0,#datastorehouse operation also is the indirect addressing way, therefore, high 128 bit data RAM also may take the storehouse area use.Timer 0 and timer 1:The AT89C52 timer 0 and the timer 1 working and AT89C51 are same.Timer 2:The timer 2 is 16 fixed time/counters.It already may when timer use, also may take the external event counter use, its working chooses by the special function register T2CON C/T2 position.The timer 2 has three workings: The capture way, the automatic heavy loading (upward or downward counting) the way and the baudrate generator way, the working chooses by the T2CON control position, see also table 4.The timer 2 is composed by two 8 register TH2 and TL2, in the timer working, each machine cycle TL2 register value adds 1, because a machine cycle vibrates the clock constitution by 12, therefore, counting speed for oscilation frequency 1/12.When counting working, when on the T2 pin exterior input signal produces by 1 to 0 drops along, the register value adds 1, under this working, each machine cycle 5SP2 period, carries on the sampling to exterior input. If picks in the first machine cycle the value is 1, but the value which picks in the next machine cycle is 0, then is following close on the next cyclical S3P1 period register adds 1.Because distinguishes 1 to need 2 machine cycles to 0 jumps (24 durations of oscillation), therefore, highest counting speed for oscilation frequency 1/24. In order to guarantee the sampling the accuracy, the request input level maintains at least before the change for a complete cyclical the time, guarantees the input signal at least by sampling one time.Capture way:Under the capture way, chooses two ways through T2CON control position EXEN2.If EXEN2=0, the timer 2 is 16 timers or the counter, when counting overflow, to the T2CON overflow symbolized TF2 sets at the position, simultaneously activates the interrupt.If looks up EXEN2=1, the timer 2 completes the same operation, But when the T2EX pin exterior input signal has 1 to 0 negative jumps, also appears in TH2 and the TL2 value is caught separately to in RCAP2H and RCAP2L.Moreover, the T2EX pin signal jump causes in T2CON EXF2 to set at the position, is similar with TF2, EXF2 also can interrupt exactly.Capture way as shown in Figure 4.Automatic heavy loading (upward or downward counter) way:When timer 2 work in 16 automatic heavy loading ways, can to its programming for upward or the downward counting way, this function may (see Table 5) through special function register T2CON the DCEN position (permission downward counting) choose.When replacement, the DCEN position “0”, the timer 2 defaults establishes as the upward counting. When DCEN sets at the position, the timer 2 already may count upwardly also may the downward counting, this is decided by the T2EX pin value,see also Figure 5, when DCEN=0, the timer 2 automatic setups for the upward counting, under this way, in the T2CON EXEN2 control position have two kind of choices, if EXEN2=0, the timer 2 for the upward counting to the 0FFFFH overflow, sets at the position TF2 activation interrupt, simultaneously 16 counter register RCAP2H and the RCAP2L heavy loading, RCAP2H and the RCAP2L value may by the software initialization.When DCEN sets at the position, the timer 2 already may count upwardly also may the downward counting, this is decided by the T2EX pin value, see also Figure 5, when DCEN=0, the timer 2 automatic setups for the upward counting, under this way, in the T2CON EXEN2 control position have two kind of choices, if EXEN2=0, the timer 2 for the upward counting to the 0FFFFH overflow, sets at the position TF2 activation interrupt, simultaneously 16 counter register RCAP2H and the RCAP2L heavy loading, RCAP2H and the RCAP2L value may by the software initialization.Baudrate generator:When T2CON (Table 3) TCLK and RCLK set at the position, fixed time/the counter 2 takes the baudrate generator use.If fixed time/the counter 2 took thetransmitter or the receiver, its transmission and the receive baudrate may be different, the timer 1 uses in other functions, as shown in Figure 7.If RCLK and TCLK set at the position, then timer 2 work in baudrate generator way.The baudrate generator way and the automatic heavy loading way are similar, under this way, the TH2 turn over causes the timer 2 registers is important the new loading with in RCAP2H and the RCAP2L 16 figures, this value establishes by the software.In the way 1 and the way in 3, the baudrate determined by the timer 2 overflow speeds according to the equation below that,Way 1 and 3 baudrate = timer overflow rate /16The timer already can work in fixed time the way also can work in the counting way, in the majority applications, is the work in fixed time the way (C/T2=0).The timer 2 took when baudrate generator, with as the timer operation is different, when usual achievement timer, (1/12 oscilation frequency) checks the value in each machine cycle to add 1, but took when baudrate generator use, (1/2 oscilation frequency) the register value adds 1 in each condition time. The baudrate formula is as follows:The way 1 and 3 baudrate = oscilation frequency/{32×[65536-(RCAP2H, RCAP2L)]}in the formula (RCAP2H, RCAP2L) is in RCAP2H and RCAP2L 16 does not have the sign digit.The timer 2 took the baudrate generator use electric circuit as shown in Figure 7.In when T2CON RCLK or TCLK=1, the baudrate working only then is effective. In the baudrate generator working, the TH2 turn over cannot cause TF2 to set at theposition, therefore does not have the interrupt.But if EXEN2 sets at the position, also the T2EX end produces by 1 to 0 negative jumps, then can cause EXF2 to set at the position, this time cannot load (RCAP2H, RCAP2L) content in TH2 and TL2.Therefore, when the timer 2 takes the baudrate generator use, T2EX may use as the additional exterior interrupt source.Needs to pay attention, when timer 2 work in baudrate, when moves (TR2=1) as the timer, cannot visit TH2 and TL2.Because this time each condition time timer can add 1, to its read-write will obtain a indefinite value.But however, may read to RCAP2 cannot write, because the write operation will be the reload, the write operation possibly command writes with/or the heavy loading makes a mistake.In visits timer 2 or in front of the RCAP2 register, should (eliminate the timer closure TR2).The programmable clock outputs:The timer 2 may output a dutyfactor through the programming from P1.0 is 50% clock signal, as shown in Figure 8.The P1.0 pin besides is a standard I/O mouth, but also may cause it through the programming to take fixed time/the counter 2 exterior clock inputs and the output dutyfactor 50% clock pulse.When the clock oscilation frequency is 16MHz, outputs the clock frequency range is 61Hz-4MHz.When establishes fixed time/the counter 2 as the clock generator, C/T2(T2CON.1)=0, T2OE(T2MOD.1)=1, must or stops the timer by TR2(T2CON.2) start.The clock output frequency is decided in the oscilation frequency and the timer 2 catches the register (RCAP2H, RCAP2L) reload value, the formula is as follows:The output clock frequency = oscillator frequency/{4×[65536-(RCAP2H, RCAP2L)]}under the clock output way, the timer 2 turn over cannot have the interrupt, this characteristic with took when baudrate generator use is similar.When the timer 2 takes the baudrate generator use, Also may take the clock generator use, but needs to pay attention is the baudrate and the clock output frequency cannot separate the determination, this is because they with use RCAP2H and RCAP2L.AT89C52单片机的介绍AT89C52是美国ATMEL公司生产的低电压，高性能CMOS 8位单片机，片内含8k bytes的可反复擦写的只读程序存储器（PEROM）和256bytes的随机存取数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，与标准MCS－51指令系统及8052产品引脚兼容，片内置通用8位中央处理器（CPU）和Flash存储单元，功能强大AT89C52单片机适合于许多较为复杂控制应用场合。
毕业论文外文翻译--基于AT89C52单片机的LED显示屏控制系统的设计
附件1：外文资料翻译译文基于AT89C52单片机的LED显示屏控制系统的设计摘要这篇文章介绍了基于AT89C52单片机的LED点阵显示屏的软件和硬件开发过程。
使用一个简单的外部电路来控制像素是32×192的显示屏。
用动态扫描，显示屏可以显示6个32×32的点阵汉字。
显示屏也可以分为两个小的显示屏，它可以显示24个像素是16×16的汉字。
可以通过修改代码来改变显示的内容和字符的滚动功能，而且可以根据需要调整字符的滚速或者暂停滚动。
中文字符代码存储在外部存储寄存器中，内存的大小由需要显示的汉字个数决定。
这种显示屏具有体积小，硬件和电路结构简单的优点。
关键词发光二极管汉字显示AT89C52单片机1.导言随着LED显示屏不断改善和美化人们的生活环境，LED显示屏已经成为城市明亮化，现代化、信息化的一项重要标志。
在大的购物商场，火车站，码头，地铁，大量的管理窗口等，我们经常可以看到LED灯光。
LED商业已成为一个快速增长的新产业，拥有巨大的市场空间和光明前景。
文章，图片，动画和视频通过LED发光显示，并且内容可以变换。
一些显示设备的模块化结构，通常有显示模块，控制系统和电源系统。
显示模块是由LED管组成的点阵结构，进行发光显示，可以显示文章，图片，视频等。
控制系统可以控制区域里LED的亮灭，电源系统为显示屏提供电压和电流。
用电脑，取出字符字节，传送到微控制器，然后送到LED点阵显示屏上进行显示，很多室内和室外显示屏都是通过这个方法进行显示的。
按显示的内容区分，LED点阵屏的显示可分为图形显示、图片显示和视频显示三个部分。
与图片显示屏比较，不管是单色或者彩色的图形显示屏，都没有灰色色差，所以，图形显示不能反映丰富的色彩。
视频显示屏不但可以显示运动、清楚和全彩的图像，也可以显示电视和计算机信号。
虽然三者之间有一些不同，但显示的原理基本一样。
单片机具有优良的性价比，体型小，可靠性高，控制能力强，它广泛用于智能仪器、机电一体化的实时过程控制、机器人、家用电器、模糊控制和通讯系统等。
全自动洗衣机外文翻译知识交流
外文资料翻译1、STC89C52 processing chipPrime features:With MCS - 51 SCM product compatibility, 8K bytes in the system programmable Flash memory, 1000 times CaXie cycle, the static operation: 0Hz ~ 33Hz, triple encryption program memory, 32 programmed I/O port, three 16 timer/counter, the eight uninterrupted dual-career UART serial passage, low power consumption, leisure and fall after fall electric power mode can be awakened and continuous watchdog timer and double-number pointer, power identifier.Efficacy: characteristicsSTC89C52 is one kind of low power consumption, high CMOS8 bit micro-controller, 8K in system programmable Flash memory. Use high-density nonvolatile storage technology, and industrial 80C51 product instruction and pin fully compatible. The Flash memory chips allows programs in the system, also suitable for programmable conventional programming. In a single chip, have clever 8 bits CPU and online system programmable Flash, increase STC89C52 for many embedded control system to provide high vigorous application and useful solutions. STC89C52 has following standard efficacy: 8k byte Flash RAM, 256 bytes, 32 I/O port, the watchdog timer, two, three pointer numerical 16 timer/counter, a 6 vector level 2 continuous structure, the serial port, working within crystals and horological circuit. In addition, 0Hz AT89S52 can drop to the static logic operation, support two software can choose power saving mode. Idle mode, the CPU to stop working, and allows the RAM, timer/counters, serial, continuous to work. Protection asana pattern, RAM content is survival, vibrators frozen, SCM, until all the work under a continuous or hardware reset. 8-bit microcontrollers 8K bytes in the system programmable Flash AT89S52 devices.Mouth: P0 P0 mouth is a two-way open drain I/O. As export, each can driveeight TTL logic level. For P0 port to write "1", foot as the high impedance input.When access to external programs and numerical memory, also known as low P0 mouth eight address/numerical reuse. In this mode, with the internal P0 resistor.In the flash when programming, also used for P0 mouth; absorb instruction bytes In the process, the output command byte calibration. When the program requires external, calibration on pull-up resistors.Mouth: P1 mouth P1 is an internal resistance of the eight two-way I/O buffers can drive, P1 output four TTL logic level. To write "1" P1 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In addition, P1.0 and P1.2 respectively timer/counter 2 external counting input (P1.0 / T2) and when the trigger editor/counter P1.1 input (2), specific T2EX/are shown below. In programming and calibration, flash P1 mouth absorb eight address low byte.Efficacy: the foot.P1.0 T2 (timer/counter T2 external counting input), clock outputP1.1 T2EX (timer/counter T2 capture/overloaded triggered signals and direction control),P1.5 MOSI (with) online system programming,P1.6 MISO (with) online system programming,P1.7 SCK (with) online system programming,Mouth: P2 P2 mouth is an internal resistance of the eight two-way I/O buffers and P2 output can drive four TTL logic level. To write "1" P2 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In the external program memory access or use 16bit external numerical memory address read (for example MOVX execution DPTR @), P2 mouth send out high 8 address. In this application, P2 mouth on the internal usestrong pull send 1. In using 8-bit address (such as MOVX @ RI) access to external numerical memory, P2 mouth output P2 latches content. In programming and calibration, flash P2 mouth also absorb high eight address byte and some control signal.P3: a P3 mouth on the inside of the eight two-way pull-up resistors I/O buffers can drive, p2 output four TTL logic level. For P3 port to write "1", the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). P3 mouth AT89S52 special functions (also as the second efficacy), are shown below. In programming and calibration, flash also absorb some P3 mouth control signals.Port pin second efficacy:P3.0 RXD (serial input)P3.1 TXD (serial export),P3.2 INTO the discontinuous (0)P3.3 INT1 (1) the discontinuousP3.4 (time/counter TO 0)P3.5 T1 (1) time/counter,P3.6 WR (external numerical memory write for)P3.7 RD (external numerical memory read for)In addition, also absorb some used in mp3 mouth FLASH memory programming and calibration of program control signals.RST, reset input: when the vibrator, RST pin appeared two machine cycle above high level will be reset the chip.ALE/PROG - when access to external program memory or numerical memory, ALE (address latch allow) output pulses are used to latch address of low eight bytes. Normally, ALE with clock frequencies are 1/6 output pulse signal with fixed, so it can be used for the purpose or output clocks. Timing Those who want an attention is: whenever access to external numerical memory will skip a ALE pulse.For FLASH memory programming, this pin is used for input programming pulse (.) PROGIf necessary, but through special effect to the zone registers (SFR) 8EH D0 position, the unit can be banned ALE operations. This position is a bit, MOVX and MOVC instructions will be activated. ALE -- In addition, the foot will be weak, execute external program MCU hign should be banned, a void. Set ALE PSEN - program storage PSEN allowed (output is outside of the program memory read, choose communication by external program memory when taking AT89C52 instructions (or), each machine cycle PSEN twice, two pulse output is useful, during this period, when access to external numerical memory, will skip PSEN twice.EA/VPP - external access permission, to make the CPU only access to external program memory (address for 0000H - FFFFH), EA end must remain low level (ground). Should notice is: if a LB1 is encrypted, reset when programming will latch EA end.As for the high level of the EA (VCCS), the CPU is the implementation of the program memory internal instructions.FLASH memory when programming, this pin plus + 12 v programming allow power Vpp, of course, that is the part is used to Vpp voltage 12V programming.2、China's washing machine market is entering the replacement period, the market potential is huge, people washing requirements are also increasing, the current strength of the main washing machine washing function, into the drainage system, automatic fault diagnosis function, pause and other major functions in many respects still can not meet people's needs. This requires that designers have a higher professional and technical level, able to make more good suggestions and new topics, people will need to become a reality, to design more energy-efficient, more comprehensive and more humane automatic washing machine. The current washing machines are not compatible implement all aspects of the play more plaid laundry manufacturers arefocusing on specialty brands of washing machines, highlight one or two different washing machine and other personalized features, to realize the function of the washing machine is controlled by microcomputer the microcontroller small and flexible control, therefore, is designed to give single-chip control system is very practical. The design of the washing machine and the controller also to meet the different needs of some users. SCM control technology will also be used in real life, the most important thing is to learn the use of technology.In today's world of technology, the era of knowledge explosion hit, as long as people need, it is possible to produce a product to meet the needs of the people. It is this development of the washing machine, it was found that in life some of its inconvenience, it will continue to improve and perfect it in practice, the new washing machine is in this case was born.Ultrasonic washing machine cavitation ultrasonic vibration generated by the production of gas bubbles in the wash side edges disappear movement, resulting in strong water pressure, then add a small amount of laundry detergent, fiber vibration, phacoemulsification decontamination, water bubbles rise, resulting in a washing tub central flip outward flow, then friction between the clothes, and a very effective role in full contact with washing detergent production. This washing machine washing tub is small, barrel no moving parts, no mechanical electrical failure, convenient repair. Dictionary uniformity, no wound, not to hurt the fabric, washing effect, water, power.This electromagnetic washing machine washing machine washing tub has four heads, each of the top clamps to grip the stretch clothes, washing each head has a solenoid, the power to micro-vibration hit 2500 times / second, so laundry in the washing liquid. Because no motor, no noise, 50% water, power 75%.Foam washing machine temperature Osaka, Japan developed a large washing machine to wash clothes without hot foam. Filling the lower part of the detergent in the washing machine, put the clothes after the toggle switchand start blowing the air into the tank foam by heating to 70Foam wash clothes degrees Celsius, and then into the tub next defoaming apparatus, generally 5 to 10 minutes to wash / 5, 21L / 1kg dryer.One kind without detergent or detergent washing machine washing machine vacuum developed by the former Soviet Union, a vacuum pump into a vacuum suction laundry bins, buckets of water movement bubble burst and decontamination. Clean and high, does not harm clothes, no noise, and high cost. Actually cold washing boiling principle, within a few seconds, then withdrawn from the upper air washing tub. Thin like air and water, such as boiling, stir in laundry foam whirlpool, 1.5 to 2 minutes to wash clothes, clothes generally 7 to 10 minutes to complete the whole process.Italian Zanussi jet washing machine detergent company will continue to develop a spray to the laundry washing machine, it seems dry, it can save 20% water, 30% of the province detergent, can save 35%, save time by 10%. This washing machine is completely different from the front-loading washing machine, installed in the sprinkler system of the injection device continuously spray water and detergent on the clothes washed, clothes and stir in stainless steel tanks. Laundry in the liquid, stirring constantly, just as there is no barrel water. However, it permeates through the water flow into a water storage tank is located in the laundry drum bottom. In the tank, the water is re-injected into the recirculated heating up the laundry, the washing tub made periodically dehydration, to drain the water and contaminants, and then rinsed three times, and finally washing dehydration. Some of the problems to be solved washing machineSince China started late washing machine factory, plus some technical issues, the end of the reproduction inevitable and some models show some ills. The main shortcomings are:Noise, hemp and leaking electricity, water or water more than poor or poor drainage, the work cycle is not smooth, vibration, damage to the laundry, washing effect is poor, dehydration automatic insertion of the poor, poordehydration, weight capacity unreasonable. Specifically, there is a problem in the washing machine structure, quality, and management of raw materials and molds.中文翻译1、STC89C52处理芯片首要性能：与MCS-51单片机产物兼容、8K字节在系统可编程Flash存储器、1000次擦写周期、全静态操作：0Hz～33Hz 、三级加密程序存储器、32个可编程I/O口线、三个16位定时器/计数器八个间断源、全双职工UART 串行通道、低功耗空闲和掉电模式、掉电后间断可唤醒、看门狗定时器、双数值指针、掉电标识符。
单片机外文翻译3
外文及翻译英文资料:STC89C51（8-bit Micro controller with 4K Bytes Flash）The STC89C51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytesof In-System Programmable Flash memory. The device is manufactured using Atmel's high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.Features：Compatible with MCS.-51 Products4K Bytes of In-System Programmable (ISP) Flash MemoryEndurance: 1000 Write/Erase Cycles4.0V to5.5V Operating RangeFully Static Operation: 0 Hz to 33 MHzThree-level Program Memory Lock128 x 8-bit Internal RAM32 Programmable I/O LinesTwo 16-bit Timer/CountersSix Interrupt SourcesFull Duplex UART Serial ChannelLow-power Idle and Power-down ModesInterrupt Recovery from Power-down ModeWatchdog TimerDual Data PointerPower-off FlagFast Programming TimeFlexible ISP Programming (Byte and Page Mode)Green (Pb/Halide-free) Packaging OptionThe STC89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the STC89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset.VCC：Supply voltage (all packages except 42-PDIP).GND：Ground (all packages except 42-PDIP; for 42-PDIP GND connects only the logic core and the embedded program memory).VDD：Supply voltage for the 42-PDIP which connects only the logic core and the embedded program memory.PWRVDD：Supply voltage for the 42-PDIP which connects only the I/O Pad Drivers. The application board MUST connect both VDD and PWRVDD to the board supply voltage.PWRGND：Ground for the 42-PDIP which connects only the I/O Pad Drivers. PWRGND and GND are weakly connected through the common silicon substrate, but not through any metal link. The application board MUST connect both GND and PWRGND to the board ground.Port 0：Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.Port 0 can also be configured to be the multiplexed low-order address/data bus duringaccesses to external program and data memory. In this mode, PO has internal pull-ups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification.Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (lip) because of the internal pull-ups.Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (lip) because of the internal pull-ups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX@DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX@RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3：Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (lip) because of the pull-ups.Port 3 receives some control signals for Flash programming and verification.Port 3 also serves the functions of various special features of the STC89C51，as shown in the following table.RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.ALE/PROG：Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may beused for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable (PSEN) is the read strobe to external program memory.When the AT89S51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at OOOOH up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to Vcc for internal program executions.This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2：Output from the inverting oscillator amplifierSpecial Function Registers：Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.User software should not write 1 s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.Interrupt Registers:The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the five interrupt sources in the IP register.Dual Data Pointer Registers:To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer Registers are provided: DPO at SFR address locations 82H-83H and DP1 at 84H-85H.Bit DPS=0 in SFR AUXR1 selects DPO and DPS=1 selects DP1. The user should ALWAYS initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register.Power OffFlag:The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to "1”during power up. It can be set and rest under software control and is not affected by reset.Memory Organization：MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.Program Memory：If the EA pin is connected to GND, all program fetches are directed to external memory. On the STC89S51，if EA is connected to Vcc, program fetches to addresses OOOOH through FFFH are directed to internal memory and fetches to addresses 1000H through FFFFH are directed to external memory.Data Memory：The STC89S51 implements 128 bytes of on-chip RAM. The 128 bytes are accessible via direct and indirect addressing modes. Stack operations are examples of indirect addressing, so the 128 bytes of data RAM are available as stack space.Watchdog Timer (One-time Enabled with Reset-out)：The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01 EH and OE1 H in sequence to the WDTRST register (SFR location OA6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at the RST pin.Timer 0 and 1：Timer 0 and Timer 1 is a 16-bit Timer/Counter.中文翻译:STC89C51 (8位微控制单片机，片内含4K bytes可系统编程的存储器)STC89C51是美国ATMEL公司生产的低功耗，高性能CMOS 8位单片机，片内含4k bytes的可系统编程的Flash只读程序存储器，器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准8051指令系统及引脚。
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山东英才学院毕业设计(论文)外文资料翻译学院机械学院专业电气工程及其自动化学生姓名班级学号电气1班外文出处Center for Electrical EngineeringResearch and Solution(CEERS) 附件：1.外文资料翻译译文；2.外文原文中文翻译STC89C52处理芯片电气工程的研究和解决方案中心（ceers）艾哈迈德为吉.波特首要性能：与MCS-51单片机产物兼容、8K字节在系统可编程视频存储器、1000次擦拭周期，全静态操作：0Hz~33Hz、三级加密程序存储器，32个可编程I/O接口线、三个16位定时器（计数器），八个中断源、低功能耗空闲和掉电模式、掉电后间断可唤醒，看门狗定时器、双数值指针，掉电标示符。
关键词：单片机，UART串行通道，掉电标示符等前言可以说，二十世纪跨越了三个“点”的时代，即电气时代，电子时代和现已进入的电脑时代。
不过，这种电脑，通常指的是个人计算机，简称PC机。
还有就是把智能赋予各种机械的单片机（亦称微控制器）。
顾名思义，这种计算机的最小系统只用了一片集成电路，即可进行简单的运算可控制。
因为它体积小，通常都是藏在被控机械的内部里面。
它在整个装置中，起着有如人类头脑的作用，他出了毛病，整个装置就会瘫痪。
现在，单片机的种类和适用领域已经十分广泛，如智能仪表、实施工控、通讯设备、导航系统、家用电器等。
各种产品一旦用上了单片机，就你能起到产品升级换代的功效，常在产品名称前冠以形容词—— “智能型”，如智能洗衣机等。
接下来就是关于国产STC89C52单片机的一些基本参数。
功能特性描述:STC89C52单片机是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程视频播放存贮器使用高密度非易失性存储器技术制造，与工业80C51 产物指令和引脚完全兼容。
片上反射速度允许程序存储器在系统可编程，也适用于常规的程序编写器。
在其单芯片上，拥有灵敏小巧的八位中央处理器和在线系统可编程反射，这些使用上STC89C52微控制器为众多嵌入式的控制应用系统提供高度矫捷的、更加有用的解决方案。
STC89C52微控制器具有以下的标准功效：8K字节的反射速度，256字节的随机存取储存器，32位I/O串口线，看门狗定时器，2个数值指针，三个16为定时器、计数器，一个6向量2级间断结构，片内晶振及钟表电路。
另外，STC89C52可降至0HZ静态逻辑操作，支持两种软件可选择节电模式、间断继续工作。
空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、间断继续工作。
掉电保护体式格局下，RAM内容被生成，振动器被冻结，单片机一切的工作停止，直到下一个间断或者硬件复位为止。
8位微型控制器8K字节在系统中可编程FlashSTC89C52.。
P0口：P0口是一个8位漏极开路的双向I/O口。
作为输出口，每位能驱动8个TTL逻辑电平，对于P0端口写“1”时，引脚用作高阻抗输入。
当访问外部程序和数值存储器时，P0口也被作为低八位/数值复用。
在这种模式下，P0具有内部上拉电阻。
在Flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。
在程序校验时，需要外部上拉电阻。
P1口：P1口是一个具有内部上拉电阻的八位双向I/O 口，P1输出缓冲器驱动四个TTL逻辑电平。
对于P1端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。
作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。
此外，P1.0和P1.2分别作为定时器/计数器2的外部计数输出（P1.0、T2）和定时器、计数器2的触发输入（P1.1、T2EX），具体如下所示。
在Flash编程和校验时，P1口吸收低8位地址字节。
引脚号第二功效：P1.0 T2（定时器、计数器T2的外部计数输入），钟表输出。
）P1.1 T2EX（定时器，计数器T2的捕捉、重载触发信号和方向控制。
）P1.5 MOSI（在线系统编程用。
）P1.6MISO（在线系统编程用。
）P1.7SCK（在线系统编程用。
）P2口：P2口是一个具有内部上拉电阻的8位双向I/O口，P2输出缓冲器能驱动四个TTL逻辑电平。
对于P2端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。
在访问外部程序存储器或者用16位地址读取外部数值存储器（例如执行MOVX@DPTR）时，P2口送出高八位地址。
在这种应用中，P2口使用很强的内部上拉发送“1”。
在使用8位地址（如MOVX@RI）访问外部数值存储器时，P2口输出P2锁存器的内容。
在Flash编程和校验时，P2口也接收高8位地址字节和一些控制信号。
P3口：P3口是一个具有内部上拉电阻的8位双向I/O，P2输出缓冲器能驱动四个TTL逻辑电平，对于P3端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。
P3口亦作为STC89C52特殊功效（第二功效）使用，如下表所示，早flash编程和校验时，P3口也接收一些控制信号。
P3.0 RXD（串行输入口。
）P3.1 TXD（串行输出口。
）P3.2 INTO（外间断0）P3.3 INTI（外间断1）P3.4 TO（定时、计数器0）P3.5 T1（定时、计数器1）P3.6 WR（外部数值存储器写选通）P3.7 RD（外部数值存储器读选通）此外，P3口还吸收一些用于Flash闪存编程和程序校验的控制信号。
RST——复位输入：当振动器工作时，RST引脚出现两个机器周期以上高电平将使单片机复位。
ALE/ PROG——当访问外部程序存储器或数字存储器，ALE（地址锁存允许）输出脉冲用于锁存地址的低八字节。
通常情况下，ALE以时钟频率的1 / 6输出的脉冲信号与固定，因此它可用于输出时钟频率或者定时目的。
值得注意的是：每当访问外部存储器，将跳过一个ALE脉冲数值。
对于Flash存储器编程期间，该引脚还用于输入编程脉冲（PROG）。
如有必要，可通过对于特殊功效寄存器（SFR）区中的8EH单位的D0位置位，可禁止ALE操作，只有一条MOVX和MOVC指令才能将ALE激活。
此外，该引脚会被微弱拉高，单片机执行外部程序时，应设置ALE禁止位无效。
PSEN——程序储存允许（PSEN）输出是外部程序存储器的读选通信号，当STC89C52由外部程序存储器取指令（或者数值）时，每一个机器周期两次PSEN有用，即输出两个脉冲，在此期间，当访问外部数值存储器，将跳过两次PSEN信号。
EA、VPP——外部访问允许，欲使CPU仅访问外部程序存储器（地址为0000H-FFFFH），EA端必须保持低电平（接地）。
须注意的是：如果加密位LB1被编程，复位时内部会锁存EA端状态。
如EA端为高电平（接Vcc端），CPU则执行内部程序存储的指令。
Flash存储器编程时，该引脚加上+12伏的编程允许电源VPP，当然这必须是该部件是使用12伏编程电压VPP。
看门狗定时器：WDT 是一种需要软件控制的复位方式。
WDT 由13位计数器和特殊功能寄存器中的看门狗定时器复位存储器（WDTRST)构成。
WDT在默认情况下无法工作；为了激活WDT，用户必须往WDTRST寄存器（地址：0A6H）中依次写入01EH 和0E1H。
当激活WDT 后，晶振工作，WDT在每个机器周期都会增加。
WDT计时周期依赖于外部时钟频率，除了复位（硬件复位或者WDT溢出复位），没有办法停止WDT工作。
STC89C52 单片机有一个用于构成内部振荡器的反相放大器，XTAL1和XTAL2 分别是放大器的输入、输出端。
石英晶体和陶瓷谐振器都可以用来一起构成自己振荡器。
接外部时钟源驱动器件的话，XTAL2可以不接，只接入XTAL1。
由于外部时钟信号经过二分频触发后作为外部时钟电路输出的，所以对外部时钟信号的占空比没有其他要求，最长低电平持续时间和最少高电平持续时间等还是要符合要求的。
空闲模式：在空闲模式下，CPU处于睡眠状态，而所有片上外部设备保持激活状态。
这种状态可以通过软件产生。
在这种状态下，片上RAM和特殊功能寄存器的内容保持不变。
空闲模式可以被任意一个中断或者硬件复位终止。
由硬件复位终止空闲模式只需要两个机器周期有效复位信号，在这种情况下，片上硬件禁止访问内部RAM，而可以访问端口引脚。
空闲模式被硬件复位终止后，为防止预想不到的写端口，激活空闲模式的那一条指令的下一条指令不应该是写端口或外部存储器。
总结单片机内部也用和电脑功能类似的模块，比如CPU，内存，并行总线，还有和硬盘作用相同的存储器件，不同的是它的这些部件性能都相对我们的家用电脑弱很多，不过价钱也是低的，一般不超过10元即可用它来做一些控制电器一类不是很复杂的工作也足够了。
我们现在用的全自动滚筒洗衣机、排烟罩、VCD等等的家店里面都可以看到他的身影！它主要是作为控制部分的核心部件。
它是一种在线式实时控制计算机，在线式就是现场控制，需要的是有较强的抗干扰能力，较低的成本，这也是和离线式计算机（比如家用电脑）的主要区别。
STC89C52 processing chipCenter for Electrical Engineering Research and Solution(CEERS)Ahmad Dahlan JI. ProtPrime features：With MCS-51 SCM product compatibility，8K bytes in the system programmable Flash memory，1000 times CaXie cycle，the static operation:0Hz~33Hz,triple encryption program memory,32programmed I/O port, three 16 timer/counter, the eight uninterrupted dual-career UART serial passage, low power consumption ,leisure and fall after electric power made can be awakened and continuous watchdog timer and double-number pointer,power identifier.Keyword: SCM(Single-chip microcontroller，UART serial passage，power identifier.···) IntroductiveCan be said that the twentieth century across the three “power” era, that is ,the age of electricity, the electronic age and has entered into the computer age .However, this computer, usually refers to the personal computer, referred to as PC .It consists of the host, keyboard, monitor and other components, Another type of computer, most people do not know how. This computer is to give all kinds of intelligent machines single chip(also known as micro-controller).As the name suggests, this computer system took only a minimal integrated circuit, can be a simple operation and control. Because it is small, usually hidden in the charged mechanical “stomach” in, It is in the device, like the human brain plays a role, it goes wrong, the whole plant was paralyzed. Now this microcontroller has a very broad field of use, such as smart meters, real-time industrial control, communications equipment, navigation systems, and household appliances. Once all kinds of products were using SCM, can serve to upgrade the effectiveness of products, often in the product name preceded name preceded by the adjective “intelligent” such as intelligent washing machines.STC89C52 IntroductionEfficacy:characteristicsSTC89C52 is one kind of low power consumption,high COMOSS bit micro-controller,8K in system programmable Flash memory,Use high-density nonvolatile storage technology,and industrial 80C51 product instruction and pin fully compatible.The Flash memory chips allows programs in the system,also suitable for programmable conventional programming.In a single chip,have clever 8 bits CPU and online system programmable Flash,increase STC89C52 fro many embedded control system to provide high vigorous application and useful solutions STC89C52 has following standard efficacy: SK byte Flash RAM,256 bytes,32 I/O port,the watching timer,two,three pointer numerical 16 timer/counter,a 6 vector level 2 continuous structure,the serial port,working within crystals and horological circuit.In addition,0Hz STC89C52 can drop to the static logic operation,support two software can choose power saving mode.Idle mode,the CPU to stop working,and allows the RAM ,timer/counter,serial,continuous to work.Protection asanapattern,RAM content is survival,vibrators frozen,SCM,until all the work under a continuous or hardware reset,8-bit microcontrollers 8K bytes in the system programmable Flash STC89C52 devices.Mouth:PO PO mouth is a two-way open drain I/O.As export,each can drive eight TTL. logic level.For PO port to write “1”,foot as the high impedance inputWhen access to external programs and numerical memory,also known as low PO mouth eight address/numerical reuse.In this mode,with the intern a1 PO resistor.In the flash when programming,also used for PO mouth;adsorb instruction bytes.In the process,the output command bute calibration.When the program requires external,calibration on pull-up resistors.Mouth:P1 mouth P1 is an internal resistance of the eight two-way I/O buffers can drive,P1 output four TTL logic level.To write “1”P1 port,the internal resistance to port,can push as input mouth.When used as input external and internal foot because of low resistance,will output current(IIL).In addition,P1.0 and P1.2 respectively timer/counter 2 external counting input(P1.0/T2) and when the trigger editor/counter P1.1input(2),specific T2EX/are shown below.In programming and calibration,flash P1 mouth adsorb eight address low byte.Efficacy:the foot.P1.0 T2(timer/counter T2 external counting input),clock output.P1.1 T2EX(timer/counter T2 capture/overloaded triggered signals and direction control);P1.5 MOSI(with) online system programming;P1.6 MISO(with) online system programming;P1.7 SCK(with) online system programming;Mouth:P2 P2mouth is an internal resistance of the eight two-way I/O buffers and P2 output can driver four TTL logic level.To write “1”P2 port,the internal resistance to port,can push as input mouth.When used as input,external and internal foot because of low resistance,will output current(IIL).In the external program memory access or use 16bit external numercial memory address read(for example MOVX execution DPTR@),P2 mouth send out high 8 address.In using 8-bit address(such as MOVX @ RI) access to external numerical memory,P2 mouth output P2 latches content.In programming and calibration,flash P2 mouth also absorb high eight address byte and some control signal.P3:a P3 mouth on the inside of the eight two-way pull-up resistors I/O buffers can drive,p2 output four TTL logic level.For P3 port to write “1”,the internal resistance to port,can push an input mouth.When used as input,external and internal foot because of low resistance,will output current(IIL).P3 mouth AT89S52 special functions(also as the second efficacy),are shown below.In programming and calibration,flash also absorb some P3mouth control signals.Port pin second efficacy:P3.0 RXD(serial input),P3.1 TXD(serial export),P3.2 INTO the discontinuous(0),P3.3 INT1(1) the discontinuous(0),P3.4 (timer/counter TO 0),P3.5 T1(1) timer/counter,P3.6 WR(external numerical memory write for),P3.7 RD( external numerical memory read for),In addition,also absorb some used in mp3 mouth FLASH memory programming and calibration of program control signals.RST,reset input:when the vibrator,RST pin appeared two machine cycle above high level will be reset the chip.ALE/PROG-when access to external program memory or numerical memory,ALE (address latch allow) output pulses are used to latch address of low eight bytes.Normally,ALE with clock frequencies are 1/6 output pulse signal with fixed,so it can be used for the purpose or output clocks,Timing Those who want an attention is:whenever access to external numerical memory will skip a ALE pulse.For FLASH memory programming,this pin is used for input programming pulse(.)PROGIf necessary,but through special effect to the zone registers(SFR)8EH D0 position,the unit can be banned ALE operations.This position is a bit,MOVX and MOVC instructions will be activated.ALE-In addition,the foot will be weak ,execute external program MCU hign should be banned,a void. Set ALE.PSEN-program storage PSEN allowed (output is outside of the program memory read,choose communication by external program memory when taking AT89C52 instruction(or),each machine cycle PSEN twice,two pulse output is useful,during this period,when access to external numerical memory,will skip PSEN twice.EA/VPP-external access permission,to make the CPU only access to external program memory (address for 0000H-FFFFH),EA end must remain low level(ground).Should notice is:if a LBI is encrypted,reset when programming will latch EA end.As for the high level of the EA (VCCS),the CPU is the implementation of the program memory internal instructions.FLASH memory when programming ,this pin plus+12V programming allow power Vpp,of course,that is the part is used to Vpp voltage 12V programming.Watch Timer(One-time Enabled with Reset-out):The WDT is intended as a recovery method in situation where the CPU may be subjected to software upset.The WDT consist ofa 14-bit counter and the watchdog Timer Reset(WDTRST)SFR.The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH in sequence to the WDTRST register(SFR location 0A6H).When the WDT is enabled, it well increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT expect through reset(either hardware reset or WDT overflow reset).When WDT over-flow,it will drive an output RESET HIGH pulse at the RET pin.Oscillator Characteristic:XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator .Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven.there are no requirements on the duty cycle of the external clock signal, since the input to the internal clock-ing circuitry is through a divide-by-two flip-flop, by minimum voltage high and low time specifications must be observed.Idle Mode:In idle mode ,the CPU puts itself to sleep while all the on-chip peripherals remain active.The mode is invoked by software. The content of the on-chip RAM and all the special function regis-ters remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset, the device normally resumes program execution from where it left off,up to two machine cycle before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event,but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that invokes idle mode should not write to a port pin or to external memory.ConclusionsMCU and the computer use is also similar to the module ,such as CPU ,memory, parallel bus, as well as the role and the same hard disk memory, is it different from the performance of these components are relatively weak in our home computer a lot, but the price is ow,there is generally no more than 10 yuan…..san use it to make some control for a class of electrical work is not very complex is sufficient. We are using automatic drum washing machines, smoking hood, VCD and so on inside the home appliances can see it’s shadow! It is mainly as part of the core component of the control.It is an online real-time control computer, control-line is that the scene is needed is a stronger anti-jamming ability, low cost, and this is, and off-line computer(such as home PC).the main difference.。