半导体封装制程及其设备介绍

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WireBonding (焊线)
Lithography (微影)
Wafer Inspection (晶圆检查) 前段結束
Molding (塑封)
Laser mark (激光印字)
Laser Cut & package saw Testing
(切割成型)
(测试)
Package (包装)
製造完成
Through Hole Mount
VSQF
Very Small Quad Flatpack
封裝型式
Shape
Typical Features
Material Lead Pitch No of I/O
Ceramic
1.27 mm (50miles) j-shape bend 4 direction
lead
18~124
Ceramic
0.5 mm
Plastic
2.54 mm (100miles) 1 direction
lead
3~25
Through Hole Mount
ZIP
Zigzag In-line Package
S-DIP
Shrink Dual In-line
Package
封裝型式
Shape
Typical Features
Material Lead Pitch No of I/O
Plastic
2.54 mm (100miles) 1 direction
lead
16~24
Plastic
1.778 mm (70miles)
20 ~64
Through Hole Mount
SK-DIP
Skinny Dual In-line
Package
PBGA
Pin Grid Array
封裝型式
Shape
Typical Features
Material Lead Pitch No of I/O
Ceramic Plastic
2.54 mm (100miles) half-size pitch in the
width direction
24~32
Ceramic Plastic
2.54 mm (100miles)
半导体设备供应商介绍-前道部分
PROCESS
DIE BOND
CURE OVEN WIRE BONDER
PLASMA CLEAN Mold
VENDOR
HITACHI ESEC ASM C-SUN K&S SKW ASM MARCH TEPLA TOWA ASA
MODEL
DB700 ESEC2007/2008
1.27, 0.762 mm (50, 30miles)
Ceramic 2, 4 direction lead
20~80
Ceramic
1.27,1.016, 0.762 mm (50, 40, 30
miles)
20~40
Surface Mount
PLCC
Plastic Leaded Chip Carrier
Wafer Cutting (晶圆切断)
Wafer Reduce (晶圆减薄)
Etching (蚀刻)
后段封装开始
Diffusion Ion
Implantation (扩散离子植入)
Grind & Dicing (晶圓研磨及切割)
Die Attach (上片)
Oxidization (氧化处理)
Deposition (沉积)
DIP
Dual In-line Package
封 裝 型 式 (PACKAGE)
Shape
Typical Features
Material Lead Pitch No of I/O
Ceramic Plastic
2.54 mm (100miles)
8 ~64
SIP
Single In-line Package
TAPING INLINE GRINDER & POLISH
STANDALONE GRINDER DETAPING
WAFER MOUNTER DICING SAW
VENDOR
DEK SIMENS NITTO ACCRETECH DISCO NITTO NITTO DISCO
TSK
MODEL
HOR-2I HS-60 DR3000-III PG300RM 8560 MA3000 MA3000 DFD 6361 A-WD-300T
ASM889898 QDM-4S
K&S MAXUM ULTRA UTC-2000 Eagle60 AP1000 TEPLA400
32~200
SMT (Optional)
Taping (Optional)
Die Saw
Assembly Main Process
Grinding (Optional)
Die Bond
Detaping (Optional)
Die Cure (Optional)
Wafer Mount
Plasma
UV Cure (Optional)
半导体封装制程及其设备介绍
半导体封装制程概述
半导体前段晶圆wafer制程 半导体后段封装测试
封装前段(B/G-MOLD)-封装后段(MARK-PLANT)-测试
封装就是將前製程加工完成後所提供晶圓中之每一顆IC晶粒獨立分離,並外 接信號線至導線架上分离而予以包覆包装测试直至IC成品。
半导体制程
IC制造开始
Surface Mount
SOP Small Outline Package
QFP Quad-Flat
Pack
封裝型式
Shape
Typical Features
Material Lead Pitch No of I/O
Plastic
1.27 mm (50miles) 2 direction
lead
8 ~40
Plastic
1.0, 0.8, 0.65 mm 4 direction
lead
88~200
Surface Mount
FPG
Flat Package of Glass
LCC
Leadless Chip
Carrier
封裝型式
Shape
Typical Features
Material Lead Pitch No of I/O
Wire Bond
Molding
Post Mold Cure Laser mark
Laser Cut
Package Saw
Leabharlann Baidu
Cleaner
Memory Test
Card Asy
Card Test
Packing for Outgoing
半导体设备供应商介绍-前道部分
PROCESS
SMT - PRINTER SMT – CHIP MOUNT
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