单片机课件(黄英)：第5章 单片机并行存储器扩展 双语教学_黄英_《单片机原理及应用》讲义

Contents:
1. Single Chip Extension 2. Multi-Chip Extension
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1. Single Chip Extension · EPROM: 2716（2KB×8） 211 → A0～A10 → 23×28பைடு நூலகம்→ P2.2～P2.0 P0.7～P0.0 P2.7（Chip Selection Line）
1. Single Chip Expanding
· 6116（2KB×8） 211 → A10～A0 → 23×28 → P2.2～P2.0 → P0.7～P0.0
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Fig. 8 Single Chip Extension of Data Memory
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Address Arrangement: 0000H ～ 07FFH
·Bi-direction : MCU ←→ Memory, I/O interface
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（2）System Bus Construction
· Address Bus: P0（low 8-bit address lines）: needs 8-bit address latch（74LS273, 74LS373） P2（high address lines）: don’t need when < 256 bytes（extended memory） · Data Bus: P0 · Control Bus: ALE, PSEN, EA, RD, WR
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2. Working Modes of EPROM 2716
five types:
·Read
·Unselect
·Programming ·Program Verification ·Programming forbidden
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5.2.3 Extension examples of Program Memory
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1. Memory System of Microcontroller
Fig. 3 Memory Space Arrangement of 8051 Memory 14 System
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2. Address Searching Technology of Memory Extension
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Fig. 2 Construction Diagram of System Bus Extension
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5.1.2 Memory extension & addresses arrangement
Contents: 1. Memory System of Microcontroller 2. Address Searching Technology of Memory Extension
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5.2 Program memory extension
Contents:
5.2.1 Read Only Memory（ROM） 5.2.2 Typical extension Chip of Program Memory 5.2.3 Extension examples of Program Memory
Home work
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5.1 Memory extension introduction
Contents:
5.1.1 System extension & its structure
5.1.2 Memory extension & addresses arrangement
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5.1.1 System extension and it’s structure Contents: 1. Structure of system extension 2. System Bus & its construction method
4 types:
·Read
·Write ·Unselect ·Forbidden
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5.3.3 Examples of Extension Data Memory
Contents:
1. Single Chip Expanding
2. Multi-Chip Expanding
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5.3.2 Typical Extension Chip of Data Memory
6116（2KB×8）: 211 → A10~A0 6264（8KB×8）: 213 → A12~A0
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1. Pins Arrangement of SRAM 6116（2KB×8）
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2. Working Modes of SRAM 6116
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Fig. 9 Multi-Chip Extension of Data Memory
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Address Arrangement: Chip #1: 7000H ～ 77FFH Chip #2: 6800H ～ 6FFFH
Chip #3: 5800H ～ 5FFFH
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Address Arrangement: 29 Chip #1: 0000H ～ 1FFFH, Chip #2: 8000H ～ 9FFFH Return
5.3 Data memory extension
Contents:
5.3.1 Random-Access Memory（RAM）
5.3.2 Typical extension Chip of Data Memory
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（1） Line-Selection Method ·Uses address line directly. ·Suitable for expanding memory in small scale.
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（2） Encoding Method ·Uses encoder to produce chipselection signal. ① Dual 2-4 encoder: 74LS139 ② 3-8 encoder: 74LS138 ·Suitable for expanding memory in large scale.
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2. Multi-Chip Extension · Two EPROMs: 2764（8KB×8）,
total space: 16KB×8
· 13 2
→ A0～A12
→ 25×28
→ P2.4～P2.0、
P0.7～P0.0、 P2.7（Chip Selection Line）
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Fig. 6 Multi-Chip Extension of Program Memory
· Carry address information.
· Single direction: MCU → Memory, I/O interface · number determines the number of memory Its cells: n → 2n · Maximal extension space: 216 cells = 64KB
To solve the followings: （1）Address arrangement of each expanded memory chip. （2）Selection of each expanded memory chip. （The main problem） 2 ways: ·Line-Selection Method ·Encoding Method
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5.2.1 Read Only Memory（ROM）
1. Mask ROM 2. PROM/otpROM
· PROM: Programmable ROM · OtpROM: One Time Programmable ROM
3. EPROM
· EPROM: Erasable Programmable ROM · Types: 2716（2KB×8），2732（4KB×8）， 2764（8KB×8），27128（16KB×8）， 27256（32KB×8）, etc.
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2. Multi-Chip Expanding · Four SRAMs: 6116（2KB×8） total space: 8KB×8 · 11 → A10～A0 2 （1）Adopts: Line-Selection Method （2）Adopts: Encoding Method
4. EEPROM（E2PROM）
· 2PROM: Electrically Erasable Programmable E · Types: 28C16，28C17，2817A, etc.
5. Flash ROM
· Types: 28F256, 28F516, etc.
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5.2.2 Typical Extension Chip of Program Memory
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（1）Adopts: Line-Selection Method
· Four SRAMs: 6116（2KB×8）
total space: 8KB×8
· 11 → A10～A0 2 211
= 23×28
→ P2.2～P2.0
P0.7～P0.0
P2.6～P2.3（4 Lines Selection）
Contents: 1. Pins of EPROM 2716（2KB×8）
2. Working Modes of EPROM 2716