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A N A L Y S I S AND DESIGN OF A FAST-SETTLING FOLDED-CASCODE CMOS OPERATIONAL A M P L I F I E R FOR SWITCHED-CAPACITOR A P P L I C A T I O N S
Howard C. Yang, Mahmoud A. Abu-Dayeh* and D a v i d
J.
Allstot
Department o f E l e c t r i c a l and Computer Engineering Oregon S t a t e U n i v e r s i t y C o r v a l l i s , O 97331 R
ABSTRACT
A complete a n a l y s i s o f t h e commonly-used onestage folded-cascode CMOS operational ampl i f i e r (opamp) i s given i n t h i s paper. A simple two-pole c i r c u i t model i s developed and used t o design t h e opamp f o r t h e minimum s e t t l i n g time (MST) response i n s w i t c h e d - c a p a c i t o r (SC) a p p l i c a t i o n s . The MST design equation f o r t h e opamp i s a l s o given i n terms o f t h e d e s i r e d s e t t l i n g accuracy.
’
and
‘I
szI’ szz = - Ifwb
wc)/21
Uc2)/4
I
3wb0C/2
-
f ](ob2 t
(12)
R~
T1 C
I
I
‘out ‘ 1
where a, is the DC gain of the opamp. Eqn. (6) shows that the transfer function o f the folded-cascode opamp has four left-half-plane (LHP) poles and two LHP zeros. The dominant pole (Eqn. ( ) of the opamp is 8) at the output node d due to the large values of loading capacitance and output impedance. The frequencies o f the three non-dominant poles (Eqns. (9)-(11)) are of the same order. It can be shown that the two LHP zeros (Eqn. (12)) are usually a conjugate complex pair, where the real part of the frequency, Refs, , sz2) = - w t o )/A, is the average of w and wc. for a first h e r abproximation, Re(sZl, can be considered to be cancelled with the two ;8es and w Thus, the transfer function of Eqn. (6) is simplffied to a two-pole model with
r
'
Fig. 1 A CMOS folded-cascode operational amplifier.
one-stage
(3)
11.
SHALL-SIGNAL MODELING
I n switched-capacitor c i r c u i t s , t h e maximum o u t p u t v o l t a g e step s i z e between sampling periods i s u s u a l l y small enough so t h a t s l e w - r a t e l i m i t i n g i s n e g l i g i b l e , and o n l y s m a l l - s i g n a l s e t t l i n g a n a l y s i s i s necessary. A complete s m a l l - s i g n a l model f o r t h e folded-cascode opamp ( F i g . 1) i s shown i n Fig. 2 , where t h e l o a d i n g capacitance C i s included i n cd and Vout i s associated w i t h node i n Fig. 1. The node equations f o r t h i s c i r c u i t can be w r i t t e n as ( n e g l e c t i n g Cgdlo )
d-
with
*M .A.
Abu-Dayeh i s now w i t h G n a l Semiconductor Corp.. Santa Clara, CA.
Fig. 2 A complete small-signal model for the opamp in Fig. 1. Nodal voltages V a - V , are referred to the nodes a-e in Fig. 1, and VOut is associated with node d .
来自百度文库
where G , = g,,, + gm I n d e r i v i n g t h e above equations, t h e very sma?f*Cgd10 i n Fig. 2 i s neglected as a good approximation. Due t o t h e f a c t t h a t RbCb << RcCc [6]-[7], cgd]o does n o t a c t as a M i l l e r capacitance, b u t r a t h e r as a M i l l e r r e s i s t a n c e , which i s much l a r g e r than Rb, a t node b. Using a dominantp o l e approximation, we d e r i v e t h e t r a n s f e r f u n c t i o n o f t h e s m a l l - s i g n a l c i r c u i t model o f Fig. 2 as
and
w e = - - ,
Gm8
Ce
gm6 @b=--’ ‘b Gmg
w c = - - ’ CC
RII = ( g d s l g d ~ 7 ) g d s 8 / ~ 1 n 8 gds9gdsldGm9. (15c) The dominant pole of this circuit is always associated with the second stage. Figure 4 shows a comparison of the SPICE simulated frequency responses o f a foldedcascode CMOS opamp and its two pole model. The twopole model is accurate up to the unity-gain frequency. Although the phase responses of the model and the opamp disagree slightly at the unity-gain frequency due to the inexact pole-zero cancellation, they are still in fairly good agreement and can be used to design the MST response for the opamp.
'dd
a l
I.
INTRODUCTION
The folded-cascode CMOS o p e r a t i o n a l ampl i f i e r topology i s widely used i n switched-capacitor I t provides h i g h e r frequency o p e r a t i o n and circuits. a h i g h e r power supply r e j e c t i o n r a t i o than t h e conventional cascode and two-stage opamps. An e a r l y v e r s i o n o f t h e folded-cascode opamp was analyzed by Ribner and Copeland i n 1984 [ l ] . Figure 1 shows a newer v e r s i o n o f t h e f o l d e d cascode opamp which has been used f o r several years [ Z ] , b u t was f i r s t published i n 1987 [3]. For switched-capacitor a p p l i c a t i o n s , a major advantage o f t h i s v e r s i o n over t h e one analyzed by Ribner and Copeland i s t h a t t h i s i s a one stage opamp. Therefore, t h e l o a d i n g capacitance i s used t o p r o v i d e closed-loop s t a b i l i t y and no a d d i t i o n a l compensation capacitance i s r e q u i r e d as i n two-stage opamps. For f i r s t - o r d e r a n a l y s i s , t h e folded-cascode CMOS opamp i s u s u a l l y approximated as a one-pole opamp [43, However, i n o r d e r t o design t h e opamp f o r t h e minimum s e t t l i n g time (MST) response [5]-[6], secondo r d e r effects must be considered. I n t h i s paper, a two-pole model of t h e folded-cascode opamp o f Fig. 1 i s developed based on a complete small - s i g n a l analysis. The developed model represents t h e opamp very a c c u r a t e l y , and i s e a s i l y a p p l i e d i n t h e design Based on t h e o p t i m i z a t i o n f o r t h e MST response. c r i t e r i o n proposed i n [5], t h e design equation f o r t h e MST response of t h e one-stage f o l d e d cascode opamp i s d e r i v e d and v e r i f i e d w i t h S P I C E s i m u l a t i o n s .
Howard C. Yang, Mahmoud A. Abu-Dayeh* and D a v i d
J.
Allstot
Department o f E l e c t r i c a l and Computer Engineering Oregon S t a t e U n i v e r s i t y C o r v a l l i s , O 97331 R
ABSTRACT
A complete a n a l y s i s o f t h e commonly-used onestage folded-cascode CMOS operational ampl i f i e r (opamp) i s given i n t h i s paper. A simple two-pole c i r c u i t model i s developed and used t o design t h e opamp f o r t h e minimum s e t t l i n g time (MST) response i n s w i t c h e d - c a p a c i t o r (SC) a p p l i c a t i o n s . The MST design equation f o r t h e opamp i s a l s o given i n terms o f t h e d e s i r e d s e t t l i n g accuracy.
’
and
‘I
szI’ szz = - Ifwb
wc)/21
Uc2)/4
I
3wb0C/2
-
f ](ob2 t
(12)
R~
T1 C
I
I
‘out ‘ 1
where a, is the DC gain of the opamp. Eqn. (6) shows that the transfer function o f the folded-cascode opamp has four left-half-plane (LHP) poles and two LHP zeros. The dominant pole (Eqn. ( ) of the opamp is 8) at the output node d due to the large values of loading capacitance and output impedance. The frequencies o f the three non-dominant poles (Eqns. (9)-(11)) are of the same order. It can be shown that the two LHP zeros (Eqn. (12)) are usually a conjugate complex pair, where the real part of the frequency, Refs, , sz2) = - w t o )/A, is the average of w and wc. for a first h e r abproximation, Re(sZl, can be considered to be cancelled with the two ;8es and w Thus, the transfer function of Eqn. (6) is simplffied to a two-pole model with
r
'
Fig. 1 A CMOS folded-cascode operational amplifier.
one-stage
(3)
11.
SHALL-SIGNAL MODELING
I n switched-capacitor c i r c u i t s , t h e maximum o u t p u t v o l t a g e step s i z e between sampling periods i s u s u a l l y small enough so t h a t s l e w - r a t e l i m i t i n g i s n e g l i g i b l e , and o n l y s m a l l - s i g n a l s e t t l i n g a n a l y s i s i s necessary. A complete s m a l l - s i g n a l model f o r t h e folded-cascode opamp ( F i g . 1) i s shown i n Fig. 2 , where t h e l o a d i n g capacitance C i s included i n cd and Vout i s associated w i t h node i n Fig. 1. The node equations f o r t h i s c i r c u i t can be w r i t t e n as ( n e g l e c t i n g Cgdlo )
d-
with
*M .A.
Abu-Dayeh i s now w i t h G n a l Semiconductor Corp.. Santa Clara, CA.
Fig. 2 A complete small-signal model for the opamp in Fig. 1. Nodal voltages V a - V , are referred to the nodes a-e in Fig. 1, and VOut is associated with node d .
来自百度文库
where G , = g,,, + gm I n d e r i v i n g t h e above equations, t h e very sma?f*Cgd10 i n Fig. 2 i s neglected as a good approximation. Due t o t h e f a c t t h a t RbCb << RcCc [6]-[7], cgd]o does n o t a c t as a M i l l e r capacitance, b u t r a t h e r as a M i l l e r r e s i s t a n c e , which i s much l a r g e r than Rb, a t node b. Using a dominantp o l e approximation, we d e r i v e t h e t r a n s f e r f u n c t i o n o f t h e s m a l l - s i g n a l c i r c u i t model o f Fig. 2 as
and
w e = - - ,
Gm8
Ce
gm6 @b=--’ ‘b Gmg
w c = - - ’ CC
RII = ( g d s l g d ~ 7 ) g d s 8 / ~ 1 n 8 gds9gdsldGm9. (15c) The dominant pole of this circuit is always associated with the second stage. Figure 4 shows a comparison of the SPICE simulated frequency responses o f a foldedcascode CMOS opamp and its two pole model. The twopole model is accurate up to the unity-gain frequency. Although the phase responses of the model and the opamp disagree slightly at the unity-gain frequency due to the inexact pole-zero cancellation, they are still in fairly good agreement and can be used to design the MST response for the opamp.
'dd
a l
I.
INTRODUCTION
The folded-cascode CMOS o p e r a t i o n a l ampl i f i e r topology i s widely used i n switched-capacitor I t provides h i g h e r frequency o p e r a t i o n and circuits. a h i g h e r power supply r e j e c t i o n r a t i o than t h e conventional cascode and two-stage opamps. An e a r l y v e r s i o n o f t h e folded-cascode opamp was analyzed by Ribner and Copeland i n 1984 [ l ] . Figure 1 shows a newer v e r s i o n o f t h e f o l d e d cascode opamp which has been used f o r several years [ Z ] , b u t was f i r s t published i n 1987 [3]. For switched-capacitor a p p l i c a t i o n s , a major advantage o f t h i s v e r s i o n over t h e one analyzed by Ribner and Copeland i s t h a t t h i s i s a one stage opamp. Therefore, t h e l o a d i n g capacitance i s used t o p r o v i d e closed-loop s t a b i l i t y and no a d d i t i o n a l compensation capacitance i s r e q u i r e d as i n two-stage opamps. For f i r s t - o r d e r a n a l y s i s , t h e folded-cascode CMOS opamp i s u s u a l l y approximated as a one-pole opamp [43, However, i n o r d e r t o design t h e opamp f o r t h e minimum s e t t l i n g time (MST) response [5]-[6], secondo r d e r effects must be considered. I n t h i s paper, a two-pole model of t h e folded-cascode opamp o f Fig. 1 i s developed based on a complete small - s i g n a l analysis. The developed model represents t h e opamp very a c c u r a t e l y , and i s e a s i l y a p p l i e d i n t h e design Based on t h e o p t i m i z a t i o n f o r t h e MST response. c r i t e r i o n proposed i n [5], t h e design equation f o r t h e MST response of t h e one-stage f o l d e d cascode opamp i s d e r i v e d and v e r i f i e d w i t h S P I C E s i m u l a t i o n s .