电子科大数字信号处理课件
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The characterization can reduce the number of multipliers (almost a half) indirect form. Eg. The implementations of length 7 and 8 with symmetric impulse response :
H ( z ) h[n]z n
n 0 N 1
8.3.1 ຫໍສະໝຸດ Baiduirect Forms(Transversal Forms, Convolution Forms) y[n] h[m]x[n m]
N 1
It’s the convolution of LTI system, based on the equation, we can get the direct form:
Z 1
…
Z 1
D
ED1 ( z )
Application:
x[n]
I
R0 ( z I )
Z 1
R1 ( z I )
Polyphase Realization (interpolation)
Z 1
……… …
Z 1
y[n]
RL 1 ( z I )
Application:
x[n]
R0 ( z )
Summary
The n-th output of a digital filter can be represented as:
y[n]
k
x[k ]h[n k ] h[k ]x[n k ]
k
Where h[n] is the impulse response of the filter. Here we discuss two kinds filters: 1.IIR LTI digital filter with following N M equation: dk pk
Application:
x[n]
E0 ( z )
D
y[n] D
Polyphase Realization (decimation)
Z 1
E1 ( z D )
Z 1
……… …
Z 1
ED1 ( z D )
Application:
x[n]
D
E0 ( z )
y[n]
Z 1
D
E1 ( z )
………
8.2 Equivalent Structures
Based on transpose operation, the equivalent structure can be obtained. Steps: (1)Reverse all paths, (2)Replace pick-off nodes by adder, and vice verse, (3)Interchange the input and the output nodes.
8.3 Basic FIR Digital Filter Structures
The characteristics of FIR filters: (1)h(n) is a length-N sequence. (2)H(z) is convergent in |z|>0. (3)In structure ,there is non-recursion. If the h(n) of a FIR filter is a length-N sequence, 0≤n≤N-1, then its H(z) is:
h ( 0)
z 1 11 z 1 21
z
1
12
......
y (n )
z 1 1K z 1
z 1
22
KK
8.3.3 Polyphase Realization
Decompose H(z) into L-branch polyphase decomposition: L 1
Equivalent Structures
Example 8.2:
Transposed structure
Original structure
Equivalent Structures
Redrawn transposed structure is shown below:
Equivalent Structures
8.3.2 Cascade Form
Decompose H(z) into a string of first-order or second-order transfer functions:
H ( z ) h[0] (1 1k z 1 2 k z 2)
k 1 K
Discuss:if N is even, K=N/2 ; if N is odd, K=(N+1)/2 andβ2k=0.
H ( z ) h[0](1 z 6 ) h[1]( z 1 z 5 ) h[2]( z 2 z 4 ) h[3]z 3 H ( z ) h[0](1 z 7 ) h[1]( z 1 z 6 ) h[2]( z 2 z 5 ) h[3]( z 3 z 4 )
Basic arithmetic units of a digital filter: adder , constant multiplier , unit delay Two representation of these units: 1.Block forms: 2.Signal flow1 graph:
Some Questions in Digital Filter Structure Design:
The delay-free loop problem For physical realization of the digital filter structure, it is necessary that the block diagram representation contains no delay-free loops. Canonic and noncanonic structures
Examples of Implementation of a Digital Filter
Given an implementation of a FIR digital N filter:
i 0 1.software: Memory arrange is in right-side:
y[n] h i x[n i ]
X(n) z -1 z -1 z -1 h(0) h(1) h(2) h(N-2) h(N-1) y(n)
m0
We also call it a tapped delay line.And this kind of structure is canonic. It is difficult to modify zeros.
I
Z 1
R1 ( z )
I
Z 1
… ………
Z 1
y[n] I
RL1 ( z )
8.3.4 Linear-phase FIR Structures
A linear-phase FIR filter of N-order with h[n]:
(1)h[n] h[ N n](2)h[n] h[ N n]
Chapter 8
Digital Filter Structures
The Main Contents:
The representation of structures of digital filters 8.1,8.2 Basic structures of FIR filter 1. Direct Forms 2. Cascade Form 3.Polyphase Realization 4.Linear-Phase Forms. 8.3 Basic structures of IIR filter 1.Direct Forms 2.Cascade Realizations 3.Parallel Realizations. 8.4
All other methods for developing equivalent structures are based on a specific algorithm for each structure. In practice, due to the finite wordlength limitations, a specific realization behaves differently from its other equivalent realization.
Based on above representations of basic units, we can get its block form and its signal flow chart. Please look at P329, a example of a 1storder digital filter. Analysis of block diagrams Eg.8.1 P330
LAR AR3, #X0 #15 #H0, *+ ;the beginning of sampling
ZAC RPT MAC SACH
RESULT
;set acc to zero ;loop ;multiply and addition ;save result
8.1 The Representation of Structures of Digital Filters
y[n]
k 1
d0
y[n k ]
k 0
d0
x[n k ]
2.FIR LTI digital filter with following equation:
y[n]
k N1
h[k ]x[n k ]
N2
The implementation of a digital filter: 1. Software: using program to perform. 2. hardware: using special DSP devices. The question in implementation: Unsatisfactory perform due to the finite precision arithmetic.
unit delay
z
1
z
constant multiplier adder
a
a
Examples of a Digital Filter’s Two Representations
Eg. Given a 2nd-order digital filter is:
y[n] a1 y[n 1] a2 y[n 2] b0 x[n]
H ( z ) z m Em ( z L )
m 0
Where: E ( z ) m
( N 1) / L
n 0
h[ Ln m]z n ,0 m L 1
The subfilters Em(z) are also FIR filters and can be realized using any of the methods. It is often used in multirate DSP application for computationally efficient realizations.
x[n]
z 1
z 1
z 1
loop: mov mov Call add inc inc dec test jnz *r0, x0 *r1, h0 mpy(x0, h0, a) a, b r0 r1 ctr ctr loop
2.Hardware: (1)Hardware multiply-addition unit (2)High speed parallel implementation (3)High speed memory access