半导体工艺介绍PACKAGE

⑃ߛ ‫ צ‬ᡯ
᱊ ċ ᢖ ‫ ܝ‬ᠽᬷ
ߦċ
‫ ܉‬ċẔ ⌟ ᇕ ញ
៤ક⌟᪙
3
‫ܝ‬ ࠏ
≝ ࢳ
ࠏ ᕄ
ỡ ܹ
C M P
ᇕញ԰ϮПϔჰ⌕࣏(QFPЎ՟)
Wafer back grinding Wafer mount
Wafer saw & clean
Die attach
Epoxy cure
Plasma clean
3 ) 3 ˄3 OD V W L F ) OD W 3 D F N D J H ˅ᮍ ᓣ ᇕ ញ Ո ᅳ ċ Ϣ 4 ) 3 ᮍ ᓣ ෎ ᴀ ּ ৠDŽଃ ϔ Ո ऎ ߿ ᰃ 4 ) 3 ϔ ჰ Ў ℷ ᮍ ᔶ ˈ໐3 ) 3 ᮶ ৃ ҹ ᰃ ℷ ᮍ ᔶ ˈг ৃ ҹ ᰃ ⑃ᮍᔶDŽ
4 ) 3 3 ) 3 ᇕញ ‫ ݋‬᳝ ҹϟ Ľ ⚍ ˖
ERG\ WKLFNQHVV˖ P P 3 . * WKLFNQHVV P P / HD G Z LGWK a P P / HD G S LWFK P P
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ᇕញDIP П Ľ ⚍
Ệ ড় ೼3 & % ॄ ࠋ Ϲ Ჳ ᵓ Ϟ ृ ᄨ ⛞ ᥹ ˈ᪡ ԰ ᮍ ֓ DŽ ᅳ ċ ☦ ࢳ Ϣ ᇕ ញ ☦ ࢳ П Ⓒ Ո ↨ ؐ ṇ ໻ ˈᬙ ԧ ࢳ г ṇ ໻ DŽ
ᇕញDIP ೒ ߾
E R G \ W K L F N Q H V V ˖ PL O 3 . * W K L F N Q H V V PL O / H D G Z L G W K PL O / H D G S L W F K PL O
1
ɴ೼ՈϪА ህᰃϔKϔKᅳċ ᅳċ◄ᡅᇕញ ᠔ҹ ϪАℷ ೼ᝯ ϔ K ϔ K Ոᇕ ញ
᪻╓៥ᰴܹᇕញϪА
៤ Ў ᇕញʌ᠟ Puman
2
ᇕញ೼, & ࠊ Ụ ѻ Ϯ ⏂ Ё П ԡ า
Wafer Manufacturing
Front End
Wafer Test
Back End
⇻࣪ ᥶⍌ৄ⌟᪙ ྐެ
ᇕ ញ ᔶ ᗕ П ೒ ߾ SOJ ( Small Out-Line J-Lead package)
E R G \ W K L F N Q H V V PL O 3 . * W K L F N Q H V V a PL O / H D G Z L G W K a PL O / H D G S L W F K PL O
ICᇕញՈЏᡅߚ ି ҹ ঞ ৘ Ⴎ Ľ ⚍ ˖
ϔǃ ঠDIP ߫ ָ ᦦ ᓣ ᇕ ញ
' , 3 ' X D O, Q ˉOL Q H 3 D F N D J H ᰃ ᣛ ₋ Ϭ ঠ ߫ ָ ᦦ ᔶ ᓣ ᇕ ញ Ո ▊ ៤ Ϲ Ჳ ᅳ ċ ˈඡ ໻ ໮ ᭄ Ё ᇣᢈ ῵ ▊ ៤ Ϲ Ჳ , & ഛ ₋ Ϭ ẝ ࢑ ᇕ ញ ᔶ ᓣ ˈ݊ᓩ ࿞ ᭄ ϔ ჰ ϡ ᱉ ẋ ϾDŽ₋ Ϭ ' , 3 ᇕ ញ Ո & 3 8 ᅳ ċ ᳝ ϸ ᥦ ᓩ ࿞ ˈ◄ ᡅ ᦦ ܹ ࠄ ‫ ݋‬᳝ ' , 3 ඗ ᵘ Ո ᅳ ċ ᦦ ᑻ Ϟ DŽᔧ ✊ ˈг ৃ ҹ ָ ᥹ ᦦ ೼᳝ ּ ৠ⛞ ᄨ ᭄ ੠޴ ԩ ᥦ ߫ Ո Ϲ Ჳ ᵓ Ϟ ẟ ᜐ ⛞ ᥹ DŽ' , 3 ᇕ ញ Ո ᅳ ċ ೼Ң ᅳ ċ ᦦ ᑻ Ϟ ᦦ ᢨ ᯊ ᑨ Ľ ߿ ᇣᖗ ˈҹ ‫ ܡ‬ᤳ ണ ᓩ ࿞ DŽ
ிDIP ߫ ᇕញ ݊ Ҫ ᔶ ᓣ ˄ ˅ǃ ˄ ˅ PDIP Plastic DIP CDIP Ceramic DIP ˄ ˅ SPDIP Shrink plastic DIP
9
Ѡǃ ᇣ ሎ ᇌ ᇕ ញ SOP/SOJ
ᑈ ҷ ˈ ˄ ˅ᡔ ᴃ থ ᰻ ৢ ˈ೼ 1980
SMT Surface Mounting Technology
10
##$ %&'
*
*
",
/
+
6SOP( P D O O 2 X W / L Q H 3 D F N D J H ᇕ) ញ ᔶ ᗕ П ೒ ߾
E R G \ W K L F N Q H V V a PL O 3 . * W K L F N Q H V V a PL O / H D G Z L G W K PL O / H D G S L W F K PL O
ERG\ WKLFNQHVV˖! P P 3 . * WKLFNQHVV ! P P / HD G Z LGWK a P P / HD G S LWFK a P P
4)3ᇕ ញ ி ߫ П ݊ Ҫ ᔶ ᓣ /4)3 /RZ SURILOH 4)3 ˖
Ո ϣ ѻ ᔶ ᗕ Ё ˈ ˄ ˅ ˄ SMT
SOP Small Out-Line Package /SOJ Small
˅╓ П ߎ ɴ ˈᓩ ࿞ ೼ ϸ ջ DŽ Out-Line J-Lead package
IC
ᇕញ ᔶ ᗕ П Ľ ⚍ SOP/SOJ
!" ($
#) +,
+,-.,/012, *3
ǃ ǃ ǃ ǃ UBM PSV APPE Solder mask P.R…
⛞ ᭭˖ ǃ ᯧ X ć ǃ 95 Pb/5 Sn 37 Pb/63 Sn ( ,183 ) No Lead
˄ ć ˅ǃ ¢ Ally Sn 3.9/Ag 0.6/Cu 5.5 ,235
Low- Ally…
ₕ ඃ ǃ : Au bond Ally bond…
ᬷ ⛁ ċ Heat Sink :
5
ᇕញϬ ᴎ ৄ ҹ ঞ ᠔ ⍝ ঞ ῵ ‫݋‬
Polishing machine & CMP UV tape attach machine Dicing machine UV irradiation machine Tape remover machine Pick & Place machine Package machine
⏥♝ ‫ ߛ ކ‬῵ ‫( ݋‬F/T):trim & form ลᇕ῵‫݋‬
6
ᇕញᱏ ࢓ ⓨ ẟ ೒
wk.baidu.com
ᇕញିൟ
DIP SOP QFP TAB COB CSP Fc MCM WLCSP
7
ܼࢴ
Dual in-line package Small outline package
Quad Flat Package
11
ᇕSOP ញ ி ߫ П ݊ Ҫ ᔶ ᓣ
1.SSOP(Shrink SOP)
E R G \ W K L F N Q H V V ˖ a PL O 3 . * W K L F N Q H V V a PL O / H D G Z L G W K a PL O / H D G S L W F K PL O
Ệ1. Ϭ Ѣ ᜬSMD ☦ ᅝ ញ ᡔ ᴃ ೼ ϹPCB Ჳ ᵓ Ϟ ᅝ ញ Ꮧ ඃ DŽ Ệ2. ড় ʌ E Փ Ϭ DŽ ᪡3. ԰ ᮍ ֓ ˈৃ ☤ ᗻ ʌ DŽ ᅳ4. ċ ☦ ࢳ Ϣ ᇕ ញ ☦ ࢳ П Ⓒ Ո ↨ ؐ ṇ ᇣ
14
4)3ᮍ ൟ ᠕ ᑇ ᓣ ᇕ ញ ੠ 3)3᠕ ᑇ ᇕ ញ ೒ ߾
Tape Automated bonding
Chip on board Chip scale package
Flip-chip Multi chip model Wafer level CSP
֟ᜐᯊᳳ
80ᑈҷҹࠡ ᑈҷ80
1995~1997 1995~1997 1996~1998 1998~2000 1999-2001 2000~now 2000~now
4 ) 3 ˄3 OD V W L F 4 X D G ) OD W 3 D F N D J H ˅ᇕ ញ Ո ᅳ ċ ᓩ ࿞ П Ⓒ Ს ࡿ ᕜ ᇣˈ੥ ࿞ ᕜ ඊ ˈϔ ჰ ໻ ᢈ ῵ ៪ ᱉ ໻ ൟ ▊ ៤ Ϲ Ჳ ῁ ₋ Ϭ ẝ ࢑ ᇕ ញ ᔶ ᓣ ˈ݊ ᓩ ࿞ ᭄ ϔ ჰ ೼ – DŽϬ ẝ ࢑ ᔶ ᓣ ᇕ ញ Ո ᅳ ċ ᖙ / ₋ Ϭ 6 0 ' ˄ᜬ ☦ ᅝ ញ ᪂ ໛ ᡔ ᴃ ˅ᇚ ᅳ ċ Ϣ Џ ᵓ ⛞ ᥹ ᰻ ᴹ DŽ₋ Ϭ 6 0 ' ᅝ ញ Ո ᅳ ċ ϡ ᖙ ೼Џ ᵓ Ϟ ᠧᄨ ˈϔ ჰ ೼Џ ᵓ ᜬ ☦ Ϟ ᳝ ᪂ ᩥ ད Ո ּ ᑨ ੥ ࿞ Ո ⛞ ⚍ DŽᇚ ᅳ ċ ৘ ࿞ ᇍ ‫ ּ ޚ‬ᑨ Ո ⛞ ⚍ ˈे ৃ ᅲ ɴ Ϣ Џ ᵓ Ո ⛞ ᥹ DŽϬ ẝ ࢑ ᮍ ⊩ ⛞ Ϟ এ Ո ᅳ ċ ˈབ ᵰϡϬϧϬᎹ‫݋‬ᰃᕜ▂ᢚौϟᴹՈDŽ
12
3.TSSOP(Thin Shrink SOP)
E R G \ W K L F N Q H V V ˖ PP 3 . * W K L F N Q H V V PP / H D G Z L G W K a PP / H D G S L W F K a PP
ĉ ĉ 4.TSOP( ) : Thin SOP Ċ Ċ 5.TSOP( ) : Thin SOP
6.QSOP : Quarter Size Outline Package 7.QVSOP : Quarter Size Very Small Outline Package
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ϝǃ4 ) 3 ᮍ ൟ ᠕ ᑇ ᓣ ᇕ ញ ੠ 3 ) 3 ᠕ ᑇ ᇕ ញ
ϵ ‫ ކ‬य़ ῵ ‫ ࠊ ݋‬៤ Lead Frame:
ᶨ Substrate: ᗻ ෎ ċ ǃằ(tape) ሖ ෎ ċ ǃ໡ ড় ෎ ċ ǃ┺ λ ෎ ċ ǃ
┺ λ ෎ ċ ǃᏺ ᳝ ҟ ᯬ ሖ Ո ɿ ͇ ෎ ċ HiTCETM
BCBTM
…
ǃ TAPE: Blue Tape UV Tape…
ᇕញି ൟ ߚ ି
ICᇕញՈЏᡅࡳ࿁
ֱ ᡸ ᦤIC, կ ੠ П chip system Ⓒ ᩳ ᙃ Ӵ Ỗ Ո А ☦ ᠔. ҹ ࠊIC ࣏ থ ሩ ǃ ி ඣ ѻ ક Ո ࡳ ࿁ ᗻ ῁ ᰃ ᕅ ડ ᇕIC ញ ᡔ ᴃ থ ሩ Ո Џ ᡅ ॳ ಴ DŽ↨ བ˖ẕ ᮹ Ϲ ᄤ ѻ ક Ո ᡅ ∖ ᰃ ḿ ᑈ ‫ ڱ‬ᇣˈህ ᡅ ᳝ ┑ Ԣ Ո chipsize ᡔ ᴃ ˗ ࠊIC ࣏ ᖂ ඊ ࣪ˈỤ ៤ ‫ݙ‬chip ࣙ ৿ Ո ỿ ṕ ඃ Ჳ ๲ ࡴ ˈህ ᡅ Փ ᓩchip ࿞ ᭄ ๲ ࡴ ਍ ਍ DŽ
Wire bond
4
Molding
Marking Post mold cure Deflash & Trim Solder plating Forming&singulation
FVI Packing
ᇕញϬ ॳ ᴤ ᭭ ҹ ঞ ᠔ ◄ ► ඈ ӊ
ลྺᴤ᭭ ࿆ᷥǃ ǃ ǃ ǃ ǃ : BT
Epoxy PTFE Polyimide compound
E R G \ W K L F N Q H V V ˖ PP 3 . * W K L F N Q H V V PP / H D G Z L G W K a PP / H D G S L W F K a PP
2.TSOP(Thin SOP)
E R G \ W K L F N Q H V V ˖ PP 3 . * W K L F N Q H V V PP / H D G Z L G W K a PP / H D G S L W F K PP
15
74)3 7KLQ 4)3
ERG\ WKLFNQHVV˖ P P 3 . * WKLFNQHVV P P / HD G Z LGWK a P P / HD G S LWFK a P P
' 3 + 4 ) 3 ' L H 3 D G + H D W 6 L Q N 4 ) 3