hspice的使用

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Example of ALTER contains PARAM
Example of ALTER contains PARAM .OPTION LIST NODE POST .TRAN 200P 20N .PRINT TRAN V(IN) V(OUT) M1 OUT IN VCC VCC PCH L=1U W=Wx M2 OUT IN 0 0 NCH L=1U W=Wx VCC VCC 0 5 VIN IN 0 0 PULSE .2 4.8 2N 1N 1N 5N 20N CLOAD OUT 0 Cx .MODEL PCH PMOS LEVEL=1 .MODEL NCH NMOS LEVEL=1 .PARAM Wx=20U Cx=.75p .ALTER .PARAM .ALTER .PARAM .ALTER .PARAM .ALTER .PARAM .ALTER .PARAM .END
Qname collector base emitter model m=* Qp1 vout vin vdd vdd lp11 m=1
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Sources and passive elements
Source
*name net_pos net_neg vdd vdd sgnd dc=5 ac=0 (*: V, I,)
Output Control Statements
.MEASURE Statement :
ִCan Include :
Propagation Delay, Rise time, Fall time Average, RMS, Peak-to-peak voltage, Min. & Max. voltage over a specified period Equation, Derivative, Integral evaluation
Passive elements
Resistor: Rname net_pos net_neg model l=* w=* Capacitor: Cname net_pos net_neg model l=* w=*
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Options statement
options
list: produces an element summary listing of the input data to be printed. node: causes a node cross reference table to be printed. post: enables storing of simulation results for analysis using the AvanWAves graphical interface or other methods. post=1 binary post =2 acii …. .option list node post
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Lib and others
Lib statement
.lib ‘path/lib file name’ lib .lib ‘../GP.lib’ TT
Comments
An asterisk(*) as the first nonblank character or an inline dollar sign($) indicates a comment statement
ִFundamental Measurement Mode :
Rise, Fall, and Delay (TRIG-TARG) AVG, RMS, MIN, MAX, & Peak-to-Peak (FROM-TO) FIND-WHEN
Wx=20U Cx=.50p Wx=20U Cx=.25p Wx=20U Cx=.10p Wx=10U Cx=.10p Wx=5U Cx=.10p
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Example of ALTER contains PARAM
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Example of DATA as the Inner Sweep
Example of DATA as the Inner Sweep .OPTION LIST NODE POST .TRAN 200P 20N SWEEP DATA=d1 .PRINT TRAN V(IN) V(OUT) M1 OUT IN VCC VCC PCH L=1U W=Wx M2 OUT IN 0 0 NCH L=1U W=Wx VCC VCC 0 5 VIN IN 0 0 PULSE .2 4.8 2N 1N 1N 5N 20N CLOAD OUT 0 Cx .MODEL PCH PMOS LEVEL=1 .MODEL NCH NMOS LEVEL=1
HSPICE
Circuit Simulation with HSPICE
jingwb
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SPICE Overview
About SPICE :
Simulation Program with Integrated Circuit Emphasis ִ~ is a transistor level timing simulation tool ִDeveloped by University of California/Berkeley ִWidely Adopted, Become De Facto Standard ִIn market－SBTSPICE, HSPICE, Spectre ,TSPICE, Pspice, Smartspice ...
Analysis
Results
Library
Stimuli
Transient
DC
AC
Options
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HSPICE Data Flow
Printer or Screen
Command Input hspice
Graph Tools awaves
Input Netlist File demo.sp
Graph Data Files demo.tr# demo.dc# demo.ac#
Output Variables :
ִDC and Transient Analysis : Voltage, Current, & Power ִAC Analysis :Real & Imag. Component of Voltage, Current ִElement Analysis : Element-Specific Voltage, Current 19 ִ.MEASURE : User-Defined Variables
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Analysis statements
DC analysis
.dc name start stop step .dc vin 0 5 0.01
AC analysis
.ac type np fstart fstop .ac dec 10 1k 100meg
TRAN analysis
.tran tstart tstop step .tran 1u 1m 10u
ִ ִ ִ ִ ִ ִ ִ ִ ִ ִ ִ ִ ִ C D E,F,G,H I J K L M Q R O,T,U V X Capacitor Diode Current & Voltage Source Current JFET or MESFET Mutual Inductor Inductor MOSFET BJT Resistor Transmission Line Voltage Source Subcircuit Call
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Simulation Program Structure
Simulation Experiment
Single point Analysis
Optimization
Sweep
Statistical Worst Case
Timing Violations
Initial Conditions
Circuit
Units and Scale Factors
ִ ִ ִ ִ ִ ִ ִ ִ ִ ִ F P N U M K Meg G T DB 1e-15 1e-12 1e-9 1e-6 1e-3 1e+3 1e+6 1e+9 1e+12 20log10
node 0(zero) is always Ground Ground may be 0, GND, !GND
.PARAM Wx=20U Cx=.75p .DATA d1 Wx Cx 20u .50p 20u .25p 20u .10p 10u .10p 5u .10p .ENDDATA .END
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Output Control Statements
Output Commands :
ִ.PRINT : ִ.PLOT : ִ.PROBE Print Numeric Analysis Results Generates Low Resolution Plot in .lis file : Allows Save Output Variables Only into the Graph Data Files ִ.MEASURE : Print Numeric Results of Measured Specifications
Sources
Controls Analysis Model End file
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example
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Input Control Statements
.ALTER Statement :
ִCan’t Include :
.PRINT, .PLOT, .GRAPH or any other I/O statements
Model & Device library.lib
HSPICE (Simulation)
Text Output Files demo.ic# demo.mt# demo.rap
Command include include.inc
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Node Naming and Scale Factors
Instance & Element Names

Param statements
.param x=2u
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Netlist Structure
Title Components Invertor simulation Mp1 vout vin vdd vdd pmos l=x w=3u Mn1 vout vin sgnd sgnd nmos l=2u w=3u Vin vin sgnd Vgnd sgnd 0 0 .option post node list .dc vin 0 5 0.01 .param x=2u .lib ‘../lib/GP.lib’ TT .end
ִCan be include in only one :
All analysis statements ( .DC, .AC, .TRAN, .FOUR, .DISTO, .PZ, and so on)
ִCan Include :
Element Statement ( except source elements ) .DATA, .LIB, .INCLUDE, .MODEL Statements .IC, .NODESET Statements .OP, .PARAM, .TEMP, .TRAN, .DC, .AC Statements
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example
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Netlist Structure
Title Components Invertor simulation Mp1 vout vin vdd vdd pmos l=x w=3u Mn1 vout vin sgnd sgnd nmos l=2u w=3u Vin vin sgnd Vgnd sgnd 0 0 .option post node list .dc vin 0 5 0.01 .param x=2u .lib ‘../lib/GP.lib’ TT .end
Sources
Controls Analysis Model End file
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Transistor
Mosfet
Mname drain gate source (bulk) model L=* w=* M=* Mp1 vout vin vdd vdd pmos l=2u w=3u m=1
Bipolar