基于FPGA来完成直接数字频率合成器(DDS)的设计

摘要

在信号发生器的设计中,传统的用分立元件或通用数字电路元件设计电子线路的方法设计周期长,花费大,可移植性差。本设计是利用EDA技术设计的电路,该信号发生器输出信号的频率范围为20Hz～20KHz，幅度的峰-峰值为0.3V～5V两路信号之间可实现0°～359°的相位差。

侧重叙述了用FPGA来完成直接数字频率合成器(DDS)的设计,DDS由相位累加器和正弦ROM查找表两个功能块组成,其中ROM查找表由兆功能模块LPM_ROM来实现。而通过设定不同的累加器初值(K1)和初始相位值(K2)，可以调节两路相同频率正弦信号之间的相位差,从而产生两路数字式的频率、相位和幅值可调的正弦波信号，最后通过MAX+plusII演示仿真结果。

与传统的频率合成方法相比，DDS合成信号具有频率切换时间短、频率分辨率高、相位变化连续等诸多优点。使用单片机灵活的控制能力与FPGA器件的高性能、高集成度相结合，可以克服传统DDS设计中的不足，从而设计开发出性能优良的DDS系统。

关键词：单片机，现场可编程逻辑门阵列，直接数字频率合成，正弦信号发生器,硬件描述语言

Abstract

In the designing of the signal generator, the traditional method, which designs electronic circuits using discrete components or general digital circuits components, takes a long time with high cost, what’s more, the transplanting ability of it is unsatisfactory. In this design, the circuit is designed by means of EDA. Its output frequency range is 20Hz to 20KHz with an output amplitude range of 0.3V to 5V(P-P), and the phase difference between two outputs of the two sine signals can be modulated from 0°to 359°.

The thesis emphasizing discusses the designing of DDS basing on FPGA. DDS is made up of the phrase accumulator and sine ROM looking-up table, which is realized by functional EAB chip. And through setting different initial accumulator value (K1) and initial phrase value (K2), the difference of phrase between the two sine signals can be changed. As a result, two serials of sine signals with changeable digital frequency, phrase and magnitude are produced. At last, we can show the total course and result with MAX+plusII.

Compared with traditional methods of frequency synthesizing, direct digital frequency synthesizing (DDS) has lots of advantages, such as short time of quick frequency exchanging, high frequency resolution, continuous phase changing, etc. Micro-control unit has is characterized by. Many drawbacks can be overcome and a good DDS system with good performance can be developed after combining the flexible control capability of micro-control unit with high performance and integration of the FPGA devices in the same system.

Keywords: MCU, FPGA, DDS, ROM sine wave generator, VHDL

目录

摘要 ..................................................................... I Abstract ................................................................ II 1绪言

1.1 课题背景 (1)

1.2 课题研究的目的和意义 (1)

1.3 国内外概况 (2)

1.4 课题的主要研究工作 (3)

2 系统设计方案的研究

2.1 系统的性能要求 (4)

2.2 系统实现的原理 (4)

2.2.1 DDS的基本原理 (5)

2.2.2 FPGA实现的直接数字频率合成器 (6)

2.2.3 移相原理 (6)

2.3 系统实现方案分析与比较 (8)

2.3.1 频率合成器方案 (8)

2.3.2 移相方案 (10)

2.3.3 存储器方案 (10)

2.3.4 存储器寻址方案 (11)

3总体设计

3.1 FPGA设计DDS电路的具体实现 (12)

3.1.1 相位累加器部分 (12)

3.1.2 相位/幅度转换电路 (12)

3.1.3 波形表生成 (13)

3.1.4 D/A转换电路 (13)

3.1.5 系统控制电路 (13)

3.2 单片机与FPGA的接口设计 (13)

3.3现场可编程逻辑器件（FPGA）的选择 (15)

3.4 其他电路设计 (16)

3.4.1 晶体振荡电路 (16)

3.4.2 地址计数脉冲产生电路 (17)

3.4.3 幅度控制电路 (17)

3.4.4 单片机外扩展存储器电路 (18)

3.4.5 滤波、缓冲输出电路 (18)

3.4.6 键盘和显示控制电路 (19)

4系统的实现

4.1 系统的计算与仿真 (20)

4.1.1 系统频率、相位和幅度的计算 (20)

4.1.2 系统仿真 (21)

4.2 单片机的编程实现 (22)

5 总结与展望 (23)