数据时钟恢复(CDR)工作原理及Altera的ASI、SDI_IPcore应用

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SVDB Board Overview
1SGX25FF1020 chip 2 SDI IO interfaces
3 VCXOs (27MHz, 74.25MHz (not installed)and 74.175MHz installed) 1 crystals (27MHz)
RP 178
Video Payload Identification for Digital Television Interfaces
SMPTE 352M-2001
Numerous Recommended Practices and Engineering Guidelines
Used for Synchronous Video Switching Definition, Error Detection Schemes, Jitter Measurement, etc…
DVB is a family of European digital video standards DVB-ASI is designed to transport MPEG-2 video stream serially over coax or fiber at up to 270M/s Competes with SMPTE -SDI & HD-SDI -SMPTE 310M Many equipment with SMPTE 310M interfaces also provide DVB-ASI interface
SDI ASI
Success story Summarize
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SDI/HD-SDI and ASI apllication
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$20 *:base fpga resource(1000LES)
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FPGA Soluiton Vs ASIC Solution2(HD-SDI)
FPGA solution Equilizer FPGA (Straitx GX) Cable driver
Standards-SDI
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Standards-SDI
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Standards-DVB-ASI
DVB-ASI (digital video broadcast asynchronous serial interface):
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Standards
SMPTE(电影和电视工程师协会)
Several Serial Digital Interfaces Specified
Focus on 259M-97 (SDI) and 292M-98 (HD-SDI)
JTAG interface EPC16
DDR interface DIMM socket Dip switches for general purpose application SMA for spare LVDS IOs
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Pathological Case of 44 bits during Vertical Interval
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Standards-SDI
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Soft data recovery logic 8B/10B encoding/decoding Receive rate matching
ASI
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HD-SDI Transmit & Receive HD-SDI Loopback
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Standards-SDI
SMPTE Cont.
SDI:259M-97
Standard for transporting uncompressed standard definition digital video serially over coax Channel Coding is Scrambled NRZI Max Run Length is 20 bits
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SDI/HD-SDI/ASI with SVDB
© 2004 Altera Corporation
SVDB (Stratix GX Serial Video Demo Board)
ASI
In Out
Bac kplane HMZd
FPGA solution Equilizer FPGA (Cyclone) Cable driver
$2 ASSP solution Rx(Equilizer And encoder Etc integrate)
$4*
$2
Total $8
Tx(Cable Driver and decoder integrate $20 Total $40
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Standards-DVB-ASI
DVB-ASI:
DVB-ASI is electrically similar to SDI -Serial bit stream over coax -Sam electrical signal levels -Use cable equalization for long runs DVB-ASI uses 8B/10B encoding
Tx(Cable Driver and decoder integrate $40 Total $90
$50 *:base fpga resource(800LES)
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FPGA Soluiton Vs ASIC Solution1(ASI)
Reference Designs
Clear text RTL with documentation, testbenches and hardware demonstration designs Royalty free SDI and HD-SDI
Transmit encoding & receive decoding Transceiver control logic, including multirate support
SDI Reference Designs Base SVdB board
Independent receive and transmit circuit
SDI receive(decode) and retransmit(encode) out
SDI Transmit & Receive
Video clock in
REFCLK3 in Spare LVDS I/O “Santa Cruz” connector
In
SDI port 0
Out
01 23
5V GND
In
Power s witch
SDI port 1
Out
UART JTAG
Spare transc eiver I/O
“spare” clock in
$2 ASSP solution Rx(Equilizer And encoder Etc integrate)
$60*
$2
Total $64
Tx(Cable Driver and decoder integrate $80 Total $180
$100 *:base fpga resource(4000LES)
SDI Interface composed of several parts
Electrical/Optical Interface Specification (259M and 292M) Scan Format (Bit-Parallel Interface) Specification (260M-99 for ex.)
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Standards-HD-SDI
SMPTE Cont.
SDI:259M-97
Standard for transporting uncompressed standard definition digital video serially over coax or fiber -100+ meters over coax cable -2km over single mode fiber Bit Rates of 1.485G (30Hz Frame Rate) or 1.4835G (29.97Hz Frame Rate) Builds upon SDI -Encoding,decoding,framing,and equalization are similar
ALTERA SDI/HD-SDI and DVB-ASI solution
Cytech FAE Robin luo
Oct,2004
© 2004 Altera Corporation
Agenda
SDI/HD-SDI and ASI application SDI interfaces DVB-ASI interface HD-SDI interface Altera FPGA Solution Reference design
Multiple Scan Formats supported for each Electrical Interface
Ancillary Data Packet and Space Formatting Specification (291M-98) Specification of Jitter in Bit Serial Digital Systems
FPGA Soluiton Vs ASIC Solution1(SDI)
FPGA solution Equilizer FPGA (Cyclone) Cable driver
$2 ASSP solution Rx(Equilizer And encoder Etc integrandependent receive and transmit circuit
SDI Loopback
SDI receive(decode) and retransmit(encode) out
1 ASI IO interface Santa Cruz daughter card interface Serial RS232 interface for NIOS Voltage regulators for all voltages from 5V input HMZD interface(Digital Camera interface) SMA interface for spare port and clock Configuration