2SC2902中文资料
LM2902DR中文资料
元器件交易网元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. T o minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. Information published by TI regarding third-party products or servicesdoes not constitute a license from TI to use such products or services or a warranty or endorsement thereof.Use of such information may require a license from a third party under the patents or other intellectual propertyof the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproductionof this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable forsuch altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for thatproduct or service voids all express and any implied warranties for the associated TI product or service andis an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Following are URLs where you can obtain information on other Texas Instruments products and applicationsolutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated。
2902芯片资料
The LTC®2902 is a programmable supply monitor for systems with up to four supply voltages. One of 16 preset or adjustable voltage monitor combinations can be selected using an external resistor divider connected to the program pin. The preset voltage thresholds are digitally programmable to 5%, 7.5%, 10% or 12.5% below the nominal operating voltage, and are accurate to 1.5% over temperature. All four voltage comparator outputs are connected to separate pins for individual supply monitoring. The reset delay time is adjustable using an external capacitor. Tight voltage threshold accuracy and glitch immunity ensure reliable reset operation without false triggering. The RST output is guaranteed to be in the correct state for VCC down to 1V and may be disabled during supply margin testing. The LTC2902-1 features an open-drain RST output, while the LTC2902-2 has a push-pull RST output. The 43µA supply current makes the LTC2902 ideal for power conscious systems and the part may be configured to monitor less than four inputs. The LTC2902-1/LTC2902-2 are available in the 16-lead narrow SSOP package.
2SC3392-5-TB-E中文资料(sanyo)中文数据手册「EasyDatasheet - 矽搜」
7 5
3
2
基极 - 发射极
1.0
饱和电压,VBE（星期六） - V
7 5
3
5 --1.0 2 3 5 --10 2 3 5 集电极电流,IC - 毫安
SW时间 - IC
2
1.0
7
µs 5
tstg
3
2
--100 2 3 5 --1000
ITR05072
2SA1338 VCC=20V IC=10IB1=--10IB2
--100 2
集电极电流,IC - 毫安
3 5 7 --1000
ITR05064
fT -- IC
1000
2SA1338
7
VCE=--10V
5
3 2
100
增益带7宽产品,FT - 兆赫
5
3 2
10
--1.0 2 3 5 7 --10 2 3 5 7
--100 2
集电极电流,IC - 毫安
柯布 - VCB
3
2
3 5 7 --1000
ITR05066
2SA1338 f=1MHz
00
0.2
0.4
0.6
基极 - 发射极电压,VBE - V
hFE -- IC
2
1000
7
5
3
Ta=75 °C
2
25°C
100
DC电7流增益,hFE
--25°C
5
3 2 1.0
1000 7 5
2 3 5 7 10
2 3 5 7 100
2SA1338/2SC3392
Symbol
Conditions
2SC4250中文资料(toshiba)中文数据手册「EasyDatasheet - 矽搜」
反向传输电容 过渡频率 转换增益 噪声系数
(Ta = 25°C)
符号
测试条件
ICBO IEBO V (BR) CEO hFE Cre
fT Gce NF
VCB = 25 V, I E = 0 VEB = 3 V, I C = 0 IC = 1毫安,我B = 0 VCE = 10 V, I C = 5毫安 VCB = 10 V, I E = 0, f = 1兆赫 VCE = 10 V, I C = 5毫安 VCC = 12 V, f = 200兆赫,女 L = 260兆赫 （图1）
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5
2007-11-01
• 东芝公司及其子公司和附属公司（统称为“TOSHIBA”）,保留这份文件中更改信息的权利,以及相关的硬件,软件和系统（统称为“产品”）,恕不另行通 知.
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• 虽然东芝的作品不断地提高产品的质量和可靠性,产品会发生故障或失败.客户 负责符合安全标准和用于提供充分的设计和保障其硬件,软件和 这最大限度地降低风险,并避免出现在产品的故障或失效可能导致生命丧失,身体系统 人身伤害或财产损失,包括数据丢失或损坏.在创作和制作的设计和使用,客户必须 也指,符合（一）中的所有相关信息,东芝的最新版本,包括但不限于本文件, 规格,数据表和应用笔记产品的注意事项和条件中规定的“TOSHIBA 半导体可靠性手册“和（b）对于该产品将与或使用的应用程序的说明.客户全权负责自己的产品设计或应用程序的各个方面,包括但不限于：（a）确定 的利用这样的设计或应用该产品的适当性; （b）评价和确定本文档中包含的任何信息的适用性,或图表,图表,程序,算法,示例应用电路,或 任何其他引用文件; （三）验证这样的设计和应用的所有运行参数.
2SC4422中文资料
IMAG. –268.988 –221.759 –167.756 –133.425 –110.501 –94.442 –82.874 –73.836 –67.183 –61.241
Yre (mS) REAL 0.000 0.005 0.006 0.024 0.025 0.056 0.079 0.124 0.180 0.246
2.0 IE = 0 f = 1 MHz
1.6
1.2
0.8
0.4
0
1
2
5 10 20
50
Collector to Base Voltage VCB (V)
Power Gain PG (dB)
Power Gain vs. Collector Current
20 VCE = 0 f = 900 MHz
16
–0.2
–0.4 –0.6 –0.8 –1
–10
–5 –4 –3
–2 –1.5
6
Hale Waihona Puke S Parameters (Emitter Common)
Test Condition VCE = 5 V, IC = 5 mA, ZO = 50 Ω
Freq. (MHz) 100 200 300 400 500 600 700 800 900 1000
REAL
IMAG.
0.175
0.922
0.218
1.731
0.206
2.618
0.250
3.531
0.295
4.395
0.421
5.324
0.387
6.235
0.413
7.209
0.338
8.218
SD2902;中文规格书,Datasheet资料
SD2902RF POWER TRANSISTORSHF/VHF/UHF N-CHANNEL MOSFETss GOLD METALLIZATIONs COMMON SOURCE CONFIGURATION s 2 - 500 MHz s 15 WATTS s 28 VOLTSs 12.5 dB MIN. AT 400 MHzs CLASS A OR AB OPERATIONsEXCELLENT THERMAL STABILITYDESCRIPTION The SD2902 is a gold metallized N-Channel MOS field-effect RF power transistor. It is intended for use in 28 V DC large signal applications up to 500 MHzNovember 1999ABSOLUTE MAXIMUM RATINGS (T case = 25 o C)THERMAL DATA®1/8SD2902ELECTRICAL SPECIFICATION (T case = 25 o C)STATICREF. 1021308K DYNAMICIMPEDANCE DATACapacitance vs Drain-Source VoltageDrain Current vs Gate VoltageMaximum Thermal Resistance vs Case TemperatureGate-Source Voltages vs Case TemperatureTYPICAL PERFORMANCESD2902Output Power vs Input PowerOutput Power vs Input PowerOutput Power vs Voltage SupplyOutput Power vs Gate VoltagePower Gain vs Output PowerEfficiency vs Output PowerTYPICAL PERFORMANCE SD2902SD2902 400 MHz Test Circuit Schematic400 MHz Test Circuit Component Part ListSD2902400 MHz Test Circuit PhotomasterProduction Test FixtureSD2902Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a trademark of STMicroelectronics© 1999 STMicroelectronics – Printed in Italy – All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A..SD2902分销商库存信息: STMSD2902。
HCMS-2902中文资料
High Performance CMOS 5 x 7Alphanumeric Displays Technical DataHCMS-29xx SeriesFeatures• Easy to Use• Interfaces Directly with Microprocessors• 0.15" Character Height in 4,8, and 16 (2x8) Character Packages• 0.20" Character Height in 4and 8 Character Packages • Rugged X- and Y-Stackable Package • Serial Input• Convenient Brightness Controls• Wave Solderable• Offered in Five Colors • Low Power CMOS Technology• TTL CompatibleApplications• Telecommunications Equipment• Portable Data Entry Devices • Computer Peripherals • Medical Equipment • Test Equipment • Business Machines • Avionics• Industrial ControlsDevice Selection GuideAlGaAs HER Orange Yellow Green Package Description HCMS-HCMS-HCMS-HCMS-HCMS-Drawing1 x 4 0.15" Character 29052902290429012903A 1 x 8 0.15" Character 29152912291429112913B2 x 8 0.15" Character 29252922292429212923C 1 x 4 0.20" Character 29652962296429612963D 1 x 8 0.20" Character29752972297429712973EDescriptionThe HCMS-29xx series are high performance, easy to use dotmatrix displays driven by on-board CMOS ICs. Each display can be directly interfaced with amicroprocessor, thus eliminating the need for cumbersome interface components. The serial ICinterface allows higher character count information displays with a minimum of data lines. A variety of colors, font heights, and character counts gives designers a wide range of product choices for their specific applications and the easy to read 5 x 7 pixel format allows the display of uppercase, lower case, Katakana, and custom user-defined characters. These displays are stackable in the x- and y-directions, making them ideal for high character count displays.HCMS-290x NOTES:1. DIMENSIONS ARE IN mm (INCHES).2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.0.251.27SYM.DATA OUTOSCV LEDDATA INRSCLKCEBLANKGNDSELV LOGICRESETPIN FUNCTIONASSIGNMENT TABLE123456789101112PIN #FUNCTIONNOTES:1. DIMENSIONS ARE IN mm (INCHES).2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.HCMS-292xNO PIN NO PIN V LED NO PIN NO PIN NO PIN GND LED NO PIN NO PIN V LED NO PIN NO PIN NO PIN DATA IN RSNO PIN CLOCK CEBLANKGND LOGIC SELV LOGIC NO PIN RESET OSCDATA OUTPIN FUNCTION ASSIGNMENT TABLENO PIN NO PIN V LED NO PIN NO PIN NO PIN GND LED NO PIN NO PIN V LED NO PIN NO PIN NO PIN DATA IN RSNO PIN CLOCK CEBLANKGND LOGIC SELV LOGIC NO PIN RESET OSCDATA OUT1A 2A 3A 4A 5A 6A 7A 8A 9A 10A 11A 12A 13A 14A 15A 16A 17A 18A 19A 20A 21A 22A 23A 24A 25A 26APIN #FUNCTION NOTES:1. DIMENSIONS ARE IN mm (INCHES).2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.1.270.25SYM.1B 2B 3B 4B 5B 6B 7B 8B 9B 10B 11B 12B 13B 14B 15B 16B 17B 18B 19B 20B 21B 22B 23B 24B 25B 26BPIN #FUNCTION 1. DIMENSIONS ARE IN mm (INCHES).2. UNLESS OTHERWISE SPECIFIED, THE TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.TYP.4.57(0.180)PIN FUNCTION ASSIGNMENT TABLEAbsolute Maximum RatingsLogic Supply Voltage, V LOGIC to GND LOGIC .......................-0.3 V to 7.0 V LED Supply Voltage, V LED to GND LED ..............................-0.3 V to 5.5 V Input Voltage, Any Pin to GND..........................-0.3 V to V LOGIC +0.3 V Free Air Operating Temperature Range T A [1]..................-40°C to +85°C Relative Humidity (non-condensing)...............................................85%Storage Temperature, T S .................................................-55°C to 100°C Wave Solder Temperature1.59 mm (0.063 in.) below Body...............................250°C for 3 secs ESD Protection @ 1.5 k Ω, 100 pF (each pin).............Class 1, 0-1999 V TOTAL Package Power Dissipation at T A = 25°C [2]4 character .......................................................................1.2 W 8 character .......................................................................2.4 W 16 character.......................................................................4.8 WNotes:1. For operation in high ambient temperatures, see Appendix A, Thermal Considerations.HCMS-297xRecommended Operating Conditions Over Temperature Range(-40°C to +85°C) Parameter Symbol Min.Typ.Max.Units Logic Supply Voltage V LOGIC 3.0 5.0 5.5V LED Supply Voltage V LED 4.0 5.0 5.5V PIN FUNCTION ASSIGNMENT TABLENOTES:1. DIMENSIONS ARE IN mm (INCHES).2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.SYM.0.510.25TYP.1.90(0.075)NO PIN NO PIN V LED NO PIN NO PIN NO PIN GND LED NO PIN NO PIN V LED NO PIN NO PIN NO PIN DATA IN RSNO PIN CLOCK CEBLANKGND LOGIC SELV LOGIC NO PIN RESET OSCDATA OUT1234567891011121314151617181920212223242526PIN #FUNCTION 4.57(0.180)Electrical Characteristics Over Operating Temperature Range (-40°C to +85°C)T A = 25°C -40°C < T A < 85°CV LOGIC = 5.0 V 3.0 V < V LOGIC < 5.5 VParameter Symbol Typ.Max.Min.Max.Units Test ConditionsInput Leakage Current I IµA V IN = 0 V to V LOGIC HCMS-290X/296X (4 char)+7.5-2.5+50HCMS-291X/297X (8 char)+15-5.0+100HCMS-292X (16 char)+15-5.0+100I LOGIC OPERATING I LOGIC(OPT)mA V IN = V LOGICHCMS-290X/296X (4 char)0.4 2.55HCMS-291X/297X (8 char)0.8510HCMS-292X (16 char)0.8510I LOGIC SLEEP[1]I LOGIC(SLP)µA V IN = V LOGICHCMS-290X/296X (4 char)51525HCMS-291X/297X (8 char)103050HCMS-292X (16 char)103050I LED BLANK I LED(BL)mA BL = 0 VHMCS-290X/296X (4 char) 2.04 4.0HCMS-291X/297X (8 char) 4.088HCMS-292X (16 char) 4.088I LED SLEEP[1]I LED(SLP)µAHCMS-290X/296X (4 char)1350HCMS 291X/297X (8 char)26100HCMS-292X (16 char)26100Peak Pixel Current[2]I PIXEL V LED = 5.5 VHCMS-29X5 (AlGaAs)15.417.118.7mA All pixels ON,HCMS-29XX (Other Colors)14.015.917.1mA Average value perpixelHIGH level input voltage V ih 2.0V 4.5 V < V LOGIC < 5.5 V0.8 V LOGIC V 3.0 V < V LOGIC < 4.5 V LOW level input voltage V il0.8V 4.5 V < V LOGIC < 5.5 V0.2 V LOGIC V 3.0 V < V LOGIC < 4.5 V HIGH level output voltage V oh 2.0V V LOGIC = 4.5 V,I oh = -40 µA0.8 V LOGIC V 3.0 V < V LOGIC < 4.5 V LOW level output voltage V ol0.4V V LOGIC = 5.5 V,I ol = 1.6 mA[3]0.2 V LOGIC V 3.0 V < V LOGIC < 4.5 V Thermal Resistance RθJ-P70°C/W IC junction to pin Notes:1. In SLEEP mode, the internal oscillator and reference current for LED drivers are off.2. Average peak pixel current is measured at the maximum drive current set by Control Register 0. Individual pixels may exceed thisvalue.3. For the Oscillator Output, I ol = 40 µA.Optical Characteristics at 25°C[1]V LED = 5.0 V, 50% Peak Current, 100% Pulse WidthLuminous Intensity Peak Dominantper LED[2]Wavelength WavelengthCharacter Average (µcd)λPeak (nm)λd[3] (nm) Display Color Part Number Min.Typ.Typ.Typ. AlGaAs Red HCMS-29X595230645637 High Efficiency Red HCMS-29X22964635626 Orange HCMS-29X42964600602 Yellow HCMS-29X12964583585 Green HCMS-29X357114568574 Notes:1. Refers to the initial case temperature of the device immediately prior to measurement.2. Measured with all LEDs illuminated.3. Dominant wavelength, λd, is derived from the CIE chromaticity diagram and represents the single wavelength which defines theperceived LED color.Electrical DescriptionPin Function DescriptionRESET (RST)Sets Control Register bits to logic low. The Dot Register contents areunaffected by the Reset pin. (logic low = reset; logic high = normaloperation).DATA IN (D IN)Serial Data input for Dot or Control Register data. Data is entered on therising edge of the Clock input.DATA OUT (D OUT)Serial Data output for Dot or Control Register data. This pin is used forcascading multiple displays.CLOCK (CLK)Clock input for writing Dot or Control Register data. When Chip Enable islogic low, data is entered on the rising Clock edge.REGISTER SELECT (RS)Selects Dot Register (RS = logic low) or Control Register (RS = logic high)as the destination for serial data entry. The logic level of RS is latched onthe falling edge of the Chip Enable input.CHIP ENABLE (CE)This input must be a logic low to write data to the display. When CEreturns to logic high and CLK is logic low, data is latched to either the LEDoutput drivers or a Control Register.OSCILLATOR SELECT Selects either an internal or external display oscillator source.(SEL)(logic low = External Display Oscillator; logic high = Internal DisplayOscillator).OSCILLATOR (OSC)Output for the Internal Display Oscillator (SEL = logic high) or input for anExternal Display Oscillator (SEL = logic low).BLANK (BL)Blanks the display when logic high. May be modulated for brightnesscontrol.GND LED Ground for LED drivers.GND LOGIC Ground for logic.AC Timing Characteristics Over Temperature Range (-40°C to +85°C) TimingDiagramRef. 4.5 V < V LOGIC <5.5 V V LOGIC = 3 VNumber Description Symbol Min.Max.Min.Max.Units 1Register Select Setup Time to t rss1010ns Chip Enable2Register Select Hold Time to t rsh1010ns Chip Enable3Rising Clock Edge to Falling t clkce2020ns Chip Enable Edge4Chip Enable Setup Time to t ces3555ns Rising Clock Edge5Chip Enable Hold Time to t ceh2020ns Rising Clock Edge6Data Setup Time to Rising t ds1010ns Clock Edge7Data Hold Time after Rising t dh1010ns Clock Edge8Rising Clock Edge to D OUT[1]t dout10401065ns 9Propagation Delay D IN to D OUT t doutp1830ns Simultaneous Mode forone IC[1,2]10CE Falling Edge to D OUT Valid t cedo2545ns 11Clock High Time t clkh80100ns 12Clock Low Time t clkl80100ns Reset Low Time t rstl5050nsClock Frequency F cyc54MHzInternal Display Oscillator F inosc8021080210KHzFrequencyInternal Refresh Frequency F rf150410150400HzExternal Display Oscillator F exoscFrequencyPrescaler = 151.2100051.21000KHzPrescaler = 841080004108000KHz Notes:1. Timing specifications increase 0.3 ns per pf of capacitive loading above 15 pF.2. This parameter is valid for Simultaneous Mode data entry of the Control Register.ResetReset initializes the Control Registers (sets all Control Register bits to logic low) and places the display in the sleep mode. The Reset pin should be connected to the system power-on reset circuit. The Dot Registers are not cleared upon power-on or by Reset. After power-on, the Dot Register contents are random;however, Reset will put the display in sleep mode, thereby blanking the LEDs. The Control Register and the Control Words are cleared to all zeros by Reset.To operate the display after being Reset, load the Dot Register with logic lows. Then load Control Word 0 with the desired bright-ness level and set the sleep mode bit to logic high.Dot RegisterThe Dot Register holds the pattern to be displayed by theDisplay OverviewThe HCMS-29xx series is a family of LED displays driven byon-board CMOS ICs. The LEDs are configured as 5 x 7 font characters and are driven in groups of 4 characters per IC.Each IC consists of a 160-bit shift register (the Dot Register), two 7-bit Control Words, and refresh circuitry. The Dot Register contents are mapped on aone-to-one basis to the display.Thus, an individual Dot Register bit uniquely controls a single LED.8-character displays have two ICs that are cascaded. The Data Out line of the first IC is internally connected to the Data In line of the second IC forming a 320-bit Dot Register. The display’s other control and power lines areconnected directly to both ICs. In 16-character displays, each row functions as an independent 8-character display with its own 320-bit Dot Register.LEDs. Data is loaded into the Dot Register according to theprocedure shown in Table 1 and the Write Cycle Timing Diagram.First RS is brought low, then CE is brought low. Next, eachsuccessive rising CLK edge will shift in the data at the D IN pin.Loading a logic high will turn the corresponding LED on; a logic low turns the LED off. When all 160 bits have been loaded (or 320bits in an 8-digit display), CE is brought to logic high.When CLK is next brought tologic low, new data is latched into the display dot drivers. Loading data into the Dot Register takes place while the previous data is displayed and eliminates the need to blank the display while loading data.Pixel MapIn a 4-character display, the 160-bits are arranged as 20Table 1. Register Truth TableFunctionCLK CE RS Select Dot RegisterNot Rising↓L Load Dot RegisterD IN = HIGH LED = "ON"↑L X D IN = LOW LED = "OFF"Copy Data from Dot Register to Dot Latch L H X Select Control Register Not Rising↓H Load Control Register [1][3]↑L X Latch Data to Control Word [2]L↑XNotes:1. BIT D 0 of Control Word 1 must have been previously set to Low for serial mode or High for simultaneous mode.2. Selection of Control Word 1 or Control Word 0 is set by D 7 of the Control Shift Register. The unselected control word retains its previous value.3. Control Word data is loaded Most Significant Bit (D 7) first.to logic low. Next, eachsuccessive rising CLK edge will shift in the data on the D IN pin.Finally, when 8 bits have been loaded, the CE line is brought to logic high. When CLK goes to logic low, new data is copied into the selected control word.Loading data into the Control Register takes place while the previous control word configures the display.Control Word 0Loading the Control Register with D 7 = Logic low selects Control Word 0 (see Table 2). Bits D 0-D 3adjust the display brightness by pulse width modulating the LED on-time, while Bits D 4-D 5 adjust the display brightness bychanging the peak pixel current.Bit D selects normal operation or Control RegisterThe Control Register allowssoftware modification of the IC’s operation and consists of two independent 7-bit control words.Bit D 7 in the shift register selects one of the two 7-bit controlwords. Control Word 0 performs pulse width modulationbrightness control, peak pixel current brightness control, and sleep mode. Control Word 1 sets serial/simultaneous data out mode, and external oscillator prescaler. Each function is independent of the others.Control Register Data LoadingData is loaded into the Control Register, MSB first, according to the procedure shown in Table 1and the Write Cycle Timingcolumns by 8 rows. This array can be conceptualized as four 5 x 8dot matrix character locations,but only 7 of the 8 rows have LEDs (see Figures 1 & 2). The bottom row (row 0) is not used.Thus, latch location 0 is never displayed. Column 0 controls the left-most column. Data from Dot Latch locations 0-7 determine whether or not pixels in Column 0are turned-on or turned-off.Therefore, the lower left pixel is turned-on when a logic high is stored in Dot Latch location 1.Characters are loaded in serially,with the left-most character being loaded first and the right-most character being loaded last. By loading one character at a time and latching the data before loading the next character, the figures will appear to scroll from right to left.HCMS-29xx Write Cycle DiagramNOTE:OUTNEXT DATA FROMFigure 1.DATA INCLKCHIP REGISTER SELECTRESETOSCOSC SELECTBLANKright-most characters. The Dot Registers are connected in series to form a 320-bit dot shiftregister. The location of pixel 0has not changed. However, Dot Shift Register bit 0 of IC2becomes bit 160 of the 320-bit dot shift register.The Control Registers of the two ICs are independent of each other. This means that to adjust the display brightness the same control word must be entered into both ICs, unless the ControlRegisters are set to simultaneous mode.Longer character string systems can be built by cascading multiple displays together. This isaccomplished by creating a five line bus. This bus consists of CE,RS, BL, Reset, and CLK. The display pins are connected to the corresponding bus line. Thus, all CE pins are connected to the CE bus line. Similarly, bus lines for created. Then D IN is connected to the right-most display. D OUT from this display is connected to the next display. The left-most display receives its D IN from the D OUT of the display to its right. D OUT from the left-most display is not used.Each display may be set to use its internal oscillator, or the displays may be synchronized by setting up one display as the master and the others as slaves. The slaves are set to receive their oscillator input from the master’s oscillator output.Sleep mode (Control Word 0, bit D 6 = Low) turns off the Internal Display Oscillator and the LED pixel drivers. This mode is used when the IC needs to be powered up, but does not need to be active. Current draw in sleep mode is nearly zero. Data in the Dot Register and Control Words are retained during sleep mode.Control Word 1Loading the Control Register with D 7 = logic high selects Control Word 1. This Control Word performs two functions: serial/simultaneous data out mode and external oscillator prescale select (see Table 2).Serial/Simultaneous Data Output D 0Bit D 0 of control word 1 is used to switch the mode of D OUT between serial and simultaneous data entry during Control Register writes.The default mode (logic low) is the serial D OUT mode. In serial mode, D OUT is connected to the last bit (D 7) of the Control Shift Register.Storing a logic high to bit D 0changes D OUT to simultaneous mode which affects the Control Register only. In simultaneous mode, D OUT is logically connected to D IN . This arrangement allows multiple ICs to have their Control Registers written to simul-taneously . For example, for N ICs in the serial mode, N * 8 clock pulses are needed to load thesame data in all Control Registers.In the simultaneous mode, N ICs only need 8 clock pulses to load the same data in all ControlRegisters. The propagation delay from the first IC to the last is N *t DOUTP .External Oscillator Prescaler Bit D 1Bit D 1 of Control Word 1 is used to scale the frequency of anexternal Display Oscillator. When this bit is logic low, the external Display Oscillator directly sets the internal display clock rate. When this bit is a logic high, theexternal oscillator is divided by 8.This scaled frequency then sets the internal display clock rate. It takes 512 cycles of the display clock (or 8 x 512 = 4096 cycles of an external clock with the divide by 8 prescaler) to com-pletely refresh the display ing the prescaler bit allows the designer to use a higher external oscillator frequency without extra circuitry.This bit has no affect on the internal Display Oscillator Frequency.Bits D 2-D 6These bits must always be pro-grammed to logic low.Cascaded ICsFigure 3 shows how two ICs are connected within an HCMS-29XX display. The first IC controls the four left-most characters and the second IC controls the four↑Bit D 7On-Time Duty Relative Set Low PWM BrightnessOscillator Factor Brightnessto Select Control Cycles(%)(%)Control Word 0L L L L 000L L L H 10.2 1.7L L H L 20.4 3.3L L H H 30.6 5.0L H L L 40.8 6.7L H L H 5 1.08.3L H H L 7 1.411.7L H H H 9 1.815H L L L 11 2.118H L L H 14 2.723H L H L 18 3.530H L H H 22 4.337H H L L 28 5.547H H L H 367.060H H H L 489.480HHHH6011.7100Table 2. Control Shift RegisterCONTROL WORD 0Peak Current Typical Peak Relative Full Brightness Pixel CurrentScale CurrentControl (mA)(Relative Brightness, %)H L 4.031L H 6.450L L 9.3 73 (Default at Power Up)H H12.8100SLEEP MODEL – DISABLES INTERNAL OSCILLATOR-DISPLAY BLANK H – NORMAL OPERATION7inL – Oscillator Freq ÷ 1H – Oscillator Freq ÷ 8CONTROL WORD 1Figure 3. Cascaded ICs.P D can be calculated as Equation 2 below.Figure 4 shows how to derate the power of one IC versus ambient temperature. Operation at high ambient temperatures may require the power per IC to be reduced. The power consumption can be reduced by changing either the N, I PIXEL , Osc cyc or V LED . Changing V LOGIC has very little impact on the power consumption.Appendix A. Thermal ConsiderationsThe display IC has a maximum junction temperature of 150°C.The IC junction temperature can be calculated with Equation 1below.A typical value for R θJA is 100°C/W. This value is typical for a display mounted in a socket and covered with a plastic filter. The socket is soldered to a .062 in.thick PCB with .020 inch wide,one ounce copper traces.Equation 1:T J MAX = T A + P D * R θJAWhere:T J MAX = maximum IC junction temperatureT A = ambient temperature surrounding the displayR θJA = thermal resistance from the IC junction to ambient P D = power dissipated by the IC Equation 2:P D = (N * I PIXEL * Duty Factor * V LED ) + I LOGIC * V LOGIC Where:P D = total power dissipationN = number of pixels on (maximum 4 char * 5 * 7 = 140)I PIXEL = peak pixel current.Duty Factor = 1/8 * Osccyc/64Osc cyc = number of ON oscillator cycles per row I LOGIC = IC logic current V LOGIC = logic supply voltage Equation 3:I PEAK = M * 20 * I PIXELWhere:I PEAK = maximum instantaneous peak current for the display M = number of ICs in the system20= maximum number of LEDs on per IC I PIXEL = peak current for one LED Equation 4:I LED (AVG) = N * I PIXEL * 1/8 * (oscillator cycles)/64(see Variable Definitions above)Appendix B. ElectricalConsiderationsCurrent CalculationsThe peak and average display current requirements have a significant impact on power supply selection. The maximum peak current is calculated with Equation 3 below.The average current required by the display can be calculated with Equation 4 below.The power supply has to be able to supply I PEAK transients and supply I LED (AVG) continuously.The range on V LED allows noise on this supply without significantly changing the display brightness.V LOGIC and V LED Considerations The display uses two independent electrical systems. One system is used to power the display’s logic and the other to power the display’s LEDs. These two systems keep the logic supply clean.Separate electrical systems allow the voltage applied to V LED and V LOGIC to be varied independently.Thus, V LED can vary from 0 to 5.5V without affecting either the Dot or the Control Registers. V LED canP M A X – M A X I MU M P O W E R D I S S I P A T I O N P E R I C – WD 025T – AMBIENT TEMPERATURE – °CA 0.70.60.50.40.30.20.1605550454035300.80.91.01.11.28580757065901.3Figure 4.be varied between 4.0 to 5.5 V without any noticeable variation in light output. However, operat-ing V LED below 4.0 V may cause objectionable mismatch between the pixels and is not recommended. Dimming the display by pulse width modulating V LED is also not recommended.V LOGIC can vary from 3.0 to 5.5 V without affecting either the displayed message or the display intensity. However, operation below 4.5 V will change the timing and logic levels and operation below 3 V may cause the Dot and Control Registers to be altered.The logic ground is internally connected to the LED ground by a substrate diode. This diode becomes forward biased and conducts when the logic ground is 0.4 V greater then the LED ground. The LED ground and the logic ground should be connected to a common ground which can withstand the current introduced by the switching LED drivers. When separate ground connections are used, the LED ground can vary from -0.3 V to+0.3 V with respect to the logic ground. Voltages below -0.3 V can cause all the dots to be ON. Voltage above +0.3 V can cause dimming and dot mismatch. The LED ground for the LED drivers can be routed separately from the logic ground until an appropriate ground plane is available. On long interconnections between the display and the host system, voltage drops on the analog ground can be kept from affecting the display logic levels by isolating the two grounds.Electrostatic DischargeThe inputs to the ICs are pro-tected against static dischargeand input current latchup. How-ever, for best results, standardCMOS handling precautionsshould be used. Before use, theHCMS-29XX should be stored inantistatic tubes or in conductivematerial. During assembly, agrounded conductive work areashould be used and assemblypersonnel should wear conductivewrist straps. Lab coats made ofsynthetic material should beavoided since they are prone tostatic buildup. Input currentlatchup is caused when the CMOSinputs are subjected to either avoltage below ground (V IN <ground) or to a voltage higherthen V LOGIC (V IN > V LOGIC) andwhen a high current is forced intothe input. To prevent inputcurrent latchup and ESD damage,unused inputs should be con-nected to either ground or V LOGIC.Voltages should not be applied tothe inputs until V LOGIC has beenapplied to the display.Appendix C. OscillatorThe oscillator provides theinternal refresh circuitry with asignal that is used to synchronizethe columns and rows. Thisensures that the right data is inthe dot drivers for that row. Thissignal can be supplied from eitheran external source or the internalsource.A display refresh rate of 100 Hzor faster ensures flicker-freeoperation. Thus for an externaloscillator the frequency should begreater than or equal to 512 x100 Hz = 51.2 kHz. Operationabove 1 MHz without theprescaler or 8 MHz with theprescaler may cause noticeablepixel to pixel mismatch.Appendix D. RefreshCircuitryThis display driver consists of 20one-of-eight column decoders and20 constant current sources, 1one-of-eight row decoder andeight row sinks, a pulse widthmodulation control block, a peakcurrent control block, and thecircuit to refresh the LEDs. Therefresh counters and oscillator areused to synchronize the columnsand rows.The 160 bits are organized as 20columns by 8 rows. The ICilluminates the display bysequentially turning ON each ofthe 8 row-drivers. To refresh thedisplay once takes 512 oscillatorcycles. Because there are eightrow drivers, each row driver isselected for 64 (512/8) oscillatorcycles. Four cycles are used tobriefly blank the display beforethe following row is switched on.Thus, each row is ON for 60oscillator cycles out of a possible64. This corresponds to themaximum LED on time.Appendix E. DisplayBrightnessTwo ways have been shown tocontrol the brightness of this LEDdisplay: setting the peak currentand setting the duty factor. Bothvalues are set in Control Word 0.To compute the resulting displaybrightness when both PWM andpeak current control are used,simply multiply the two relativebrightness factors. For example,if Control Register 0 holds theword 1001101, the peak current。
LM2902DT中文资料
1/11s WIDE GAIN BANDWIDTH: 1.3MHzs INPUT COMMON-MODE VOLTAGE RANGE INCLUDES GROUNDs LARGE VOLTAGE GAIN: 100dBs VERY LOW SUPPLY CURRENT/AMPLI:375µAs LOW INPUT BIAS CURRENT: 20nA s LOW INPUT OFFSET CURRENT:2nA sWIDE POWER SUPPLY RANGE:SINGLE SUPPLY: +3V TO +30V DUAL SUPPLIES: ±1.5V TO ±15VDESCRIPTIONThis circuit consists of four independent, high gain, internally frequency compensated operation-al amplifiers which were designed specially for au-tomotive and industrial control systems. It oper-ates from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the pow-er supply voltage.ORDER CODEN = Dual in Line Package (DIP)D = Small Outline Package (SO) - also available in Tape & Reel (DT)P = Thin Shrink Small Outline Package (TSSOP) - only availablein Tape & Reel (PT)PIN CONNECTIONS (top view)Part Number Temperature Range Package N D P LM2902-40°C, +125°C•••LM2902LOW POWER QUAD OPERATIONAL AMPLIFIERNovember 2001LM29022/11SCHEMATIC DIAGRAM (1/4 LM2902)ABSOLUTE MAXIMUM RATINGSSymbol ParameterValue Unit V CC Supply Voltage±16 to 32V V id Differential Input Voltage +32V V IInput Voltage-0.3 to +32VOutput Short-circuit to Ground 1)1.Short-circuit from the output to V CC can cause excessive heating if V CC > 15V. The maximum output current is approximately 40mA independent of the magnitude of V CC . Destructive dissipation can result from simultaneous short-circuit on all amplifiers.Infinite p tot Power Dissipation N Suffix D Suffix 500400mW I in Input Current 2)2.This input current only exists when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistor becoming forward biased and thereby acting as input diodes clamps. In addition to this diode action, there is also NPN parasitic action on the IC chip. This transistor action can cause the output voltages of the Op-Amps to go to the V CC voltage level (or to ground for a large overdrive)for the time duration than an input is driven negative. This is not destructive and normal output will set up again for input voltage higher than -0.3V.50mA T oper Operating Free-Air Temperature Range -40 to +125°C T stgStorage Temperature Range-65 to +150°CLM29023/11ELECTRICAL CHARACTERISTICSV CC + = 5V, V cc - = Ground, V O = 1.4V, T amb = 25°C (unless otherwise specified)Symbol ParameterMin.Typ.Max.Unit V ioInput Offset Voltage 1)T amb = +25°CT min ≤ T amb ≤ T max .279mVI io Input Offset CurrentT amb = +25°CT min ≤ T amb ≤ T max.23040nAI ibInput Bias Current 2)T amb = +25°CT min ≤ T amb ≤ T max.20150300nAA vdLarge Signal Voltage GainV CC + = +15V,R L =2k Ω, V o = 1.4V to 11.4V T amb = +25°CT min ≤ T amb ≤ T max.5025100V/mVSVR Supply Voltage Rejection Ratio (R S ≤10k Ω)T amb = +25°CT min ≤ T amb ≤ T max.6565110dBI ccSupply Current, all Amp, no loadT amb = +25°CV CC = +5V V CC = +30VT min ≤ T amb ≤ T max. V CC = +5VV CC = +30V0.71.50.81.51.231.23mAV icmInput Common Mode Voltage Range (V cc = +30V)3)T amb = +25°CT min ≤ T amb ≤ T max.00V CC -1.5V CC -2VCMR Common-mode Rejection Ratio (R S ≤10k Ω)T amb = +25°CT min ≤ T amb ≤ T max.706080dBI O Output Short-circuit Current (V id = +1V)V CC = +15V, V o = +2V204070mA I sinkOutput Sink Current (V id = -1V)V CC = +15V, V o = +2VV CC = +15V, V o = +0.2V10122050mA µAV OHHigh Level Output Voltage (V cc + 30V)T amb = +25°C R L = 2k ΩT min ≤ T amb ≤ T max. T amb = +25°C R L = 10k ΩT min ≤ T amb ≤ T max. (V cc + 5V), R L = 2k ΩT min ≤ T amb ≤ T max. T amb = +25°C 262627273.532728VV OLLow Level Output Voltage (R L = 10k Ω)T amb = +25°C T min ≤ T amb ≤ T max52020mVSR Slew RateV cc = 15V, Vi = 0.5 to 3V, R L = 2k Ω, C L = 100pF,unity gain0.4V/µsLM29024/11GBP Gain Bandwidth ProductV cc = 30V,V in = 10mV, R L = 2k Ω, C L = 100pF 1.3MHz THDTotal Harmonic Distortionf = 1kHz, A V = 20dB, R L = 2kΩ, V o = 2Vpp,C L = 100pF, V cc = 30V 0.015%e n Equivalent Input Noise Voltagef = 1kHz, R S = 100Ω, V cc = 30V 40DV io Input Offset Voltage Drift 730µV/°C DI io Input Offset Current Drift 10200pA/°C V O1/V O2Channel Separation 4)1kHz ≤f ≤ 20kHz120dB1. V O = 1.4V, R S = 0Ω, 5V < V CC < 30V, 0V < V ic < V CC - 1.5V2.The direction of the input current is out of the IC. This current is essentially constant, independent of the state of the output, so no loading charge change exists on the input lines3.The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is V CC + –1.5V, but either or both inputs can go to +32V without damage.4.Due to the proximity of external components insure that coupling is not originating via stray capacitance between these external parts. This typically can be detected as this type of capacitance increases at higher frequences.Symbol ParameterMin.Typ.Max.Unit nV Hz -----------LM29025/11LM29026/11TYPICAL SINGLE - SUPPLY APPLICATIONS AC COUPLED INVERTING AMPLIFIERAC COUPLED NON-INVERTING AMPLIFIER NON-INVERTING DC GAINLM29027/11DC SUMMING AMPLIFIERHIGH INPUT Z ADJUSTABLE GAIN DC INSTRUMENTATION AMPLIFIERLOW DRIFT PEAK DETECTOR ACTIVER BADPASS FILTERHIGH INPUT Z, DC DIFFERENTIAL AMPLIFIERUSING SYMMETRICAL AMPLIFIERS TO REDUCE INPUT CURRENT (GENERAL CONCEPT)e1eOR2R4oeo = [ 1 + ] (e2 - e1)As shown eo = (e2 - e1)R4R3LM29028/11MACROMODELS** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS :* 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT* 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT LM2902 1 3 2 4 5 (analog)********************************************************.MODEL MDTH D IS=1E-8 KF=3.104131E-15CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12CIN 1 5 1.000000E-12EIP 10 5 2 5 1EIN 16 5 1 5 1RIP 10 11 2.600000E+01RIN 15 16 2.600000E+01RIS 11 15 2.003862E+02DIP 11 12 MDTH 400E-12DIN 15 14 MDTH 400E-12VOFP 12 13 DC 0 VOFN 13 14 DC 0IPOL 13 5 1.000000E-05CPS 11 15 3.783376E-09DINN 17 13 MDTH 400E-12VIN 17 5 0.000000e+00DINR 15 18 MDTH 400E-12VIP 4 18 2.000000E+00FCP 4 5 VOFP 3.400000E+01FCN 5 4 VOFN 3.400000E+01FIBP 2 5 VOFN 2.000000E-03FIBN 5 1 VOFP 2.000000E-03* AMPLIFYING STAGE FIP 5 19 VOFP 3.600000E+02FIN 5 19 VOFN 3.600000E+02RG1 19 5 3.652997E+06RG2 19 4 3.652997E+06CC 19 5 6.000000E-09DOPM 19 22 MDTH 400E-12DONM 21 19 MDTH 400E-12HOPM 22 28 VOUT 7.500000E+03VIPM 28 4 1.500000E+02HONM 21 27 VOUT 7.500000E+03VINM 5 27 1.500000E+02EOUT 26 23 19 5 1VOUT 23 5 0ROUT 26 3 20COUT 3 5 1.000000E-12DOP 19 25 MDTH 400E-12VOP 4 25 2.242230E+00DON 24 19 MDTH 400E-12VON 24 5 7.922301E-01.ENDSELECTRICAL CHARACTERISTICSV CC + = 5V, V CC - = 0V, T amb = 25°C (unless otherwise specified)Symbol ConditionsValue Unit V io 0mV A vd R L = 2k Ω100V/mV I CC No load, per operator350µA V icm -15 to +13.5V V OH R L = 2k Ω (V CC + = 15V)+13.5V V OL R L = 2k Ω5mV I os V O = +2V, V CC = +15V +40mA GBP R L = 2k Ω, C L = 100pF 1.3MHz SR R L = 2k Ω, C L = 100pF 0.4V/µsLM29029/11PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIPDimensionsMillimetersInches Min.Typ.Max.Min.Typ.Max.a10.510.020B 1.391.650.0550.065b 0.50.020b10.250.010D 200.787E 8.50.335e 2.540.100e315.240.600F 7.10.280i 5.10.201L 3.30.130Z1.272.540.0500.100LM290210/11PACKAGE MECHANICAL DATA14 PINS - PLASTIC MICROPACKAGE (SO)DimensionsMillimetersInches Min.Typ.Max.Min.Typ.Max.A 1.750.069a10.10.20.0040.008a2 1.60.063b 0.350.460.0140.018b10.190.250.0070.010C 0.50.020c145° (typ.)D (1)8.558.750.3360.344E 5.86.20.2280.244e 1.270.050e37.620.300F (1) 3.8 4.00.1500.157G 4.6 5.30.1810.208L 0.51.270.0200.050M 0.680.027S8° (max.)Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK.LM290211/11PACKAGE MECHANICAL DATA14 PINS -THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)DimensionsMillimetersInches Min.Typ.Max.Min.Typ.Max.A 1.200.05A10.050.150.010.006A20.80 1.00 1.050.0310.0390.041b 0.190.300.0070.15c 0.090.200.0030.012D 4.90 5.00 5.100.1920.1960.20E 6.400.252E1 4.30 4.40 4.500.1690.1730.177e 0.650.025k 0°8°0°8°L 0.4500.6000.7500.0180.0240.030L1 1.000.039aaa0.1000.004Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2001 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - MalaysiaMalta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States© 元器件交易网。
2SK2902中文资料(fuji)中文数据手册「EasyDatasheet - 矽搜」
VGS [V]
典型漏源通态电阻
RDS（ON）= F（ID）：为80μs脉冲试验,总胆固醇= 25°C
gfs [s]
] RDS(on) [m
ID [A]
ID [A]
2
芯片中文手册,看全文,戳
2SK2902-01MR
漏源通态电阻
RDS(on)=f(Tch):ID=22.5A,VGS=10V
] RDS(on)[m
富士功率MOSFET
栅极阈值电压与总胆固醇
VGS(th)=f(Tch):VDS=VGS,ID=10mA
VGS(th) [V]
Tch [°C]
典型栅极电荷特性
VGS=f(Qg):ID=45A,Tch=25°C
Tch [°C] 典型电容
C=f(VDS):VGS=0V,f=1MHz
VGS [V] C [F]
c = 25°C除非另有说明）
符号
BV DSS VGS(th)
IDSS
IGSS RDS(on) gf s Ciss Coss Crss td(on) tr td (of f ) tf IAV VSD trr Qrr
测试条件
ID=1mA VGS=0V ID=10mAV DS=VGS V DS=60V VGS=0V VGS=±30VV DS=0V ID=22.5AV GS=10V ID=22.5AV DS=25V V DS=25V V GS =0V f=1MHz VCC=30VI D=45A VGS=10V
RGS=10
Tch=25°C Tch=125°C
L=100 µH T ch=25°C IF=45AV GS=0VT ch=25°C IF=45AV GS=0V -di/dt=100A/µs T ch=25°C
2SK2992中文资料
2SK2992中⽂资料TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π?MOSV)2SK2992Chopper Regulator, DC ?DC Converter and Motor Drive Applicationsz Low drain ?source ON resistance : R DS (ON) = 2.2 ? (typ.) z High forward transfer admittance: |Y fs | = 0.9 S (typ.)z Low leakage current : I DSS = 100 µA (max) (V DS = 200 V) z Enhancement mode : V th = 2.0~3.5 V (V DS = 10 V, I D = 1 mA)Absolute Maximum Ratings (Ta = 25°C)Characteristics Symbol Rating UnitDrain ?source voltageV DSS 200 VDrain ?gate voltage (R GS = 20 k ?) V DGR 200 VGate ?source voltage V GSS ±20 VDC (Note 1) I D 1 A Drain currentPulse (Note 1)I DP 3A Drain power dissipation P D 0.5 WDrain power dissipation(Note 2)P D 1.5 W Single pulse avalanche energy(Note 3) E AS 36 mJ Avalanche currentI AR 1 A Repetitive avalanche energy (Note 4) E AR 0.05 mJ Channel temperature T ch 150 °CStorage temperature rangeT stg55~150 °CNote: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change intemperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).Thermal CharacteristicsCharacteristics Symbol Max UnitThermal resistance, channel toambient250°C / WNote 1: Ensure that the channel temperature does not exceed 150°C. Note 2: Mounted on a ceramic substrate (25.4 mm ×25.4 mm × 0.8 mm) Note 3: V DD = 50 V, T ch = 25°C (initial), L = 56.7 mH, R G = 25 ?, I AR = 1 A Note 4: Repetitive rating: pulse width limited by maximum channel temperature This transistor is an electrostatic-sensitive device. Please handle with caution.Unit: mmJEDEC―JEITA SC-62 TOSHIBA 2-5K1B Weight: 0.05 g (typ.)MarkingElectrical Characteristics (Ta = 25°C)Characteristics SymbolTest ConditionMin Typ. Max Unit Gate leakage current I GSS V GS = ±16 V, V DS = 0 V — — ±10µA Drain cut ?off current I DSS V DS = 200 V, V GS = 0 V — — 100µA Drain ?source breakdown voltageV (BR) DSS I D = 10 mA, V GS = 0 V 200 — — V Gate threshold voltage V th V DS = 10 V, I D = 1 mA 2.0 — 3.5 V Drain ? source ON resistance R DS (ON)V GS = 10 V, I D = 0.5 A— 2.2 3.5 ? Forward transfer admittance |Y fs | V DS = 10 V, ID = 0.5 A0.50.9—SInput capacitanceC iss — 90 —Reverse transfer capacitance C rss — 10 — Output capacitanceC ossV DS = 10 V, V GS = 0 V, f = 1 MHz — 30 —pF Rise timet r — 9 —Turn ?on timet on — 17 —t f — 16 —Switching timeTurn ?off timet off — 45 — nsTotal gate charge (gate ?sourceplus gate ?drain) Q g— 3.0 — Gate ?source charge Q gs — 1.8 — Gate ?drain (“miller”) charge Q gdV DD ≈ 160 V, V GS = 10 V, I D = 1 A— 1.2 —nCSource ?Drain Ratings and Characteristics (Ta = 25°C) Characteristics SymbolTest ConditionMin Typ. Max UnitContinuous drain reverse current(Note 1)I DR —— — 1 A Pulse drain reverse current(Note 1) I DRP —— — 3 A Forward voltage (diode) V DSF I DR = 1 A, V GS = 0 V——1.5VReverse recovery time t rr — 85 — ns Reverse recovery chargeQ rrI DR = 1 A, V GS = 0 V, dI DR / dt = 100 A / µs— 190 — nClead (Pb)-free finish.=DD VDSS VDSS AS V B B I L 21E 2R G = 25 ?V DD = 50 V , L = 56.7 mHRESTRICTIONS ON PRODUCT USE20070701-EN GENERAL ?The information contained herein is subject to change without notice.TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. 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LM2902M中文资料
200 500 VCC -2.0 100 -
µV/°C nA pA/°C nA V V/mV V V mV mA
Output Voltage Swing
VO(H) VO(L)
VCC = 5V, RL=10kΩ
VI(+) = 1V, VI(-) ISOURCE = 0V VCC = 15V, VO(P) = 2V Output Current ISINK Differential Input Voltage VI(+) = 0V, VI(-) = 1V VCC = 15V, VO(P) = 2V -
Q17 Q19
Q20 Q2 IN(-) Q1 R2 IN(+) Q11 Q21 Q7 Q8 Q9 Q10 Q13 Q15 Q14 Q16 OUTPUT Q3 Q4 C1 Q18 R1
GND
Absolute Maximum Ratings
Parameter Power Supply Voltage Differential Input Voltage Input Voltage Output Short Circuit to GND Vcc≤15V, TA=25°C(one Amp) Power Dissipation, TA=25°C 14-DIP 14-SOP Operating Temperature Range Storage Temperature Range Symbol VCC VI(DIFF) VI PD TOPR TSTG LM224/LM224A ±16 or 32 32 -0.3 to +32 Continuous 1310 640 -25 ~ +85 -65 ~ +150 LM324/LM324A ±16 or 32 32 -0.3 to +32 Continuous 1310 640 0 ~ +70 -65 ~ +150 LM2902 ±13 or 26 26 -0.3 to +26 Continuous 1310 640 -40 ~ +85 -65 ~ +150 Unit V V V mW °C °C
UC2902中文资料
0.12 0.24 0.34 V/µs
2
元器件交易网
UC1902 UC2902 UC3902
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, TA = –55°C to +125°C for UC1902, –40°C to+85°C for UC2902, 0°C to 70°C for UC3902, VCC = 5V, RADJR = 1kΩ, VADJ = 5V, COMP = 5nF capacitor to GND, VSHARE– = 0V, TA = TJ.
2.3 2.5 2.7
V
Hysteresis
SHARE+ = 0.2V, SENSE = 0V, COMP = 1V
60 100 140 mV
Current Sense Amplifier
Input Offset Voltage
0.1V ≤ SHARE+ ≤ 1.1V
–2.5 –0.5 1.5 mV
• UVLO (Undervoltage Lockout) Circuitry
of their output current capability for a particular load. A differential line is used for the share bus to maximize noise immunity and
• Precision Current Sense Amplifier with scaling the current sense resistor, supplies with different output current ca-
2902芯片
2902芯片2902芯片是一种高能效、高集成度的专用集成电路。
它是由Arm公司专为物联网设备开发的一款微控制器。
该芯片具有低功耗、低成本、高性能和高可靠性的优点，适用于物联网、传感器、智能家居等领域。
2902芯片内部集成了强大的处理器核心、存储器、外设控制器和通信接口等功能模块。
其中的处理器核心采用了低功耗的设计，能有效降低能耗。
芯片的存储器包括片上闪存和RAM，可以存储和运行各种应用程序和数据。
外设控制器可以连接各种传感器和执行器，实现与外部设备的通信和控制。
通信接口则支持多种通信协议，如SPI、I2C、UART等，使芯片能够与其他设备进行数据交换。
2902芯片采用先进的制程工艺，可以实现更高的集成度和更低的功耗。
该芯片支持多种操作电压和频率的选择，可根据实际需求进行调节。
它还具有睡眠模式和待机模式等低功耗功能，可实现设备长时间待机或低功耗运行。
此外，2902芯片还具有良好的抗干扰性和抗电磁干扰能力，可以在复杂的电磁环境中稳定运行。
2902芯片的软件开发工具简单易用，支持多种开发环境和编程语言。
开发人员可以使用标准的C语言或汇编语言进行编程，并通过调试工具进行程序的调试和优化。
芯片支持实时操作系统和嵌入式操作系统，可以方便地实现复杂的任务调度和多线程处理。
此外，该芯片还提供了丰富的软件驱动程序和开发库，可以简化开发过程，提高开发效率。
2902芯片广泛应用于物联网设备、传感器和智能家居等领域。
在物联网设备中，它可以实现设备之间的数据采集、传输和控制。
在传感器中，它可以处理传感器的数据，并将其发送到云端或其他设备。
在智能家居中，它可以控制家居设备的开关和状态，并与用户的智能手机或其他设备进行通信。
该芯片的高能效和高集成度可以帮助提升设备的性能和功能，并大大降低设备的能耗和成本。
总之，2902芯片是一款高能效、高集成度的专用集成电路，适用于物联网设备、传感器和智能家居等领域。
它具有低功耗、低成本、高性能和高可靠性的优点，可以帮助提升设备的性能和功能，并降低能耗和成本。