PAD500中文资料

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13745资料

TOP VIEW GND NC VIN VIN BOOST FB/SENSE NC GND 1 2 3 4 5 6 7 8
LT1374CFE LT1374IFE
FE16 PACKAGE 16-LEAD PLASTIC TSSOP
θJA = 40°C/ W EXPOSED PAD SOLDERED TO GROUND PLANE
VOUT = 5V VIN = 10V L = 10µH
1374 TA02
U
1374fb
1
元器件交易网
LT1374
ABSOLUTE
AXI U
RATI GS
Input Voltage LT1374 ............................................................... 25V LT1374HV .......................................................... 32V BOOST Pin Voltage ................................................. 38V BOOST Pin Above Input Voltage ............................. 15V SHDN Pin Voltage ..................................................... 7V BIAS Pin Voltage ...................................................... 7V FB Pin Voltage (Adjustable Part) ............................ 3.5V

BUK98150-55A中文资料

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
2 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOS™ logic level FET
120 Pder
(%)
80
03aa17
starting Tj = 25 °C
Max Unit
55
V
5
A
8
W
150
°C
150
mΩ
161
mΩ
137
mΩ
Max Unit
55
V
55
V
±15
V
5
A
3
A
22
A
8
W
+150 °C
+150 °C
5
A
22
A
31
mJ
9397 750 09435
Product data
Rev. 02 — 25 March 2002
Tsp = 25 °C; Figure 1
-
Tstg
storage temperature
−55
Tj
operating junction temperature
−55
Source-drain diode
IDR
reverse drain current (DC)
Tsp = 25 °C
-
IDRM
peak reverse drain current
128
VGS = 4.5 V; ID = 5 A

tPad中文使用手册

11目录第1章.tPad 简介 (3)1.1 关于tPad 套件............................................................................................................................................7 1.2 获取帮助 (8)第2章. tPad 概述 (9)2.1 布局和组件...............................................................................................................................................9 2.2 tPad 系统框图. (10)第3章. 使用 tPad (11)3.1 配置 Cyclone IV E FPGA 芯片...............................................................................................................11 3.2 总线控制器.............................................................................................................................................14 3.3 使用 8英寸LCD 触摸屏模块..................................................................................................................15 3.4 使用 500万像素数字影像传感器模块.. (16)第4章. tPad 设计范例 (18)4.1 系统要求.................................................................................................................................................18 4.2 出厂配置.................................................................................................................................................18 4.3 tPad Starter 设计范例..............................................................................................................................19 4.4 tPad 图片查看器.....................................................................................................................................23 4.5 视频与图像处理.....................................................................................................................................26 4.6 tPad 摄像头应用.....................................................................................................................................29 4.7 使用摄像头的视频与图像处理. (32)第5章. 应用选择器 (36)5.1 即刻可用的SD 卡演示范例....................................................................................................................36 5.2 运行应用选择器.....................................................................................................................................37 5.3 应用选择器详解.....................................................................................................................................37 5.4 恢复出厂默认程序 (40)2第6章. 附录 (43)6.1 修改历史.................................................................................................................................................43 6.2 版权声明. (43)第1章.tPad 简介tPad 高阶多媒体嵌入式系统开发套件为嵌入式开发人员创建多媒体系统提供了一个非常全面的设计环境。

5.0SMLJ22CA中文资料

FeaturesMechanical DataTerminals: solderable per MIL-STD-750, Method 2026 Polarity: Color band denotes positive end( cathode) exceptBi-directional types.Standard packaging: 16mm tape per ( EIA 481). Weight: 0.007 ounce, 0.21 gramMaximum Ratings @ 25o C Unless Otherwise SpecifiedPeak Pulse Current on 10/1000uswaveform(Note1, Fig3)I PPM See Table 1Amps Peak Pulse Power Disspation on 10/1000us waveform(Note1,2,Fig1)P PPMMinimum 5000Watts Peak forward surge current (JEDEC Method) (Note 2,3)I FSM)300.0Amps Operation And Storage Temperature Range T J ,T STG -55o C to +150o CNOTES:1.Non-repetitive current pulse per Fig.3 and derated above TA=25oC per Fig.2.2.Mounted on 8.0mm 2copper pads to each terminal.3.8.3ms, single half sine-wave or equivalent square wave, duty cycle=4 pulses per. Minutes maximum.For surface mount application in order to optimize board space Low inductance Low profile package Built-in strain relief Glass passivated junction Excellent clamping capability Repetition Rate( duty cycle): 0.01%Fast response time: typical less than 1ps from 0V to BV min Typical I D less than 1uA above 10VHigh temperature soldering: 250oC/10 seconds at terminals Plastic package has Underwrites Laboratory FlammabilityClassification 94V-Oomp onents 20736 Marilla Street Chatsworth! "# $ % ! "#Revision: 1 2006/10/18 UL Recognized File # E222849TMMicro Commercial ComponentsCase Material: Molded Plastic. UL Flammability Classification Rating 94V-0www.mccsemi .com1 of 4MAXIMUM CLAMPING VOLTAGE REVERSE LEAKAGE @Ipp @V RWM Vc(V)I D (µA)5.0SMLJ 11A 1112.213.51018.22758005PEN 5.0SMLJ 12A 1213.314.71019.92528005PEP 5.0SMLJ 13A 1314.415.91021.52335005PEQ 5.0SMLJ 14A 1415.617.21023.22162005PER 5.0SMLJ 15A 1516.718.5124.42051005PES 5.0SMLJ 16A 1617.819.7126193505PET 5.0SMLJ 17A 1718.920.9127.6181205PEU 5.0SMLJ 18A 182022.1129.2172105PEV 5.0SMLJ 20A 2022.224.5132.415555PEW 5.0SMLJ 22A 2224.426.9135.514155PEX 5.0SMLJ 24A 2426.729.5138.912955PEZ 5.0SMLJ 26A 2628.931.9142.111955PFE 5.0SMLJ 28A 2831.134.4145.411055PFG 5.0SMLJ 30A 3033.336.8148.410355PFK 5.0SMLJ 33A 3336.740.6153.393.955PFM 5.0SMLJ 36A 364044.2158.186.155PFP 5.0SMLJ 40A 4044.449.1164.577.655PFR 5.0SMLJ 43A 4347.852.8169.472.155PFT 5.0SMLJ 45A 455055.3172.768.855PFV 5.0SMLJ 48A 4853.358.9177.464.755PFX 5.0SMLJ 51A 5156.762.7182.460.755PFZ 5.0SMLJ 54A 546066.3187.157.555RGE 5.0SMLJ 58A 5864.471.2193.653.555PGG 5.0SMLJ 60A 6066.773.7196.851.755PGK 5.0SMLJ 64A 6471.178.6110348.655PGM 5.0SMLJ 70A 7077.886111344.355PGP 5.0SMLJ 75A 7583.392.1112141.455PGR 5.0SMLJ 78A 7886.795.8112639.755PGT 5.0SMLJ 85A 8594.4104113736.555PGV 5.0SMLJ 90A 90100111114634.355PGX 5.0SMLJ 100A 100111123116230.955PGZ 5.0SMLJ 110A 110122135117728.355PHE 5.0SMLJ 120A 12013314711932655PHG 5.0SMLJ 130A 13014415912092455PHK 5.0SMLJ 150A 150167185124320.655PHM 5.0SMLJ 160A 160178197125919.355PHP 5.0SMLJ 170A170189209127518.255PHRDEVICE MARKING CODE PART NUMBERPEAK PULSE CURRENT Ipp (A)TEST CURRENT I T (mA)BREAKDOWNVOLTAGE V BR (V)MAX.@ITBREAKDOWN VOLTAGEV BR (V)MIN.@IT REVERSE STAND- OFF VOLTAGE V RWM (V)TMMicro Commercial Components5.0SMLJ11A~5.0SMLJ170Awww.mccsemi .com2 of 4Revision: 1 2006/10/18MAXIMUM CLAMPING VOLTAGE REVERSE LEAKAGE @Ipp @V RWM Vc(V)I D (µA)5.0SMLJ 11CA 1112.213.51018.22758005BEN 5.0SMLJ 12CA 1213.314.71019.92528005BEP 5.0SMLJ 13CA 1314.415.91021.52335005BEQ 5.0SMLJ 14CA 1415.617.21023.22162005BER 5.0SMLJ 15CA 1516.718.5124.42051005BES 5.0SMLJ 16CA 1617.819.7126193505BET 5.0SMLJ 17CA 1718.920.9127.6181205BEU 5.0SMLJ 18CA 182022.1129.2172105BEV 5.0SMLJ 20CA 2022.224.5132.415555BEW 5.0SMLJ 22CA 2224.426.9135.514155BEX 5.0SMLJ 24CA 2426.729.5138.912955BEZ 5.0SMLJ 26CA 2628.931.9142.111955BFE 5.0SMLJ 28CA 2831.134.4145.411055BFG 5.0SMLJ 30CA 3033.336.8148.410355BFK 5.0SMLJ 33CA 3336.740.6153.393.955BFM 5.0SMLJ 36CA 364044.2158.186.155BFP 5.0SMLJ 40CA 4044.449.1164.577.655BFR 5.0SMLJ 43CA 4347.852.8169.472.155BFT 5.0SMLJ 45CA455055.3172.768.855BFVPART NUMBERREVERSE STAND- OFF VOLTAGE V RWM (V)BREAKDOWN VOLTAGEV BR (V)MIN.@IT BREAKDOWNVOLTAGE V BR (V)MAX.@ITTEST CURRENT I T (mA)PEAK PULSE CURRENT Ipp (A)DEVICE MARKING CODE TMMicro Commercial Components5.0SMLJ11C A~5.0SMLJ 45C AFor Bidirectional type having Vrwm of 20 volts and less,the Ir limit is double.www.mccsemi .com3 of 4Revision: 1 2006/10/18Revision: 12006/10/18Micro Commercial Componentswww.mccsemi .com4 of 4products are represented on our website, harmless against all damages.***APPLICATIONS DISCLAIMER******IMPORTANT NOTICE***Aerospace or Military Applications.Products offer by Micro Commercial Components Corp .are not intended for use in Medical,Micro Commercial Components Corp .reserve s the right to make changes without further notice to any product herein to make corrections, modifications , enhancements , improvements , or other changes .Micro Commercial Components Corp .does not assume any liability arising out of the application or use of any product described herein; neither does it convey any license under its patent rights ,nor the rights of others . The user of products in such applications shall assume all risks of such use and will agree to hold Micro Commercial Components Corp .and all the companies whose。

LM22676中文资料

November 21, 2008 LM226763A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Precision EnableGeneral DescriptionThe LM22676 series of regulators are monolithic integrated circuits which provide all of the active functions for a step-down (buck) switching regulator capable of driving up to 3A loads with excellent line and load regulation characteristics. High efficiency (>90%) is obtained through the use of a low ON-resistance N-channel MOSFET. The series consists of a fixed 5V output and an adjustable version.The SIMPLE SWITCHER® concept provides for an easy to use complete design using a minimum number of external components and National’s WEBENCH® design tool. National’s WEBENCH® tool includes features such as exter-nal component calculation, electrical simulation, thermal sim-ulation, and Build-It boards for easy design-in. The switching clock frequency is provided by an internal fixed frequency os-cillator which operates at 500 kHz. The LM22676 series also has built in thermal shutdown, current limiting and an enable control input that can power down the regulator to a low 25µA quiescent current standby condition.Features■Wide input voltage range: 4.5V to 42V■Internally compensated voltage mode control■Stable with low ESR ceramic capacitors■120 mΩ N-channel MOSFET TO-263 THIN package■100 mΩ N-channel MOSFET PSOP-8 package■Output voltage options:-ADJ (outputs as low as 1.285V)-5.0 (output fixed to 5V)■±1.5% feedback reference accuracy■Switching frequency of 500 kHz■-40°C to 125°C operating junction temperature range■Precision enable pin■Integrated boot diode■Integrated soft-start■Fully WEBENCH® enabled■Step-down and inverting buck-boost applications Package■PSOP-8 (Exposed Pad)■TO-263 THIN (Exposed Pad)Applications■Industrial Control■Telecom and Datacom Systems■Embedded Systems■Automotive Telematics and Body Electronics■Conversions from Standard 24V, 12V and 5V Input RailsSimplified Application Schematic30076501© 2008 National Semiconductor LM22676 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Precision EnableConnection Diagrams300765408-Lead Plastic PSOP-8 Package NS Package Number MRA08B300765027-Lead Plastic TO-263 THIN PackageNS Package Number TJ7AOrdering InformationOutput VoltageOrder Number Package Type NSC Package DrawingSupplied As ADJ LM22676MR-ADJ PSOP-8 Exposed PadMRA08B95 Units in Rails ADJ LM22676MRE-ADJ 250 Units in Tape and Reel ADJ LM22676MRX-ADJ 2500 Units in Tape and Reel ADJ LM22676TJE-ADJ TO-263 THIN Exposed PadTJ7A250 Units in Tape and Reel ADJ LM22676TJ-ADJ 1000 Units in Tape and Reel5.0LM22676MR-5.0PSOP-8 Exposed PadMRA08B95 Units in Rails 5.0LM22676MRE-5.0250 Units in Tape and Reel 5.0LM22676MRX-5.02500 Units in Tape and Reel 5.0LM22676TJE-5.0TO-263 THIN Exposed PadTJ7A250 Units in Tape and Reel 5.0LM22676TJ-5.01000 Units in Tape and Reel 2L M 22676Pin DescriptionsPin Numbers PSOP-8Package Pin NumbersTO-263 THINPackageName Description Application Information13BOOT Bootstrap input Provides the gate voltage for the high side NFET.2, 35NC Not Connected Pins are not electrically connected inside the chip. Pins dofunction as thermal conductor.46FB Feedback pin Inverting input to the internal voltage error amplifier.57EN Precision enable pin When pulled low regulator turns off.64GND System ground Provide good capacitive decoupling between VIN and thispin72VIN Source input voltage Input to the regulator. Operates from 4.5V to 42V.81SW Switch pin Attaches to the switch nodeLM22676Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.VIN to GND 43VEN Pin Voltage-0.5V to 6V SW to GND (Note 2)-5V to V IN BOOT Pin Voltage V SW + 7V FB Pin Voltage -0.5V to 7V Power DissipationInternally LimitedJunction Temperature 150°CSoldering Information Infrared (5 sec.)260°CESD Rating (Note 3) Human Body Model±2 kVStorage Temperature Range -65°C to +150°COperating Ratings(Note 1)Supply Voltage (V IN )4.5V to 42V Junction Temperature Range-40°C to +125°CElectrical CharacteristicsLimits in standard type are for T J = 25°C only; limits in boldface type apply over thejunction temperature (T J ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T A = T J = 25°C, and are provided for reference purposes only. Unless otherwise specified: V IN = 12V.Symbol ParameterConditionsMin (Note 5)Typ (Note 4)Max (Note 5)UnitsLM22676-5.0V FBFeedback VoltageV IN = 8V to 42V4.925/4.95.05.075/5.1VLM22676-ADJV FB Feedback Voltage V IN = 4.7V to 42V 1.266/1.2591.285 1.304/1.311V All Output Voltage VersionsI Q Quiescent Current V FB = 5V 3.46mA I STDBY Standby Quiescent Current EN Pin = 0V 2540µA I CL Current Limit3.4/3.354.25.3/5.5A I L Output Leakage Current V IN = 42V, EN Pin = 0V, V SW = 0V 0.22µA V SW = -1V0.13µA R DS(ON)Switch On-Resistance TO-263 THIN Package 0.120.16/0.22ΩPSOP-8 Package 0.100.16/0.20f O Oscillator Frequency 400500600kHz T OFFMIN Minimum Off-time 300 ns T ONMIN Minimum On-time100 ns I BIAS Feedback Bias Current V FB = 1.3V (ADJ Version Only) 230 nA V EN Enable Threshold Voltage1.3 1.6 1.9V I EN Enable Input Current EN Input = 0V 6 µA T SD Thermal Shutdown Threshold150 °C θJA Thermal Resistance TJ Junction to ambient temperature resistance (Note 6)22 °C/W θJAThermal ResistanceMR Package, Junction to ambient temperature resistance (Note 7)60°C/W 4L M 22676Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the recommended Operating Ratings is not implied. The recommended Operating Ratings indicate conditions at which the device is functional and should not be operated beyond such conditions.Note 2:The absolute maximum specification of the ‘SW to GND’ applies to DC voltage. An extended negative voltage limit of -10V applies to a pulse of up to 50ns.Note 3:ESD was applied using the human body model, a 100 pF capacitor discharged through a 1.5 k Ω resistor into each pin.Note 4:Typical values represent most likely parametric norms at the conditions specified and are not guaranteed.Note 5:Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).Note 6:The value of θJA for the TO-263 THIN (TJ) package of 22°C/W is valid if package is mounted to 1 square inch of copper. The θJA value can range from 20 to 30°C/W depending on the amount of PCB copper dedicated to heat transfer. See application note AN-1797 for more information.Note 7:The value of θJA for the PSOP-8 exposed pad (MR) package of 60°C/W is valid if package is mounted to 1 square inch of copper. The θJA value can range from 42 to 115°C/W depending on the amount of PCB copper dedicated to heat transfer.Typical Performance CharacteristicsUnless otherwise specified the following conditions apply: Vin =12V, T J = 25°C.Efficiency vs I OUT and V INV OUT = 3.3V30076527Normalized Switching Frequency vs Temperature30076504Current Limit vs Temperature30076503Normalized R DS(ON) vs Temperature30076508LM22676Feedback Bias Current vs Temperature30076505Normalized Enable Threshold Voltage vs Temperature30076510Standby Quiescent Current vs Input Voltage 30076506Normalized Feedback Voltage vs Temperature30076507Normalized Feedback Voltage vs Input Voltage30076509 6L M 22676Typical Application Circuit and Block Diagram30076514FIGURE 1. 3.3V VOUT, 3A LM22676Detailed Operating DescriptionThe LM22676 switching regulator features all of the functions necessary to implement an efficient high voltage buck regu-lator using a minimum of external components. This easy to use regulator integrates a 42V N-Channel switch with an out-put current capability of 3A. The regulator control method is based on voltage mode control with input voltage feed for-ward. The loop compensation is integrated into the LM22676so that no external compensation components need to be se-lected or utilized. Voltage mode control offers short minimum on-times allowing short duty-cycles necessary in high input voltage applications. The operating frequency is fixed at 500kHz to allow for small external components while avoiding excessive switching losses. The output voltage can be set as low as 1.285V with the -ADJ device. Fault protection features include current limiting, thermal shutdown and remote shut-down capability. The device is available in the TO-263 THIN and PSOP-8 packages featuring an exposed pad to aid ther-mal dissipation.The functional block diagram with typical application of the LM22676 are shown in Figure 1.The internal compensation of the -ADJ option of the LM22676is optimized for output voltages up to 5V. If an output voltage of 5V or higher is needed, the -5.0 fixed output voltage option with an additional external resistive feedback voltage divider may also be used.Precision EnableThe precision enable pin (EN) can be used to shut down the power supply. Connecting this pin to ground or to a voltage less than typical 1.6V will completely turn off the regulator.The current drain from the input supply when off is typically 25 µA with 12V input voltage. The power consumed during this off state is mostly defined by an internal 2 M Ω resistor to VIN. The enable pin has an internal pull-up current source of approximately 6 µA. When driving the enable pin, the high voltage level for the on condition should not exceed the 6V absolute maximum limit. When enable control is not required,the EN pin should be left floating. The precision feature en-ables simple sequencing of multiple power supplies with a resistor divider from another power supply.Maximum Duty-Cycle / Dropout VoltageThe typical maximum duty-cycle is 85% at 500 kHz switching frequency. This corresponds to a typical minimum off-time of 300 ns. When operating at switching frequencies higher than 500 kHz, the 300 ns minimum off-time results in a lower max-imum duty-cycle limit than 85%. This forced off-time is impor-tant to provide enough time for the Cboot capacitor to charge during each cycle.The lowest input voltage required to maintain operation is:Where V D is the forward voltage drop across the re-circulating Schottky diode and V Q is the voltage drop across the internal power N-FET of the LM22676. The R DS(ON) of the FET is specified in the electrical characteristics section of this datasheet to calculate V Q according to the FET current. F is the switching frequency.Minimum Duty-CycleBesides a minimum off-time, there is also a minimum on-time which will take effect when the output voltage is adjusted very low and the input voltage is very high. Should the operation require a shorter minimum on-time than the typical 100 ns,individual switching pulses will be skipped.where D is the duty-cycle.Current LimitWhen the power switch turns on, the slight capacitance load-ing of the Schottky diode, D1, causes a leading-edge current spike with an extended ringing period. This spike can cause the current limit comparator to trip prematurely. A leading edge blanking time (T BLK ) of 110 ns (typical) is used to avoid sampling the spike.When the switch current reaches the current limit threshold,the switch is immediately turned off and the internal switching frequency is reduced. This extends the off time of the switch to prevent a steady state high current condition. As the switch current falls below the current limit threshold, the switch cur-rent will attempt to turn on. If a load fault continues, the switch will again exceed the threshold and turn off. This will result in a low duty-cycle pulsing of the power switch to minimize the overall fault condition power dissipation.The switching frequency will reduce (fold back) if the overload condition causes the output voltage to be 72.4% (typical) of the adjusted output voltage.The current limit will only protect the inductor from a runaway condition if the LM22676 is operating in its safe operating area. A runaway condition of the inductor is potentially catas-trophic to the application. For every design, the safe operating area needs to be calculated. Factors in determining the safe operating area are the switching frequency, input voltage,output voltage, minimum on-time and feedback voltage dur-ing an over current condition.As a first pass check, if the following equation holds true, a given design is considered in a safe operating area and the current limit will protect the circuit:V IN x T BLK x F < V OUT x 0.724If the equation above does not hold true, the following sec-ondary equation will need to hold true to be in safe operating area:If both equations do not hold true, a particular design will not have an effective current limit function which might damage the circuit during startup, over current conditions, or steady state over current and short circuit condition. Oftentimes a reduction of the maximum input voltage will bring a design into the safe operating area.Soft-StartThe soft-start feature allows the regulator to gradually reach the initial steady state operating point, thus reducing start-up stresses and surges. The soft-start is fixed to 500 µs (typical)start-up time and cannot be modified.8L M 22676Boot PinThe LM22676 integrates an N-Channel FET switch and as-sociated floating high voltage level shift / gate driver. This gate driver circuit works in conjunction with an internal diode and an external bootstrap capacitor. A 0.01 µF ceramic capacitor connected with short traces between the BOOT pin and the SW pin is recommended to effectively drive the internal FET switch. During the off-time of the switch, the SW voltage is approximately -0.5V and the external bootstrap capacitor is charged from the internal supply through the internal boot-strap diode. When operating with a high PWM duty-cycle, the buck switch will be forced off each cycle to ensure that the bootstrap capacitor is recharged. See the maximum duty-cy-cle section for more details.Thermal ProtectionInternal Thermal Shutdown circuitry protects the LM22676 in the event the maximum junction temperature is exceeded.When activated, typically at 150°C, the regulator is forced into a low power reset state. There is a typical hysteresis of 15degrees.Internal CompensationThe LM22676 has internal compensation designed for a sta-ble loop with a wide range of external power stage compo-nents.Insuring stability of a design with a specific power stage (in-ductor and output capacitor) can be tricky. The LM22676stability can be verified over varying loads and input and out-put voltages using WEBENCH® Designer online circuit sim-ulation tool at . A quick start spreadsheet can also be downloaded from the online product folder.The internal compensation of the -ADJ option of the LM22676is optimized for output voltages below 5V. If an output voltage of 5V or higher is needed, the -5.0 option with an additional external resistor divider may also be used.The typical location of the internal compensation poles and zeros as well as the DC gain is given in Table 1. The LM22676has internal type III compensation allowing for the use of most output capacitors including ceramics.This information can be used to calculate the transfer function from the FB pin to the internal compensation node (input to the PWM comparator in the block diagram).TABLE 1.Corners Frequency Pole 1150 kHz Pole 2250 kHz Pole 3100 Hz Zero 1 1.5 kHz Zero 215 kHz DC gain37.5 dBFor the power stage transfer function the standard voltage mode formulas for the double pole and the ESR zero apply:The peak ramp level of the oscillator signal feeding into the PWM comparator is V IN /10 which equals a gain of 20dB of this modulator stage of the IC. The -5.0 fixed output voltage option has twice the gain of the compensation transfer func-tion compared to the -ADJ option which is 43.5dB instead of 37.5dB.Generally, calculation as well as simulation can only aid in selecting good power stage components. A good design prac-tice is to test for stability with load transient tests or loop measurement tests. Application note AN-1889 shows how to easily perform a loop transfer function measurement with only an oscilloscope and a function generator.Application InformationEXTERNAL COMPONENTSThe following design procedures can be used to design a non-synchronous buck converter with the LM22676.InductorThe inductor value is determined based on the load current,ripple current, and the minimum and maximum input voltage.To keep the application in continuous current conduction mode (CCM), the maximum ripple current, I RIPPLE , should be less than twice the minimum load current.The general rule of keeping the inductor current peak-to-peak ripple around 30% of the nominal output current is a good compromise between excessive output voltage ripple and ex-cessive component size and cost. When selecting the induc-tor ripple current ensure that the peak current is below the minimum current limit as given in the Electrical Characteris-tics section. Using this value of ripple current, the value of inductor, L, is calculated using the following formula:where F is the switching frequency which is 500 kHz (typical).This procedure provides a guide to select the value of the inductor L. The nearest standard value will then be used in the circuit.Increasing the inductance will generally slow down the tran-sient response but reduce the output voltage ripple amplitude.Reducing the inductance will generally improve the transient response but increase the output voltage ripple.The inductor must be rated for the peak current, I PK+, to pre-vent saturation. During normal loading conditions, the peak current occurs at maximum load current plus maximum ripple.Under an overload condition as well as during load transients,the peak current is limited to 4.2A typical (5.5A maximum).This requires that the inductor be selected such that it can run at the maximum current limit and not only the steady state current.Depending on inductor manufacturer, the saturation rating is defined as the current necessary for the inductance to reduce by 30% at 20°C. In typical designs the inductor will run at higher temperatures. If the inductor is not rated for enough current, it might saturate and due to the propagation delay of the current limit circuitry, the power supply may get damaged.Input CapacitorGood quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the switch cur-rent during on-time. When the switch turns on, the current into the VIN pin steps to the peak value, then drops to zero at turn-9LM22676off. The average current into VIN during switch on-time is theload current. The input capacitance should be selected forRMS current, IRMS, and minimum ripple voltage. A good ap-proximation for the required ripple current rating necessary isIRMS> IOUT/ 2.Quality ceramic capacitors with a low ESR should be selectedfor the input filter. To allow for capacitor tolerances and volt-age effects, multiple capacitors may be used in parallel. If stepinput voltage transients are expected near the maximum rat-ing of the LM22676, a careful evaluation of ringing and pos-sible voltage spikes at the VIN pin should be completed. Anadditional damping network or input voltage clamp may berequired in these cases.Usually putting a higher ESR electrolytic input capacitor inparallel to the low ESR bypass capacitor will help to reduceexcessive voltages during a line transient and will also movethe resonance frequency of the input filter away from the reg-ulator bandwidth.Output CapacitorThe output capacitor can limit the output ripple voltage andprovide a source of charge for transient loading conditions.Multiple capacitors can be placed in parallel. Very low ESRcapacitors such as ceramic capacitors reduce the output rip-ple voltage and noise spikes, while larger higher ESR capac-itors in parallel provide large bulk capacitance for transientloading conditions. An approximation for the output voltageripple is:where ΔILis the inductor ripple current.Cboot CapacitorThe bootstrap capacitor between the BOOT pin and the SWpin supplies the gate current to turn on the N-channel MOS-FET. The recommended value of this capacitor is 10 nF andshould be a good quality, low ESR ceramic capacitor.It is possible to put a small resistor in series with the Cbootcapacitor to slow down the turn-on transition time of the in-ternal N-channel MOSFET. Resistors in the range of 10Ω to50Ω can slow down the transition time. This can reduce EMIof a switched mode power supply circuit. Using such a seriesresistor is not recommended for every design since it will in-crease the switching losses of the application and makesthermal considerations more challenging.Resistor DividerFor the -5.0 option no resistor divider is required for 5V outputvoltage. The output voltage should be directly connected tothe FB pin. Output voltages above 5V can use the -5.0 optionwith a resistor divider as an alternative to the -ADJ option.This may offer improved loop bandwidth in some applications.See the Internal Compensation section for more details.For the -ADJ option no resistor divider is required for 1.285Voutput voltage. The output voltage should be directly con-nected to the FB pin. Other output voltages can use the -ADJoption with a resistor divider.The resistor values can be determined by the following equa-tions:-ADJ option:-5.0 option:Where VFB= 1.285V typical for the -ADJ option and 5V for the-5.0 option30076523FIGURE 2. Resistive Feedback DividerA maximum value of 10 kΩ is recommended for the sum ofR1 and R2 to keep high output voltage accuracy for the –ADJoption. A maximum of 2 kΩ is recommended for the -5.0 out-put voltage option. For the 5V fixed output voltage option, thetotal internal divider resistance is typically 9.93 kΩ.At loads less than 5 mA, the boot capacitor will not holdenough charge to power the internal high side driver. Theoutput voltage may droop until the boot capacitor isrecharged. Selecting a total feedback resistance to be below3 kΩ will provide some minimal load and can keep the outputvoltage from collapsing in such low load conditions.Catch DiodeA Schottky type re-circulating diode is required for allLM22676 applications. Ultra-fast diodes which are not Schot-tky diodes are not recommended and may result in damageto the IC due to reverse recovery current transients. The nearideal reverse recovery characteristics and low forward volt-age drop of Schottky diodes are particularly important diodecharacteristics for high input voltage and low output voltageapplications common to the LM22676. The reverse recoverycharacteristic determines how long the current surge lastseach cycle when the N-channel MOSFET is turned on. Thereverse recovery characteristics of Schottky diodes mini-mizes the peak instantaneous power in the switch occurringduring turn-on for each cycle. The resulting switching lossesare significantly reduced when using a Schottky diode. Thereverse breakdown rating should be selected for the maxi-mum VIN, plus some safety margin. A rule of thumb is to selecta diode with the reverse voltage rating of 1.3 times the max-imum input voltage.The forward voltage drop has a significant impact on the con-version efficiency, especially for applications with a low outputvoltage. ‘Rated’ current for diodes varies widely from variousmanufacturers. The worst case is to assume a short circuitload condition. In this case the diode will carry the output cur-rent almost continuously. For the LM22676 this current canbe as high as 4.2A (typical). Assuming a worst case 1V drop 10LM22676across the diode, the maximum diode power dissipation can be as high as 4.2W.Circuit Board LayoutBoard layout is critical for switching power supplies. First, the ground plane area must be sufficient for thermal dissipation purposes. Second, appropriate guidelines must be followed to reduce the effects of switching noise. Switch mode con-verters are very fast switching devices. In such devices, the rapid increase of input current combined with the parasitic trace inductance generates unwanted L di/dt noise spikes. The magnitude of this noise tends to increase as the output current increases. This parasitic spike noise may turn into electromagnetic interference (EMI) and can also cause prob-lems in device performance. Therefore, care must be taken in layout to minimize the effect of this switching noise.The most important layout rule is to keep the AC current loops as small as possible. Figure 3 shows the current flow of a buck converter. The top schematic shows a dotted line which rep-resents the current flow during the FET switch on-state. The middle schematic shows the current flow during the FET switch off-state.The bottom schematic shows the currents referred to as AC currents. These AC currents are the most critical since current is changing in very short time periods. The dotted lines of the bottom schematic are the traces to keep as short as possible. This will also yield a small loop area reducing the loop induc-tance. To avoid functional problems due to layout, review the PCB layout example. Providing 3A of output current in a very low thermal resistance package such as the TO-263 THIN is challenging considering the trace inductances involved. Best results are achieved if the placement of the LM22676, the by-pass capacitor, the Schottky diode and the inductor are placed as shown in the example. It is also recommended to use 2oz copper boards or thicker to help thermal dissipation and to reduce the parasitic inductances of board traces.It is very important to ensure that the exposed DAP on the TO-263 THIN package is soldered to the ground area of the PCB to reduce the AC trace length between the bypass ca-pacitor ground and the ground connection to the LM22676. Not soldering the DAP to the board may result in erroneous operation due to excessive noise on the board.30076524FIGURE 3. Current Flow in a Buck ApplicationThermal ConsiderationsThe two highest power dissipating components are the re-circulating diode and the LM22676 regulator IC. The easiestmethod to determine the power dissipation within theLM22676 is to measure the total conversion losses (Pin –Pout) then subtract the power losses in the Schottky diodeand output inductor. An approximation for the Schottky diodeloss is:P = (1 - D) x IOUTx VDAn approximation for the output inductor power is:P = IOUT2 x R x 1.1,where R is the DC resistance of the inductor and the 1.1 factoris an approximation for the AC losses. The regulator has anexposed thermal pad to aid power dissipation. Adding severalvias under the device to the ground plane will greatly reducethe regulator junction temperature. Selecting a diode with anexposed pad will aid the power dissipation of the diode. Themost significant variables that affect the power dissipated bythe LM22676 are the output current, input voltage and oper-ating frequency. The power dissipated while operating nearthe maximum output current and maximum input voltage canbe appreciable. The junction-to-ambient thermal resistance ofthe LM22676 will vary with the application. The most signifi-cant variables are the area of copper in the PC board, thenumber of vias under the IC exposed pad and the amount offorced air cooling provided. The integrity of the solder con-nection from the IC exposed pad to the PC board is critical.Excessive voids will greatly diminish the thermal dissipationcapacity. The junction-to-ambient thermal resistance of theLM22676 TO-263 THIN and PSOP-8 packages are specifiedin the electrical characteristics table under the applicable con-ditions. For more information regarding the TO-263 THINpackage, refer to Application Note AN-1797 at.LM22676。

PSD03_03中文资料

PSD03thruPSD24CST ANDARD CAP ACIT ANCE TVS ARRA YOnly One Name Means ProTek’Tion™APPLICA TIONS✔ Laptop Computers✔ Cellular Phones ✔ Digital Cameras✔ Personnal Digital Assistant (PDA)IEC COMP A TIBILITY (EN61000-4)✔ 61000-4-2 (ESD): Air - 15kV , Contact - 8kV ✔ 61000-4-4 (EFT): 40A - 5/50ns✔ 61000-4-5 (Surge): 24A, 8/20µs - Level 2(Line-Ground) & Level 3(Line-Line)FEA TURES✔ Unidirectional: 500 Watts Peak Pulse Power per Line (tp = 8/20µs)✔ BidirectionalL 400 Watts Peak Pulse Power per Line (tp = 8/20µs)✔ Unidirectional & Bidirectional Configurations ✔ Replacement for MLV (0805)✔ Protects One Power or I/O Port ✔ ESD Protection > 40 kilovolts ✔ Low Clamping Voltage✔ Available in Multiple Voltage Types Ranging from 3V to 24V MECHANICAL CHARACTERISTICS✔ Molded JEDEC SOD-323✔ Weight 10 milligrams (Approximate)✔ Flammability Rating UL 94V-0✔ 8mm Tape and Reel Per EIA Standard 481✔ Device Marking: Marking Code & Polarity Band (Unidirectional Only)05118PIN CONFIGURA TIONSSOD-323UNIDIRECTIONALBIDIRECTIONALPSD24CDEVICE CHARACTERISTICSMAXIMUM RATINGS @ 25°C Unless Otherwise SpecifiedUndirectional: Peak Pulse Power (t p = 8/20µs) - See Fig. 1Operating T emperature SYMBOL VALUE -55°C to 150°C°C°C -55°C to 150°C Watts UNITS 500T J P PP T STGPARAMETERStorage T emperatureBidirectional: Peak Pulse Power (t p = 8/20µs) - See Fig. 1Watts 400P PP Note 1: Part numbers with an additional “C” suffix are bidirectional devices, i.e., PSD05C.Note 2: For Bidirectional Devices Only: Electrical characteristics apply in both directions.ELECTRICAL CHARACTERISTICS PER LINE @ 25°C Unless Otherwise SpecifiedPART NUMBER (See Notes 1-2)DEVICE MARKINGMINIMUM BREAKDOWN VOLTAGE@ 1mA V (BR)VOLTS MAXIMUM CLAMPING VOLTAGE (See Fig. 2)@ I P = 1AV C VOLTS MAXIMUM CLAMPING VOLTAGE (See Fig. 2)@8/20µs V C @ I PP TYPICAL CAPACITANCE@0V , 1 MHzC J pFPSD03PSD03C PSD05PSD05C PSD08PSD08C PSD12PSD12C PSD15PSD15C PSD18PSD18C PSD24PSD24C PSD36PSD36CA GB HC JD KE L G NF M R T4.04.06.06.08.58.513.313.316.716.720.020.026.726.740.040.06.57.09.89.813.413.419.019.024.024.029.029.043.043.060.060.010.9V @ 43.0A 10.9V @ 39.0A 13.5V @ 42.0A 14.5V @ 28.0A 16.9V @ 34.0A 18.5V @ 17.0A 25.9V @ 21.0A 29.5V @ 14.0A 30.0V @ 17.0A 33.0V @ 12.0A 40.0V @ 9.0A 40.0V @ 9.0A 49.0V @ 12.0A 46.2V @ 9.0A 75.0V @ 5.0A 75.0V @ 5.0A5002003501752501501505010040904088407535MAXIMUM LEAKAGE CURRENT@V WMI D µA 125125101010101111111111RATED ST AND-OFF VOLTAGEV WM VOLTS3.33.35.05.08.08.012.012.015.015.018.018.024.024.036.036.0PSD24CFIGU RE 50 1 2 3 4 5 6V R - Reverse Voltage - VoltsC - C a p a c i t a n c e - p F100200300400FIGU RE 2FIGU RE 1PEAK PULSE POWER VS PULSE TIME0.01 1 10 100 1,000 10,000t d - Pulse Duration - µs0 5 10 15 20 25 30t - Time - µs20406080100120I P P - P e a kP u l s e C u r r e n t - % o f I P P101001,00010,000P P P - P e ak P u l s e C u r r e n t - W a t t sGRAPHSFIGU RE 4OVERSHOOT & CLAMPING VOLTAGE FOR PSD03ESD Test Pulse: 25 kilovolt, 1/30ns (waveform)5 V o l t s p e r D i v i s i o n-55152535T L - Lead Temperature - °C20406080100% O f R a t e d P o w e rFIGU RE 3PSD24CCOPYRIGHT © ProTek Devices 2003SPECIFICATIONS: ProT ek reserves the right to change the electrical and or mechanical characteristics described herein without notice (except JEDEC).DESIGN CHANGES: ProT ek reserves the right to discontinue product lines without notice, and that the final judgement concerning selection and specifications is the buyer’s and that in furnishing engineering and technical assistance, ProTek assumes no responsibility with respect to the selection or specifications of such products.P ACKAGE OUTLINE & DIMENSIONSProTek Devices2929 South Fair Lane, Tempe, AZ 85282Tel: 602-431-8101 Fax: 602-431-2288E-Mail: sales@ Web Site: 。

6N134中文资料

6N134中⽂资料FeaturesDual Marked with Device Part Number and DSCC Drawing NumberManufactured and Tested on a MIL-PRF-38534 Certified LineQML-38534, Class H and K Five Hermetically Sealed Package Configurations Performance Guaranteed over -55°C to +125°C ? High Speed: 10 M Bit/sCMR: > 10,000 V/µs Typical 1500 Vdc Withstand Test Voltage2500 Vdc Withstand Test Voltage for HCPL-565X High Radiation Immunity 6N137, HCPL-2601, HCPL-2630/-31 Function Compatibility ? Reliability DataTTL Circuit CompatibilityApplicationsMilitary and SpaceHigh Reliability SystemsTransportation, Medical, and Life Critical SystemsLine ReceiverVoltage Level ShiftingIsolated Input Line Receiver Isolated Output Line Driver Logic Ground Isolation Harsh Industrial EnvironmentsIsolation for Computer,Communication, and Test Equipment SystemsDescriptionThese units are single, dual and quad channel, hermetically sealed optocouplers. The products are capable of operation and storage over the full military temperature range and can be purchased as either standard product or with full MIL-PRF-38534 Class Level H or K testing or from the appropri-ate DSCC Drawing. All devices are manufactured and tested on a MIL-PRF-38534 certified line and are included in the DSCC Quali-fied Manufacturers List QML-38534 for Hybrid Microcircuits.Quad channel devices areavailable by special order in the 16 pin DIP through hole packages.Truth Table(Positive Logic)Multichannel DevicesInput Output On (H)L Off (L)HFunctional DiagramMultiple Channel Devices AvailableSingle Channel DIP Input Enable Output On (H)H L Off (L)H H On (H)L H Off (L)LH*See matrix for available extensions.Hermetically Sealed, High Speed,High CMR, Logic Gate Optocouplers Technical Data6N134*81028HCPL-563X HCPL-663X HCPL-565X 5962-98001HCPL-268K HCPL-665X 5962-90855HCPL-560XCAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.V CC V OUTV E GNDThe connection of a 0.1 µF bypass capacitor between V CC and GND is recommended.Selection Guide–Package Styles and Lead Configuration OptionsPackage16 Pin DIP 8 Pin DIP 8 Pin DIP 8 Pin DIP 16 Pin Flat Pack 20 Pad LCCC Lead Style Through Hole Through Hole Through Hole Through Hole Unformed Leads Surface MountChannels 212242Common Channel V CC , GND None V CC , GND V CC , GND V CC , GND None WiringWithstand Test Voltage 1500 Vdc 1500 Vdc 1500 Vdc 2500 Vdc 1500 Vdc 1500 Vdc Agilent Part # & Options Commercial6N134*HCPL-5600HCPL-5630HCPL-5650HCPL-6650HCPL-6630MIL-PRF-38534, Class H 6N134/883BHCPL-5601HCPL-5631HCPL-5651HCPL-6651HCPL-6631MIL-PRF-38534, Class K HCPL-268K HCPL-560K HCPL-563K HCPL-665K HCPL-663K Standard Lead Finish Gold Plate Gold Plate Gold Plate Gold Plate Gold PlateSolder PadsSolder Dipped Option #200Option #200Option #200Option #200Butt Cut/Gold Plate Option #100Option #100Option #100Gull Wing/Soldered Option #300Option #300Option #300Class H SMD Part #Prescript for all below None 5962-None None None None Either Gold or Solder 8102801EX 9085501HPX 8102802PX 8102805PX 8102804FX 81028032XGold Plate 8102801EC 9085501HPC 8102802PC 8102805PC 8102804FCSolder Dipped 8102801EA 9085501HPA 8102802PA 8102805PA81028032A Butt Cut/Gold Plate 8102801UC 9085501HYC 8102802YC Butt Cut/Soldered 8102801UA 9085501HYA 8102802YA Gull Wing/Soldered 8102801TA 9085501HXA8102802ZA Class K SMD Part #Prescript for all below 5962-5962-5962-5962-5962-Either Gold or Solder 9800101KEX 9085501KPX 9800102KPX 9800104KFX 9800103K2XGold Plate 9800101KEC 9085501KPC 9800102KPC 9800104KFCSolder Dipped 9800101KEA 9085501KPA 9800102KPA 9800103K2AButt Cut/Gold Plate 9800101KUC 9085501KYC 9800102KYC Butt Cut/Soldered 9800101KUA 9085501KYA 9800102KYA Gull Wing/Soldered9800101KTA 9085501KXA 9800102KZA*JEDEC registered part.Each channel contains a GaAsP light emitting diode which isoptically coupled to an integrated high speed photon detector. The output of the detector is an open collector Schottky clamped transistor. Internal shields provide a guaranteed common mode transient immunityspecification of 1000 V/µs. For Isolation Voltage applications requiring up to 2500 Vdc, the HCPL-5650 family is also available. Package styles for these parts are 8 and 16 pin DIP through hole (case outlines P andE respectively), and 16 pin surface mount DIP flat pack(case outline F), leadless ceramic chip carrier (case outline 2).Devices may be purchased with a variety of lead bend and plating options. See Selection Guide Table for details. Standard Microcircuit Drawing (SMD)parts are available for each package and lead style.Because the same electrical die (emitters and detectors) are used for each channel of each device listed in this data sheet, absolute maximum ratings, recommended operating conditions, electrical specifications, and performance characteristics shown in the figures are identical for all parts.Occasional exceptions exist due to package variations and limitations,and are as noted. Additionally, the same package assembly processes and materials are used in all devices. These similarities give justification for the use of data obtained from one part torepresent other parts’ performance for reliability and certain limited radiation test results.Outline Drawings16 Pin DIP Through Hole, 2 ChannelsFunctional DiagramsNote: All DIP and flat pack devices have common V CC and ground. Single channel DIP has an enable pin 7. LCCC (leadless ceramic chip carrier) package has isolated channels with separate VCC and ground connections. All diagrams are “top view.”Leaded Device MarkingLeadless Device MarkingNOTE: DIMENSIONS IN MILLIMETERS (INCHES).COMPLIANCE INDICATOR,*DATE CODE, SUFFIX (IF NEEDED)COUNTRY OF MFR.Agilent CAGE CODE*Agilent DESIGNATORDSCC SMD*PIN ONE/ ESD IDENTAgilent P/N DSCC SMD** QUALIFIED PARTS ONLYCOMPLIANCE INDICATOR,*DATE CODE, SUFFIX (IF NEEDED)DSCC SMD*Agilent CAGE CODE*Agilent DESIGNATORCOUNTRY OF MFR.Agilent P/N PIN ONE/ ESD IDENTDSCC SMD** QUALIFIED PARTS ONLYOutline Drawings (continued)16 Pin Flat Pack, 4 Channels8 Pin DIP Through Hole, 2 Channels 2500 Vdc Withstand Test Voltage20 Terminal LCCC Surface Mount,2Channels8 Pin DIP Through Hole, 1 and 2 Channels0.36 (0.014)NOTE: DIMENSIONS IN MILLIMETERS (INCHES).2.29 (0.090) 2.79 (0.110)NOTE: DIMENSIONS IN MILLIMETERS (INCHES).NOTE: DIMENSIONS IN MILLIMETERS (INCHES).NOTE: DIMENSIONS IN MILLIMETERS (INCHES). SOLDER THICKNESS 0.127 (0.005) MAX.Hermetic Optocoupler OptionsRecommended Operating ConditionsParameterSymbol Min.Max.Units Input Current, Low Level, Each Channel I FL 0250µA Input Current, High Level, Each Channel*I FH 1020mA Supply Voltage, OutputV CC 4.55.5VFan Out (TTL Load) Each ChannelN6*Meets or exceeds DSCC SMD and JEDEC requirements.Absolute Maximum Ratings(No derating required up to +125°C)Storage Temperature Range, T S ...................................-65°C to +150°C Operating Temperature, T A..........................................-55°C to +125°C Case Temperature, T C ................................................................+170°C Junction Temperature, T J ...........................................................+175°C Lead Solder Temperature ...............................................260°C for 10 s Peak Forward Input Current, I F PK , (each channel,≤1 ms duration)......................................................................40 mA Average Input Forward Current, I F AVG (each channel)................20 mA Input Power Dissipation (each channel).....................................35 mW Reverse Input Voltage, V R (each channel).........................................5 V Supply Voltage, V CC (1 minute maximum)........................................7 V Output Current, I O (each channel)...............................................25 mA Output Power Dissipation (each channel). (40)mW Output Voltage, V O (each channel)..................................................7 V*Package Power Dissipation, P D (each channel)........................200 mW*Selection for higher output voltages up to 20 V is available.Single Channel Product OnlyEmitter Input Voltage, V E ...............................................................5.5 VNote enable pin 7. An external 0.01 µF to 0.1 µF bypass capacitor must be connected between V CC and ground for each package type.8 Pin Ceramic DIP Single Channel SchematicESD Classification(MIL-STD-883, Method 3015)HCPL-5600/01/0K ...............................................................(?), Class 16N134, 6N134/883B, HCPL-5630/31/3K, HCPL-5650/51, HCPL-6630/31/3K and HCPL-6650/51/5K.......................(Dot), Class 3Electrical Characteristics (T= -55°C to +125°C, unless otherwise specified)*Identified test parameters for JEDEC registered parts.**All typical values are at V CC = 5 V , T A = 25°C. Recommended Operating Conditions (cont’d.)Single Channel Product Only [10]ParameterSymbol Min.Max.Units High Level Enable Voltage V EH 2.0V CC V Low Level Enable VoltageV EL0.8VElectrical Characteristics, (Contd.) T= -55°C to +125°C unless otherwise specifiedSingle Channel Product Only Low Level I EL V CC = 5.5 V,1, 2, 3-1.45-2.0mA Enable Current V E = 0.5 V High Level V EH 1, 2, 3 2.0V10Enable Voltage Low Level V EL 1, 2, 30.8VEnable Voltage*Identified test parameters for JEDEC registered part.**All typical values are at V CC = 5 V , T A = 25°C.Typical Characteristics, T = 25°C, V = 5 VDual and Quad Channel Product Only Input-Input I I-I 0.5nA Relative Humidity = 45%4Leakage CurrentV I-I = 500 V, t = 5 s Resistance (Input-Input)R I-I 1012V I-I = 500 V 4Capacitance (Input-Input)C I-I0.55pF f = 1 MHz4Notes:1. Each channel.2. All devices are considered two-terminal devices; I I-O is measured between all input leads or terminals shorted together and alloutput leads or terminals shorted together.3. Measured between each input pair shorted together and all output connections for that channel shorted together.4. Measured between adjacent input pairs shorted together for each multichannel device.5. t PHL propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5 V point on the leadingedge of the output pulse. The t PLH propagation delay is measured from the 50% point on the trailing edge of the input pulse to the1.5 V point on the trailing edge of the output pulse.6. The HCPL-6630, HCPL-6631, and HCPL-663K dual channel parts function as two independent single channel units. Use the singlechannel parameter limits for each channel.7. CM L is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state(V O < 0.8 V). CM H is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic high state (V O > 2.0 V).8. This is a momentary withstand test, not an operating condition.9. It is essential that a bypass capacitor (0.01 to 0.1 µF, ceramic) be connected from V CC to ground. Total lead length between bothends of this external capacitor and the isolator connections should not exceed 20 mm.10. No external pull up is required for a high logic state on the enable input.11. The t ELH enable propagation delay is measured from the 1.5 V point on the trailing edge of the enable input pulse to the 1.5 Vpoint on the trailing edge of the output pulse.12. The t EHL enable propagation delay is measured from the 1.5 V point on the leading edge of the enable input pulse tothe 1.5 Vpoint on the leading edge of the output pulse.13. Standard parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD and 883B parts receive 100% testing at 25, 125, and-55°C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).14. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteedto limits specified for all lots not specifically tested.15. Not required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 types.16. Required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 types.17. Not required for HCPL-5650, HCPL-5651 and 8102805 types.18. Required for HCPL-5650, HCPL-5651 and 8102805 types only.Figure 1. High Level Output Currentvs. Temperature.5 VV O * C L INCLUDES PROBE AND STRAY WIRING CAPACITANCE. Figure 4. Test Circuit for t PHL and t PLH .*I +5 V OUTPUT V O MONITORING NODEFigure 7. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.11OUTPUT V OMONITORINGNODET A = +125 °C* ALL CHANNELS TESTED SIMULTANEOUSLY.V CCI O = 25 mAFigure 10. Operating Circuit for Burn-In and Steady State Life Tests. Figure 8. Test Circuit for t EHL and t ELH.Figure 9. Enable Propagation Delayvs. Temperature.MIL-PRF-38534 Class H,Class K, and DSCC SMDTest ProgramAgilent’s Hi-Rel Optocouplers arein compliance with MIL-PRF-38534 Classes H and K. Class Hand Class K devices are also incompliance with DSCC drawings81028, 5962-90855 and 5962-98001.Testing consists of 100% screen-ing and quality conformanceinspection to MIL-PRF-38534./doc/4e2d970a03d8ce2f006623a8.htmlData subject to change.Copyright ? 1999 Agilent TechnologiesObsoletes 5968-4743E5968-9407E (10/00)。

1SMA5918BT3G中文资料

1SMA5913BT3 Series1.5 Watt PlasticSurface MountZener Voltage RegulatorsThis complete new line of 1.5 Watt Zener Diodes offers the following advantages.Features•Standard Zener Breakdown V oltage Range − 3.3 V to 68 V •ESD Rating of Class 3 (>16 kV) per Human Body Model •Flat Handling Surface for Accurate Placement •Package Design for Top Slide or Bottom Circuit Board Mounting •Low Profile Package•Ideal Replacement for MELF Packages•Pb−Free Packages are AvailableMechanical Characteristics:CASE:V oid-free, transfer-molded plasticFINISH:All external surfaces are corrosion resistant with readily solderable leadsMAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260°C for 10 secondsPOLARITY:Cathode indicated by molded polarity notch or cathode bandFLAMMABILITY RATING:UL 94 V−0 @ 0.125 inMAXIMUM RATINGSRating Symbol Value UnitDC Power Dissipation @ T L = 75°C, Measured Zero Lead Length (Note 1) Derate above 75°CThermal Resistance, Junction−to−LeadP DR q JL1.52050WmW/°C°C/WDC Power Dissipation @ T A = 25°C (Note 2) Derate above 25°CThermal Resistance, Junction−to−AmbientP DR q JA0.54.0250WmW/°C°C/WOperating and Storage Temperature Range T J, T stg−65 to+150°CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1. 1 in square copper pad, FR−4 board.2.FR−4 Board, using ON Semiconductor minimum recommended footprint.Device Package Shipping†ORDERING INFORMATION1SMA59xxBT3SMA5000/Tape & Reel1SMA59xxBT3G SMA(Pb−Free)5000/Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.See specific marking information in the device marking column of the Electrical Characteristics table on page 2 of this data sheet.DEVICE MARKING INFORMATIONELECTRICAL CHARACTERISTICS (T A = 25°C unlessotherwise noted, V F = 1.5 V Max. @ I F = 200 mA for all types)Symbol ParameterV Z Reverse Zener Voltage @ I ZT I ZT Reverse CurrentZ ZT Maximum Zener Impedance @ I ZT I ZK Reverse CurrentZ ZK Maximum Zener Impedance @ I ZK I R Reverse Leakage Current @ V R V R Reverse Voltage I F Forward Current V F Forward Voltage @ I F I ZMMaximum DC Zener CurrentELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted, V F = 1.5 V Max. @ I F = 200 mA for all types)Device* (Note 3)Device Marking Zener Voltage (Note 4)Zener Impedance Leakage CurrentI ZM V Z (Volts)@ I ZT Z ZT @ I ZTZ ZK @ I ZK I R @ V R Min Nom Max mA W W mA m A Volts mA(dc)1SMA5913BT3, G 813B 3.13 3.3 3.47113.610500 1.050 1.04551SMA5914BT3, G 814B 3.42 3.6 3.78104.29.0500 1.035.5 1.04171SMA5915BT3, G 815B 3.70 3.9 4.1096.17.5500 1.012.5 1.03851SMA5916BT3, G 816B 4.08 4.3 4.5287.2 6.0500 1.0 2.5 1.03491SMA5917BT3, G 817B 4.46 4.7 4.9479.8 5.0500 1.0 2.5 1.53191SMA5918BT3, G 818B 4.84 5.1 5.3673.5 4.0350 1.0 2.5 2.02941SMA5919BT3, G 819B 5.32 5.6 5.8866.9 2.0250 1.0 2.5 3.02681SMA5920BT3, G 820B 5.89 6.2 6.5160.5 2.0200 1.0 2.5 4.02421SMA5921BT3, G 821B 6.46 6.87.1455.1 2.5200 1.0 2.5 5.22211SMA5922BT3, G 822B 7.127.57.8850 3.04000.5 2.5 6.02001SMA5923BT3, G 823B 7.798.28.6145.7 3.54000.5 2.5 6.51831SMA5924BT3, G 824B 8.649.19.5641.2 4.05000.5 2.57.01651SMA5925BT3, G 825B 9.51010.537.5 4.55000.25 2.58.01501SMA5926BT3, G 826B 10.451111.5534.1 5.55500.250.58.41361SMA5927BT3, G 827B 11.41212.631.2 6.55500.250.59.11251SMA5928BT3, G 828B 12.351313.6528.87.05500.250.59.91151SMA5929BT3, G 829B 14.251515.75259.06000.250.511.41001SMA5930BT3, G 830B 15.21616.823.4106000.250.512.2941SMA5931BT3, G 831B 17.11818.920.8126500.250.513.7831SMA5932BT3, G 832B 19202118.7146500.250.515.2751SMA5933BT3, G 833B 20.92223.11717.56500.250.516.7681SMA5934BT3, G 834B 22.82425.215.6197000.250.518.2631SMA5935BT3, G 835B 25.652728.3513.9237000.250.520.6561SMA5936BT3, G 836B 28.53031.512.5267500.250.522.8501SMA5937BT3, G 837B 31.353334.6511.4338000.250.525.1451SMA5938BT3, G 838B 34.23637.810.4388500.250.527.4421SMA5939BT3, G 839B 37.053940.959.6459000.250.529.7381SMA5940BT3, G840B40.854345.158.7539500.250.532.7351SMA5941BT3, G 841B 44.654749.358.06710000.250.535.8321SMA5942BT3, G 842B 48.455153.557.37011000.250.538.8291SMA5943BT3, G 843B 53.25658.8 6.78613000.250.542.6271SMA5944BT3, G 844B 58.96265.1 6.010015000.250.547.1241SMA5945BT3, G 845B 64.66871.4 5.512017000.250.551.7223.Tolerance and Voltage Regulation Designation − The type number listed indicates a tolerance of ±5%.4.V Z limits are to be guaranteed at thermal equilibrium.*The “G” suffix indicates Pb−Free package available.Figure 1. Steady State Power DeratingFigure 2. V Z − 3.3 thru 10 VoltsT, TEMPERATURE (°C)Figure 3. V Z = 12 thru 68 VoltsP D , M A X I M U MP O W E R D I S S I P A T I O N (W A T T S )I Z , Z E N E R C U R R E N T (m A )Z Z , D Y N A M I C I M P ED A N CE (O H M S )1002468101010.1V Z , ZENER VOLTAGE (VOLTS)1001010.1010203040V Z , ZENER VOLTAGE (VOLTS)V Z , ZENER VOLTAGE (VOLTS)1001050Figure 4. Zener Voltage − 3.3 to 12 VoltsFigure 5. Zener Voltage − 12 to 68 Volts Figure 6. Effect of Zener VoltageI Z , Z E N E R C U R R E N T (m A )6070801086420−2−4V Z , ZENER VOLTAGE (VOLTS), T E M P E R A T U R E C O E F F I C I E N T (m V / C )°θV Z 10070503020101020305070100V Z , ZENER VOLTAGE (VOLTS), T E M P E R A T U R E C O E F F I C I E N T (m V / C )°θV ZPACKAGE DIMENSIONSSMACASE 403D−02ISSUE Cǒmm inchesǓSCALE 8:1*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*DIM A MIN NOM MAX MINMILLIMETERS1.912.16 2.410.075INCHES A10.050.100.150.002b 1.27 1.45 1.630.050c 0.150.280.410.006D 2.29 2.60 2.920.090E 4.06 4.32 4.570.160L0.761.14 1.520.0300.0850.0950.0040.0060.0570.0640.0110.0160.1030.1150.1700.1800.0450.060NOM MAX 4.83 5.21 5.590.1900.2050.220H E STYLE 1:PIN 1.CATHODE (POLARITY BAND)2.ANODENOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.403D−01 OBSOLETE, NEW STANDARD IS 403D−02.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

Q65110A1458中文资料

LB W5SG,LV W5SGGolden Dragon®Vorläufige Daten /Preliminary Data2003-10-291Besondere Merkmale•Gehäusetyp:weißes SMD-Gehäuse,farbloser klarer Verguss•Besonderheit des Bauteils:Punktlichtquelle mit hoher Lichtausbeute bei geringem Platzbedarf•Wellenlänge:470nm (blau),503nm (verde)•Abstrahlwinkel:Lambertscher Strahler (120°)•Technologie:InGaN•optischer Wirkungsgrad:6lm/W (blau),25lm/W (verde)•Gruppierungsparameter:Lichtstärke,Wellenlänge•Verarbeitungsmethode:für alle SMT-Bestücktechniken geeignet •Lötmethode:IR Reflow Löten•Vorbehandlung:nach JEDEC Level 4•Gurtung:24-mm Gurt mit 800/Rolle,ø180mm •ESD-Festigkeit:ESD-sicher bis 2kV nach JESD22-A114-B Anwendungen•Ampelanwendung (verde)•Hinterleuchtung (LCD,Schalter,Tasten,Displays,Werbebeleuchtung,Allgemeinbeleuchtung)•Innenbeleuchtung im Automobilbereich (z.B.Instrumentenbeleuchtung,u.ä.)•Ersatz von Kleinst-Glühlampen•Markierungsbeleuchtung (z.B.Stufen,Fluchtwege,u.ä.)•Signal-und Symbolleuchten •ScannerFeatures•package:white SMD package,colorless clear •feature of the device:point lightsource with high luminous efficiency and low space•wavelength:470nm (blue),503nm (verde)•viewing angle:Lambertian Emitter (120°)•technology:InGaN•optical efficiency:6lm/W (blue),25lm/W (verde)•grouping parameter:luminous intensity,wavelength•assembly methods:suitable for all SMT assembly methods•soldering methods:IR reflow soldering •preconditioning:acc.to JEDEC Level 4•taping:24-mm tape with 800/reel,ø180mm •ESD-withstand voltage:up to 2kV acc.to JESD22-A114-BApplications•traffic lights (verde)•backlighting (LCD,switches,keys,displays,illuminated advertising,general lighting)•interior automotive lighting (e.g.dashboard backlighting,etc.)•substitution of micro incandescent lamps •marker lights (e.g.steps,exit ways,etc.)•signal and symbol luminaire •scanners2003-10-292Anm.:-35gesamter Farbbereich,Lieferung in Einzelgruppen (siehe Seite 5)Note:-35Total color tolerance range,delivery in single groups (please see page 5)Bestellinformation Ordering Information TypTypeEmissions-farbe Color of EmissionLichtstrom 1)Seite 14Luminous Flux 1)page 14I F =350mA ΦV (mlm)Lichtst ärke 2)Seite 14Luminous Intensity 2)page 14I F =350mA I V (mcd)BestellnummerOrdering CodeLB W5SG-DYEZ-35blue 5200...112002700(typ.)Q65110A1470LV W5SG-GYHY-35verde21000 (45000)11000(typ.)Q65110A14582003-10-293Maximum Ratings Bezeichnung ParameterSymbol SymbolWerte ValuesEinheit Unit BetriebstemperaturOperating temperature range T op –40…+100°C LagertemperaturStorage temperature range T stg –40…+100°C Sperrschichttemperatur Junction temperature T j 110°C Durchlassstrom Forward current (T A =25°C)I F500mASto ßstrom Surge currentt ≤ 10µs,D =0.005,T A =25°C I FM1500mASperrspannung 3)Seite 14Reverse voltage 3)page 14(T A =25°C)V R1.2VLeistungsaufnahme Power consumption (T A =25°C)P tot1.5WW ärmewiderstand 4)Seite 14Thermal resistance 4)page 14Sperrschicht/L ötpad Junction/solder pointR th JS9K/W2003-10-294*Einzelgruppen siehe Seite 5Individual groups on page 5Characteristics (T A =25°C)Bezeichnung ParameterSymbol SymbolWerte ValuesEinheit Unit LBLV Wellenl änge des emittierten Lichtes (typ.)Wavelength at peak emission I F =350mAλpeak 465501nmDominantwellenl änge 5)Seite 14Dominant wavelength 5)page 14I F =350mAλdom470*±6503*±6nmSpektrale Bandbreite bei 50%I rel max (typ.)Spectral bandwidth at 50%I rel max I F =350mA∆λ2530nmAbstrahlwinkel bei 50%I V (Vollwinkel)(typ.)Viewing angle at 50%I V 2ϕ120120Grad deg.Durchlassspannung 6)Seite 14(min.)Forward voltage 6)page 14(typ.)I F =350mA (max.)V F V F V F 3.13.84.0 3.13.84.0V V VSperrstromReverse current (max.)V R =1.2VI R 100100µATemperaturkoeffizient von λpeak (typ.)Temperature coefficient of λpeak I F =350mA;–10°C ≤ T ≤ 100°C TC λpeak 0.050.03nm/KTemperaturkoeffizient von λdom (typ.)Temperature coefficient of λdom I F =350mA;–10°C ≤ T ≤ 100°C TC λdom 0.040.05nm/KTemperaturkoeffizient von V F (typ.)Temperature coefficient of V F I F =350mA;–10°C ≤ T ≤ 100°C TC V–5.0–3.6mV/KOptischer Wirkungsgrad (typ.)Optical efficiency I F =350mAηopt625lm/W2003-10-295Anm.:Die Standardlieferform von Serientypen beinhaltet eine Familiengruppe.Diese besteht aus4Helligkeitsdrittelgruppen.Einzelne Helligkeitsdrittelgruppen sind nicht bestellbar.Note:The standard shipping format for serial types includes a family group of 4individual brightnessthird groups.Individual brightness third groups cannot be ordered.Anm.:In einer Verpackungseinheit /Gurt ist immer nur eine Gruppe f ür jede Selektion enthalten.Note:No packing unit /tape ever contains more than one group for each selection.Wellenl ängengruppen (Dominantwellenl änge)5)Seite 14Wavelength Groups (Dominant Wavelength)5)page 14Gruppe Group blueverdeEinheit Unitmin.max.min.max.3463467497501nm 4467471501505nm 5471475505509nmHelligkeits-Gruppierungsschema Brightness Groups Helligkeitsdrittelgruppe Brightness Third Group Lichtstrom 1)Seite 14Luminous Flux 1)page 14ΦV (mlm)Lichtst ärke 2)Seite 14Luminous Intensity 2)page 14I V (mcd)DY DZ EX EY EZ GY GZ HX HY5200...61006100...71007100...82008200...97009700...1120021000...2400024000...2800028000...3300033000 (39000)1800(typ.)2200(typ.)2500(typ.)2900(typ.)3400(typ.)7500(typ.)8600(typ.)10100(typ.)12000(typ.)Gruppenbezeichnung auf Etikett Group Name on Label Beispiel:GY-4Example:GY-4Helligkeitsdrittelgruppe Brightness Third Group Wellenl änge Wavelength GY4Relative spektrale Emission2)Seite14Relative Spectral Emission2)page14V(λ)=spektrale Augenempfindlichkeit/Standard eye response curve Irel=f(λ);T=25°C;I=350mAAbstrahlcharakteristik2)Seite14Radiation Characteristic2)page14I rel =f(2003-10-296Durchlassstrom2)Seite14Forward Current2)page14=f(V);T=25°CRelative Lichtstärke2)Seite14 Relative Luminous Intensity2)page14Relative Lichtstärke2)7)Seite14 Relative Luminous Intensity2)7)page142003-10-297Dominante Wellenlänge2)Seite14 Dominant Wavelength2)page14LB,λdom=f(I F);T A=25°CMaximal zulässiger Durchlassstrom Max.Permissible Forward CurrentI F =f(T)Dominante Wellenlänge2)Seite14Dominant Wavelength2page14)LV,λdom=f(I F);T A=25°C2003-10-298Zulässige Impulsbelastbarkeit I F=f(t p) Permissible Pulse Handling Capability Duty cycle D=parameter,T A=25°C,LB Zulässige Impulsbelastbarkeit I F=f(t p) Permissible Pulse Handling Capability Duty cycle D=parameter,T A=25°C,LV Zulässige Impulsbelastbarkeit I F=f(t p) Permissible Pulse Handling Capability Duty cycle D=parameter,T A=85°C,LB Zulässige Impulsbelastbarkeit I F=f(t p) Permissible Pulse Handling Capability Duty cycle D=parameter,T A=85°C,LV2003-10-299Maßzeichnung8)Seite14Package Outlines8)page14Kathodenkennung:MarkierungCathode mark:markGewicht/Approx.weight:200mgGurtung/Polarität und Lage8)Seite14Verpackungseinheit800/Rolle,ø180mm Method of Taping/Polarity and Orientation8)page14Packing unit800/reel,ø180mm2003-10-2910Empfohlenes Lötpaddesign8)Seite14IR Reflow Löten8)page142003-10-2911Lötbedingungen Vorbehandlung nach JEDEC Level4 Soldering Conditions Preconditioning acc.to JEDEC Level4 IR-Reflow Lötprofil(nach IPC9501)IR Reflow Soldering Profile(acc.to IPC9501)2003-10-29122003-10-2913Attention please!The information describes the type of component and shall not be considered as assured characteristics.Terms of delivery and rights to change design reserved.Due to technical requirements components may contain dangerous substances.For information on the types in question please contact our Sales Organization.If printed or downloaded,please find the latest version in the Internet.PackingPlease use the recycling operators known to you.We can also help you –get in touch with your nearest sales office.By agreement we will take packing material back,if it is sorted.You must bear the costs of transport.For packing material that is returned to us unsorted or which we are not obliged to accept,we shall have to invoice you for any costs incurred.Components used in life-support devices or systems must be expressly authorized for such purpose!Critical components 9)page 14may only be used in life-support devices or systems 10)page 14with the express written approval of OSRAM OS.Revision History:2003-10-29Previous Version:-PageSubjects (major changes since last revision)Date of changeFußnoten:1)Helligkeitswerte werden mit einerStromeinprägedauer von25ms und einer Genauigkeit von±11%ermittelt.2)Wegen der besonderen Prozessbedingungen bei derHerstellung von LED können typische oder abgeleitete technische Parameter nur aufgrund statistischer Werte wiedergegeben werden.Diese stimmen nicht notwendigerweise mit den Werten jedes einzelnen Produktesüberein,dessen Werte sich von typischen und abgeleiteten Werten oder typischen Kennlinien unterscheiden können.Falls erforderlich,z.B.aufgrund technischer Verbesserungen,werden diese typischen Werte ohne weitere Ankündigung geändert.3)Die LED kann in Sperrichtung kurzzeitig betriebenwerden.4)RthJA ergibt sich bei Montage auf PC-Board-Metallkernplatine,l= 1.3W/(m*K),für weitere Informationen siehe Applikationsschrift im Internet ().5)Wellenlängen werden mit einer Stromeinprägedauervon25ms und einer Genauigkeit von±1nm ermittelt.6)Spannungswerte werden mit einerStromeinprägedauer von1ms und einer Genauigkeit von±0,1V ermittelt.7)Im gestrichelten Bereich der Kennlinien muss miterhöhten Helligkeitsunterschieden zwischen Leuchtdioden innerhalb einer Verpackungseinheit gerechnet werden.8)Maße werden wie folgt angegeben:mm(inch).9)Ein kritisches Bauteil ist ein Bauteil,das inlebenserhaltenden Apparaten oder Systemen eingesetzt wird und dessen Defekt voraussichtlich zu einer Fehlfunktion dieses lebenserhaltenden Apparates oder Systems führen wird oder die Sicherheit oder Effektivität dieses Apparates oder Systems beeinträchtigt.10)Lebenserhaltende Apparate oder Systeme sind für(a)die Implantierung in den menschlichen Körperoder(b)für die Lebenserhaltung bestimmt.Falls sie versagen,kann davon ausgegangen werden, dass die Gesundheit und das Leben des Patienten in Gefahr ist.Published by OSRAM Opto Semiconductors GmbH Wernerwerkstrasse2,D-93049Regensburg©All Rights Reserved.Remarks:1)Brightness groups are tested at a current pulseduration of25ms and a tolerance of±11%.2)Due to the special conditions of the manufacturingprocesses of LED,the typical data or calculated correlations of technical parameters can only reflect statistical figures.These do not necessarily correspond to the actual parameters of each single product,which could differ from the typical data and calculated correlations or the typical characeristic line.If requested,e.g.because of technical improvements, these typ.data will be changed without any further notice.3)Driving the LED in reverse direction is suitable forshort term application.4)RthJAresults from mounting on PC board-metall core PCB,l=1.3W/(m*K),for further Information please find the application note on our web site ().5)Wavelengths are tested at a current pulse duration of25ms and a tolerance of±1nm.6)Forward voltages are tested at a current pulseduration of1ms and a tolerance of±0.1V.7)In the range where the line of the graph is broken,youmust expect higher brightness differences between single LEDs within one packing unit.8)Dimensions are specified as follows:mm(inch).9)A critical component is a component used in alife-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system,or to affect its safety or the effectiveness of that device or system.10)Life support devices or systems are intended(a)to be implanted in the human body,or(b)to support and/or maintain and sustain human life.If they fail,it is reasonable to assume that the health and the life of the user may be endangered.2003-10-2914。

MIL-PRF-19500中文资料

MIL-PRF-19500/376E 31 August 2000SUPERSEDINGMIL-PRF-19500/376D 21 August 1998PERFORMANCE SPECIFICATIONSEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, LOW-POWERTYPES 2N2484, 2N2484UA, 2N2484UB, JAN, JANTX, JANTXV, JANS, JANHC, AND JANKCThis specification is approved for use by all Departments and Agencies of the Department of Defense.1. SCOPE1.1 Scope. This specification covers the performance requirements for NPN, silicon, low-power transistors. Four levels of product assurance is provided for each device type as specified in MIL-PRF-19500. Two levels of product assurance are provided for die.1.2 Physical dimensions. See figure 1 (similar to T0-18), figures 2 and 3 (surface mount case outlines UA and UB), and figures 4 and 5 (die).1.3 Maximum ratings.P TV CBOV EBOV CEOI CT J and T STGR θJAR θJCTypesT A = +25°CmWV dc V dc V dc mA dc °C °C/W °C/W 2N2484500 (1)6066050-65 to +2003251462N2484UA 650 (2)6066050-65 to +2002101602N2484UB500 (1)6066050-65 to +200325146(1)Derate linearly at 3.08 mW/°C above T A = +37.5°C (2)Derate linearly at 4.76 mW/°C above T A = +63.5°C. 1.4 Primary electrical characteristics.h feC obo|h fe |2V CE(sat) (1)LimitsV CE = 5 V dc I C = 1 mA dc f = 1 kHzI E = 0V CB = 5 V dc 100 kHz ≤ f ≤ 1 MHzI C = 500 µA dc V CE = 5 V dc f = 30 MHzI C = 1.0 mA dc I B = 0.1 mA dcMin Max250900pF5.02.07.0V dc 0.3(1) Pulsed (see 4.5.1).AMSC N/AFSC 5961DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.The documentation and process conversion measures necessary to comply with this revision shall be completed by 31 November 2000.INCH-POUND Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Defense Supply Center, Columbus, ATTN: DSCC/VAC,Post Office Box 3990, Columbus, OH 43216-5000, by using the Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.2Dimensions Symbol Inches Millimeters NoteMin Max Min Max CD .178.195 4.52 4.95CH .170.210 4.32 5.33HD .209.230 5.31 5.84LC .100 TP 2.54 TP 6LD .016.0210.410.537,8LL .500.75012.7019.057,8LU .016.0190.410.487,8L1---.050--- 1.277,8L2.250--- 6.35---7,8Q ---.040---0.865TL .028.0480.71 1.223,4TW .036.0460.91 1.173r ---.010---0.2510α45° TP 45° TP6NOTES:1.Dimension are in inches.2.Metric equivalents are given for general information only.3.Beyond r (radius) maximum, TW shall be held for a minimum length of .011 (0.28 mm).4.Dimension TL measured from maximum HD.5.Body contour optional within zone defined by HD, CD, and Q.6.Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shallbe within .007 inch (0.18 mm) radius of true position (TP) at maximum material condition (MMC) relative to tab at MMC.7.Dimension LU applies between L 1 and L 2. Dimension LD applies between L 2 and LLminimum. Diameter is uncontrolled in L 1 and beyond LL minimum.8.All three leads.9.The collector shall be internally connected to the case.10.Dimension r (radius) applies to both inside corners of tab.11.In accordance with ANSI Y14.5M, diameters are equivalent to φx symbology.12.Lead 1 = emitter, lead 2 = base, lead 3 = collector.FIGURE 1. Physical dimensions (similar to TO-18).3DimensionsSymbol Inches Millimeters Note Min Max Min Max A .061.075 1.55 1.903A1.029.0410.74 1.04B1.022.0280.560.71B2.075 REF 1.91 REF B3.006.0220.150.565D .145.155 3.68 3.93D1.045.055 1.14 1.39D2.0375 BSC .952 BSC D3---.155--- 3.93E .215.225 5.46 5.71E3---.225--- 5.71L1.032.0480.81 1.22L2.072.088 1.83 2.23L3.003.0070.080.185NOTES:1.Dimensions are in inches.2.Metric equivalents are given for general information only.3.Dimension "A" controls the overall package thickness. When a window lid is used, dimension "A" mustincrease by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).4.The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option, from that shown onthe drawing.5.Dimensions "B3" minimum and "L3" minimum and the appropriately castellation length define anunobstructed three-dimensional space traversing all of the ceramic layers in which a castellation was designed. (Castellations are required on bottom two layers, optional on top ceramic layer.) Dimension "B3" maximum and "L3" maximum define the maximum width and depth of the castellation at any point on its surface. Measurement of these dimensions may be made prior to solder dipping.6.Lead 4 = no connection.FIGURE 2. Physical dimensions, surface mount (2N2484UA).4DimensionsInches Millimeters NotesLtrMin.Max.Min.Max.A .046.0560.97 1.42A1.017.0350.430.89B1.016 .024 0.41 0.61 3D .085 .108 2.41 2.74 D1 .071 .079 1.81 2.01 D2 .035 .039 0.89 0.99 D3E .115 .128 2.82 3.25 E3 L1.022.0380.560.964NOTES:1.Dimensions are in inches.2.Metric equivalents are given for general information only.3.Dimensions B2 and B3 are identical to B14.Dimension L2 is identical to L1.FIGURE 3. Physical dimensions, surface mount (2N2484UB).5A- versionNOTES:1.Die size...............................................0.015 x 0.019 inches ± 0.001 inch2.Die thickness.......................................0.010 ± 0.0015 inches3.Top metal............................................Aluminum 15,000Å minimum, 18,000Å nominal4.Back metal..........................................A.Gold 2,500Å minimum, 3,000Å nominalB.Eutectic Mount – No Gold5.Backside.............................................Collector6.Bonding pad........................................B = 0.003 inches, E = 0.004 inches diameter7.Passivation.........................................Si 3N 4 (Silicon Nitride) 2kÅ min, 2.2kÅ nom.FIGURE 4. Physical dimensions, JANHC and JANKC die, A - version.B - versionDie size:.....................................................0.018 x 0.018 inchesDie thickness:............................................0.008 ± 0.0016 inchesBase pad:..................................................0.0025 inches diameterEmitter pad:...............................................0.003 inches diameterBack metal:................................................Gold, 6500 ± 1950 ÅTop metal:.................................................Aluminum, 19500 ± 2500 ÅBack side:..................................................Collector Glassivation:..............................................SiO2, 7500 ± 1500 ÅFIGURE 5. Physical dimensions, JANHC and JANKC die, B - version.61.4 Primary electrical characteristics.NFI C = 10 µA dc, V CE = 5 V dcR g = 10 kΩh FE2h FE5f = 100 Hz f = 1000 Hz f = 10 kHz V CE = 5 V dcI C = 10 µA dc V CE = 5 V dc I C = 1 mA dcMin Max dB7.5dB3dB22005002508002. APPLICABLE DOCUMENTS2.1 General. The documents listed in this section are specified in sections 3 and 4 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, document users are cautioned that they must meet all specified requirements documents cited in sections 3 and 4 of this specification, whether or not they are listed.2.2 Government documents.2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation (see 6.2).SPECIFICATIONDEPARTMENT OF DEFENSEMIL-PRF-19500 - Semiconductor Devices, General Specification for.STANDARDDEPARTMENT OF DEFENSEMIL-STD-750 - Test Methods for Semiconductor Devices.(Unless otherwise indicated, copies of the above specifications, standards, and handbooks are available from the Document Automation and Production Services (DAPS), Building 4D (DPM-DODSSP), 700 Robbins Avenue, Philadelphia, PA 19111-5094.)2.3 Order of precedence. In the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.73. REQUIREMENTS3.1 General. The requirements for acquiring the product described herein shall consist of this document and MIL-PRF-19500.3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer’s list (QML) before contract award (see4.2 and 6.3).3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as specified in MIL-PRF-19500.3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in MIL-PRF-19500 and figures 1, 2, 3, 4, and 5 herein.3.4.1 Lead finish. Unless otherwise specified, lead finish shall be solderable in accordance with MIL-PRF-19500, and herein.3.5 Marking. Marking shall be in accordance with MIL-PRF-19500. At the option of the manufacturer, marking may be omitted from the body, but shall be retained on the initial container.3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in 1.3, 1.4, and table I.3.7 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table I herein.3.8 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and shall be free from other defects that will affect life, serviceability, or appearance.4. VERIFICATION4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:a. Qualification inspection (see 4.2).b. Screening (see 4.3).c. Conformance inspection (see 4.4).4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified herein.4.2.1. JANHC and JANKC Qualification. JANHC and JANKC qualification inspection shall be in accordance with MIL-PRF-19500.84.3 Screening (JANS, JANTX, and JANTXV levels only). Screening shall be in accordance with table IV of MIL-PRF-19500, and as specified herein. The following measurements shall be made in accordance with table I herein. Devices that exceed the limits of table I herein shall not be acceptable.Screen (see tableIVMeasurementof MIL-PRF-19500)JANS level JANTX and JANTXV levels 3c Thermal impedance (see 4.3.2)Thermal impedance (see 4.3.2)9I CBO2, h FE4Not applicable1048 hours minimum48 hours minimum11I CBO2; h FE4;∆I CBO2 = 100% of initial value or 2 nA dc,whichever is greater.∆h FE4 = ±15%I CBO2 ,h FE412See 4.3.1240 hours minimum See 4.3.180 hours minimum13Subgroups 2 and 3 of table I herein;∆I CBO2 = 100% of initial value or 2 nA dc,whichever is greater;∆h FE4 = ±15%Subgroup 2 of table I herein;∆I CBO2 = 100% of initial value or 2 nA dc, whichever is greater;∆h FE4 = ±25%4.3.1 Power burn-in conditions. Power burn-in conditions are as follows: V CB = 10 to 30 V dc:Power shall be applied to achieve T J = 135°C minimum and a minimum power dissipation = 75 percent of maximum rated P T (see 1.3). T A = room ambient as defined in 4.5 of MIL-STD-750.NOTE: No heat sink or forced air cooling on the devices shall be permitted.4.3.2 Thermal impedance (ZθJX measurements). The ZθJX measurements shall be performed in accordance with method 3131 of MIL-STD-750.a. I M measurement current-------------5 mA.b. I H forward heating current -----------50 mA (min).c. t H heating time -------------------------25 - 30 ms.d. t md measurement delay time ------60 µs max.e. V CE collector-emitter voltage ------10 V dc minimum.The maximum limit for ZθJX under these test conditions are ZθJX (max) = 150°C/W for 2N2484, ZθJX (max) = 67°C/W for 2N2484UA and 2N2484UB.94.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, and as specified herein. If alternate screening is being performed in accordance with MIL-PRF-19500, a sample of screened devices shall be submitted to and pass the requirements of group A1 and A2 inspection only (table VIb, group B, subgroup 1 is not required to be performed again if group B has already been satisfied in accordance with 4.4.2).4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500 and table I herein.4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for subgroup testing in table VIa (JANS) of MIL-PRF-19500 and 4.4.2.1. Electrical measurements (end-points) shall be in accordance with group A, subgroup 2 herein. Delta requirements shall be in accordance with table III herein. See 4.4.2.2 for JAN, JANTX, and JANTXV group B testing. Electrical measurements (end-points) and delta requirements for JAN, JANTX, and JANTXV shall be after each step in 4.4.2.2 and shall be in accordance with group A, subgroup 2 herein. Delta requirements shall be after each step and shall be in accordance with table III herein.4.4.2.1 Group B inspection, table VIa (JANS) of MIL-PRF-19500.Subgroup Method ConditionB41037V CB = 10 V dcB5 1027V CB = 10 V dc; T A = +125°C ±25°C for 96 hours with P T adjusted according to the chosen T A to give T J = +275°C minimum. Optionally, the test may be conducted forminimum 216 hours with P T adjusted to achieve T J = 225°C minimum, sample size (foroption) n = 45, c = 0. In this case, the ambient temperature shall be adjusted such that aminimum 75 percent of maximum rated P T (see 1.3) is applied to the device under test.(Note: If a failure occurs, resubmission shall be at the test conditions of the originalsample.)4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV). Separate samples may be used for each step. In the event of a group B failure, the manufacturer may pull a new sample at double size from either the failed assembly lot or from another assembly lot from the same wafer lot. If the new “assembly lot” option is exercised, the failed assembly lot shall be scrapped.Step Method Condition11039Steady-state life: Test condition B, 340 hours, V CB = 10 -30 V dc, T J = 150°C min.,external heating of the device under test to achieve T J = +150°C minimum is allowedprovided that a minimum of 75% of rated power is dissipated. No heat sink or forced-aircooling on the devices shall be permitted. n = 45 devices, c = 021039The steady state life test of step 1 shall be extended to 1,000 hours for each die design.Samples shall be selected from a wafer lot every twelve months of wafer production.Group B, step 2 shall not be required more than once for any single wafer lot. n = 45,c = 0.31032High-temperature life (non-operating), t = 340 hours, T A = +200°C. n = 22, c = 0.104.4.2.3 Group B sample selection. Samples selected from group B inspection shall meet all of the following requirements:a.For JAN, JANTX, and JANTXV, samples shall be selected randomly from a minimum of three wafers (orfrom each wafer in the lot) from each wafer lot. For JANS, samples shall be selected from each inspection lot. See MIL-PRF-19500.b.Must be chosen from an inspection lot that has been submitted to and passed group A, subgroup 2conformance inspection. When the final lead finish is solder or any plating prone to oxidation at hightemperature, the samples for life test (subgroups B4 and B5 for JANS, and group B for JAN, JANTX, and JANTXV) may be pulled prior to the application of final lead finish.4.4.3 Group C inspection, Group C inspection shall be conducted in accordance with the conditions specified for subgroup testing in table VII of MIL-PRF-19500, and in 4.4.3.1 (JANS).and 4.4.3.2 (JAN, JANTX, and JANTXV) herein for group C testing. Electrical measurements (end-points) shall be in accordance with group A, subgroup 2 herein. Delta requirements shall be in accordance with table III herein.4.4.3.1 Group C inspection, table VII (JANS) of MIL-PRF-19500.Subgroup Method ConditionC22036Test condition E (not applicable to UA and UB suffix devices).C610261,000 hours at V CB = 10 -30 V dc; power shall be applied to achieve T J = 150°C minimum and a minimum power dissipation P D = 75 percent of maximum rated P T as defined in 1.3herein.4.4.3.2 Group C inspection, table VII (JAN, JANTX, and JANTXV) of MIL-PRF-19500.Subgroup Method ConditionC2 2036Test condition E (not applicable to UA and UB suffix devices).C6Not applicable.4.4.3.3 Group C sample selection. Samples for subgroups in group C shall be chosen at random from any inspection lot containing the intended package type and lead finish procured to the same specification which is submitted to and passes group A tests for conformance inspection. Testing of a subgroup using a single device type enclosed in the intended package type shall be considered as complying with the requirements for that subgroup.4.4.4 Group E inspection. Group E inspection shall be performed for qualification or re-qualification only. The tests specified in table II herein must be performed to maintain qualification.4.5 Method of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.4.5.1 Pulse measurements. Conditions for pulse measurement shall be as specified in section 4 of MIL-STD-750.1112TABLE I. Group A inspection.MIL-STD-750LimitInspection 1/MethodConditionsSymbolMinMaxUnitSubgroup 1 2/Visual and mechanical examination 3/2071n = 45 devices, c = 0Solderability 3/ 4/2026n = 15 leads, c = 0Resistance to solvents 3/ 4/ 5/1022n = 15 devices, c = 0Temperature cycling 3/ 4/1051Test condition C, 25 cycles.n = 22 devices, c = 0 Hermetic seal 4/1071n = 22 devices, c = 0Fine leak Gross leakElectrical measurements 4/Group A, subgroup 2Bond strength 3/ 4/2037Precondition T A = +250°C at t = 24 hrs or T A = 300°C at t = 2 hrs; n = 11 wires, c = 0Subgroup 2Collector to emitter breakdown voltage3011Bias condition D; I C = 10 mA dc pulsed (see 4.5.1)V (BR)CEO 60V dcCollector to base cutoff current 3036Bias condition D; V CB = 60 V dc I CBO110µA dc Emitter to base cutoff current 3061Bias condition D; V EB = 6 V dc I EBO110µA dc Collector to base cutoff current 3036Bias condition D; V CB = 45 V dc I CBO25nA dc Collector to emitter cutoff current3041Bias condition D; V CE = 5 V dc I CEO 2nA dc Emitter to base cutoff current 3061Bias condition D; V EB = 5 V dc I EBO22nA dc Collector to emitter cutoff current3041Bias condition C; V CE = 45 V dc I CES 5nA dcForward-current transfer ratio3076V CE = 5 V dc; I C = 1 µA dch FE145See footnote at end of table.13TABLE I. Group A inspection - Continued.MIL-STD-750LimitInspection 1/MethodConditionsSymbolMinMaxUnitSubgroup 2 - continued.Forward-current transfer ratio 3076V CE = 5 V dc; I C = 10 µA dc h FE2200500Forward-current transfer ratio 3076V CE = 5 V dc; I C = 100 µA dc h FE3225675Forward-current transfer ratio 3076V CE = 5 V dc; I C = 500 µA dc h FE4250800Forward-current transfer ratio 3076V CE = 5 V dc; I C = 1 mA dc h FE5250800Forward-current transfer ratio 3076V CE = 5 V dc; I C = 10 mA dc pulsed (see 4.5.1)h FE6225800Collector to emitter voltage (saturated)3071I C = 1.0 mA dc; I B = 100 µA dc V CE(sat)0.3V dc Base emitter voltage (nonsaturated)3066Test condition B; V CE = 5 V dc;I C = 100 µA dcV BE(ON)0.50.7V dcSubgroup 3High-temperature operation T A = +150°CCollector to base cutoff current 3036Bias condition D; V CB = 45 V dc I CBO310µA dcLow-temperature operation T A = -55°CForward-current transfer ratio 3076V CE = 5 V dc; I C = 10 µA dch FE735Subgroup 4Magnitude of common emitter small-signal short-circuit forward-current transfer ratio 3306V CE = 5 V dc; I C = 50 µA dc;f = 5 MHz|h fe |13.0Magnitude of common emitter small-signal short-circuitforward- current transfer ratio 3306V CE = 5 V dc; I C = 500 µA dc;f = 30 MHz|h fe |2 2.07.0Small-signal open-circuit output admittance3216V CE = 5 V dc; I C = 1.0 mA dc;f = 1 kHzh oe 40µmhosSmall-signal open- circuit reverse-voltage transfer ratio 3211V CE = 5 V dc; I C = 1.0 mA dc;f = 1 kHzh re 8.0 x 10-4Small-signal short- circuit input impedance3201V CE = 5 V dc; I C = 1 mA dc;f = 1 kHzh ie3.524k ΩSee footnote at end of table.14TABLE I. Group A inspection - Continued.MIL-STD-750LimitInspection 1/MethodConditionsSymbolMinMaxUnitSubgroup 4 - continued.Small-signal short- circuit forward current transfer ratio 3206V CE = 5 V dc; I C = 1 mA dc;f = 1 kHzh fe 250900Open circuit output capacitance3236V CB = 5 V dc; I E = 0;100 kHz ≤ f ≤ 1 MHz C obo 5.0pFInput capacitance (output open-circuited)3240V EB = 0.5 V dc; I C = 0;100 kHz ≤ f ≤ 1 MHzC ibo 6.0pF Noise figure3246f = 100 Hz; V CE = 5 V dc; I C = 10µA dc; Rg = 10 k Ω;NF17.5dBNoise figure 3246 f = 1 kHz; V CE = 5 V dc; I C = 10µA dc; R g = 10 k Ω;NF23dBNoise figure 3246 f = 10 kHz; V CE = 5 V dc; I C = 10µA dc; R g = 10 k Ω;NF32dBNoise figure (wideband)3246Noise bandwidth = 10 Hz to 15.7kHz; V CE = 5 V dc; I C = 10 µA dc;R g = 10 k Ω;NF43dBSubgroups 5 and 6Not applicable Subgroup 7 4/Decap internal visual (design verification)2075n = 1 device, c = 01/For sampling plan see MIL-PRF-19500.2/For resubmission of failed subgroup A1, double the sample size of the failed test or sequence of tests. Afailure in group A, subgroup 1 shall not require retest of the entire subgroup. Only the failed test shall be rerun upon submission.3/Separate samples may be used.4/Not required for JANS devices.5/Not required for laser marked devices.TABLE II. Group E inspection (all quality levels) - For qualification only.Inspection MIL-STD-750QualificationMethod ConditionsSubgroup 1Temperature cycling (air to air)Hermetic sealFine leakGross leak Electrical measurements Subgroup 2 Intermittent lifeElectrical measurements Subgroup 3Not applicable Subgroup 4Not applicable Subgroup 5Not applicable 105110711037Test condition C, 500 cyclesSee group A, subgroup 2 and table III herein.Intermittent operation life: V CB = 10 V dc ,6,000 cycles.See group A, subgroup 2 and table III herein.12 devicesc = 045 devicesc = 015TABLE III. Groups B and C delta measurements. 1/ 2/ 3/Step Inspection MIL-STD-750Symbol Limit UnitMethod Conditions1Forward-current transfer ratio 3076V CE = 5 V dc; I C = 500µA dc; pulsed see 4.5.14/∆h FE4±25 percent change frominitial recorded reading2.Collector to emittervoltage (saturated)3071I C = 1.0 mA dc; I B = 100µA dc∆V CE(sat)4/ 5/±50 mV dc change frompreviously measured value.3.Collector to emittercutoff current 3041Bias condition C;V CB = 45 V dc∆I CES4/100 percent of initial valueor 2 nA dc, whichever isgreater.1/The delta measurements for group B, table VIa (JANS) of MIL-PRF-19500 are as follows:a.Subgroup 4, see table III herein, step 2.b.Subgroup 5, see table III herein, steps 1 and 3.2/The delta measurements for 4.4.2.2 herein (group B, JAN, JANTX, and JANTXV) are as follows: Steps 2 and 3 of table III shall be performed after each step in 4.4.2.2 herein.3/The delta measurements for group C, table VII of MIL-PRF-19500 are as follows: Subgroup 6, see table III herein, steps 1 and 3 for JANS, step 1 for JAN, JANTX, and JANTXV.4/Devices which exceed the group A limits for this test shall not be accepted.5/Applies to JANS level only.165. PACKAGING5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order (see6.2). When actual packaging of materiel is to be performed by DoD personnel, these personnel need to contact the responsible packaging activity to ascertain requisite packaging requirements. Packaging requirements are maintained by the Inventory Control Points' packaging activity within the Military Department or Defense Agency, or within the Military Departments' System Command. Packaging data retrieval is available from the managing Military Departments' or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible packaging activity.6. NOTES(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.)6.1 Intended use. The notes specified in MIL-PRF-19500 are applicable to this specification.6.2 Acquisition requirements. Acquisition documents should specify the following:a.Title, number, and date of this specification.b.Issue of DoDISS to be cited in the solicitation, and if required, the specific issue of individual documentsreferenced (see 2.2.1).c.Lead formation and finish may be specified (see 3.4.1).d.Type designation and product assurance level.e.Packaging requirements (see 5.1).6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are, at the time of award of contract, qualified for inclusion in Qualified Manufacturers List QML-19500 whether or not such products have actually been so listed by that date. The attention of the contractors is called to these requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the products covered by this specification. Information pertaining to qualification of products may be obtained from Defense Supply Center, Columbus, ATTN: DSCC-VQE, P.O. Box 3990, Columbus, OH 43216-5000.6.4 Suppliers of JANHC die. The qualified JANHC suppliers with the applicable letter version (example JANHCA1N645-1) will be identified on the QML.JANC ordering informationPIN Manufacturer43611341562N2484JANHCA2N2484JANHCB2N2484JANKCA2N2484JANKCB2N24846.5 Changes from previous issue. Marginal notations are not used in this revision to identify changes with respect to the previous issue due to the extensiveness of the changes.17。

RT9013-33GB中文资料

1DS9013-05 August 2007Pin ConfigurationsApplicationsCDMA/GSM Cellular Handsets Portable Information AppliancesLaptop, Palmtops, Notebook Computers Hand-Held InstrumentsMini PCI & PCI-Express Cards PCMCIA & New Cards500mA, Low Dropout, Low Noise Ultra-Fast Without Bypass Capacitor CMOS LDO RegulatorOrdering InformationMarking InformationFor marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail.General DescriptionThe RT9013 is a high-performance, 500mA LDO regulator,offering extremely high PSRR and ultra-low dropout. Ideal for portable RF and wireless applications with demanding performance and space requirements.The RT9013 quiescent current as low as 25μA, further prolonging the battery life. The RT9013 also works with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices.The RT9013 consumes typical 0.7μA in shutdown mode and has fast turn-on time less than 40μs. The other features include ultra-low dropout voltage, high output accuracy,current limiting protection, and high ripple rejection ratio.Available in the SOT-23-5, SC-70-5 and WDFN-6L 2x2package.(TOP VIEW)WDFN-6L 2x2FeaturesWide Operating Voltage Ranges : 2.2V to 5.5V Low Dropout : 250mV at 500mA Ultra-Low-Noise for RF ApplicationUltra-Fast Response in Line/Load Transient Current Limiting Protection Thermal Shutdown ProtectionHigh Power Supply Rejection RatioOutput Only 1μF Capacitor Required for Stability TTL-Logic-Controlled Shutdown InputRoHS Compliant and 100% Lead (Pb)-FreeSOT-23-5 / SC-70-5RT901312 : 1.2V 13 : 1.3V 15 : 1.5V 16 : 1.6V :32 : 3.2V 33 : 3.3V 1B : 1.25V 1H : 1.85V 2H : 2.85VNote :Richtek Pb-free and Green products are :`RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020.`Suitable for use in SnPb or Pb-free soldering processes.`100% matte tin (Sn) plating.EN GND NC NC VOUTVINGND VIN EN2DS9013-05 August 2007 Typical Application CircuitFunctional Pin DescriptionFunction Block DiagramV OUTENVINAbsolute Maximum Ratings (Note 1)Supply Input Voltage------------------------------------------------------------------------------------------------------6VEN Input Voltage-----------------------------------------------------------------------------------------------------------6VPower Dissipation, P D @ T A= 25°CSOT-23-5--------------------------------------------------------------------------------------------------------------------0.4WSC-70-5----------------------------------------------------------------------------------------------------------------------0.3WWDFN-6L 2x2--------------------------------------------------------------------------------------------------------------0.606WPackage Thermal Resistance (Note 4)SOT-23-5, θJA---------------------------------------------------------------------------------------------------------------250°C/WSC-70-5, θJA----------------------------------------------------------------------------------------------------------------333°C/W WDFN-6L 2x2, θJA---------------------------------------------------------------------------------------------------------165°C/W WDFN-6L 2x2, θJC---------------------------------------------------------------------------------------------------------20°C/WLead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------------------260°CJunction T emperature-----------------------------------------------------------------------------------------------------125°CStorage T emperature Range--------------------------------------------------------------------------------------------−65°C to 150°C ESD Susceptibility (Note 2)HBM--------------------------------------------------------------------------------------------------------------------------2kVMM----------------------------------------------------------------------------------------------------------------------------200V Recommended Operating Conditions (Note 3)Supply Input Voltage------------------------------------------------------------------------------------------------------2.2V to 5.5VJunction T emperature Range--------------------------------------------------------------------------------------------−40°C to 125°C Ambient T emperature Range--------------------------------------------------------------------------------------------−40°C to 85°C Electrical Characteristics(V= V + 0.5V, V= V, C= C= 1μF (Ceramic), T= 25°C unless otherwise specified)To be continuedDS9013-05 August 34DS9013-05 August 2007 Note 1. Stresses listed as the above “Absolute Maximum Ratings ” may cause permanent damage to the device. These are forstress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability.Note 2. Devices are ESD sensitive. Handling precaution recommended.Note 3. The device is not guaranteed to function outside its operating conditions.Note 4. θJA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of JEDEC 51-3thermal measurement standard. The case position of θJC is on the exposed pad for the WDFN-6L 2x2 packages.Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by I Q = I IN - I OUT under noload condition (I OUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current.Note 6. The dropout voltage is defined as V IN -V OUT , which is measured when V OUT is V OUT(NORMAL) - 100mV.Note 7. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for loadregulation in the load range from 10mA to 500mA.5DS9013-05 August 2007Typical Operating CharacteristicsOutput Voltage vs. Temperature1.401.421.441.461.481.501.521.541.561.581.60-50-25255075100125Temperature O u t p u t V o l t a g e (V )(°C)(C IN = C OUT = 1μ/X7R, unless otherwise specified)Dropout Voltage vs. Load Current050100150200250300350050100150200250300350400450500Load Current (mA)D r o p o u t V o l t a ge (m V )V IN = 2.5V, I LOAD = 75mA Start UpTime (5μs/Div)E N P i n V o l t a g e (V )O u t p u t V o l t a g e (V )4201.00.50RT9013-15PQWV IN = 2.5V, I LOAD = 50mA EN Pin Shutdown ResponseE N P i n V o l t a g e (V )Time (100μs/Div)O u t p u t V o l t a g e (V )420210RT9013-15PQW Quiescent Current vs. Temperature1012141618202224262830-50-250255075100125Temperature Q u i e s c e n t C u r r e n t (u A )(°C)Dropout Voltage vs. Load Current50100150200250300350050100150200250300350400450500Load Current (mA)D r o p o u t V o l t a g e (m V )6DS9013-05 August 2007 V IN = 2.5V, I LOAD= 10mA to 100mAL o a d C u r r e n t (m A )Time (100μs/Div)O u t p u t V o l t a g e D e v i a t i o n (m V )100500500-50RT9013-15PQWV IN = 2.5V, I LOAD = 10mA to 300mAL o a d C u r r e n t (m A )Time (100μs/Div)O u t p u t V o l t a g e D e v i a t i o n (m V )4002000500-50RT9013-15PQWV IN = 2.6V to 3.6V, I LOAD = 10mAI n p u t V o l t ag e D e v i a t i o n (V )Time (100μs/Div)O u t p u t V o l t a g e D e v i a t i o n (m V )3.62.6200-20RT9013-15PQWI n p u t V o l t a g e De v i a t i o n (V )Time (100μs/Div)O u t p u t V o l t a g e D e v i at i o n (m V )3.62.6200-20V IN = 2.6V to 3.6V, I LOAD = 100mART9013-15PQWTime (10ms/Div)V IN = 3.0V (By Battery), No Load NoiseTime (10ms/Div)N o i s e (μV /D i v )3002001000-100-200-300RT9013-15PQW7DS9013-05 August 2007PSRR-70-60-50-40-30-20-1001020101001000100001000001000000Frequency (Hz)P S R R (d B )Time (10ms/Div)8DS9013-05 August 2007 Applications InformationLike any low-dropout regulator, the external capacitors used with the RT9013 must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1μF on the RT9013 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground.Any good quality ceramic can be used for this capacitor.The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response.The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The RT9013 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1μF with ESR is > 20m Ω on the RT9013 output ensures stability. The RT9013 still works well with output capacitor of other types due to the wide stable ESR range. Figure 1. shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response,stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the RT9013and returned to a clean analog ground.Figure 1EnableThe RT9013 goes into sleep mode when the EN pin is in a logic low condition. During this condit ion, the RT9013 has an EN pin to turn on or turn off regulator, When the EN pin is logic hight, the regulator will be turned on. The supply current to 0.7μA typical. The EN pin may be directly tied to V IN to keep the part on. The Enable input is CMOS logic and cannot be left floating.PSRRThe power supply rejection ratio (PSRR) is defined as the gain from the input to output divided by the gain from the supply to the output. The PSRR is found to be⎟⎠⎞⎜⎝⎛×=ΔSupply Error ΔGain log 20 PSRR Note that when heavy load measuring, Δsupply will cause Δtemperature. And Δtemperature will cause Δoutput voltage. So the heavy load PSRR measuring is include temperature effect.Current limitThe RT9013 contains an independent current limiter, which monitors and controls the pass transistor's gate voltage,limiting the output current to 0.6A (typ.). The output can be shorted to ground indefinitely without damaging the part.Thermal ConsiderationsThermal protection limits power dissipation in RT9013.When the operation junction temperature exceeds 170°C,the OTP circuit starts the thermal shutdown function and turns the pass element off. The pass element turn on again after the junction temperature cools by 30°C.For continuous operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is :P D = (V IN − V OUT ) x I OUT + V IN x I QThe maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula :P D(MAX) = ( T J(MAX) − T A ) /θJARegion of Stable C OUT ESR vs. Load Current0.0010.010.1110100100200300400500Load Current (mA)R e g i o n o f S t a b l e C O U T E S R (Ω)9DS9013-05 August 2007Figure 2. Derating Curves for RT9013 PackagesWhere T J(MAX) is the maximum operation junction temperature, T A is the ambient temperature and the θJA is the junction to ambient thermal resistance.For recommended operating conditions specification of RT9013, where T J(MAX) is the maximum junction temperature of the die (125°C) and T A is the operated ambient temperature. The junction to ambient thermal resistance θJA (θJA is layout dependent) for WDFN-6L 2x2package is 165°C/W, SOT-23-5 package is 250°C/W and SC-70-5 package is 333°C/W on the standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at T A = 25°C can be calculated by following formula :P D(MAX) = (125°C − 25°C) / 165 = 0.606 W for WDFN-6L 2x2 packagesP D(MAX) = (125°C − 25°C) / 250 = 0.400 W for SOT-23-5packagesP D(MAX) = (125°C − 25°C) / 333 = 0.300 W for SC-70-5packagesThe maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA . For RT9013 packages, the Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed.00.10.20.30.40.50.60.7012.52537.55062.57587.5100113125Ambient Temperature P o w e r D is s i p a t i o n (W )(°C)10DS9013-05 August 2007Outline DimensionA1HLSOT-23-5 Surface Mount PackageRT9013Preliminary11DS9013-05 August 2007A1HLSC -70-5 Surface Mount Package12DS9013-05 August 2007Richtek Technology CorporationHeadquarter5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C.Tel: (8863)5526789 Fax: (8863)5526611Richtek Technology CorporationTaipei Office (Marketing)8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C.Tel: (8862)89191466 Fax: (8862)89191465Email: marketing@W-Type 6L DFN 2x2 Package。

NTR2101PT1G中文资料

0.04
TJ = 25°C
TJ = −55°C 0.02
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Applications
• High Side Load Switch • DC−DC Conversion • Cell Phone, Notebook, PDAs, etc.
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon manufacturing location.
ORDERING INFORMATION
Device
Package
Shipping†
VGS = −2.2 V 6
4
VGS = −1.8 V
10 VDS ≥ −10 V
8
6
TJ = 150°C
TJ = 25°C 4
2
VGS = −1.4 V
VGS = −1.2 V
0
0
1
2
3
4
5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics

THS3091中文资料

高电压，低失真，电流反馈运算放大器·低失真- 77 dBc的HD2在10兆赫，RL = 1 K- 69 dBc的在10 MHz的HD3，R L = 1千瓦·低噪音- 14 PA / ÖHz同相电流噪声- 17 PA / ÖHz反相电流噪声- 2 NV / ÖHz电压噪声·高转换率：7300 V /μs的（G = 5 V0 = 20 VPP）·宽带：210兆赫（G = 2，RL = 100瓦）·高输出电流驱动器：± 250毫安·宽电源电压范围：± 5 V至± 15 V的·省电特性：（THS3095只有）·高电压的任意波形·电源FET驱动器·引脚驱动程序VDSL线路驱动器THS3091和THS3095是高电压，低失真，高速电流反馈设计工作在宽电源放大器±5 V的要求大，线性输出信号，如PIN，功率FET，和VDSL线路驱动器的应用到± 15 V的范围内。

THS3095功能掉电引脚（PD）放大器置于低功耗待机模式，降低静态电流从950毫安到500μA。

总谐波结合的宽电源电压范围在10 MHz时为-69 dBc的低失真，除了7300 V /μs的高压摆率使得非常适合用于高电压的任意THS3091 / 5波形驱动器应用。

此外，有处理能力大的电压摆幅，驾驶到高电阻和高电容负载，同时保持良好的稳定时间性能，使这些器件引脚的驱动程序和PowerFET驱动器应用的理想选择。

THS3091和THS3095提供8引脚· VDSL的线路驱动器，采用SOIC（D）和8引脚SOIC（DDA）的包PowerPAD™。

请注意，在得克萨斯州的关键应用的可用性，标准保修，并使用一个重要的通知仪器的半导体产品和免责条款及其出现在此数据表的结束。

PowerPAD是德州仪器的商标。

SFTB中文资料

LM2734ZThin SOT231A Load Step-Down DC-DC RegulatorGeneral DescriptionThe LM2734Z regulator is a monolithic,high frequency,PWM step-down DC/DC converter assembled in a 6-pin Thin SOT23and LLP non pull back package.It provides all the active functions to provide local DC/DC conversion with fast transient response and accurate regulation in the smallest possible PCB area.With a minimum of external components and online design support through WEBENCH ®™,the LM2734Z is easy to use.The ability to drive 1A loads with an internal 300m ΩNMOS switch using state-of-the-art 0.5µm BiCMOS technol-ogy results in the best power density available.The world class control circuitry allows for on-times as low as 13ns,thus supporting exceptionally high frequency conversion over the entire 3V to 20V input operating range down to the minimum output voltage of 0.8V.Switching frequency is internally set to 3MHz,allowing the use of extremely small surface mount inductors and chip capacitors.Even though the operating frequency is very high,efficiencies up to 85%are easy to achieve.External shutdown is included,featuring an ultra-low stand-by current of 30nA.The LM2734Z utilizes current-mode control and internal compensation to provide high-performance regulation over a wide range of operating conditions.Additional features include internal soft-start cir-cuitry to reduce inrush current,pulse-by-pulse current limit,thermal shutdown,and output over-voltage protection.Featuresn Thin SOT23-6package,or 6lead LLP package n 3.0V to 20V input voltage range n 0.8V to 18V output voltage range n 1A output currentn 3MHz switching frequency n 300m ΩNMOS switch n 30nA shutdown currentn 0.8V,2%internal voltage reference n Internal soft-startn Current-Mode,PWM operation nThermal shutdownApplicationsn DSL Modemsn Local Point of Load Regulation n Battery Powered Devices nUSB Powered DevicesTypical Application CircuitEfficiency vs Load Current V IN =5V,V OUT =3.3V2013030120130345WEBENCH ™is a trademark of Transim.March 2005LM2734Z Thin SOT231A Load Step-Down DC-DC Regulator©2005National Semiconductor Corporation Connection Diagrams201303056-Lead TSOTNS Package Number MK06A201303606-Lead LLP (3mm x 3mm)NS Package Number SDE06AOrdering InformationOrder Number Package TypeNSC Package DrawingPackage MarkingSupplied AsLM2734ZMK TSOT-6MK06A SFTB 1000Units on Tape and Reel LM2734ZMKX TSOT-6MK06A SFTB 3000Units on Tape and Reel LM2734ZSD 6-Lead LLP SDE06A L163B 1000Units on Tape and Reel LM2734ZSDX6-Lead LLPSDE06AL163B4500Units on Tape and Reel*Contact the local sales office for the lead-free package.Pin DescriptionPin Name Function1BOOSTBoost voltage that drives the internal NMOS control switch.A bootstrap capacitor is connected between the BOOST and SW pins.2GNDSignal and Power ground pin.Place the bottom resistor of the feedback network as close as possible to this pin for accurate regulation.3FB Feedback pin.Connect FB to the external resistor divider to set output voltage.4EN Enable control input.Logic high enables operation.Do not allow this pin to float or be greater than V IN +0.3V.5V IN Input supply voltage.Connect a bypass capacitor to this pin.6SW Output switch.Connects to the inductor,catch diode,and bootstrap capacitor.DAPGNDThe Die Attach Pad is internally connected to GNDL M 2734Z 2Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.V IN-0.5V to24V SW Voltage-0.5V to24V Boost Voltage-0.5V to30V Boost to SW Voltage-0.5V to6.0V FB Voltage-0.5V to3.0V EN Voltage-0.5V to(V IN+0.3V) Junction Temperature150˚C ESD Susceptibility(Note2)2kV Storage Temp.Range-65˚C to150˚CSoldering InformationInfrared/Convection Reflow(15sec)220˚C Wave Soldering Lead Temp.(10sec)260˚COperating Ratings(Note1)V IN3V to20V SW Voltage-0.5V to20V Boost Voltage-0.5V to25V Boost to SW Voltage 1.6V to5.5V Junction Temperature Range−40˚C to+125˚C Thermal ResistanceθJA(Note3)TSOT23–6118˚C/WElectrical CharacteristicsSpecifications with standard typeface are for T J=25˚C,and those in boldface type apply over the full Operating Tempera-ture Range(T J=-40˚C to125˚C).V IN=5V,V BOOST-V SW=5V unless otherwise specified.Datasheet min/max specification limits are guaranteed by design,test,or statistical analysis.Symbol Parameter ConditionsMin(Note4)Typ(Note5)Max(Note4)UnitsV FB Feedback Voltage0.7840.8000.816V∆V FB/∆V IN Feedback Voltage LineRegulation V IN=3V to20V0.01%/VI FB Feedback Input Bias Current Sink/Source10250nAUVLO Undervoltage Lockout V IN Rising 2.74 2.90V Undervoltage Lockout V IN Falling 2.0 2.3UVLO Hysteresis0.300.440.62F SW Switching Frequency 2.2 3.0 3.6MHz D MAX Maximum Duty Cycle7885% D MIN Minimum Duty Cycle8%R DS(ON)Switch ON Resistance V BOOST-V SW=3V(TSOT Package)300600mΩV BOOST-V SW=3V(LLP Package)340650mΩI CL Switch Current Limit V BOOST-V SW=3V 1.2 1.7 2.5AI Q Quiescent Current Switching 1.5 2.5mAQuiescent Current(shutdown)V EN=0V30nA I BOOST Boost Pin Current(Switching) 4.256mAV EN_TH Shutdown Threshold Voltage V EN Falling0.4V Enable Threshold Voltage V EN Rising 1.8I EN Enable Pin Current Sink/Source10nAI SW Switch Leakage40nANote1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device isintended to be functional,but specific performance is not guaranteed.For guaranteed specifications and the test conditions,see Electrical Characteristics.Note2:Human body model,1.5kΩin series with100pF.Note3:Thermal shutdown will occur if the junction temperature exceeds165˚C.The maximum power dissipation is a function of T J(MAX),θJA and T A.The maximum allowable power dissipation at any ambient temperature is P D=(T J(MAX)–T A)/θJA.All numbers apply for packages soldered directly onto a3”x3”PCboard with2oz.copper on4layers in still air.For a2layer board using1oz.copper in still air,θJA=204˚C/W.Note4:Guaranteed to National’s Average Outgoing Quality Level(AOQL).Note5:Typicals represent the most likely parametric norm.LM2734Z3Typical Performance CharacteristicsAll curves taken at V IN =5V,V BOOST -V SW =5V,L1=2.2µHand T A =25˚C,unless specified otherwise.Efficiency vs Load CurrentV OUT =5VEfficiency vs Load CurrentV OUT =3.3V2013033620130351Efficiency vs Load CurrentV OUT =1.5VOscillator Frequency vs Temperature2013033720130327Line RegulationV OUT =1.5V,I OUT =500mA Line RegulationV OUT =3.3V,I OUT =500mA2013035420130355L M 2734Z 4Application InformationTHEORY OF OPERATIONThe LM2734Z is a constant frequency PWM buck regulator IC that delivers a 1A load current.The regulator has a preset switching frequency of 3MHz.This high frequency allows the LM2734Z to operate with small surface mount capacitors and inductors,resulting in a DC/DC converter that requires a minimum amount of board space.The LM2734Z is internally compensated,so it is simple to use,and requires few exter-nal components.The LM2734Z uses current-mode control to regulate the output voltage.The following operating description of the LM2734Z will refer to the Simplified Block Diagram (Figure 1)and to the wave-forms in Figure 2.The LM2734Z supplies a regulated output voltage by switching the internal NMOS control switch at constant frequency and variable duty cycle.A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator.When this pulse goes low,the output control logic turns on the internal NMOS control switch.During this on-time,the SW pin voltage (V SW )swings up to approximately V IN ,and the inductor current (I L )in-creases with a linear slope.I L is measured by the current-sense amplifier,which generates an output proportional to the switch current.The sense signal is summed with the regulator’s corrective ramp and compared to the error am-plifier’s output,which is proportional to the difference be-tween the feedback voltage and V REF .When the PWM comparator output goes high,the output switch turns off until the next switching cycle begins.During the switch off-time,inductor current discharges through Schottky diode D1,which forces the SW pin to swing below ground by theforward voltage (V D )of the catch diode.The regulator loop adjusts the duty cycle (D)to maintain a constant output voltage.BOOST FUNCTIONCapacitor C BOOST and diode D2in Figure 3are used to generate a voltage V BOOST .V BOOST -V SW is the gate drive voltage to the internal NMOS control switch.To properly drive the internal NMOS switch during its on-time,V BOOST needs to be at least 1.6V greater than V SW .Although the LM2734Z will operate with this minimum voltage,it may not have sufficient gate drive to supply large values of outputBlock Diagram20130306FIGURE 1.20130307FIGURE 2.LM2734Z Waveforms of SW Pin Voltage andInductor Current LM2734Z5Application Information(Continued)current.Therefore,it is recommended that V BOOST be greater than 2.5V above V SW for best efficiency.V BOOST –V SW should not exceed the maximum operating limit of 5.5V.5.5V >V BOOST –V SW >2.5V for best performance.When the LM2734Z starts up,internal circuitry from the BOOST pin supplies a maximum of 20mA to C BOOST .This current charges C BOOST to a voltage sufficient to turn the switch on.The BOOST pin will continue to source current to C BOOST until the voltage at the feedback pin is greater than 0.76V.There are various methods to derive V BOOST :1.From the input voltage (V IN )2.From the output voltage (V OUT )3.From an external distributed voltage rail (V EXT )4.From a shunt or series zener diodeIn the Simplifed Block Diagram of Figure 1,capacitor C BOOST and diode D2supply the gate-drive current for the NMOS switch.Capacitor C BOOST is charged via diode D2by V IN .During a normal switching cycle,when the internal NMOS control switch is off (T OFF )(refer to Figure 2),V BOOST equals V IN minus the forward voltage of D2(V FD2),during which the current in the inductor (L)forward biases the Schottky diode D1(V FD1).Therefore the voltage stored across C BOOST isV BOOST -V SW =V IN -V FD2+V FD1When the NMOS switch turns on (T ON ),the switch pin rises toV SW =V IN –(R DSON x I L ),forcing V BOOST to rise thus reverse biasing D2.The voltage at V BOOST is thenV BOOST =2V IN –(R DSON x I L )–V FD2+V FD1which is approximately2V IN -0.4Vfor many applications.Thus the gate-drive voltage of the NMOS switch is approximatelyV IN -0.2VAn alternate method for charging C BOOST is to connect D2to the output as shown in Figure 3.The output voltage should be between 2.5V and 5.5V,so that proper gate voltage will be applied to the internal switch.In this circuit,C BOOST provides a gate drive voltage that is slightly less than V OUT .In applications where both V IN and V OUT are greater than 5.5V,or less than 3V,C BOOST cannot be charged directly from these voltages.If V IN and V OUT are greater than 5.5V,C BOOST can be charged from V IN or V OUT minus a zener voltage by placing a zener diode D3in series with D2,asshown in Figure 4.When using a series zener diode from the input,ensure that the regulation of the input supply doesn’t create a voltage that falls outside the recommended V BOOST voltage.(V INMAX –V D3)<5.5V (V INMIN –V D3)>1.6VAn alternative method is to place the zener diode D3in a shunt configuration as shown in Figure 5.A small 350mW to 500mW 5.1V zener in a SOT-23or SOD package can be used for this purpose.A small ceramic capacitor such as a 6.3V,0.1µF capacitor (C4)should be placed in parallel with the zener diode.When the internal NMOS switch turns on,a pulse of current is drawn to charge the internal NMOS gate capacitance.The 0.1µF parallel shunt capacitor ensures that the V BOOST voltage is maintained during this time.Resistor R3should be chosen to provide enough RMS cur-rent to the zener diode (D3)and to the BOOST pin.A recommended choice for the zener current (I ZENER )is 1mA.The current I BOOST into the BOOST pin supplies the gate current of the NMOS control switch and varies typically according to the following formula:I BOOST =(D +0.5)x (V ZENER –V D2)mAwhere D is the duty cycle,V ZENER and V D2are in volts,and I BOOST is in milliamps.V ZENER is the voltage applied to the anode of the boost diode (D2),and V D2is the average forward voltage across D2.Note that this formula for I BOOST gives typical current.For the worst case I BOOST ,increase the current by 25%.In that case,the worst case boost current will beI BOOST-MAX =1.25x I BOOSTR3will then be given byR3=(V IN -V ZENER )/(1.25x I BOOST +I ZENER )For example,let V IN =10V,V ZENER =5V,V D2=0.7V,I ZENER =1mA,and duty cycle D =50%.ThenI BOOST =(0.5+0.5)x (5-0.7)mA =4.3mA R3=(10V -5V)/(1.25x 4.3mA +1mA)=787Ω20130308FIGURE 3.V OUT Charges C BOOST20130309FIGURE 4.Zener Reduces Boost Voltage from V IN L M 2734Z6Application Information(Continued)ENABLE PIN /SHUTDOWN MODEThe LM2734Z has a shutdown mode that is controlled by the enable pin (EN).When a logic low voltage is applied to EN,the part is in shutdown mode and its quiescent current drops to typically 30nA.Switch leakage adds another 40nA from the input supply.The voltage at this pin should never exceed V IN +0.3V.SOFT-STARTThis function forces V OUT to increase at a controlled rate during start up.During soft-start,the error amplifier’s refer-ence voltage ramps from 0V to its nominal value of 0.8V in approximately 200µs.This forces the regulator output to ramp up in a more linear and controlled fashion,which helps reduce inrush current.OUTPUT OVERVOLTAGE PROTECTIONThe overvoltage comparator compares the FB pin voltage to a voltage that is 10%higher than the internal reference Vref.Once the FB pin voltage goes 10%above the internal refer-ence,the internal NMOS control switch is turned off,which allows the output voltage to decrease toward regulation.UNDERVOLTAGE LOCKOUTUndervoltage lockout (UVLO)prevents the LM2734Z from operating until the input voltage exceeds 2.74V(typ).The UVLO threshold has approximately 440mV of hyster-esis,so the part will operate until V IN drops below 2.3V(typ).Hysteresis prevents the part from turning off during power up if V IN is non-monotonic.CURRENT LIMITThe LM2734Z uses cycle-by-cycle current limiting to protect the output switch.During each switching cycle,a current limit comparator detects if the output switch current exceeds 1.7A (typ),and turns off the switch until the next switching cycle begins.THERMAL SHUTDOWNThermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature ex-ceeds 165˚C.After thermal shutdown occurs,the output switch doesn’t turn on until the junction temperature drops to approximately 150˚C.Design GuideINDUCTOR SELECTIONThe Duty Cycle (D)can be approximated quickly using the ratio of output voltage (V O )to input voltage (V IN ):The catch diode (D1)forward voltage drop and the voltage drop across the internal NMOS must be included to calculate a more accurate duty cycle.Calculate D by using the follow-ing formula:V SW can be approximated by:V SW =I O x R DS(ON)The diode forward drop (V D )can range from 0.3V to 0.7V depending on the quality of the diode.The lower V D is,the higher the operating efficiency of the converter.The inductor value determines the output ripple current.Lower inductor values decrease the size of the inductor,but increase the output ripple current.An increase in the inductor value will decrease the output ripple current.The ratio of ripple current (∆i L )to output current (I O )is optimized when it is set between 0.3and 0.4at 1A.The ratio r is defined as:One must also ensure that the minimum current limit (1.2A)is not exceeded,so the peak current in the inductor must be calculated.The peak current (I LPK )in the inductor is calcu-lated by:I LPK =I O +∆I L /2If r =0.5at an output of 1A,the peak current in the inductor will be 1.25A.The minimum guaranteed current limit over all operating conditions is 1.2A.One can either reduce r to 0.4resulting in a 1.2A peak current,or make the engineering judgement that 50mA over will be safe enough with a 1.7A typical current limit and 6sigma limits.When the designed maximum output current is reduced,the ratio r can be in-creased.At a current of 0.1A,r can be made as high as 0.9.The ripple ratio can be increased at lighter loads because the net ripple is actually quite low,and if r remains constant the inductor value can be made quite large.An equation empirically developed for the maximum ripple ratio at any current below 2A is:r =0.387x I OUT -0.3667Note that this is just a guideline.20130348FIGURE 5.Boost Voltage Supplied from the ShuntZener on V IN LM2734Z7Design Guide(Continued)The LM2734Z operates at frequencies allowing the use ofceramic output capacitors without compromising transientresponse.Ceramic capacitors allow higher inductor ripplewithout significantly increasing output ripple.See the outputcapacitor section for more details on calculating output volt-age ripple.Now that the ripple current or ripple ratio is determined,theinductance is calculated by:where f s is the switching frequency and I O is the outputcurrent.When selecting an inductor,make sure that it iscapable of supporting the peak output current without satu-rating.Inductor saturation will result in a sudden reduction ininductance and prevent the regulator from operating cor-rectly.Because of the speed of the internal current limit,thepeak current of the inductor need only be specified for therequired maximum output current.For example,if the de-signed maximum output current is0.5A and the peak currentis0.7A,then the inductor should be specified with a satura-tion current limit of>0.7A.There is no need to specify thesaturation or peak current of the inductor at the1.7A typicalswitch current limit.The difference in inductor size is a factorof5.Because of the operating frequency of the LM2734Z,ferrite based inductors are preferred to minimize core losses.This presents little restriction since the variety of ferritebased inductors is stly,inductors with lower seriesresistance(DCR)will provide better operating efficiency.Forrecommended inductors see Example Circuits.INPUT CAPACITORAn input capacitor is necessary to ensure that V IN does notdrop excessively during switching transients.The primaryspecifications of the input capacitor are capacitance,volt-age,RMS current rating,and ESL(Equivalent Series Induc-tance).The recommended input capacitance is10µF,al-though4.7µF works well for input voltages below6V.Theinput voltage rating is specifically stated by the capacitormanufacturer.Make sure to check any recommended derat-ings and also verify if there is any significant change incapacitance at the operating input voltage and the operatingtemperature.The input capacitor maximum RMS input cur-rent rating(I RMS-IN)must be greater than:It can be shown from the above equation that maximumRMS capacitor current occurs when D=0.5.Always calcu-late the RMS at the point where the duty cycle,D,is closestto0.5.The ESL of an input capacitor is usually determinedby the effective cross sectional area of the current path.Alarge leaded capacitor will have high ESL and a0805ce-ramic chip capacitor will have very low ESL.At the operatingfrequencies of the LM2734Z,certain capacitors may have anESL so large that the resulting impedance(2πfL)will behigher than that required to provide stable operation.As aresult,surface mount capacitors are strongly recommended.Sanyo POSCAP,Tantalum or Niobium,Panasonic SP orCornell Dubilier ESR,and multilayer ceramic capacitors(MLCC)are all good choices for both input and output ca-pacitors and have very low ESL.For MLCCs it is recom-mended to use X7R or X5R dielectrics.Consult capacitormanufacturer datasheet to see how rated capacitance variesover operating conditions.OUTPUT CAPACITORThe output capacitor is selected based upon the desiredoutput ripple and transient response.The initial current of aload transient is provided mainly by the output capacitor.Theoutput ripple of the converter is:When using MLCCs,the ESR is typically so low that thecapacitive ripple may dominate.When this occurs,the out-put ripple will be approximately sinusoidal and90˚phaseshifted from the switching action.Given the availability andquality of MLCCs and the expected output voltage of designsusing the LM2734Z,there is really no need to review anyother capacitor technologies.Another benefit of ceramic ca-pacitors is their ability to bypass high frequency noise.Acertain amount of switching edge noise will couple throughparasitic capacitances in the inductor to the output.A ce-ramic capacitor will bypass this noise while a tantalum willnot.Since the output capacitor is one of the two externalcomponents that control the stability of the regulator controlloop,most applications will require a minimum at10µF ofoutput capacitance.Capacitance can be increased signifi-cantly with little detriment to the regulator stability.Like theinput capacitor,recommended multilayer ceramic capacitorsare X7R or X5R.Again,verify actual capacitance at thedesired operating voltage and temperature.Check the RMS current rating of the capacitor.The RMScurrent rating of the capacitor chosen must also meet thefollowing condition:CATCH DIODEThe catch diode(D1)conducts during the switch off-time.ASchottky diode is recommended for its fast switching timesand low forward voltage drop.The catch diode should bechosen so that its current rating is greater than:I D1=I O x(1-D)The reverse breakdown rating of the diode must be at leastthe maximum input voltage plus appropriate margin.To im-prove efficiency choose a Schottky diode with a low forwardvoltage drop.BOOST DIODEA standard diode such as the1N4148type is recommended.For V BOOST circuits derived from voltages less than3.3V,asmall-signal Schottky diode is recommended for greater ef-ficiency.A good choice is the BAT54small signal diode.BOOST CAPACITORA ceramic0.01µF capacitor with a voltage rating of at least6.3V is sufficient.The X7R and X5R MLCCs provide the bestperformance.LM2734Z8Design Guide(Continued)OUTPUT VOLTAGEThe output voltage is set using the following equation whereR2is connected between the FB pin and GND,and R1isconnected between V O and the FB pin.A good value for R2is10kΩ.PCB Layout ConsiderationsWhen planning layout there are a few things to considerwhen trying to achieve a clean,regulated output.The mostimportant consideration when completing the layout is theclose coupling of the GND connections of the C IN capacitorand the catch diode D1.These ground ends should be closeto one another and be connected to the GND plane with atleast two through-holes.Place these components as close tothe IC as possible.Next in importance is the location of theGND connection of the C OUT capacitor,which should benear the GND connections of C IN and D1.There should be a continuous ground plane on the bottomlayer of a two-layer board except under the switching nodeisland.The FB pin is a high impedance node and care should betaken to make the FB trace short to avoid noise pickup andinaccurate regulation.The feedback resistors should beplaced as close as possible to the IC,with the GND of R2placed as close as possible to the GND of the IC.The V OUTtrace to R1should be routed away from the inductor and anyother traces that are switching.High AC currents flow through the V IN,SW and V OUT traces,so they should be as short and wide as possible.However,making the traces wide increases radiated noise,so thedesigner must make this trade-off.Radiated noise can bedecreased by choosing a shielded inductor.The remaining components should also be placed as closeas possible to the IC.Please see Application Note AN-1229for further considerations and the LM2734Z demo board asan example of a four-layer layout.Calculating Efficiency,andJunction Temperature:The complete LM2734Z DC/DC converter efficiency can becalculated in the following manner.OrCalculations for determining the most significant powerlosses are shown below.Other losses totaling less than2%are not discussed.Power loss(P LOSS)is the sum of two basic types of losses inthe converter,switching and conduction.Conduction lossesusually dominate at higher output loads,where as switchinglosses remain relatively fixed and dominate at lower outputloads.The first step in determining the losses is to calculatethe duty cycle(D).V SW is the voltage drop across the internal NFET when it ison,and is equal to:V SW=I OUT x R DSONV D is the forward voltage drop across the Schottky diode.Itcan be obtained from the Electrical Characteristics section.Ifthe voltage drop across the inductor(V DCR)is accounted for,the equation becomes:This usually gives only a minor duty cycle change,and hasbeen omitted in the examples for simplicity.The conduction losses in the free-wheeling Schottky diodeare calculated as follows:P DIODE=V D x I OUT(1-D)Often this is the single most significant power loss in thecircuit.Care should be taken to choose a Schottky diode thathas a low forward voltage drop.Another significant external power loss is the conductionloss in the output inductor.The equation can be simplified to:P IND=I OUT2x R DCRThe LM2734Z conduction loss is mainly associated with theinternal NFET:P COND=I OUT2x R DSON x DSwitching losses are also associated with the internal NFET.They occur during the switch on and off transition periods,where voltages and currents overlap resulting in power loss.The simplest means to determine this loss is to empiricallymeasuring the rise and fall times(10%to90%)of the switchat the switch node:P SWF=1/2(V IN x I OUT x freq x T FALL)P SWR=1/2(V IN x I OUT x freq x T RISE)P SW=P SWF+P SWRTypical Rise and Fall Times vs Input VoltageV IN T RISE T FALL5V8ns4ns10V9ns6ns15V10ns7nsAnother loss is the power required for operation of the inter-nal circuitry:P Q=I Q x V INI Q is the quiescent operating current,and is typically around1.5mA.The other operating power that needs to be calcu-lated is that required to drive the internal NFET:P BOOST=I BOOST x V BOOSTLM2734Z9Calculating Efficiency,andJunction Temperature:(Continued)V BOOST is normally between3VDC and5VDC.The I BOOSTrms current is approximately4.25mA.Total power lossesare:Design Example1:Operating ConditionsV IN 5.0V P OUT 2.5WV OUT 2.5V P DIODE151mWI OUT 1.0A P IND75mWV D0.35V P SWF53mWFreq3MHz P SWR53mWI Q 1.5mA P COND187mWT RISE8ns P Q7.5mWT FALL8ns P BOOST21mWR DSON330mΩP LOSS548mWIND DCR75mΩD0.568η=82%Calculating the LM2734Z JunctionTemperatureThermal Definitions:T J=Chip junction temperatureT A=Ambient temperatureRθJC=Thermal resistance from chip junction to device caseRθJA=Thermal resistance from chip junction to ambient airHeat in the LM2734Z due to internal power dissipation isremoved through conduction and/or convection.Conduction:Heat transfer occurs through cross sectionalareas of material.Depending on the material,the transfer ofheat can be considered to have poor to good thermal con-ductivity properties(insulator vs conductor).Heat Transfer goes as:silicon→package→lead frame→PCB.Convection:Heat transfer is by means of airflow.This couldbe from a fan or natural convection.Natural convectionoccurs when air currents rise from the hot device to coolerair.Thermal impedance is defined as:Thermal impedance from the silicon junction to the ambientair is defined as:This impedance can vary depending on the thermal proper-ties of the PCB.This includes PCB size,weight of copperused to route traces and ground plane,and number of layerswithin the PCB.The type and number of thermal vias canalso make a large difference in the thermal impedance.Thermal vias are necessary in most applications.They con-duct heat from the surface of the PCB to the ground plane.Four to six thermal vias should be placed under the exposedpad to the ground plane if the LLP package is used.If theThin SOT23-6package is used,place two to four thermalvias close to the ground pin of the device.The datasheet specifies two different RθJA numbers for theThin SOT23–6package.The two numbers show the differ-ence in thermal impedance for a four-layer board with2oz.copper traces,vs.a four-layer board with1oz.copper.RθJAequals120˚C/W for2oz.copper traces and GND plane,and235˚C/W for1oz.copper traces and GND plane.Method1:To accurately measure the silicon temperature for a givenapplication,two methods can be used.The first methodrequires the user to know the thermal impedance of thesilicon junction to case.(RθJC)is approximately80˚C/W forthe Thin SOT23-6package.Knowing the internal dissipationfrom the efficiency calculation given previously,and the casetemperature,which can be empirically measured on thebench we have:Therefore:T J=(RθJC x P LOSS)+T CDesign Example2:Operating ConditionsV IN 5.0V P OUT 2.5WV OUT 2.5V P DIODE151mWI OUT 1.0A P IND75mWV D0.35V P SWF53mWFreq3MHz P SWR53mWI Q 1.5mA P COND187mWT RISE8ns P Q7.5mWT FALL8ns P BOOST21mWR DSON330mΩP LOSS548mWIND DCR75mΩD0.56820130373FIGURE6.Cross-Sectional View of Integrated CircuitMounted on a Printed Circuit Board.LM2734Z10。

DL5242中文资料

元器件交易网
MCC
Features

omponents 21201 Itasca Street Chatsworth !"# $
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DL5221 THRU DL5281
500 mW Zener Diode 2.4 to 200 Volts
MINIMELF
Cathode Mark
• • • •
Wide Voltage Range Available Glass Package High Temp Soldering: 250°C for 10 Seconds At Terminals Surface Mount Package
Figure 1 - Typical Capacitance 100
C
B A pf 10 At zero volts At –2 Volts V R
DIM A B C INCHES MIN .134 .008 .055 DIMENSIONS MM MIN 3.40 .20 1.40
1
0
100
VZ
200
0.075”
0.105
0.030”
50 100 150 Temperature °C Power Dissipation (mW) - Versus - Temperature °C
0

元器件交易网
DL5221 thru DL5281
MCC PART NUMBER DL5221 DL5222 DL5223 DL5224 DL5225 DL5226 DL5227 DL5228 DL5229 DL5230 DL5231 DL5232 DL5233 DL5234 DL5235 DL5236 DL5237 DL5238 DL5239 DL5240 DL5241 DL5242 DL5243 DL5244 DL5245 DL5246 DL5247 DL5248 DL5249 DL5250 DL5251 DL5252 DL5253 DL5254 DL5255 DL5256 DL5257 DL5258 DL5259 DL5260 DL5261 DL5262 DL5263 DL5264 DL5265 DL5266 DL5267 DL5268 DL5269 DL5270 DL5271 DL5272 DL5273 DL5274 DL5275 DL5276 DL5277 DL5278 DL5279 DL5280 DL5281 NOMINAL ZENER VOLTAGE VZ @ IZT VOLTS 2.4 2.5 2.7 2.8 3.0 3.3 3.6 3.9 4.3 4.7 5.1 5.6 6.0 6.2 6.8 7.5 8.2 8.7 9.1 10 11 12 13 14 15 16 17 18 19 20 22 24 25 27 28 30 33 36 39 43 47 51 56 60 62 68 75 82 87 91 100 110 120 130 140 150 160 170 180 190 200 TEST CURRENT I ZT mA 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 9.5 9.0 8.5 7.8 7.4 7.0 6.6 6.2 5.6 5.2 5.0 4.6 4.5 4.2 3.8 3.4 3.2 3.0 2.7 2.5 2.2 2.1 2.0 1.8 1.7 1.5 1.4 1.4 1.3 1.1 1.0 0.95 0.90 0.85 0.80 0.74 0.68 0.66 0.65 MAXIMUM ZENER IMPEDANCE ‘B’ SUFFIX ONLY Z ZT @ IZT Z ZK @I ZK = 0.25mA OHMS OHMS 30 30 30 30 29 28 24 23 22 19 17 11 7.0 7.0 5.0 6.0 8.0 8.0 10 17 22 30 13 15 16 17 19 21 23 25 29 33 35 41 44 49 58 70 80 93 105 125 150 170 185 230 270 330 370 400 500 750 900 1100 1300 1500 1700 1900 2200 2400 2500 1200 1250 1300 1400 1600 1600 1700 1900 2000 1900 1600 1600 1600 1000 750 500 500 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 700 700 800 900 1000 1100 1300 1400 1400 1600 1700 2000 2200 2300 2600 3000 4000 4500 4500 5000 5500 5500 6000 6500 7000

SMDJ中文资料

MDE Semiconductor, Inc.78-150 Calle Tampico, Unit 210, La Quinta, CA. U.S.A. 92253 Tel: 760-564-8656 • Fax: 760-564-2414SMDJ SERIESSURFACE MOUNT TRANSIENT VOLTAGE SUPPRESSORVOLTAGE-5.0 TO 170 Volts3000 Watt Peak Pulse PowerFEATURES• For surface mounted applications in order to optimize board space • Low profile package • Built-in strain relief• Glass passivated junction • Low inductance• Excellent clamping capability• Repetition rate (duty cycle):0.01%• Fast response time: typically less than1.0 ps from 0 volts to BV for unidirectional types • Typical IR less than 1µA above 10V • High temperature soldering: 250°C/10 seconds at terminals• Plastic package has Underwriters Laboratory Flammability Classification 94 V-OMECHANICAL DATACase: JEDEC DO214AB. Molded plastic over glass passivated junctionTerminals: Solder plated, solderable per MIL-STD-750, Method 2026Polarity: Color band denoted positive end (cathode)except BidirectionalStandard Packaging: 12mm tape (EIA STD RS-481)Weight: 0.007 ounces, 0.021 grams)DEVICES FOR BIPOLAR APPLICATIONSFor Bidirectional use C or CA Suffix for types SMDJ5.0 thru types SMDJ170 (e.g. SMDJ5.0C, SMDJ170CA)Electrical characteristics apply in both directions.MAXIMUM RATINGS AND CHARACTERISTICSRatings at 25°C ambient temperature unless otherwise specified.RATING SYMBOL VALUEUNITSPeak Pulse Power Dissipation on 10/1000 µswaveform (NOTE 1, 2, Fig.1)Ippm SEE TABLE 1Amps Superimposed on Rated Load, (JEDEC Method)(Note2, 3)Operatings and Storage Temperature Range Tj, Tstg -55 +150°C NOTES:1. Non-repetitive current pulse, per Fig.3 and derated above Ta=25 °C per Fig.2.2. Mounted on Copper Pad area of 0.8x0.8" (20x20mm) per Fig.5.3. 8.3ms single half sine-wave, or equivalent square wave, Duty cycle=4 pulses per minutes maximum.P ppmMinimum 3000Watts Peak Pulse Current of on 10/1000 µs waveform (Note 1,Fig 3)I FSM100Amps Peak Forward Surge Current, 8.3ms Single Half Sine-waveMDE Semiconductor, Inc.MDE Semiconductor, Inc.78-150 Calle Tampico, Unit 210, La Quinta, CA., USA 92253 Tel: 760-564-8656 • Fax: 760-564-2414 3000 Watt Surface Mount TVSUNI- DIRECTIONALPARTNUMBERDEVICEMARKINGCODEUNI-POLARDEVICEMARKINGCODE BI-POLARREVERSESTANDOFFVOLTAGEVRWM (V)BREAKDOWNVOLTAGEVBR (V)MIN. @ ITBREAKDOWNVOLTAGEVBR (V)MAX. @ ITTESTCURRENT(It)mAMAXIMUMCLAMPINGVOLTAGE@Ipp Vc (V)PEAKPULSECURRENTIpp (A)REVERSELEAKAGE@ VRWMIR (µA)SMDJ5.0RDD DDD 5.00 6.407.30109.6312.5800 SMDJ5.0A RDE DDE 5.00 6.407.00109.2326.1800 SMDJ6.0RDF DDF 6.00 6.678.151011.4263.2800 SMDJ6.0A RDG DDG 6.00 6.677.371010.3291.3800 SMDJ6.5RDH DDH 6.507.228.821012.3243.9500 SMDJ6.5A RDK DDK 6.507.227.981011.2267.9500 SMDJ7.0PDL DDL7.007.789.511013.3225.6200 SMDJ7.0A PDM DDM7.007.788.601012.0250.0200 SMDJ7.5PDN DDN7.508.3310.20114.3209.8100 SMDJ7.5A PDP DDP7.508.339.21112.9232.6100 SMDJ8.0PDQ DDQ8.008.8910.90115.0200.050 SMDJ8.0A PDR DDR8.008.899.83113.6220.650 SMDJ8.5PDS DDS8.509.4411.50115.9188.720 SMDJ8.5A PDT DDT8.509.4410.40114.4208.320 SMDJ9.0PDU DDU9.0010.0012.20116.9177.510 SMDJ9.0A PDV DDV9.0010.0011.10115.4194.810 SMDJ10PDW DDW10.0011.1013.60118.8159.65 SMDJ10A PDX DDX10.0011.1012.30117.0176.55 SMDJ11PDY DDY11.0012.2014.90120.1149.35 SMDJ11A PDZ DDZ11.0012.2013.50118.2164.85 SMDJ12PED DED12.0013.3016.30122.0136.45 SMDJ12A PEE DEE12.0013.3014.70119.9150.85 SMDJ13PEF DEF13.0014.4017.60123.8126.15 SMDJ13A PEG DEG13.0014.4015.90121.5139.55 SMDJ14PEH DEH14.0015.6019.10125.8116.35 SMDJ14A PEK DEK14.0015.6017.20123.2129.35 SMDJ15PEL DEL15.0016.7020.40126.9111.55 SMDJ15A PEM DEM15.0016.7018.50124.4123.05 SMDJ16PEN DEN16.0017.8021.80128.8104.25 SMDJ16A PEP DEP16.0017.8019.70126.0115.45 SMDJ17PEQ DEQ17.0018.9023.10130.598.45 SMDJ17A PER DER17.0018.9020.90127.6108.75 SMDJ18PES DES18.0020.0024.40132.293.25 SMDJ18A PET DET18.0020.0022.10129.2102.75 SMDJ20PEU DEU20.0022.2027.10135.883.85 SMDJ20A PEV DEV20.0022.2024.50132.492.65 SMDJ22PEW DEW22.0024.4029.80139.476.15 SMDJ22A PEX DEX22.0024.4026.90135.584.55 SMDJ24PEY DEY24.0026.7032.60143.069.85 SMDJ24A PEZ DEZ24.0026.7029.50138.977.15 SMDJ26PFD DFD26.0028.9035.30146.664.45 SMDJ26A PFE DFE26.0028.9031.90142.171.35 SMDJ28PFF DFF28.0031.1038.00150.159.55 SMDJ28A PFG DFG28.0031.1034.40145.466.15 SMDJ30PFH DFH30.0033.3040.70153.556.15 SMDJ30A PFK DFK30.0033.3036.80148.462.05 SMDJ33PFL DFL33.0036.7044.90159.050.85 SMDJ33A PFM DFM33.0036.7040.60153.356.35MDE Semiconductor, Inc.78-150 Calle Tampico, Unit 210, La Quinta, CA., USA 92253 Tel: 760-564-8656 • Fax: 760-564-2414 3000 Watt Surface Mount TVSUNI- DIRECTIONALPARTNUMBERDEVICEMARKINGCODEUNI-POLARDEVICEMARKINGCODE BI-POLARREVERSESTANDOFFVOLTAGEVRWM (V)BREAKDOWNVOLTAGEVBR (V)MIN. @ ITBREAKDOWNVOLTAGEVBR (V)MAX. @ ITTESTCURRENT(It)mAMAXIMUMCLAMPINGVOLTAGE@Ipp Vc (V)PEAKPULSECURRENTIpp (A)REVERSELEAKAGE@ VRWMIR (µA)SMDJ36PFN DFN36.0040.0048.90164.346.75 SMDJ36A PFP DFP36.0040.0044.20158.151.65 SMDJ40PFQ DFQ40.0044.4054.30171.442.05 SMDJ40A PFR DFR40.0044.4049.10164.546.55 SMDJ43PFS DFR43.0047.8058.40176.739.15 SMDJ43A PFT DFT43.0047.8052.80169.443.25 SMDJ45PFU DFU45.0050.0061.10180.337.45 SMDJ45A PFV DFV45.0050.0055.30172.741.35 SMDJ48PFW DFW48.0053.3065.20185.535.15 SMDJ48A PFX DFX48.0053.3058.90177.438.85 SMDJ51PFY DFY51.0056.7069.30191.132.95 SMDJ51A PFZ DFZ51.0056.7062.70182.436.45 SMDJ54A PGD DGD54.0060.0073.30196.331.25 SMDJ54A PGE DGE54.0060.0066.30187.134.45 SMDJ58PGF DGF58.0064.4078.701103.029.15 SMDJ58A PGG DGG58.0064.4071.20193.632.15 SMDJ60PGH DGH60.0066.7081.501107.028.05 SMDJ60A PGK DGK60.0066.7073.70196.831.05 SMDJ64PGL DGL64.0071.1086.901114.026.35 SMDJ64A PGM DGM64.0071.1078.601103.029.15 SMDJ70PGN DGN70.0077.8095.101125.024.05 SMDJ70A PGP DGP70.0077.8086.001113.026.55 SMDJ75PGQ DGQ75.0083.30102.001134.022.45 SMDJ75A PGR DGR75.0083.3092.101121.024.85 SMDJ78PGS DGS78.0086.70106.001139.021.65 SMDJ78A PGT DGT78.0086.7095.801126.023.85 SMDJ85PGU DGU85.0094.40115.001151.019.95 SMDJ85A PGV DGV85.0094.40104.001137.021.95 SMDJ90PGW DGW90.00100.00122.001160.018.85 SMDJ90A PGX DGX90.00100.00111.001146.020.55 SMDJ100PGY DGY100.00111.00136.001179.016.85 SMDJ100A PGZ DGZ100.00111.00123.001162.018.55 SMDJ110PHD DHD110.00122.00149.001196.015.35 SMDJ110A PHE DHE110.00122.00135.001177.016.95 SMDJ120PHF DHF120.00133.00163.001214.014.05 SMDJ120A PHG DHG120.00133.00147.001193.015.55 SMDJ130PHH DHH130.00144.00176.001230.013.05 SMDJ130A PHK DHK130.00144.00159.001209.014.45 SMDJ150PHL DHL150.00167.00204.001268.011.25 SMDJ150A PHM DHM150.00167.00185.001243.012.35 SMDJ160PHN DHN160.00178.00218.001287.010.55 SMDJ160A PHP DHP160.00178.00197.001259.011.65 SMDJ170PHQ DHQ170.00189.00231.001304.09.95 SMDJ170A PHR DHR170.00189.00209.001275.010.95 For Bidirectional type having Vrwm of 10volts and less, the IR limit is double.。

BQ27500_1资料

1INTRODUCTION1.1FEATURES1.2APPLICATIONS1.3DESCRIPTION•Battery Fuel Gauge for 1-Series Li-Ion •Smartphones Applications•PDAs•Resides on System Main Board•Digital Still and Video Cameras –Works With Embedded or Removable •Handheld TerminalsBattery Packs •MP3or Multimedia Players•Two Varieties–bq27500:Uses PACK+,PACK–,and T Battery Terminals–bq27501:Works With Battery ID Resistor in Battery PackThe Texas Instruments bq27500/01system-side Li-Ion battery fuel gauge is a microcontroller •Microcontroller Peripheral Provides:peripheral that provides fuel gauging for single-cell –Accurate Battery Fuel GaugingLi-Ion battery packs.The device requires little system –Internal Temperature Sensor for System microcontroller firmware development.The Temperature Reportingbq27500/01resides on the system main board,and –Battery Low Interrupt Warning manages an embedded battery (non-removable)or a –Battery Insertion Indicator removable battery pack.–Battery ID Detection–96Bytes of Non-Volatile Scratch-Pad The bq27500/01uses the patented Impedance FLASHTrack™algorithm for fuel gauging,and provides information such as remaining battery capacity •Battery Fuel Gauge Based on Patented (mAh),state-of-charge (%),run-time to empty (min.),Impedance Track™Technologybattery voltage (mV),and temperature (°C).–Models the Battery Discharge Curve for Accurate Time-to-Empty Predictions Battery fuel gauging with the bq27500requires only –Automatically Adjusts for Battery Aging,PACK+(P+),PACK–(P–),and Thermistor (T)Battery Self-Discharge,andconnections to a removable battery pack or Temperature/Rate Inefficienciesembedded battery.The bq27501works with –Low-Value Sense Resistor (10m Ωor Less)identification resistors in battery packs to gauge •I 2C™Interface for Connection to System batteries of different fundamental chemistries and/or Microcontroller Portsignificantly different rated capacities.•12-Pin 2,5-mm ×4-mm SON PackageTYPICAL APPLICATIONPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document.Impedance Track is a trademark of Texas Instruments.I 2C is a trademark of Philips Electronics.PRODUCTION DATA information is current as of publication date.Copyright ©2007–2008,Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.Contents1INTRODUCTION..........................................4.1DATA COMMANDS..................................1.1FEATURES........................................... 4.2DATA FLASH INTERFACE.........................1.2APPLICATIONS...................................... 4.3MANUFACTURER INFORMATION BLOCKS......1.3DESCRIPTION....................................... 4.4ACCESS MODES...................................2DEVICE INFORMATION.................................4.5SEALING/UNSEALING DATA FLASH..............2.1AVAILABLE OPTIONS............................... 4.6DATA FLASH SUMMARY...........................2.2PIN DIAGRAMS......................................5FUNCTIONAL DESCRIPTION........................2.3TERMINAL FUNCTIONS............................. 5.1FUEL GAUGING....................................3ELECTRICAL SPECIFICATIONS......................5.2IMPEDANCE TRACK™VARIABLES...............3.1ABSOLUTE MAXIMUM RATINGS................... 5.3DETAILED DESCRIPTION OF DEDICATED PINS.3.2RECOMMENDED OPERATING CONDITIONS...... 5.4TEMPERATURE MEASUREMENT.................3.3DISSIPATION RATINGS............................. 5.5OVERTEMPERATURE INDICATION...............5.6CHARGING AND CHARGE-TERMINATION3.4POWER-ON RESET..................................INDICATION.........................................3.5INTERNAL TEMPERATURE SENSORCHARACTERISTICS................................. 5.7POWER MODES....................................3.6HIGH-FREQUENCY OSCILLATOR.................. 5.8POWER CONTROL.................................3.7LOW-FREQUENCY OSCILLATOR.................. 5.9AUTOCALIBRATION................................3.8INTEGRATING ADC(COULOMB COUNTER)6APPLICATION-SPECIFIC INFORMATION..........CHARACTERISTICS.................................6.1BATTERY PROFILE STORAGE AND SELECTION3.9ADC(TEMPERATURE AND CELL6.2APPLICATION-SPECIFIC FLOW AND CONTROL.MEASUREMENT)CHARACTERISTICS.............7COMMUNICATIONS3.10DATA FLASH MEMORY CHARACTERISTICS...................................................................3.11I2C-COMPATIBLE INTERFACE COMMUNICATION7.1I2C INTERFACE.....................................TIMING CHARACTERISTICS........................8REFERENCE SCHEMATICS..........................4GENERAL DESCRIPTION..............................8.1SCHEMATIC........................................2Contents Submit Documentation Feedback2DEVICE INFORMATION2.1AVAILABLE OPTIONS2.2PIN DIAGRAMSBAT V SSSRN SRPV CC BAT_GD SDA SCLBAT_LOW TSBI/TOUTBAT V SSV CC BAT_LOW TS BI/TOUTNCSRN SRPBAT_GD SDA SCLRID 2.3TERMINAL FUNCTIONSTAPE and FIRMWARE COMMUNICATIONPART NUMBER PACKAGE (2)T AREEL VERSION (1)FORMATQUANTITY bq27500DRZR 3000V1.06bq27500DRZT 250bq27500DRZR-V100300012-pin,2,5-mm ×4-mmV1.08–40°C to 85°CI 2CSONbq27500DRZT-V100250bq27501DRZR 3000V1.08bq27501DRZT250(1)Ordering the device with the latest firmware version is recommended.To check the fiirmware revision and Errata list see SLUZ015(2)For the most current package and ordering information,see the Package Option Addendum at the end of this document,or see the TI website at .TERMINALTYPE (1)DESCRIPTIONbq27500bq27501NAME PIN NO.PIN NO.BAT 44I Cell-voltage measurement input.ADC inputBattery-good indicator.Active-low by default,though polarity can be configured through BAT_GD 1212O the [BATG_POL]of Operation Configuration .Open-drain outputBattery-low output indicator.Active-high by default,though polarity can be configured BAT_LOW 11O through the [BATL_POL]in Operation Configuration .Push-pull outputBattery-insertion detection input.Power pin for pack thermistor network.ThermistorBI/TOUT 22I/O multiplexer control pin.Open-drain I/e with pullup resistor >1M Ω(1.8M Ωtypical).NC 9––No connection (bq27500)RID –9I Resistor ID input (bq27501).Analog input with current sourcing capabilitiesSlave I 2C serial communications clock input line for communication with system (master).SCL 1111I Open-drain I/e with 10-k Ωpullup resistor (typical).Slave I 2C serial communications data line for communication with system (master).SDA 1010I/O Open-drain I/e with 10-k Ωpullup resistor (typical).Analog input pin connected to the internal coulomb counter where SRN is nearest the SRN 88IA System V SS connection.Connect to 5-m Ωto 20-m Ωsense resistor.Analog input pin connected to the internal coulomb counter,where SRP is nearest the SRP 77IA PACK–connection.Connect to 5-m Ωto 20-m Ωsense resistor.TS 33IA Pack thermistor voltage sense (use 103AT-type thermistor).ADC input V CC 55P Processor power input.Decouple with 0.1-µF capacitor,minimum.Device ground.Electrically connected to the IC exposed thermal pad (do not use thermal V SS 66Ppad as primary ground.Connect thermal pad to Vss via a PCB trace).(1)I =Digital input,O =Digital output,I/O =Digital input/output,IA =Analog input,P =Power connectionSubmit Documentation Feedback DEVICE INFORMATION 33ELECTRICAL SPECIFICATIONS3.1ABSOLUTE MAXIMUM RATINGS3.2RECOMMENDED OPERATING CONDITIONSover operating free-air temperature range (unless otherwise noted)(1)PARAMETERVALUE UNIT V CC Supply voltage range–0.3to 2.75V V IOD Open-drain I/O pins (BI/TOUT,SDA,SDL,BAT_GD)–0.3to 6VV BAT BAT input pin–0.3to 6V I Input voltage range to all other pins (TS,SRP,SRN,RID [bq27501only],NC –0.3to V CC +0.3V [bq27500only])Human-body model (HBM),BAT pin 1.5ESD kV Human-body model (HBM),all other pins 2T A Operating free-air temperature range –40to 85°C T F Functional temperature range –40to 100°C T stg Storage temperature range–65to 150°C(1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.T A =25°C,V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYP MAX UNIT V CC Supply voltage2.42.5 2.6V Fuel gauge in NORMAL mode.I CC Normal operating-mode current 100µA I LOAD >Sleep Current Fuel gauge in SLEEP mode.I SLP Low-power storage-mode current 15µA I LOAD <Sleep CurrentFuel gauge in HIBERNATE mode.I HIB Hibernate operating-mode current 1µA I LOAD <Hibernate Current V OL Output voltage,low (SDA,BAT_LOW,I OL =0.5mA 0.4V BI/TOUT)V OH(PP)Output voltage,high (BAT_LOW)I OH =–1mAV CC –0.5V External pullup resistor connected to V OH(OD)Output voltage,high (SDA,SCL,BI/TOUT)V CC –0.5VV CCInput voltage,low (SDA,SCL)–0.30.6V IL Input voltage,low (BI/TOUT)BAT INSERT CHECK MODE active –0.30.6VInput voltage,high (SDA,SCL) 1.26V IH(OD)Input voltage,high (BI/TOUT)BAT INSERT CHECK MODE active1.26C IN Input capacitance (SDA,SCL,BI/TOUT)35pF V A1Input voltage range (TS,RID [bq27501only])V SS –0.1252V V A2Input voltage range (BAT)V SS –0.1255V V A3Input voltage range (SRP,SRN)V SS –0.1250.125V t PUCDPower-up communication delay250ms ELECTRICAL SPECIFICATIONS 4Submit Documentation Feedback3.3DISSIPATION RATINGS3.4POWER-ON RESET3.5INTERNAL TEMPERATURE SENSOR CHARACTERISTICS3.6HIGH-FREQUENCY OSCILLATOR3.7LOW-FREQUENCY OSCILLATORT A ≤40°C DERATING FACTORPACKAGE R θJA POWER RATINGT A >40°C12-pin DRZ (1)482mW5.67mW/°C176°C/W(1)This data is based on using a four-layer JEDEC high-K board with the exposed die pad connected to a Cu pad on the board.The board pad is connected to the ground plane by a 2-×2-via matrix.T A =–40°C to 85°C,typical values at T A =25°C and V BAT =3.6V (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYP MAX UNIT V IT+Positive-going battery voltage input at V CC 2.09 2.2 2.31V V HYSHysteresis voltage45115185mVT A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMINTYP MAXUNIT G TEMPTemperature sensor voltage gain–2mV/°CT A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMINTYP MAXUNIT f OSC Operating frequency 2.097MHzT A =0°C to 60°C–2%0.38%2%f EIO Frequency error (1)(2)T A =–20°C to 70°C –3%0.38%3%T A =–40°C to 85°C–4.5%0.38%4.5%t SXO Start-up time (3)2.55ms(1)The frequency error is measured from 2.097MHz.(2)The frequency drift is included and measured from the trimmed frequency at V CC =2.5V,T A =25°C.(3)The start-up time is defined as the time it takes for the oscillator output frequency to be within ±3%of typical oscillator frequency.T A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYP MAXUNIT f LOSC Operating frequency 32.768kHzT A =0°C to 60°C–1.5%0.25% 1.5%f LEIO Frequency error (1)(2)T A =–20°C to 70°C –2.5%0.25% 2.5%T A =–40°C to 85°C–4%0.25%4%t LSXO Start-up time(3)500µs(1)The frequency drift is included and measured from the trimmed frequency at V CC =2.5V,T A =25°C.(2)The frequency error is measured from 32.768kHz.(3)The start-up time is defined as the time it takes for the oscillator output frequency to be within ±3%of typical oscillator frequency.Submit Documentation Feedback ELECTRICAL SPECIFICATIONS 53.8INTEGRATING ADC (COULOMB COUNTER)CHARACTERISTICS3.9ADC (TEMPERATURE AND CELL MEASUREMENT)CHARACTERISTICS3.10DATA FLASH MEMORY CHARACTERISTICS3.11I 2C-COMPATIBLE INTERFACE COMMUNICATION TIMING CHARACTERISTICST A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYPMAX UNIT V SR Input voltage range (V SR =V (SRN)–V (SRP))–0.1250.125V t SR_CONV Conversion time Single conversion1s Resolution 1415bits V SR_OS Input offset10µV INL Integral nonlinearity error ±0.007±0.034%FSR Z SR_IN Effective input resistance (1)2.5M ΩI SR_LKG Input leakage current(1)0.3µA(1)Specified by design.Not tested in production.T A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYPMAXUNIT V ADC_IN Input voltage range –0.21V t ADC_CONV Conversion time 125ms Resolution 1415bits V ADC_OS Input offset1mV Effective input resistance (TS,RID Z ADC18M Ω[bq27501only])(1)bq27500/1not measuring cell voltage 8M ΩZ ADC2Effective input resistance (BAT)(1)bq27500/1measuging cell voltage100k ΩI ADC_LKG Input leakage current (1)0.3µA(1)Specified by design.Not tested in production.T A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYPMAXUNIT t ONData retention (1)10Years Flash-programming write cycles (1)20,000Cycles t WORDPROG Word programming time (1)2ms I CCPROG Flash-write supply current (1)510mA(1)Specified by design.Not production testedT A =–40°C to 85°C,2.4V <V CC <2.6V;typical values at T A =25°C and V CC =2.5V (unless otherwise noted)PARAMETERTEST CONDITIONSMINTYPMAXUNIT t r SCL/SDA rise time 1µs t f SCL/SDA fall time 300ns t w(H)SCL pulse duration (high)4µs t w(L)SCL pulse duration (low) 4.7µs t su(STA)Setup for repeated start 4.7µs t d(STA)Start to first falling edge of SCL 4µs t su(DAT)Data setup time250nsELECTRICAL SPECIFICATIONS 6Submit Documentation FeedbackI2C-COMPATIBLE INTERFACE COMMUNICATION TIMING CHARACTERISTICS(continued)T A=–40°C to85°C,2.4V<V CC<2.6V;typical values at T A=25°C and V CC=2.5V(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNITReceive mode0t h(DAT)Data hold time nsTransmit mode300t su(STOP)Setup time for stop4µst(BUF)Bus free time between stop and start 4.7µsf SCL Clock frequency10100kHzt BUSERR Bus error time-out17.321.2sFigure3-1.I2C-Compatible Interface Timing DiagramsSubmit Documentation Feedback ELECTRICAL SPECIFICATIONS74GENERAL DESCRIPTIONThe bq27500/1accurately predicts the battery capacity and other operational characteristics of a single Li-based rechargeable cell.It can be interrogated by a system processor to provide cell information,such as state-of-charge(SOC),time-to-empty(TTE)and time-to-full(TTF).Information is accessed through a series of commands,called Standard Commands.Further capabilities are provided by the additional Extended Commands set.Both sets of commands,indicated by the general format Command(),are used to read and write information contained within the bq27500/1control and status registers,as well as its data flash mands are sent from system to gauge using the bq27500/1I2C serial communications engine,and can be executed during application development,pack manufacture,or end-equipment operation.Cell information is stored in the bq27500/1in non-volatile flash memory.Many of these data flash locations are accessible during application development.They cannot be accessed directly during end-equipment operation.Access to these locations is achieved by either use of the bq27500/1 companion evaluation software,through individual commands,or through a sequence of data-flash-access commands.To access a desired data flash location,the correct data flash subclass and offset must be known.The bq27500/1provides96bytes of user-programmable data flash memory,partitioned into three32-byte blocks:Manufacturer Info Block A,Manufacturer Info Block B,and Manufacturer Info Block C.This data space is accessed through a data flash interface.For specifics on accessing the data flash,see Section4.3,Manufacturer Information Blocks.The key to the high-accuracy fuel gauging prediction of the bq27500/1is Texas Instruments'proprietary Impedance Track™algorithm.This algorithm uses cell measurements,characteristics,and properties to create state-of-charge predictions that can achieve less than1%error across a wide variety of operating conditions and over the lifetime of the battery.The bq27500/1measures charge/discharge activity by monitoring the voltage across a small-value series sense resistor(5mΩto20mΩ,typ.)located between the system Vss and the battery PACK–terminal.When a cell is attached to the bq27500/1,cell impedance is computed,based on cell current,cell open-circuit voltage(OCV),and cell voltage under loading conditions.The bq27500/1must use an NTC thermistor Semitec103AT for temperature measurement,or can also be configured to use its internal temperature sensor.The bq27500/1uses temperature to monitor the battery-pack environment,which is used for fuel gauging and cell protection functionality.To minimize power consumption,the bq27500/1has several power modes:NORMAL,SLEEP, HIBERNATE,and BAT INSERT CHECK.The bq27500/1passes automatically between these modes, depending upon the occurrence of specific events,though a system processor can initiate some of these modes directly.More details can be found in Section5.7,Power Modes.NOTEFORMATTING CONVENTIONS IN THIS DOCUMENT:Commands:italics with parentheses and no breaking spaces,e.g.,RemainingCapacity().Data flash:italics,bold,and breaking spaces,e.g.,Design CapacityRegister bits and flags:brackets and italics,e.g.,[TDA]Data flash bits:brackets,italics and bold,e.g.,[LED1]Modes and states:ALL CAPITALS,e.g.,UNSEALED mode.8Submit Documentation Feedback GENERAL DESCRIPTION4.1DATA COMMANDS4.1.1STANDARD DATA COMMANDSThe bq27500/1uses a series of2-byte standard commands to enable system reading and writing of battery information.Each standard command has an associated command-code pair,as indicated in Table4-1.Because each command consists of two bytes of data,two consecutive I2C transmissions must be executed both to initiate the command function,and to read or write the corresponding two bytes of data.Additional options for transferring data,such as spooling,are described in Section7,I2C Interface.Standard commands are accessible in NORMAL operation.Read/write permissions depend on the active access mode,SEALED or UNSEALED(for details on the SEALED and UNSEALED states,see Section4.4,Access Modes).Table4-1.Standard CommandsNAME COMMAND CODE UNITS SEALED ACCESS UNSEALED ACCESS Control()CNTL0x00/0x01N/A R/W R/WAtRate()AR0x02/0x03mA R/W R/W AtRateTimeToEmpty()ARTTE0x04/0x05Minutes R R/W Temperature()TEMP0x06/0x070.1K R R/WVoltage()VOLT0x08/0x09mV R R/WFlags()FLAGS0x0a/0x0b N/A R R/W NominalAvailableCapacity()NAC0x0c/0x0d mAh R R/W FullAvailableCapacity()FAC0x0e/0x0f mAh R R/W RemainingCapacity()RM0x10/0x11mAh R R/W FullChargeCapacity()FCC0x12/0x13mAh R R/W AverageCurrent()AI0x14/0x15mA R R/W TimeToEmpty()TTE0x16/0x17Minutes R R/W TimeToFull()TTF0x18/0x19Minutes R R/W StandbyCurrent()SI0x1a/0x1b mA R R/W StandbyTimeToEmpty()STTE0x1c/0x1d Minutes R R/W MaxLoadCurrent()MLI0x1e/0x1f mA R R/W MaxLoadTimeToEmpty()MLTTE0x20/0x21Minutes R R/W AvailableEnergy()AE0x22/0x23mWh R R/W AveragePower()AP0x24/0x25mW R R/W TimeToEmptyAtConstantPower()TTECP0x26/0x27Minutes R R/WReserved RSVD0x28/0x29N/A R R/W CycleCount()CC0x2a/0x2b Counts R R/W StateOfCharge()SOC0x2c/0x2d%R R/WSubmit Documentation Feedback GENERAL DESCRIPTION94.1.1.1Control():0x00/0x01Issuing a Control()command requires a subsequent2-byte subcommand.These additional bytes specify the particular control function desired.The Control()command allows the system to control specific features of the bq27500/1during normal operation and additional features when the bq27500/1is in different access modes,as described in Table4-2.Table4-2.Control()SubcommandsCNTL SEALEDCNTL FUNCTION DESCRIPTIONDATA ACCESSCONTROL_STATUS0x0000Yes Reports the status of DF checksum,hibernate,IT,etc. DEVICE_TYPE0x0001Yes Reports the device type(eg:"bq27500")FW_VERSION0x0002Yes Reports the firmware version on the device typeHW_VERSION0x0003Yes Reports the hardware version of the device typeEnables a data flash checksum to be generated andDF_CHECKSUM0x0004Noreports on a readRESET_DATA0x0005Yes Returns reset dataReserved0x0006No Not to be usedPREV_MACWRITE0x0007Yes Returns previous MAC command codeReports the chemical identifier of the Impedance Track™CHEM_ID0x0008YesconfigurationBOARD_OFFSET0x0009No Forces the device to measure and store the board offset CC_INT_OFFSET0x000a No Forces the device to measure the internal CC offset WRITE_OFFSET0x000b No Forces the device to store the internal CC offsetSET_HIBERNATE0x0011Yes Forces CONTROL_STATUS[HIBERNATE]to1CLEAR_HIBERNATE0x0012Yes Forces CONTROL_STATUS[HIBERNATE]to0SEALED0x0020No Places the bq27500/1in SEALED access modeIT_ENABLE0x0021No Enables the Impedance Track™algorithmIF_CHECKSUM0x0022No Reports the instruction flash checksumCAL_MODE0x0040No Places the bq27500/1in calibration modeRESET0x0041No Forces a full reset of the bq27500/14.1.1.1.1CONTROL_STATUS:0x0000Instructs the fuel gauge to return status information to control addresses0x00/0x01.The status word includes the following information.Table4-3.CONTROL_STATUS Bit DefinitionsFlags()bit7bit6bit5bit4bit3bit2bit1bit0 High byte–FAS SS CSV CCA BCA––Low byte–HIBERNATE–SLEEP LDMD RUP_DIS VOK QENFAS=Status bit indicating the bq27500/1is in FULL ACCESS SEALED state.Active when set.SS=Status bit indicating the bq27500/1is in SEALED state.Active when set.CSV=Status bit indicating a valid data flash checksum has been generated.Active when set.CCA=Status bit indicating the bq27500/1coulomb counter calibration routine is active.Active when set.BCA=Status bit indicating the bq27500/1board calibration routine is active.Active when set.HIBERNATE=Status bit indicating a request for entry into HIBERNATE from SLEEP mode.True when set.Default is0.SLEEP=Status bit indicating the bq27500/1is in SLEEP mode.True when set.LDMD=Status bit indicating the bq27500/1Impedance Track™algorithm is using constant-power mode.True when set.Default is0 (constant-current mode).RUP_DIS=Status bit indicating the bq27500/1Ra table updates are disabled.Updates disabled when set.VOK=Status bit indicating the bq27500/1voltages are okay for Qmax.True when set.QEN=Status bit indicating the bq27500/1Qmax updates enabled.True when set.10Submit Documentation Feedback GENERAL DESCRIPTION4.1.1.1.2DEVICE_TYPE:0x0001Instructs the fuel gauge to return the device type to addresses0x00/0x01.4.1.1.1.3FW_VERSION:0x0002Instructs the fuel gauge to return the firmware version to addresses0x00/0x01.4.1.1.1.4HW_VERSION:0x0003Instructs the fuel gauge to return the hardware version to addresses0x00/0x01.4.1.1.1.5DF_CHECKSUM:0x0004Instructs the fuel gauge to compute the checksum of the data flash memory.Once the checksum has been calculated and stored,CONTROL_STATUS[CVS]is set.The checksum value is written and returned to addresses0x00/0x01(UNSEALED mode only).The checksum is not calculated in SEALED mode;however,the checksum value can still be read.4.1.1.1.6RESET_DATA:0x0005Instructs the fuel gauge to return the reset data to addresses0x00/0x01,with the low byte(0x00)being the number of full resets and the high byte(0x01)the number of partial resets.4.1.1.1.7PREV_MACWRITE:0x0007Instructs the fuel gauge to return the previous command written to addresses0x00/0x01.4.1.1.1.8CHEM_ID:0x0008Instructs the fuel gauge to return the chemical identifier for the Impedance Track™configuration to addresses0x00/0x01.4.1.1.1.9BOARD_OFFSET:0x0009Instructs the fuel gauge to compute the coulomb counter offset with internal short and then without internal short applied across the SR inputs.The difference between the two measurements is the board offset. After a delay of approximately32seconds,this offset value is returned to addresses0x00/0x01and written to data flash.The coulomb counter offset is also written to data flash.The CONROL STATUS [BCA]is also set.The user must prevent any charge or discharge current from flowing during the process. This function is only available when the fuel gauge is UNSEALED.When SEALED,this command only reads back the board-offset value stored in data flash.4.1.1.1.10CC_INT_OFFSET:0x000AInstructs the fuel gauge to compute the coulomb counter offset with internal short applied across the SR inputs.The offset value is returned to addresses0x00/0x01after a delay of approximately16seconds. This function is only available when the fuel gauge is UNSEALED.When SEALED,this command only reads back the CC_INT_OFFSET value stored in data flash.4.1.1.1.11WRITE_OFFSET:0x000BControl data of0x000b causes the fuel gauge to write the coulomb counter offset to data flash.4.1.1.1.12SET_HIBERNATE:0x0011Instructs the fuel gauge to force the CONTROL_STATUS[HIBERNATE]bit to1.This allows the gauge to enter the HIBERNATE power mode after the transition to SLEEP power state is detected.The [HIBERNATE]bit is automatically cleared upon exiting from HIBERNATE mode.4.1.1.1.13CLEAR_HIBERNATE:0x0012Instructs the fuel gauge to force the CONTROL_STATUS[HIBERNATE]bit to0.This prevents the gauge from entering the HIBERNATE power mode after the transition to the SLEEP power state is detected.It can also be used to force the gauge out of HIBERNATE mode.4.1.1.1.14SEALED:0x0020Instructs the fuel gauge to transition from the UNSEALED state to the SEALED state.The fuel gauge must always be set to the SEALED state for use in end equipment.4.1.1.1.15IT_ENABLE:0x0021This command forces the fuel gauge to begin the Impedance Track™algorithm,sets the active UpdateStatus n location to0x01and causes the[VOK]and[QEN]flags to be set in the CONTROL_STATUS register.[VOK]is cleared if the voltages are not suitable for a Qmax update.Once set,[QEN]cannot be cleared.This command is only available when the fuel gauge is UNSEALED.4.1.1.1.16IF_CHECKSUM:0x0022This command instructs the fuel gauge to compute the instruction flash checksum.In UNSEALED mode, the checksum value is returned to addresses0x00/0x01.The checksum is not calculated in SEALED mode;however,the checksum value can still be read.4.1.1.1.17CAL_MODE:0x0040This command instructs the fuel gauge to enter calibration mode.This command is only available when the fuel gauge is UNSEALED.4.1.1.1.18RESET:0x0041This command instructs the fuel gauge to perform a full reset.This command is only available when the fuel gauge is UNSEALED.4.1.1.2AtRate():0x02/0x03The AtRate()read-/write-word function is the first half of a two-function command set used to set the AtRate value used in calculations made by the AtRateTimeToEmpty()function.The AtRate()units are in mA.The AtRate()value is a signed integer,with negative values interpreted as a discharge current value.The AtRateTimeToEmpty()function returns the predicted operating time at the AtRate value of discharge.The default value for AtRate()is zero and forces AtRate()to return65,535.Both the AtRate()and AtRateTimeToEmpty()commands must only be used in NORMAL mode.4.1.1.3AtRateTimeToEmpty():0x04/0x05This read-word function returns an unsigned integer value of the predicted remaining operating time if the battery is discharged at the AtRate()value in minutes with a range of0to65,534.A value of65,535 indicates AtRate()=0.The fuel gauge updates AtRateTimeToEmpty()within1s after the system sets the AtRate()value.The fuel gauge automatically updates AtRateTimeToEmpty()based on the AtRate() value every1s.Both the AtRate()and AtRateTimeToEmpty()commands must only be used in NORMAL mode.4.1.1.4Temperature():0x06/0x07This read-word function returns an unsigned integer value of the temperature in units of0.1K measured by the fuel gauge and has a range of0to6,553.5K.4.1.1.5Voltage():0x08/0x09This read-word function returns an unsigned integer value of the measured cell-pack voltage in mV with a range of0to6,000mV.4.1.1.6Flags():0x0a/0x0bThis read-word function returns the contents of the fuel-gauge status register,depicting the current operating status.。

LPE-4841-100MB中文资料

PACKAGE CODE
INDUCTANCE VALUE
See the end of this data book for conversion tables
102
For technical questions, contact Magnetics@
Inductance Range: 10µH to 47000µH, measured at 0.10V RMS @ 10kHz without DC current, using an HP 4263A or HP 4284A impedance analyzer. DC Resistance Range: 0.03 ohm to 19.1 ohms, measured at + 25°C ± 5°C. Rated Current Range: 2.00 amps to .09 amps. Dielectric Withstanding Voltage: 500V RMS, 60Hz, 5 seconds.
NOTE: Pad layout guidelines per MIL-STD275E (printed wiring for electronic equipment). Tolerances: xx ± 0.01" [± 0.25mm]. xxx ± 0.005" [± 0.12mm].
DESCRIPTION - LPE-4841-102NA
元器件交易网
LPE-4841
Vishay Dale
Surface Mount Transformers/Inductors, Gapped and Ungapped, Custom Configurations Available

TNPW资料

STANDARD ELECTRICAL SPECIFICATIONS
MODEL POWER RATING P70°C (W) CECC INCH METRIC 40401-801 EIA 575 0402 1005 0.063 0.062 SIZE LIMITING ELEMENT TEMPERATURE TOLERANCE RESISTANCE VOLTAGE COEFFICIENT RANGE V MAX. 25 E-SERIES
DIMENSIONS
SIZE inch metric 0402 0603 0805 1206 1210 2010 2512 1005 1608 2012 3216 3225 L 1.00 ± 0.05 1.6 ± 0.2 2.0 ± 0.2 3.2 ± 0.15 3.2 ± 0.15 5.0 ± 0.15 6.3 ± 0.20 DIMENSIONS millimeters W 0.50 ± 0.05 0.81 ± 0.2 1.24 ± 0.2 1.6 ± 0.15 2.49 ± 0.15 2.5 ± 0.15 3.1 ± 0.15 H 0.35 ± 0.05 0.4 ± 0.1 0.4 ± 0. 1 0.61 ± 0.15 0.61 ± 0.15 0.61 ± 0.15 0.61 ± 0.15 T1 T2
TNPW0805 1K TNPW0603
Temperature Rise In °C
90 80 70 60 50 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 20 2512 2010 0402 0603 0805 1206
REFLOW SOLDERING a 0.4 0.5 0.7 0.9 0.9 1.0 1.0 b 0.6 0.9 1.3 1.7 2.5 2.5 3.2 l 0.5 1.0 1.2 2.0 2.0 3.9 5.2

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0.500 MIN.
0.016 0.022 0.500 0.610 0.014 0.0200来自89 1.120.050
0.013 0.100
1 2
0.55 DIMENSIONS IN MILLIMETERS
1
2 3
0.095 0.105 DIMENSIONS IN INCHES.
45° 0.046 0.036
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL CHARACTERISTIC (SST/J)PAD1 (SST/J)PAD2 (SST/J)PAD5 IR Maximum Reverse 2 Leakage Current (SST/J)PAD10 (SST/J)PAD20 (SST/J)PAD50 (SST/J)PAD100 (SST/J)PAD200 (SST/J)PAD500 PAD2 -1 -2 -5 -10 -20 -50 -100 -5 -10 -20 -50 -100 -200 -500 -5 -10 -20 -50 pA VR = -20V JPAD2 SSTPAD2 UNITS CONDITIONS
0.170 0.195 0.175 0.195
TO-92
0.130 0.155 0.045 0.060
0.89 1.03
SOT-23
1
1.78 2.05 0.37 0.51
LS XXX YYWW
3 2
1.20 1.40 2.10 2.64 0.085 0.180
2.80 3.04
3 LEADS
0.019 DIA. 0.016 0.100
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
+V
JPAD20 D1 D3 D2 D4 OP-27 +
-V D2
+V
JPAD5 D1
2N4117A
2N4393
C
ein
+15V -15V
CONTROL SIGNAL
R
VOUT
TO-72
Three Lead
0.195 DIA. 0.175 0.030 MAX. 0.230 DIA. 0.209 0.150 0.115
TO-92 BOTTOM VIEW
A
1 3
PICO AMPERE DIODES
BVR ≥ -30V Crss ≤ 2.0pF
PAD1,2,5
TO-72 BOTTOM VIEW
2
PAD*
TO-72 BOTTOM VIEW
2
K
K*
C
A
1
SSTPAD
SOT-23 TOP VIEW K
1 3
K 1
A 2
A
K
元器件交易网
PAD SERIES
Linear Integrated Systems
FEATURES DIRECT REPLACEMENT FOR SILICONIX PAD SERIES REVERSE BREAKDOWN VOLTAGE REVERSE CAPACITANCE ABSOLUTE MAXIMUM RATINGS1 @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature Operating Junction Temperature Maximum Power Dissipation Continuous Power Dissipation (PAD) Continuous Power Dissipation (J/SSTPAD) Maximum Currents Forward Current (PAD) Forward Current (J/SSTPAD) 50mA 10mA * Cathode tied to Case 300mW 350mW -65 to +150 °C -55 to +135 °C JPAD
2
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL BVR VF Crss CHARACTERISTIC Reverse Breakdown Voltage Forward Voltage Total Reverse Capacitance PAD1,5 All Others ALL PAD ALL SSTPAD ALL JPAD MIN -45 -30 -35 0.8 0.5 1.5 1.5 0.8 2 pF V IR = -1µA IF = 5mA VR = -5V, f = 1MHz TYP MAX UNITS CONDITIONS
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
元器件交易网
Figure 1. Operational Amplifier Protection Input Differential Voltage limited to 0.8V (typ) by JPADs D1 and D2. Common Mode Input voltage limited by JPADs D3 and D4 to ±15V. Figure 2. Sample and Hold Circuit Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset voltages fed capacitively from the JFET switch gate. FIGURE 1 FIGURE 2
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
0.048 0.028
1. 2.
Absolute maximum ratings are limiting values above which serviceability may be impaired. The PAD type number denotes its maximum reverse current value in pico amperes. Devices with IR values intermediate to those shown are available upon request.