S1B中文资料
SI1555DL-T1-E3中文资料
FEATURESD TrenchFET rPower MOSFETPb-free AvailableSi1555DLVishay SiliconixDocument Number: 71079S-50245—Rev. D, 21-Feb-051Complementary Low-Threshold MOSFET PairPRODUCT SUMMARYV DS (V)r DS(on) (W )I D (A)0.385 @ V GS = 4.5 V 0.70N-Channel200.630 @ V GS = 2.5 V 0.540.600 @ V GS = −4.5 V −0.60P-Channel −80.850 @ V GS = −2.5 V −0.501.200 @ V GS = −1.8 V−0.42Marking CodeRBXXLot Traceability and Date CodePart # Code Y YOrdering Information:Si1555DL-T1Si1555DL-T1—E3 (Lead (Pb)-Free)SOT-363SC-70 (6-LEADS)Top ViewS 1G 1D 2D 1G 2S 2ABSOLUTE MAXIMUM RATINGS (T A = 25_C UNLESS OTHERWISE NOTED)N-ChannelP-Channel ParameterSymbol5 secs Steady State5 secsSteady StateUnitDrain-Source Voltage V DS 20−8Gate-Source VoltageV GS "12"8VT A = 25_C "0.70"0.66−0.60−0.57Continuous Drain Current (T J = 150_C)a T A = 85_CI D "0.50"0.48−0.43−0.41Pulsed Drain CurrentI DM "1.0AContinuous Source Current (Diode Conduction)a I S 0.250.23−0.25−0.23Maximum Power Dissipation T A = 25_C 0.300.270.300.27aT A = 85_C P D 0.160.140.160.14W Operating Junction and Storage Temperature RangeT J , T stg−55 to 150_CTHERMAL RESISTANCE RATINGSParameterSymbol TypicalMaximumUnitM iJ ti t A bi t t v 5 sec 360415Maximum Junction-to-Ambient a Steady State R thJA 400460_Maximum Junction-to-Foot (Drain)Steady StateR thJF300350C/WNotesa.Surface Mounted on 1” x 1” FR4 Board.Si1555DLVishay Siliconix2Document Number: 71079S-50245—Rev. D, 21-Feb-05SPECIFICATIONS (T J = 25_C UNLESS OTHERWISE NOTED)ParameterSymbol Test Condition Min Typ Max UnitStaticV DS = V GS , I D = 250 m A N-Ch 0.6 1.4Gate Threshold VoltageV GS(th)V DS = V GS , I D = −250 m A P-Ch −0.45−1.0VGate Body Leakage V DS = 0 V, V GS = "12 V N-Ch "100Gate-Body LeakageI GSSV DS = 0 V, V GS = "8 V P-Ch "100nAV DS = 20 V, V GS = 0 VN-Ch 1V DS = −8 V, V GS = 0 V P-Ch −1Zero Gate Voltage Drain CurrentI DSSV DS = 20 V, V GS = 0 V, T J = 85_C N-Ch 5m A V DS = −8 V, V GS = 0 V, T J = 85_CP-Ch −5On State Drain Current D()V DS w 5 V, V GS = 4.5 V N-Ch 1.0On-State Drain Current aI D(on)V DS p −5 V, V GS = −4.5 V P-Ch −1.0A V GS = 4.5 V, I D = 0.66 A N-Ch 0.3200.385V GS = −4.5 V, I D = −0.57 AP-Ch 0.5100.600Drain-Source On-State Resistance ar V GS = 2.5 V, I D = 0.40 A N-Ch 0.5600.630WDS(on)V GS = −2.5 V, I D = −0.48 A P-Ch 0.7200.850V GS = −1.8 V, I D = −0.20 AP-Ch 1.00 1.200Forward Transconductance f V DS = 10 V, I D = 0.66 A N-Ch 1.5ag fs V DS = −4 V, I D = −0.57 A P-Ch 1.2S Diode Forward Voltage I S = 0.23 A, V GS = 0 V N-Ch 0.8 1.2a V SDI S = −0.23 A, V GS = 0 VP-Ch−0.8−1.2VDynamic bN-Ch 0.8 1.2Total Gate ChargeQ gN-ChannelP-Ch 1.5 2.3Gate Source Charge V DS = 10 V, V GS = 4.5 V, I D = 0.66 A N-Ch 0.06Gate-Source ChargeQ gs P-Channel4 V 45 V I 057 AP-Ch 0.17nCGate Drain Charge d V DS = −4 V, V GS = −4.5 V, I D = −0.57 A N-Ch 0.30Gate-Drain ChargeQ gd P-Ch 0.16Turn On Delay Time d()N-Ch 1020Turn-On Delay Timet d(on)P-Ch612N-ChannelN-Ch 1630Rise Timet r V DD = 10 V, R L = 20 WI D ^ 0.5 A, V GEN = 4.5 V, R = 6 W P-Ch 2550Turn Off Delay Time d(ff)g P-Channel V 4 V R 8 WN-Ch 1020Turn-Off Delay Timet d(off)DD = −4 V, R L = 8 I −0.5 A, V −4.5 V, R P-Ch 1020nsD ^ GEN = g = 6 WN-Ch 1020Fall Timet f P-Ch1020Source-DrainI F = 0.23 A, di/dt = 100 A/m s N-Ch 2040Reverse Recovery Timet rrI F = −0.23 A, di/dt = 100 A/m sP-Ch2040Notesa.Pulse test; pulse width v 300 m s, duty cycle v 2%.b.Guaranteed by design, not subject to production testing.Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Si1555DLVishay SiliconixDocument Number: 71079S-50245—Rev. D, 21-Feb-0530.00.5 1.0 1.5 2.0 2.50.00.51.01.52.02.53.0V DS − Drain-to-Source Voltage (V)V GS − Gate-to-Source Voltage (V)2040608010048121620− O n -R e s i s t a n c e (r D S (o n )W )0.60.81.01.21.41.6−50−2502550751001251500123450.00.20.40.60.80.00.20.40.60.81.00.00.20.40.60.81.0V DS − Drain-to-Source Voltage (V)On-Resistance vs. Drain Current− G a t e -t o -S o u r c e V o l t a g e (V )Q g − Total Gate Charge (nC)C − C a p a c i t a n c e (p F )V G S CapacitanceOn-Resistance vs. Junction TemperatureT J − Junction Temperature (_C)r D S (o n ) − O n -R e s i i s t a n c e (N o r m a l i z e d )Si1555DLVishay Siliconix4Document Number: 71079S-50245—Rev. D, 21-Feb-05TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)N−CHANNEL0.00.20.40.60.81.01.20.00.20.40.60.81.01234510.1− O n -R e s i s t a n c e (r D S (o n )W )V SD − Source-to-Drain Voltage (V)V GS − Gate-to-Source Voltage (V)− S o u r c e C u r r e n t (A )I S 03512P o w e r (W )Single Pulse PowerTime (sec)411006001010−110−210−3−0.4−0.3−0.2−0.1−0.00.10.2−50−250255075100125150210.10.01Threshold VoltageV a r i a n c e (V )V G S (t h )T J − Temperature (_C)Normalized Thermal Transient Impedance, Junction-to-AmbientSquare Wave Pulse Duration (sec)N o r m a l i z e d E f f e c t i v e T r a n s i e n t T h e r m a l I m p e d a n c eSi1555DLVishay SiliconixDocument Number: 71079S-50245—Rev. D, 21-Feb-055TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)N−CHANNEL10−310−211010−110−4210.10.01Normalized Thermal Transient Impedance, Junction-to-FootSquare Wave Pulse Duration (sec)N o r m a l i z e d E f f e c t i v e T r a n s i e n t T h e r m a l I m p e d a n c e0.00.5 1.0 1.5 2.0 2.5V GS − Gate-to-Source Voltage (V)40801201602468− O n -R e s i s t a n c e (r D S (o n )W )0.00.51.01.52.00.00.20.40.60.81.0V DS − Drain-to-Source Voltage (V)I D − Drain Current (A)C − C a p a c i t a n c e (p F )CapacitanceSi1555DLVishay Siliconix6Document Number: 71079S-50245—Rev. D, 21-Feb-050.00.20.40.60.8 1.0 1.2 1.4 1.6Q g − Total Gate Charge (nC)0.00.20.40.60.81.01.20.00.51.01.52.01234510.1− O n -R e s i s t a n c e (r D S (o n )W )V SD − Source-to-Drain Voltage (V)V GS − Gate-to-Source Voltage (V)− S o u r c e C u r r e n t (A )I S 03512P o w e r (W )Single Pulse PowerTime (sec)411006001010−110−210−3−0.2−0.10.00.10.20.30.4−50−250255075100125150Threshold VoltageV a r i a n c e (V )V G S (t h )T J − Temperature (_C)Si1555DLVishay SiliconixDocument Number: 71079S-50245—Rev. D, 21-Feb-057TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)P−CHANNEL210.10.01Normalized Thermal Transient Impedance, Junction-to-AmbientSquare Wave Pulse Duration (sec)N o r m a l i z e d E f f e c t i v e T r a n s i e n t T h e r m a l I m p e d a n c e10−310−211010−110−4210.10.01Normalized Thermal Transient Impedance, Junction-to-FootSquare Wave Pulse Duration (sec)N o r m a l i z e d E f f e c t i v e T r a n s i e n t T h e r m a l I m p e d a n c eVishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon T echnology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg?71079.Document Number: 91000Revision: 18-Jul-081DisclaimerLegal Disclaimer NoticeVishayAll product specifications and data are subject to change without notice.Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product.Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay.The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.Product names and markings noted herein may be trademarks of their respective owners.元器件交易网。
SM4445TV资料
Product information is current as of publication date. The product conforms Copyright © 2007, Pletronics Inc.SM44T Series 3.3 VCMOS Clock Oscillators September 2008•Pletronics’ SM44 Series is a quartz crystalcontrolled precision square wave generator with a CMOS output.•The package is designed for high density surface mount designs.•This is a low cost mass produced oscillator.•Tape and Reel or cut tape packaging is available.•0.8 to 180 MHZ• 2.5 x 3.2 mm LCC Ceramic Package •Enable/Disable Function •Disable functionincludes low standby power mode•Low JitterPletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.Pletronics Inc. guarantees the device does not contain the following:Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 0.041 gramsMoisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4Absolute Maximum Ratings:ParameterUnitV CC Supply Voltage -0.5V to +7.0V Vi Input Voltage -0.5V to V CC + 0.5V Vo Output Voltage -0.5V to V CC + 0.5V Io Output Current+25 mA to -25 mAThermal CharacteristicsThe maximum die or junction temperature is 155o CThe thermal resistance junction to board is 40 to 60o C/Watt depending on the solder pads, ground plane and construction of the PCB.September 2008 Part Number:SM4445T E V-75.0M-XX Part Marking:Packaging code or blankT250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel P FF.FFF C YMDxxFrequency in MHzSupply Voltage VCCV = 3.3V +_ 10%Temperature RangeBlank = Temp. range -10 to +70o CE = Temp. range -40 to +85o CSeries ModelFrequency Stability45 = +_ 50 ppm44 = +_ 25 ppm20 = +_ 20 ppmSeries ModelMarking Legend:P= PletronicsFF.FFF= Frequency in MHZYMD = Date of Manufacture (year and week, or year-month-day)All other marking is internal factory codesSpecifications such as frequency stability, supply voltage and operating temperature range, etc. are not identified from the marking. External packaging labels and packing list will correctly identify the ordered Pletronics part number.Codes for Date Code YMDCode6789012Year2006200720082009201020112012Code A B C D E F G H J K L M Month JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC Code123456789A B C Day123456789101112 Code D E F G H J K L M N P R Day131415161718192021222324 Code T U V W X Y ZDay25262728293031September 2008-180-160-140-120-100-80-60-40-200101,000100,00010,000,000Frequency (Hz)d B c /H zElectrical Specification for 3.30V +_10% over the specified temperature rangeItemMin Max Unit ConditionFrequency Range0.8180MHZ Frequency Accuracy “45"-50+50ppmFor all supply voltages, load changes, aging for 1year, shock, vibration and temperatures“44"-25+25Output Waveform CMOS Output High Level 90-%of V CC (See load circuit)Output Low Level -10%Output Symmetry 4555%at 50% point of V CCJitter-0.6pS RMS 12 KHz to 20 MHZ from the output frequency - 2.5pS RMS 10 Hz to 1 MHZ from the output frequency Enable/Disable Internal Pull-up 50-Kohm to V CCV disable -30%of V CC applied to pad 1V enable70-%Output leakage V OUT = V CC -10+10uA Pad 1 low, device disabledV OUT = 0V -10+10uA Standby Current I CC -3uA Enable time -100nS Time for output to reach a logic state Disable time -100nS Time for output to reach a high Z state Start up time-3mSTime for output to reach specified frequency Operating Temperature Range -10+70o C Standard Temperature Range-40+85o C Extended Temperature Range “E ” OptionStorage Temperature Range-55+125oCTypical phase noise plot for 5 oscillators at different output frequencies.September 2008Electrical Specification for 3.30V +_10% over the specified temperature rangeItemTyp Max Unit Condition Output T RISE and T FALL2.55nS < 35 MHZC LOAD = 15 pF10% to 90% of V CC See Load Circuit1.53nS > 35 MHZ and < 70MHz 12nS > 70 MHZ 48nS < 35 MHZC LOAD =30 pF10% to 90% of V CC See Load Circuit 35nS > 35 MHZ and < 70MHz 23nS > 70 MHZ V CC Supply Current (I CC )24mA < 8 MHZC LOAD = 15 pF 35mA > 8 MHZ and < 16 MHZ 46mA > 16 MHZ and < 35 MHZ 1218mA > 35 MHZ and < 70MHz 2336mA> 70 MHZ and < 110MHz4570mA > 110 MHZ 35mA < 8 MHZ C LOAD = 30 pF 46mA > 8 MHZ and < 16 MHZ 68mA > 16 MHZ and < 35 MHZ 1622mA > 35 MHZ and < 70MHz 3043mA> 70 MHZ and < 120MHzSpecifications with Pad 1 E/D open circuitLoad Circuit and Test WaveformSeptember 2008Reliability:Environmental ComplianceParameter ConditionMechanical Shock MIL-STD-883 Method 2002, Condition BVibration MIL-STD-883 Method 2007, Condition ASolderability MIL-STD-883 Method 2003Thermal Shock MIL-STD-883 Method 1011, Condition AESD RatingModel Minimum Voltage ConditionsHuman Body Model1500MIL-STD-883 Method 3115Charged Device Model1000JESD 22-C101Package LabelingLabel is 1" x 2.6" (25.4mm x 66.7mm)Label is 1" x 2.6" (25.4mm x 66.7mm)Font is Courier New Font is ArialBar code is 39-Full ASCIISeptember 2008Not to Scale1 Typical dimensionsContacts :Gold 11.8 µinches 0.3 µm minimum over Nickel 50 to 350 µinches 1.27 to 8.89 µmPad Function Note1OutputEnable/Disable When this pad is not connected the oscillator shall operate.When this pad is logic low the output will be inhibited (high impedance state.)Recommend connecting this pad to V CC if the oscillator is to be always on.2Ground (GND)3Output 4Supply Voltage (V CC )Recommend connecting appropriate power supply bypass capacitors as close as possible.Layout and application informationFor Optimum Jitter Performance, Pletronics recommends:• a ground plane under the device •no large transient signals (both current and voltage) should be routed under the device •do not layout near a large magnetic field such as a high frequency switching power supply •do not place near piezoelectric buzzers or mechanical fans.September 2008Tape and Reel: available for quantities of 250 to 1000 per reel, cut tape for < 250September 2008IMPORTANT NOTICEPletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and other changes to this product at anytime. PLE reserves the right to discontinue any product or service without notice. Customers are responsible for obtaining the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to PLE’s terms and conditions of sale supplied at the time of order acknowledgment.PLE warrants performance of this product to the specifications applicable at the time of sale in accordance with PLE’s limited warranty. Testing and other quality control techniques are used to the extent PLE deems necessary to support this warranty. Except where mandated by specific contractual documents, testing of all parameters of each product is not necessarily performed.PLE assumes no liability for application assistance or customer product design. Customers are responsible for their products and applications using PLE components. To minimize the risks associated with the customer products and applications, customers should provide adequate design and operating safeguards.PLE products are not designed, intended, authorized or warranted to be suitable for use in life support applications, devices or systems or other critical applications that may involve potential risks of death, personal injury or severe property or environmental damage. Inclusion of PLE products in such applications is understood to be fully at the risk of the customer. Use of PLE products in such applications requires the written approval of an appropriate PLE officer. Questions concerning potential risk applications should be directed to PLE.PLE does not warrant or represent that any license, either express or implied, is granted under any PLE patent right, copyright, artwork or other intellectual property right relating to any combination, machine or process which PLE product or services are used. Information published by PLE regarding third-party products or services does not constitute a license from PLE to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from PLE under the patents or other intellectual property of PLE.Reproduction of information in PLE data sheets or web site is permissible only if the reproduction is without alteration and is accompanied by associated warranties, conditions, limitations and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. PLE is not responsible or liable for such altered documents.Resale of PLE products or services with statements different from or beyond the parameters stated by PLE for that product or service voids all express and implied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statements.Contacting Pletronics Inc.Pletronics Inc.Tel: 425-776-188019013 36th Ave. West Fax: 425-776-2760Lynnwood, WA 98036-5761 USA E-mail: ple-sales@URL: Copyright © 2007, 2008, Pletronics Inc.。
AVS1ACP08中文资料
4/8
元器件交易网
AVS12
DC GENERAL ELECTRICAL CHARACTERISTICS (continued) CONTROLLER AVS1ACP08 Toper = 25°C (unless otherwise specified)
Symbo l
P ar ame te r
0.7 Vreg
0.3 Vreg
V
VG (pin 5)
VOL (IVG = 25mA) Leakage current (VG = VDD)
650
mV
+ 10
µA
NOTES : (1) : This value gives a typical noise immunity on the zero-crossing detection of 110mV x 1018/18 = 6.20V on the main supply (2) : See following diagram (3) : Voltage referred to VSS (4) : Voltage referred to VDD
5/8
元器件交易网
AVS12
TYPICAL APPLICATION
110 V or 220V
1N 4007
R1 1M 1%
2
x
R2
9.1K
18K
1W
1%
option VDD AVS12CB
VM 8
7 AVS1ACP08
VSS 390
5 VG
A2 G A1
3 2
91k 1 %
Symb ol
P a ra met er
VGD VTM *
PESD5V0S1BA中文资料
V(CL)R
clamping voltage
V(BR) rdif Cd
breakdown voltage differential resistance diode capacitance
Conditions
VRWM = 5 V; see Figure 6 IPP = 1 A IPP = 12 A IR = 1 mA IR = 1 mA VR = 0 V; f = 1 MHz; see Figure 5
Min
Typ
Max
-
-
5
-
5
100
[1] [2] -
-
10
[1] [2] -
-
14
5.5
-
9.5
-
-
50
-
35
45
[1] Non-repetitive current pulse 8/20 µs exponentially decaying waveform according to IEC61000-4-5; see Figure 1. [2] Measures from pin 1 to pin 2.
PESD5V0S1BA/BB/BL
Low capacitance bidirectional ESD protection diodes
103
Ppp (W)
102
001aaa202
1.2 Ppp Ppp(25˚C)
0.8
0.4
001aaa193
10 1
10
102
103
104
tp (µs)
Tamb = 25 °C
Pin
Description
SOD323, SOD523
SMP100-xxxH225中文资料
®
SMP100-xxx SMP100-xxxH225
TRISIL TM
FEATURES BIDIRECTIONAL CROWBAR PROTECTION VOLTAGE RANGE : FROM 8V to 320V REPETITIVE PEAK PULSE CURRENT: IPP = 100 A (10/1000 µs) HOLDING CURRENT: IH = 150mA or 225mA LOW LEAKAGE CURRENT: IR = 2 µA max DESCRIPTION The SMP100 series are transient surge arrestors used for the protection of sensitive telecom equipment. MAIN APPLICATIONS Any sensitive equipment requiring protection against lightning strikes : ANALOG AND DIGITAL LINE CARDS MAIN DISTRIBUTION FRAMES TERMINALS AND TRANSMISSION EQUIPMENT GAS-TUBE REPLACEMENT BENEFITS NO AGEING AND NO NOISE IF DESTROYED, THE SMP100 FALLS INTO SHORT CIRCUIT,STILLENSURINGPROTECTION BOARD SPACE SAVING COMPLIES WITH THE FOLLOWING STANDARDS: CCITT K20 VDE0433 VDE0878 IEC-1000-4-5 FCC Part 68, lightning surge type A FCC Part 68, lightning surge type B BELLCORE TR-NWT-001089 First level BELLCORE TR-NWT-001089 Second level CNET l31-24
AD7656中文资料
250 kSPS 、六通道、同步采样、双极性16/14/12-位 ADCAD7656/AD7657/AD7658Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Speci cations subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners.One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 Fax: 781.461.3113 2006–2012 Analog Devices, Inc. All rights reserved.功能框图V SSDGNDV DDREFCONVST ACONVST B CONVST C OUTPUT DRIVERSOUTPUT DRIVERSOUTPUT DRIVERSOUTPUT DRIVERSCONTROL LOGICBUFBUFBUFAGNDT/HT/H T/H T/HT/HT/HCLK OSCAV CCDV CCV1V2V3V4V5V6SER/PAR CSV DRIVE STBYDOUT ADOUT BDOUT C SCLKRD WRDATA/CONTROL LINES 05020-001AD7656/AD7657/AD765816-/14-/12-BIT SAR16-/14-/12-BIT SAR16-/14-/12-BIT SAR16-/14-/12-BIT SAR16-/14-/12-BIT SAR16-/14-/12-BIT SAR图1.-1受美国专利第6,731,232号保护。
FDA,GMP,ICH临床实验专业英语词汇互译
FDA,GMP,ICH临床实验专业英语词汇互译FDA,GMP,ICH临床实验专业英语词汇互译FDA常用词中英对照FDA(food and drug adminisration)美国)食品药品监督管理局NDA(new drug application):新药申请ANDA(abbreviated new drug application):简化新药申请EP(export application):出口药申请(申请出口不被批准在美国销售的药品)treatment IND:研究中的新药用于治疗abbreviated(new)drug:简化申请的新药DMF(drug master file):药物主文件(持有者为谨慎起见而准备的保密资料,可以包括一个或多个人用药物在制备,加工,包装和贮存过程中所涉及的设备,生产过程或物品.只有在DMF 持有者或授权代表以授权书的形式授权给FDA,FDA在审查IND, NDA,ANDA时才能参考其内容)holderMF持有者CFR(code of federal regulation)美国)联邦法规PANEL:专家小组batch production:批量生产;分批生产batch production records:生产批号记录post or pre-market surveillance:销售前或销售后监督informed consent:知情同意(患者对治疗或受试者对医疗试验了解后表示同意接受治疗或试验)prescription drug:处方药OTC drug(over—the—counter drug):非处方药U.S. public health service:美国卫生福利部NIH(national institute of health)美国)全国卫生研究所animal trail:动物试验accelerated approval:加速批准standard drug:标准药物investigator :研究人员;调研人员preparing and submitting:起草和申报submission:申报;递交benefit(s):受益risk(s):受害drug product:药物产品drug substance:原料药established name:确定的名称generic name:非专利名称proprietary name:专有名称;INN(international nonproprietary name):国际非专有名称narrative summary: 记叙体概要adverse effect:副作用adverse reaction:不良反应protocol:方案archival copy:存档用副本review copy:审查用副本official compendium:法定药典(主要指USP, NF).USP(the united state pharmacopeia):美国药典(现已和NF合并一起出版)NF(national formulary)美国)国家药品集official=pharmacopeial = compendial:药典的;法定的;官方的agency:审理部门(指FDA)sponsor:主办者(指负责并着手临床研究者)identity:真伪;鉴别;特性strength:规格;规格含量(每一剂量单位所含有效成分的量)labeled amount:标示量regulatory specification:质量管理规格标准(NDA提供)regulatory methodology:质量管理方法(FDA用于考核原料药或药物产品是否符合批准了的质量管理规格标准的整套步骤)regulatory methods validation:管理用分析方法的验证(FDA对NDA提供的方法进行验证)Dietary supplement:食用补充品ICH(International Conference on Harmonization of Technical Requirements for Registration of Pharmaceuticals for Human Use)人用药物注册技术要求国际协调会议ICHuality-质量Q1A(R2): Stability Testing of New Drug Substances and Products (Second Revision)新原料药和制剂的稳定性试验(第二版)Q1B: Photostability Testing of New Drug Substances and Products新原料药和制剂的光稳定性试验Q1C: Stability Testing for New Dosage Forms新制剂的稳定性试验Q1D: Bracketing and Matrixing Designs for Stability Testing of Drug Substances and Drug Products原料药和制剂稳定性试验的交叉和矩阵设计Q1E: Evaluation of Stability Data对稳定性数据的评估处理Q1F: Stability Data Package for Registration Applications in Climatic Zones III and IV在气候带III和IV,药物注册申请所提供的稳定性数据Q2A: Text on Validation of Analytical Procedures分析程序的验证Q2B: Validation of Analytical Procedures: Methodology分析程序的验证:方法学Q3A(R): Impurities in New Drug Substances (Revised Guideline)新原料药中的杂质(修订版)Q3B(R): Impurities in New Drug Products (Revised Guideline)新制剂中的杂质(修订版)Q3C: Impurities: Guideline for Residual Solvents杂质:残留溶剂指南Q3C(M): Impurities: Guideline for Residual Solvents (Maintenance)杂质:残留溶剂指南(修改内容)Q4: Pharmacopoeias药典Q4A: Pharmacopoeial Harmonisation 药典的协调Q4B: Regulatory Acceptance of Pharmacopoeial Interchangeability药典互替在法规上的可接受性Q5A: Viral Safety Evaluation of Biotechnology Products Derived from Cell Lines of Human or Animal Origin来源于人或者动物细胞系的生物技术产品的病毒安全性评估Q5B: Quality of Biotechnological Products: Analysis of the Expression Construct in Cells Used for Production of r-DNA Derived Protein Products生物技术产品的质量:源于重组DNA的蛋白质产品的生产中所用的细胞中的表达构建分析Q5C: Quality of Biotechnological Products: Stability Testing of Biotechnological/Biological Products生物技术产品的质量:生物技术/生物产品的稳定性试验Q5D: Derivation and Characterisation of Cell Substrates Used for Production of Biotechnological/Biological Products用于生产生物技术/生物产品的细胞底物的起源和特征描述Q5E: Comparability of Biotechnological/Biological Products Subject to Changes in Their Manufacturing Process基于不同生产工艺的生物技术产品/生物产品的可比较性Q6: Specifications for New Drug Substances and Products新原料药和制剂的质量规格Q6A: Specifications: Test Procedures and Acceptance Criteria for New Drug Substances and New Drug Products: Chemical Substances质量规格:新原料药和新制剂的检验程序和可接收标准:化学物质Q6B: Specifications: Test Procedures and Acceptance Criteria for Biotechnological/Biological Products质量规格:生物技术/生物产品的检验程序和可接收标准-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:34:00--Q7: Good Manufacturing Practices for Pharmaceutical Ingredients活性药物成份的GMPQ7A: Good Manufacturing Practice Guide for Active Pharmaceutical Ingredients活性药物成份的GMP指南Q8: Pharmaceutical Development药物研发Q9: Quality Risk Management质量风险管理ICH:Safety-安全S1A: Guideline on the Need for Carcinogenicity Studies of Pharmaceuticals药物致癌性研究需要的指南S1B: Testing for Carcinogenicity of Pharmaceuticals药物致癌性的检验S1C: Dose Selection for Carcinogenicity Studies of Pharmaceuticals药物致癌性研究之剂量选择S1C(R): Addendum: Addition of a Limit Dose and Related Notes附录:极限剂量和有关注释的的补充S2A: Guidance on Specific Aspects of Regulatory Genotoxicity Tests for Pharmaceuticals受法规管辖的药物基因毒性检验的特定方面的指南S2B: Genotoxicity: A Standard Battery for Genotoxicity Testing for Pharmaceuticals 基因毒性:药物基因毒性检验的标准S3A: Note for Guidance on Toxicokinetics: The Assessment of Systemic Exposure in Toxicity Studies毒物代谢动力学指南的注释:毒性研究中的全身性暴露量的评估S3B: Pharmacokinetics: Guidance for Repeated Dose Tissue Distribution Studies药物代谢动力学:重复剂量的组织分布研究指南S4: Single Dose Toxicity Tests单剂量毒性检验S4A: Duration of Chronic Toxicity Testing in Animals (Rodent and Non-Rodent Toxicity Testing)动物体内慢性毒性持续时间的检验(啮齿动物和非啮齿动物毒性检验)S5A: Detection of Toxicity to Reproduction for Medicinal Products药物对生殖发育的毒性的检验S5B(M): Maintenance of the ICH Guideline on Toxicity to Male Fertility: An Addendum to the Guideline on Detection of Toxicity to Reproduction for Medicinal Products 对男性生殖能力的毒性的指南的变动:药物对生殖发育的毒性的检验指南增加了一个附录S6: Preclinical Safety Evaluation of Biotechnology-Derived Pharmaceuticals生物技术生产的药物的临床前安全评价S7A: Safety Pharmacology Studies for Human Pharmaceuticals人用药的安全药理学研究S7B: The Nonclinical Evaluation of the Potential for Delayed Ventricular Repolarization(QT Interval Prolongation) By Human Pharmaceuticals药物延迟心室复极化(QT间期)潜在作用的非临床评价S8: Immunotoxicology Studies for Human Pharmaceuticals人用药免疫毒理学研究M3(M): Maintenance of the ICH Guideline on Non-Clinical Safety Studies for the Conduct of Human Clinical Trials for Pharmaceuticals药物的对人临床试验的非临床安全研究指南的变动E-Efficacy(有效)E1: The Extent of Population Exposure to Assess Clinical Safety for Drugs Intended for Long-Term Treatment of Non-Life-Threatening Conditions对用于无生命危险情况下长期治疗的药物进行临床安全评估的族群暴露量范围E2A: Clinical Safety Data Management: Definitions and Standards for Expedited Reporting临床安全数据管理:速报制度的定义和标准E2B(R): Revision of the E2B(M) ICH Guideline on Clinical Safety Data Management Data Elements for Transmission of Individual Case Safety Reports个案安全报告送交的临床安全数据管理的数据要素指南(E2B(M))的修订版E2B (M): Maintenance of the Clinical Safety Data Management including: Data Elements for Transmission of Individual Case Safety Reports临床安全数据管理的变动包括:个案安全报告送交的数据要素E2B(M): Maintenance of the Clinical Safety Data Management including Questions and Answers临床安全数据管理的变动,包括问答E2C: Clinical Safety Data Management: Periodic Safety Update Reports for Marketed Drugs临床安全数据管理:已上市药品的周期性安全数据更新报告Addendum to E2C: Periodic Safety Update Reports for Marketed DrugsE2C的附录:已上市药品的周期性安全数据更新报告E2D: Post-Approval Safety Data Management: Definitions and Standards for Expedited Reporting批准后的安全数据管理:速报制度的定义和标准E2E: Pharmacovigilance Planning药物警戒计划E3: Structure and Content of Clinical Study Reports临床研究报告的结构和内容E4: Dose-Response Information to Support Drug Registration支持药品注册的剂量-效应资料E5: Ethnic Factors in the Acceptability of Foreign Clinical Data引入海外临床数据时要考虑的人种因素E6: Good Clinical Practice: Consolidated GuidelineGCP:良好的临床规范:统一的指南E7: Studies in Support of Special Populations: Geriatrics对特定族群的支持的研究:老人病学E8: General Considerations for Clinical Trials对临床试验的总的考虑E9: Statistical Principles for Clinical Trials临床试验的统计原则E10: Choice of Control Group and Related Issues in Clinical Trials临床试验中控制组和有关课题的选择E11: Clinical Investigation of Medicinal Products in the Pediatric Population小儿科药物的临床调查E12A: Principles for Clinical Evaluation of New Antihypertensive Drugs新抗高血压药物的临床评价原则E14: The Clinical Evaluation of QT/QTc Interval Prolongation and Proarrhythmic Potential for Non-Antiarrhythmic Drugs非抗心率失常药物的QT/QTc 间期和致心率失常潜在作用的临床评价Multidisciplinary Guidelines 多学科兼容的指南M1: Medical Terminology医学术语M2: Electronic Standards for Transmission of Regulatory Information (ESTRI)药政信息传递之电子标准M3: Timing of Pre-clinical Studies in Relation to Clinical Trials (See Safety Topics)有关临床试验的临床前研究的时间安排M4: The Common Technical Document (See CTD section for complete Status of the guidelines)通用技术文件(见有关CTD章节)M5: Data Elements and Standards for Drug Dictionaries药物词典的数据要素和标准临床试验常用的英文缩略语TTP: time-to-progression 疾病进展时间SAE: severity Adverse Event 严重不良事件AE: Adverse Event 不良事件-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:34:00--SOP: Standard Operating Procedure 标准操作规程CRF: Case Report form 病例报告表DLT: 剂量限制毒性MTD: 最大耐受剂量KPS: Karnofsky Performance Status行为状态评分CR: complete response完全缓解PR: partial response部分缓解SD: 病情稳定PD: progressive disease病情进展CTC: 常用药物毒性标准IEC: independent ethics committee 独立伦理委员会IRB : institutional review board 伦理委员会CRA: 临床研究助理CRO: Contract Research Organization 合同研究组织DFS: Disease Free Survival 无病生存期OS: (Overall Survival) 总生存时间IC: Informed consent 知情同意ADR: Adverse Drug Reaction 不良反应GAP:Good Agricultural Practice 中药材种植管理规范GCP:Good Clinical Practice 药物临床试验质量管理规范GLP:Good Laboratory Practice 药品实验室管理规范GMP:Good Manufacturing Practice 药品生产质量管理规范GSP:Good Supply Practice 药品经营质量管理规范GUP:Good Use Practice 药品使用质量管理规范PI rincipal investigator 主要研究者CI: Co-inveatigator 合作研究者SI :Sub-investigator 助理研究者COI :Coordinating investigtor 协调研究者DGMP: 医疗器械生产质量管理规范ICF: Informed consent form 知情同意书RCT : randomized controlled trial, 随机对照试验NRCCT: non-randomized concurrent controlled trial, 非随机同期对照试验EBM: evidence-based medicine 循证医学RCD: randomized cross-over disgn 随机交叉对照试验HCT: historial control trial, 历史对照研究RECIST: Response Evaluation Criteria In Solid Tumors. 实体瘤疗效反应的评价标准QC: Quality Control质量控制UADR: Unexpected Adverse Drug Reaction,非预期药物不良反应-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:34:00--GMP英语PIC/S的全称为harmaceutical Inspection Convention/Pharmaceutical Inspection Cooperation Scheme, PIC/S(制药检查草案), 药品检查协会(PIC/S) ,也有人称PIC/S为医药审查会议/合作计划(PIC/S)PIC的权威翻译:药品生产检查相互承认公约API(Active Pharmaceutical Ingrediet) 原料药又称:活性药物组分AirLock 气闸Authorized Person 授权人Batch/Lot 批次Batch Number/Lot-Number 批号;Batch Numbering System 批次编码系统;Batch Records 批记录;Bulk Product 待包装品;Calibration 校正;Clean area洁净区;Consignmecnt(Delivery)托销药品.ABPI Association of the British Pharmaceutical IndustryADR Adverse Drug ReactionAE Adverse EventAIM Active Ingredient ManufacturerANDA Abbreviated New Drug ApplicationANOVA Analysis of VarianceASM: Active Substance ManufacturerATC Anatomical Therapeutic ChemicalATX Animal Test Exemption CertificateBANBritish Approved NameBIRABritish Institute of Regulatory AffairsBNF British National FormularyBP British PharmacopoeiaC of A Certificate of AnalysisC of S Certificate of SuitabilityCENTRE FOR DRUG EVALUATION (CDE)Centre for Pharmaceutical Administration (CPA)CMS Concerned Member StateCMS每个成员国COS Certificate of SuitabilityCPMP Committee for Proprietary Medicinal ProductsCRA Clinical Research AssociateCRF Case Report FormCRO Contract Research OrganisationCTA Clinical Trial ApplicationCTC Clinical Trial CertificateCTD Common Technical DocumentCTX Clinical Trials ExemptionDDD Defined Daily DoseDGC Daily Global ComparisonDIA Drug Information AssociationDMF Drug Master FileDrug Registration Branch (DR, Product Evaluation & Registration Division, CPA EDQM (European Directorate for the Quality of Medicines) 欧洲联盟药品质量指导委员会EEA 欧洲经济地区EGMA European Generics Medicine AssociationELA Established Licence ApplicationEMEA European Medicines Evaluation AgencyEMEA (European Agency for the Evaluation of Medicinal Products) 欧洲联盟药品评价机构EP European PharmacopoeiaEPAR European Public Assessment ReportsESRA European Society of Regulatory AffairsEuropean Pharmacopoeia Commission 欧洲药典委员会FDA Food and Drug Administrationfinal evaluation report (FER)free sale certificates (FSCs)Health Sciences Authority (HSA)HSA's Medicines Advisory Committee (MAC)IB Investigators BrochureICH International Conference for HarmonisationIDMC Independent Data-Monitoring CommitteeIEC Independent Ethics CommitteeIND Investigational New DrugINN International Non-proprietary NameInternational Conference on Harmonisation (ICH)IPC In Process ControlIRB Institutional Review BoardLICENCE HOLDERMA Marketing AuthorisationMAA Marketing Authorisation ApplicationMAA上市申请MAH Marketing Authorisation HolderMAH 销售许可持有者MCA Medicines Control AgencyMHW Ministry of Health and Welfare (Japan)MR Mutual RecognitionMRA 美国与欧盟的互认协议MRAs (Mutual Recognition Agreements) 互相认证同意MRFG Mutual Recognition Facilitation Group MRPMutual Recognition ProcedureNASNew Active SubstanceNCENew Chemical EntityNDANew Drug Applicationnew chemical entities (NCEs)new drug applications (NDAs)NSAID Non Steroidal Anti Inflammatory DrugNTA Notice To ApplicantsOOS Out of SpecificationOTC Over The CounterPAGB Proprietary Association of Great BritainPh Eur European PharmacopoeiaPIL Patient Information LeafletPL Product LicencePOM Prescription Only MedicinePRODUCT OWNERPSU Periodic Safety UpdatesQA Quality AssuranceQC Quality ControlRAJ Regulatory Affairs JournalRMS Reference Member StateRMS相互认可另一成员国RSD Relative Standard DeviationRx Prescription OnlySAE Serious Adverse EventSMF Site Master FileSOP Standard Operating ProcedureSOP (STANDARD OPERATION PROCEDURE) 标准运作程序SPC/SmPC Summary of Product Characteristics summary of product characteristics(SPC)Therapeutic Goods Administration (TGA)USP US PharmacopoeiaVMF Veterinary Master FileVPC Veterinary Products CommitteeA.A.A Addition and Amendments 增补和修订AC Air Conditioner 空调器ADR Adverse Drug Reaction 药物不良反应AFDO Association of Food and Drug Officials 食品与药品官员协会(美国) ACC Accept 接受AQL Acceptable Quality Level 合格质量标准ADNA Abbreviated New Drug Application 简化的新药申请BOM Bill of Material 物料清单BPC Bulk pharmaceutical Chemiclls 原料药CBER Center for Biologics Evaluation Research 生物制品评价与研究中心CFU Colony Forming Unet 菌落形成单位DMF Drug Master File 药品管理档案CDER Cemter for Drug Evaluation amd Research 药物评价与研究中心CI Corporate Identity (Image) 企业识别(形象)CIP Cleaning in Place 在线清洗CSI Consumer Safety Insepctor 消费者安全调查员CLP Cleaning Line Procedure 在线清洗程序DAL Defect Action Level 缺陷作用水平DEA Drug Enforcement Adminestration 管制药品管理DS Documentation Systim 文件系统FDA Food and Drug Administration 食品与药品管理局(美国)GATT General Agreemernt on Tariffs and Trade 关贸总协会GMP Good Manufacturing Practice Gvp 药品生质量管理规范GCP Good Clinical Practice 药品临床实验管理规范GLP Good Laboratory Practice 实验室管理规范GSP Good Supply Practice 药品商业质量规范GRP Gook RaTAIL Practice 药品零业质量管理规范GAP Good Agriculture Practice 药材生产管理规范GVP Gook Validation Prctice 验证管理规范GUP Gook Use Practice 药品重用规范HVAC Heating Ventilation Air Conditioning 空调净化系统ISO Intematonal Organization for Standardization 车际标准化组织MOU Memorandum of Understanding 谅解备忘录PF Porduction File 生产记录用表格OTC Over the Counter (Drug) 非处方药品PLA Product License Application 产品许可申请QA Quality Assurance 质量保证QC Quality Control 质量控制QMP Quality Management Procedure 质量管理程序SDA State Drug Administration 国家药品监督管理局SMP Standard Managmert Procedure 标准管理程序SOP Standard Operating Procedure 标准操作程序TQC Tatal Quality Control 全面质量管理USA Uneted States Pharmacopeia 美国药典-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:35:00--ICH 安全性领域常用专业术语中英文对照表Dead offspring at birth 出生时死亡的子代Degradation 降解 Delay of parturition 分娩延迟Deletion 缺失 Descriptive statistics 描述性统计 Distribution 分布Detection of bacterial mutagen 细菌诱变剂检测 Detection of clastogen 染色体断裂剂检测Determination of metabolites 测定代谢产物 Development of the offspring 子代发育Developmental toxicity 发育毒性 Diminution of the background lawn 背景减少Direct genetic damage 直接遗传损伤DNA adduct DNA加合物 DNA damage DNA损伤DNA repair DNA修复 DNA strand breaks DNA链断裂Dose escalation 剂量递增 Dose dependence 剂量依赖关系 Dose level 剂量水平Dose-limiting toxicity 剂量限制性毒性 Dose-raging studies 剂量范围研究Dose-relatived mutagenicity 剂量相关性诱变性 Dose-related 剂量相关Dose-relatived cytotoxicity 剂量相关性细胞毒性Dose-relatived genotoxic activity 剂量相关性遗传毒性Dose-response curve 剂量-反应曲线 Dosing route 给药途径Duration 周期 Duration of pregnancy 妊娠周期Eaning 断奶 Earlier physical malformation 早期躯体畸形Early embryonic development 早期胚胎发育Early embryonic development to implantation 着床早期的胚胎发育Electro ejaculation 电射精Elimination 清除Embryofetal deaths 胚胎和胎仔死亡 Embryo-fetal development 胚胎-胎仔发育Embryo-fetal toxicity 胚胎-胎仔毒性 Embryonic death 胚胎死亡Embryonic development 胚胎发育 Embryonic period 胚胎期Embryos 胚胎 Embryotoxicity 胚胎毒性Enantiomer 对映异构体End of pregnancy 怀孕终止 Endocytic 内吞噬(胞饮)Endocytic activity 内吞噬活性 Endogenous proteins 内源性蛋白Endogenous components 内源性物质 Endogenous gene 内源性基因Endonuclease 核酸内切酶 Emdpmiclease release from lysosomes 溶酶体释放核酸内切酶End-point 终点Epididymal sperm maturation 附睾精子成熟性 Epitope 抗原决定部位Error prone repair 易错性修复 Escalation 递增Escherichia coli strain 大肠杆菌菌株 Escherichia coli 大肠杆菌Evaluation of test result 试验结果评价Exaggerated pharmacological response 超常增强的药理作用Excretion 排泄(清除) Exposure assessment 接触剂量评价Exposure period 接解期 External metabolizing system 体外代谢系统F1-animals 子一代动物False positive result 假阳性结果Fecundity 多产 Feed-back 反馈 Fertilisation 受精 Fertility 生育力Fertility studies 生育力研究 Fetal abnormalities 胎仔异常Fetal and neonatal parameters 胎仔和仔鼠的生长发育参数Fetal development and growth 肿仔发育和生长 Fetal period 胎仔期 Fetotoxicity 胎仔毒性False negative result 假阴性结果First pass testing 一期试验Fluorescence in situ hybridization(FISH) 原位荧光分子杂交-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:35:00--average deviation 平均差Bbar chart 直条图,条图bias 偏性binomial distribution 二项分布biometrics 生物统计学bivariate normal population 双变量正态总体Ccartogram 统计图case fatality rate(or case mortality) 病死率census 普查chi-sguare(X2) test 卡方检验central tendency 集中趋势class interval 组距classification 分组,分类cluster sampling 整群抽样coefficient of correlation 相关系数coefficient of regression 回归系数coefficient of variability(or coefficieut of variation) 变异系数collection of data 收集资料column 列(栏)combinative table 组合表combined standard deviation 合并标准差combined variance(or poolled variance) 合并方差complete survey 全面调查completely correlation 完全相关completely random design 完全随机设计confidence level 可信水平,置信水平confidence limit 可信限,置信限constituent ratio 构成比,结构相对数continuity 连续性control 对照control group 对照组coordinate 坐标correction for continuity 连续性校正correction for grouping 归组校正correction number 校正数correction value 校正值correlation 相关,联系correlation analysis 相关分析correlation coefficient 相关系数critical value 临界值cumulative frequency 累积频率Ddata 资料degree of dispersion 离散程度degree of freedom 自由度degree of variation 变异度dependent variable 应变量design of experiment 实验设计deviation from the mean 离均差diagnose accordance rate 诊断符合率difference with significance 差别不显著difference with significance 差别显著discrete variable 离散变量dispersion tendency 离中趋势distribution 分布,分配-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:35:00--Eeffective rate 有效率eigenvalue 特征值enumeration data 计数资料equation of linear regression 线性回归方程error 误差error of replication 重复误差estimate value 估计值event 事件experiment design 实验设计experiment error 实验误差experimental group 实验组extreme value 极值Ffatality rate 病死率field survey 现场调查fourfold table 四格表freguency 频数freguency distribution 频数分布GGaussian curve 高斯曲线geometric mean 几何均数grouped data 分组资料Hhistogram 直方图homogeneity of variance 方差齐性homogeneity test of variances 方差齐性检验hypothesis test 假设检验hypothetical universe 假设总体Iincidence rate 发病率incomplete survey 非全面调检indepindent variable 自变量indivedual difference 个体差异infection rate 感染率inferior limit 下限initial data 原始数据inspection of data 检查资料intercept 截距interpolation method 内插法interval estimation 区间估计inverse correlation 负相关Kkurtosis coefficient 峰度系数Llatin sguare design 拉丁方设计least significant difference 最小显著差数least square method 最小平方法,最小乘法leptokurtic distribution 尖峭态分布leptokurtosis 峰态,峭度linear chart 线图linear correlation 直线相关linear regression 直线回归linear regression eguation 直线回归方程link relative 环比logarithmic normal distribution 对数正态分布logarithmic scale 对数尺度lognormal distribution 对数正态分布lower limit 下限Mmatched pair design 配对设计mathematical statistics 数理统计(学) maximum value 极大值mean 均值mean of population 总体均数mean square 均方mean variance 均方,方差measurement data 讲量资料median 中位数medical statistics 医学统计学mesokurtosis 正态峰method of least squares 最小平方法,最小乘法method of grouping 分组法method of percentiles 百分位数法mid-value of class 组中值minimum value 极小值mode 众数moment 动差,矩morbidity 患病率mortality 死亡率Nnatality 出生率natural logarithm 自然对数negative correlation 负相关negative skewness 负偏志no correlation 无相关non-linear correlation 非线性相关non-parametric statistics 非参数统计normal curve 正态曲线normal deviate 正态离差normal distribution 正态分布normal population 正态总体normal probability curve 正态概率曲线normal range 正常范围normal value 正常值normal kurtosis 正态峰normality test 正态性检验nosometry 患病率-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:35:00--Oobserved unit 观察单位observed value 观察值one-sided test 单测检验one-tailed test 单尾检验order statistic 顺序统计量ordinal number 秩号ordinate 纵坐标Ppairing data 配对资料parameter 参数percent 百分率percentage 百分数,百分率percentage bar chart 百分条图percentile 百分位数pie diagram 园图placebo 安慰剂planning of survey 调查计划point estimation 点估计population 总体,人口population mean 总体均数population rate 总体率population variance 总体方差positive correlation 正相关positive skewness 正偏态prevalence rate 患病率probability 概率,机率probability error 偶然误差proportion 比,比率prospective study 前瞻研究prospective survey 前瞻调查public health statistics 卫生统计学Qquality eontrol 质量控制quartile 四分位数Rrandom 随机random digits 随机数字random numbers table 随机数目表random sample 随机样本random sampling 随机抽样random variable 随机变量randomization 随机化randomized blocks 随机区组,随机单位组randomized blocks analysis of variance 随机单位组方差分析randomized blocks design 随机单位组设计randomness 随机性range 极差,全距range of normal values 正常值范围rank 秩,秩次,等级rank correlation 等级相关rank correlation coefficent 等级相关系数rank-sum test 秩和检验ranked data 等级资料rate 率ratio 比recovery rate 治愈率registration 登记regression 回归regression analysis 回归分析regression coefficient 回归系数regression eguation 回归方程relative number 相对数relative ratio 比较相对数relative ratio with fixed base 定基比remainder error 剩余误差replication 重复retrospective survey 回顾调查Ridit analysis 参照单位分析Ridit value 参照单位值Ssample 样本sample average 样本均数sample size 样本含量sampling 抽样sampling error 抽样误差sampling statistics 样本统计量sampling survay 抽样调查scaller diagram 散点图schedule of survey 调查表semi-logarithmic chart 半对数线图semi-measursement data 半计量资料semi-guartile range 四分位数间距sensitivity 灵敏度sex ratio 性比例sign test 符号检验significance 显著性,意义significance level 显著性水平significance test 显著性检验significant difference 差别显著simple random sampling 单纯随机抽样simple table 简单表size of sample 样本含量skewness 偏态slope 斜率sorting data 整理资料sorting table 整理表sources of variation 变异来源square deviation 方差standard deviation(SD) 标准差standard error (SE) 标准误standard error of estimate 标准估计误差standard error of the mean 均数的标准误standardization 标准化standardized rate 标化率standardized normal distribution 标准正态分布statistic 统计量statistics 统计学statistical induction 统计图statistical inference 统计归纳statistical map 统计推断statistical method 统计地图statistical survey 统计方法statistical table 统计调查statistical test 统计表statistical treatment 统计检验stratified sampling 统计处理stochastic variable 分层抽样sum of cross products of 随机变量deviation from mean 离均差积和sum of ranks 秩和sum of sguares of deviation from mean 离均差平方和superior limit 上限survival rate 生存率symmetry 对称(性)systematic error 系统误差systematic sampling 机械抽样-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:35:00--Tt-distribution t分布t-test t检验tabulation method 划记法test of normality 正态性检验test of one-sided 单侧检验test of one-tailed 单尾检验test of significance 显著性检验test of two-sided 双侧检验test of two-tailed 双尾检验theoretical frequency 理论频数theoretical number 理论数treatment 处理treatment factor 处理因素treatment of date 数据处理two-factor analysis of variance 双因素方差分析two-sided test 双侧检验two-tailed test 双尾检验type I error 第一类误差type II error 第二类误差typical survey 典型调查Uu test u检验universe 总体,全域ungrouped data 未分组资料upper limit 上限Vvariable 变量variance 方差,均方variance analysis 方差分析variance ratio 方差比variate 变量variation coefficient 变异系数velocity of development 发展速度velocity of increase 增长速度Wweight 权数weighted mean 加权均数Zzero correlation 零相关-- 作者:月萝兰魂-- 发布时间:2006-12-22 13:36:00--世界500强制药企业名称中英对照排名公司名称中文名称总部收入百万美元77 Pfizer 辉瑞美国 45950.092 Johnson & Johnson 强生美国 41862.0114 GlaxoSmithKline 葛兰素史克英国 35050.9193 Novartis 诺华瑞士 24864.0205 Roche Group 罗氏瑞士 23212.9222 Merck 默克美国 22485.9239 Bristol-Myers Squibb 百时美施贵宝美国 20894.0 248 Aventis 安万特法国 20162.4254 Abbott Laboratories 雅培美国 19680.6269 AstraZeneca 阿斯利康英国 18849.0330 Wyeth 惠氏美国 15850.6433 Eli Lilly 礼来大药厂美国 12582.5100 BASF 巴斯夫德国 37757.0125 Dow Chemical 道化学美国 32632.0129 Bayer 拜耳德国 32331.1365 Akzo Nobel 阿克苏诺贝尔荷兰 14770.7。
S1A_06中文资料
S1A – S1M1.0A SURFACE MOUNT GLASS PASSIVATED STANDARD DIODECharacteristicSymbol S1AS1BS1DS1GS1JS1KS1MUnitPeak Repetitive Reverse Voltage Working Peak Reverse Voltage DC Blocking Voltage V RRMV RWM V R 501002004006008001000V RMS Reverse VoltageV R(RMS)3570140280420560700V Average Rectified Output Current @T L = 100°C I O 1.0A Non-Repetitive Peak Forward Surge Current 8.3ms Single half sine-wave superimposed on rated load (JEDEC Method)I FSM 30A Forward Voltage @I F = 1.0A V FM 1.10V Peak Reverse Current @T A = 25°C At Rated DC Blocking Voltage @T A = 125°C I RM 5.0200µA Reverse Recovery Time (Note 1)t rr 2.5µS Typical Junction Capacitance (Note 2)C j 15pF Typical Thermal Resistance (Note 3)R JL 30°C/W Operating and Storage Temperature RangeT j, T STG-65 to +175°CNote: 1. Measured with I F = 0.5A, I R = 1.0A, I rr = 0.25A,2. Measured at 1.0 MHz and applied reverse voltage of 4.0 V DC.3. Mounted on P .C. Board with 8.0mm 2 land area.WTE00.20.40.60.81.0406080100120140160180T ,LEAD TEMPERATURE ( C )Fig.1Forward Current Derating CurveL °I ,A V E R A G E O U T P U T C U R R E N T (A )O 040801200.010.11.0101001000I R ,I N S T A N T A N E O U S R E V E R S E C U R R E N T (A )µPERCENT OF RATED PEAK REVERSE VOLTAGE (%)Fig.4Typical Reverse Characteristics11010051015202530NUMBER OF CYCLES @60HzFig.3Max Non-Repetitive Peak Fwd Surge CurrentI ,P E A K F O R W A R D S U R G E C U R R E N T(A )F S M 0.40.80.010.110V ,INSTANTANEOUS FORWARD VOLTAGE (V)Fig.2Typical Forward CharacteristicsF I ,I N S T A N T A N E O U S F O R W A R D C U R R E N T(A )F 1.01.61.2MARKING INFORMATION RECOMMENDED FOOTPRINTPACKAGING INFORMATIONORDERING INFORMATIONProduct No.Package TypeShipping QuantityS1A-T3SMB 3000/Tape & Reel S1B-T3SMB 3000/Tape & Reel S1D-T3SMB 3000/Tape & Reel S1G-T3SMB 3000/Tape & Reel S1J-T3SMB 3000/Tape & Reel S1K-T3SMB 3000/Tape & Reel S1M-T3SMB3000/Tape & Reel1. Shipping quantity given is for minimum packing quantity only. For minimumorder quantity, please consult the Sales Department.2.To order RoHS / Lead Free version (with Lead Free finish), add “-LF” suffix to part number above. For example, S1A-T3-LF .Won-Top Electronics Co., Ltd (WTE) has checked all information carefully and believes it to be correct and accurate. However, WTE cannot assume any responsibility for inaccuracies. Furthermore, this information does not give the purchaser of semiconductor devices any license under patent rights to manufacturer. WTE reserves the right to change any or all information herein without further notice.WARNING : DO NOT USE IN LIFE SUPPORT EQUIPMENT. WTE power semiconductor products are not authorized for use as critical components in life support devices or systems without the express written approval.We power your everyday.Won-Top Electronics Co., Ltd.No. 44 Yu Kang North 3rd Road, Chine Chen Dist., Kaohsiung, Taiwan Phone: 886-7-822-5408 or 886-7-822-5410Fax: 886-7-822-5417Email: sales@Internet: 。
S1D13305中文资料
元器件交易网
The information of the product number change
Starting April 1, 2001, the product number will be changed as listed below. To order from April 1, 2001 please use the new product number. For further information, please contact Epson sales representative.
SDU1374#0C SDU1375#0C SDU1376#0C SDU1376BVR SDU1378#0C
• S1D1380x Series New No. Previous No.
SDU1386#0C
New No.
S5U13806P00C
S5U13503P00C S5U13504P00C S5U13505P00C S5U13506P00C
S1D13305 Series S1D13305D00A S1D13305F00A S1D13305F00B
S1D1370x Series S1D13704F00A S1D13705F00A S1D13706B00A S1D13706F00A S1D13708 Series
• S1D1350x Series Previous No.
S5U13704P00C S5U13705P00C S5U13706P00C S5U13706B32R S5U13708P00C
• S1D13A0x Series Previous No.
SDU13A3#0C SDU13A4#0C
New No.
S-1131资料
Rev.3.0_01
HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1131 Series
The S-1131 Series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and low current consumption developed based on CMOS technology. A built-in low on-resistance transistor provides a low dropout voltage and large output current, and a built-in overcurrent protector prevents the load current from exceeding the current capacitance of the output transistor. An ON/OFF circuit ensures a long battery life, and small SOT-89-3, SOT-89-5 and 6-Pin HSON(A) packages realize high-density mounting.
*1. Attention should be paid to the power dissipation of the package when the output current is large.
Applications
• Power supply for DVD and CD-ROM drives • Power supply for battery-powered devices • Power supply for personal communication devices • Power supply for note PCs
S1A0905-S0B0中文资料
Description Output for data quality indication (High = good data Low = bad data) RDS data output System reference voltage output (2.5V) Composite signal input Analog power (+5.0V)
Symbol VDDA VDD
Min. 4.5 4.5
Typ. 5.0 5.0
Max. 5.5 5.5
Unit V V
Conditions Analog power Digital power
Electrical Characteristics (VDDA = 5.0V, Ta = 25°C, fosc = 4.332MHz)
Test enable selecton pin (High = Test mode, Low = Normal mode) Input signal for Test mode (Normally ground or open)
Input for system reset (High = active mode, Low = reset mode) RDS clock output (1187.5Hz) I: Input pin, O: Output pin, P: Power pin
RDS DEMODULATOR IC
S1A0905
PIN CONFIGURATION
16 SOP (TOP VIEW) QUAL DATAO VREF MUX VDDA VSSA SGND COMP
1 16
3 4 5 6 7 8
SEC S1A0905X01
S-814资料
Rev.2.1_00LOW DROPOUT CMOS VOLTAGE REGULATORS-814 SeriesThe S-814 Series is a low dropout voltage, high output voltage accuracy and low current consumption positive voltage regulator developed utilizing CMOS technology.Built-in low ON-resistance transistors provide low dropout voltage and large output current. A shutdown circuit ensures long battery life.Various types of output capacitors can be used in the S-814 Series compared with the past CMOS voltage regulators.(i.e., Small ceramic capacitors can also be used in the S-814 Series.)The SOT-23-5 miniaturized package and the SOT-89-5 packages are recommended to use for configuring portable devices and large output current applications, respectively.Features• Low current consumption At operation mode: Typ. 30 μA, Max. 40 μA At shutdown mode: Typ. 100 nA, Max. 500 nA • Output voltage: 0.1 V steps between 2.0 and 6.0 V • High accuracy output voltage: ±2.0 % • Output current: 110 mA capable: 3.0 V output product, at V IN =4 V *1 180 mA capable: 5.0 V output product, at V IN =6 V *1 • Low dropout voltage: Typ. 170 mV: 5.0 V output product, at I OUT =60 mA • Built-in shutdown circuit • Built-in short-circuit protection• Low ESR capacitor, e.g. a ceramic capacitor of 0.47 μF or more, can be used as the output capacitor. • Small package: SOT-23-5 and SOT-89-5 • Lead-free products*1. Attention should be paid to the power dissipation of the package when the output current is large.Applications• Power source for battery-powered devices, personal communication devices, and home electric/electronic appliances.PackagesDrawing CodePackage NamePackage Tape ReelSOT-23-5 MP005-A MP005-A MP005-A SOT-89-5 UP005-A UP005-A UP005-ALOW DROPOUT CMOS VOLTAGE REGULATORS-814 Series Rev.2.1_00 Block DiagramVOUT*1. Parasitic diodeFigure 1LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00S-814 Series Product Name Structure1. Product Name*1.*2. Refer to the Table 1 in “2. Product name list”.*3. Refer to “3. ON/OFF pin (Shutdown pin)” in “ Operation”.LOW DROPOUT CMOS VOLTAGE REGULATORS-814 Series Rev.2.1_002. Product Name ListTable1Output voltage SOT-23-5 SOT-89-52.0 V±2.0 % S-814A20AMC-BCKT2G S-814A20AUC-BCKT2G2.1 V±2.0 % S-814A21AMC-BCLT2G S-814A21AUC-BCLT2G2.2 V±2.0 % S-814A22AMC-BCMT2G S-814A22AUC-BCMT2G2.3 V±2.0 % S-814A23AMC-BCNT2G S-814A23AUC-BCNT2G2.4 V±2.0 % S-814A24AMC-BCOT2G S-814A24AUC-BCOT2G2.5 V±2.0 % S-814A25AMC-BCPT2G S-814A25AUC-BCPT2G2.6 V±2.0 % S-814A26AMC-BCQT2G S-814A26AUC-BCQT2G2.7 V±2.0 % S-814A27AMC-BCRT2G S-814A27AUC-BCRT2G2.8 V±2.0 % S-814A28AMC-BCST2G S-814A28AUC-BCST2G2.9 V±2.0 % S-814A29AMC-BCTT2G S-814A29AUC-BCTT2G3.0 V±2.0 % S-814A30AMC-BCUT2G S-814A30AUC-BCUT2G3.1 V±2.0 % S-814A31AMC-BCVT2G S-814A31AUC-BCVT2G3.2 V±2.0 % S-814A32AMC-BCWT2G S-814A32AUC-BCWT2G3.3 V±2.0 % S-814A33AMC-BCXT2G S-814A33AUC-BCXT2G3.4 V±2.0 % S-814A34AMC-BCYT2G S-814A34AUC-BCYT2G3.5 V±2.0 % S-814A35AMC-BCZT2G S-814A35AUC-BCZT2G3.6 V±2.0 % S-814A36AMC-BDAT2G S-814A36AUC-BDAT2G3.7 V±2.0 % S-814A37AMC-BDBT2G S-814A37AUC-BDBT2G3.8 V±2.0 % S-814A38AMC-BDCT2G S-814A38AUC-BDCT2G3.9 V±2.0 % S-814A39AMC-BDDT2G S-814A39AUC-BDDT2G4.0 V±2.0 % S-814A40AMC-BDET2G S-814A40AUC-BDET2G4.1 V±2.0 % S-814A41AMC-BDFT2G S-814A41AUC-BDFT2G4.2 V±2.0 % S-814A42AMC-BDGT2G S-814A42AUC-BDGT2G4.3 V±2.0 % S-814A43AMC-BDHT2G S-814A43AUC-BDHT2G4.4 V±2.0 % S-814A44AMC-BDIT2G S-814A44AUC-BDIT2G4.5 V±2.0 % S-814A45AMC-BDJT2G S-814A45AUC-BDJT2G4.6 V±2.0 % S-814A46AMC-BDKT2G S-814A46AUC-BDKT2G4.7 V±2.0 % S-814A47AMC-BDLT2G S-814A47AUC-BDLT2G4.8 V±2.0 % S-814A48AMC-BDMT2G S-814A48AUC-BDMT2G4.9 V±2.0 % S-814A49AMC-BDNT2G S-814A49AUC-BDNT2G5.0 V±2.0 % S-814A50AMC-BDOT2G S-814A50AUC-BDOT2G5.1 V±2.0 % S-814A51AMC-BDPT2G S-814A51AUC-BDPT2G5.2 V±2.0 % S-814A52AMC-BDQT2G S-814A52AUC-BDQT2G5.3 V±2.0 % S-814A53AMC-BDRT2G S-814A53AUC-BDRT2G5.4 V±2.0 % S-814A54AMC-BDST2G S-814A54AUC-BDST2G5.5 V±2.0 % S-814A55AMC-BDTT2G S-814A55AUC-BDTT2G5.6 V±2.0 % S-814A56AMC-BDUT2G S-814A56AUC-BDUT2G5.7 V±2.0 % S-814A57AMC-BDVT2G S-814A57AUC-BDVT2G5.8 V±2.0 % S-814A58AMC-BDWT2G S-814A58AUC-BDWT2G5.9 V±2.0 % S-814A59AMC-BDXT2G S-814A59AUC-BDXT2G6.0 V±2.0 % S-814A60AMC-BDYT2G S-814A60AUC-BDYT2GRemark Please contact the SII marketing department for type B products.LOW DROPOUT CMOS VOLTAGE REGULATORRev.2.1_00S-814 SeriesPin ConfigurationsTable 2Pin No. Symbol Pin description 1 VIN Voltage input pin 2 VSS GND pin 3 ON/OFF Shutdown pin4 NC *1No connection 5 VOUT Voltage output pin *1. The NC pin is electrically open.The NC pin can be connected to VIN or VSS.Figure 2Table 3Pin No. Symbol Pin description 1 VOUT Voltage output pin 2 VSS GND pin3 NC *1No connection 4 ON/OFF Shutdown pin 5 VIN Voltage input pin SOT-89-5 Top view 1 32 45*1. The NC pin is electrically open.The NC pin can be connected to VIN or VSS.Figure 3LOW DROPOUT CMOS VOLTAGE REGULATOR S-814 SeriesRev.2.1_00Absolute Maximum RatingsTable 4(Ta =25°C unless otherwise specified)ItemSymbol Absolute maximum rating UnitV IN V SS −0.3 to V SS +12V Input voltage V ON/OFF V SS −0.3 to V SS +12V Output voltageV OUTV SS −0.3 to V IN +0.3V 250 (When not mounted on board) mWSOT-23-5600*1mW500 (When not mounted on board) mWPower dissipationSOT-89-5P D 1000*1mWOperating ambient temperature T opr −40 to +85°C Storage temperature T stg −40 to +125°C *1. When mounted on board[Mounted on board](1) Board size : 114.3 mm × 76.2 mm × t1.6 mm (2) Board name : JEDEC STANDARD51-7Caution The absolute maximum ratings are rated values exceeding which the product could sufferphysical damage. These values must therefore not be exceeded under any conditions.0P o w e r D i s s i p a t i o n (P D ) [m W ] 050100150Ambient Temperature (Ta) [°C]1000Figure 4 Power Dissipation of Package (When Mounted on Board)LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00S-814 Series Electrical CharacteristicsTable 5OUT(E)i.e., The output voltage when fixing I OUT(=30 mA) and inputting V OUT(S)+1.0 V.V OUT(S): Specified output voltage*2.Output amperage when output voltage goes below 95 % of V OUT(E) after gradually increasing output current. *3. The output current can be at least this value.Use load amperage not exceeding this value.LOW DROPOUT CMOS VOLTAGE REGULATOR S-814 SeriesRev.2.1_00*4. V drop =V IN1*1−(V OUT(E)×0.98)*1. Input voltage at which the output voltage falls 98 % of V OUT(E) after gradually decreasing the inputvoltage.*5. The change in temperature [mV/°C] is calculated using the following equation.[][][]1000 C /ppm V Ta ΔV Δ V V C /mV Ta ΔV ΔOUTOUT)S (OUT OUT ÷°•×=°3*2**1 *1. Change in temperature of the dropout voltage *2. Specified output voltage*3. Output voltage temperature coefficientLOW DROPOUT CMOS VOLTAGE REGULATORRev.2.1_00S-814 SeriesTest Circuits1.2.Figure 5Figure 63.4.LFigure 7 Figure 85.LFigure 9LOW DROPOUT CMOS VOLTAGE REGULATORS-814 Series Rev.2.1_00 Standard CircuitOUTPUT*1. C IN is a capacitor used to stabilize input.*2. In addition to a tantalum capacitor, a ceramic capacitor of 0.47 μF or more can be used in C L.Figure 10Caution The above connection diagram and constant will not guarantees successful operation.Perform through evaluation using the actual application to set the constant.Technical Terms1. Low dropout voltage regulatorThe low dropout voltage regulator is a voltage regulator featuring a low dropout voltage characteristic due to its internal low ON-resistance characteristic transistors.2. Low ESRESR is the abbreviation for Equivalent Series Resistance. The low ESR output capacitor (C L) can be used in the S-814 Series.3. Output voltage (V OUT)The accuracy of the output voltage is ensured at ±2.0 % under the specified conditions*1 of input voltage, output current, and temperature, which differ depending upon the product items.*1. The condition differs depending upon each product.Caution If you change the above conditions, the output voltage value may vary out of the accuracy range of the output voltage. Refer to the “ Electrical Characteristics” and “Characteristics” for details.4. Line regulation 1 (ΔV OUT1) and Line regulation 2 (ΔV OUT2)Indicate the input voltage dependencies of output voltage. That is, the value shows how much the output voltage changes due to a change in the input voltage with the output current remained unchanged.5. Load regulation (ΔV OUT3)Indicates the output current dependencies of output voltage. That is, the value shows how much the output voltage changes due to a change in the output current with the input voltage remained unchanged.6. Dropout voltage (V drop )Indicates a difference between input voltage (V IN1) and output voltage when output voltage falls by 98 % of V OUT(E) by gradually decreasing the input voltage. V drop =V IN1−(V OUT(E)×0.98)7. Temperature coefficient of output voltage ⎟⎠⎞⎜⎝⎛•ΔΔOUT OUT V Ta VThe shadowed area in Figure 11 is the range where V OUT varies in the operating temperature range when the temperature coefficient of the output voltage is ±100 ppm/°C.−4025°CV OUT [V]V OUT(E)*185 Ta [°C]°C*1. The mesurement value of output voltage at 25°C.Figure 11 Typical example of S-814A28AA change in temperatures of output voltage [mV/°C] is calculated using the following equation. [][][]1000 C /ppm V Ta V V V C /mV TaV OUT OUT)S (OUT OUT ÷°•ΔΔ×=°ΔΔ3*2**1*1. The change in temperature of the dropout voltage *2. Specified output voltage*3. Output voltage temperature coefficientOperation1. Basic operationFigure 12 shows the block diagram of the S-814 Series.The error amplifier compares a reference voltage V ref with part of the output voltage divided by the feedback resistors R s and R f. It supplies the output transistor with the gate voltage, necessary to ensure certain output voltage free of any fluctuations of input voltage and temperature.VOUT*1. Parasitic diodeFigure 122. Output transistorThe S-814 Series uses a low on-resistance Pch MOS FET as the output transistor.Be sure that V OUT does not exceed V IN+0.3 V to prevent the voltage regulator from being broken due to inverse current flowing from VOUT pin through a parasitic diode to VIN pin.3. ON/OFF pin (Shutdown pin)This pin starts and stops the regulator.When the shutdown pin is switched to the shutdown level, the operation of all internal circuits stops, the built-in Pch MOSFET output transistor between VIN pin and VOUT pin is shutdown, allowing current consumption to be drastically reduced. The VOUT pin enters the Vss level due to internally divided resistance of several MΩ between VOUT pin and VSS pin.Furthermore, the structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down nor pulled up internally, do not use it in the floating state. In addition, please note that current consumption increases if a voltage of 0.3 V to V IN−0.3 V is applied to the shutdown pin. When the ON/OFF pin is not used, connect it to the VIN pin in case of the product type is ‘”A” and to the VSS pin in case of “B”.Figure 13Table 6Product type ON/OFF pin Internal circuit VOUT pin voltage Current consumptionA “H”: Power on Operating Set value I SS1A “L”:Shutdown Stop V SS level I SS2B “H”: Shutdown Stop V SS level I SS2B “L”: Power on Operating Set value I SS14. Short-circuit protection circuitThe S-814 Series incorporates a short-circuit protection circuit to protect the output transistor against short-circuiting between VOUT pin and VSS pin.The short-circuit protection circuit controls output current as shown in “1. Output voltage vs. Output current (When load current increases)” curve in “ Characteristics”, and prevents output current of approx. 70 mA or more from flowing even if VOUT pin and VSS pin are shorted. However, the short-circuit protection circuit does not protect thermal shutdown. Be sure that input voltage and load current do not exceed the specified power dissipation level.When output current is large and a difference between input and output voltages is large even if not shorted, the short-circuit protection circuit may start functioning and the output current may be controlled to the specified amperage. For details, refer to “3. Maximum output current vs. Input voltage” curve in “ Characteristics”.Selection of Output Capacitor (C L)Mount an output capacitor between VOUT pin and VSS pin for phase compensation. The S-814 Series enables customers to use a ceramic capacitor as well as a tantalum or an aluminum electrolytic capacitor.• A ceramic capacitor or an OS capacitor:Use a capacitor of 0.47 μF or more.• A tantalum or an aluminum electrolytic capacitor:Use a capacitor of 0.47 μF or more and ESR of 10 Ω or less.Pay special attention not to cause an oscillation due to an increase in ESR at low temperatures, when you use the aluminum electrolytic capacitor. Evaluate the capacitor taking into consideration its performance including temperature characteristics.Overshoot and undershoot characteristics differ depending upon the type of the output capacitor you select. Refer to “C L dependencies of overshoot” and “C L dependencies of undershoot” in“ Transient Response Characteristics”.Precautions•Wiring patterns for VIN pin, VOUT pin and GND pin should be designed so that the impedance is low.When mounting an output capacitor, the distance from the capacitor to the VOUT pin and the VSS pin should be as short as possible.•Note that output voltage may increase when a series regulator is used at low load current (Less than 10 μA).•Generally, a series regulator may cause oscillation, depending on the selection of external parts. The following conditions are recommended for this IC. However, be sure to perform sufficient evaluation under the actual usage conditions to select the series regulator.Output capacitor (C L): 0.47 μF or moreEquivalent Series Resistance (ESR): 10 Ω or lessInput series resistance (R IN): 10 Ω or less•The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small or an input capacitor is not connected.•The application conditions for input voltage and load current do not exceed the power dissipation level of the package.•In determining the output current, attention should be paid to the output current value specified and footnote *3 in Table 5 in the “ Electrical Characteristics”.•Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.•SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.Characteristics (Typical data)1. Output voltage (V OUT ) vs. Output current (I OUT ) (When load current increases)S-814A20A S-814A30A(Ta =25°C)1.02.00 50 100150 200 250I OUT [mA]V O U T [V ](Ta=25°C)0100200 300 400I OUT [mA] V O U T [V ]S-814A50A(Ta=25°C)0 200 400 600 800I OUT [mA] V O U T [V ]Remark In determining the output current, attention should be paid to the following.1. The minimum output current value and footnote *3in Table 5 in the “ Electrical characteristics ”. 2. The package power dissipation.2. Output voltage (V OUT ) vs. Input voltage (V IN )V O U T (V )V O U T (V )V O U T (V )3. Maximum output current (I OUTmax ) vs. Input voltage (V IN )S-814A20A S-814A30A100 200 300 1 2 3 4 5 6 7 8 910V IN [V] I O U T m a x [m A ]020*******2345 6 7 8 910V IN [V]I O U T m a x [m A ]200 400 600 800 4 5 6 7 8 9 10V IN [V] I O U T m a x [m A ]Remark In determining the output current, attention should be paid to the following.1. The minimum output current value and footnote *3in Table 5 in the “ Electrical characteristics ”. 2. The package power dissipation.4. Dropout voltage (V drop ) vs. Output current (I OUT )S-814A20A S-814A30A50 0 5 1015 20 2530I OUT [mA] V d r o p [m V ]3060901200510 15 20 2530I OUT [mA] V d r o p [m V ]40 80 0 10 2030 40 5060I OUT [mA]V d r o p [m V ]5. Output voltage (V OUT ) vs. Ambient temperature (Ta)S-814A20A S-814A30A1.961.982.00 2.02 2.04 −500 50 100Ta [°C] V O U T [V ]2.942.973.003.033.06−50050100Ta [°C]V O U T [V ]S-814A50A4.904.955.00 5.05 5.10 −50 0 50 100Ta [°C] V O U T [V ]6. Line regulation (ΔV OUT1) vs. Ambient temperature (Ta)S-814A20A/S-814A30A/S-814A50A 05 1015 2025 30 35 −500 50 100Ta [°C]V IN =V OUT(S)+0.5↔10 V, I OUT =30 mA ΔV O U T 1 [m V ]7. Load regulation (ΔV OUT3) vs. Ambient temperature (Ta)S-814A20A/S-814A30A/S-814A50A10 20 30 40 50−500 50 100Ta [°C]V IN =V OUT(S)+1 V, I OUT =10 μA ↔80 mA ΔV O U T 3 [m V ]8. Current consumption (ΔI SS1) vs. Input voltage (V IN )9. Threshold voltage of shutdown pin (V SH /V SL ) vs. Input voltage (V IN )S-814A20A S-814A30A0.5 1.0 1.5 2.0 2.5 2 4 6 8 10V IN [V] V S H /V S L[V ]00.51.01.52.02.5357 8 10V IN [V] V S H /V S L[V ]S-814A50A0.5 1.0 1.5 2.0 2.5 5 6 8 9 10V IN [V] V S H /V S L[V ]Reference Data1. Transient Response Characteristics (S-814A30A, Typical data, Ta =25°C)Input voltageorLoad current1-1. At power onOutput voltage (V OUT ) – Time (t)t [50 μs/div]V O U T [0.5V /d i v ]0 VLoad dependencies of overshootC L dependencies of overshoot0.2 0.4 0.6 0.8 1.E −051.E −04 1.E −03 1.E −02 1.E −011.E +00I OUT [A]O v e r s h o o t [V ]0.20.40.60.81.00.1 1 10 100C L [uF]O v e r s h o o t [V ]V DD dependencies of overshoot Temperature dependencies of overshoot0 2 4 6 8 10V DD [V] O v e r s h o o t [V ]V IN =0→V DD , I OUT =30 mA, C L =1 μF−50050 100Ta [°C] O v e r s h o o t [V ]V IN =0→V OUT(S)+1 V, I OUT =30 mA, C L =1 μFLOW DROPOUT CMOS VOLTAGE REGULATORRev.2.1_00S-814 Series1-2. At power on/off control Output voltage (V OUT ) – Time (t)t [50 μs/div] V O U T [0.5 V /d i v ]10 V 0 VLoad dependencies of overshootC L dependencies of overshoot0.20.4 0.6 0.81.E −05 1.E −04 1.E −03 1.E −02 1.E −011.E +00I OUT [A]O v e r s h o o t [V ]V IN =V +1 V , C =1 μF, ON/OFF =0→V +1 V00.20.40.60.81.00.1110 100C L [μF]O v e r s h o o t [V ] V IN =V OUT(S)+1 V, I OUT =30 mA, ON/OFF =0→V OUT(S)+1VV DD dependencies of overshootTemperature dependencies of overshoot0.20.40.60.81.00 2 4 6 810V DD [V]O v e r s h o o t [V ]V IN =V DD , I OUT =30 mA, C L =1 μF, ON/OFF =0→V DD0.20.40.60.81.0−5050 100Ta [°C]O v e r s h o o t [V ]V IN =V OUT(S)+1 V, I OUT =30 mA, C L =1 μF, ON/OFF =0→V OUT(S)+1VLOW DROPOUT CMOS VOLTAGE REGULATOR S-814 SeriesRev.2.1_001-3. At power fluctuation Output voltage (V OUT ) – Time (t)V IN =4.0→10 V, I OUT =30 mAt [50 μs/div] V O U T [0.5 V /d i v ]V IN =10→4.0 V, I OUT =30 mAt [50 μs/div]V O U T [0.5 V /d i v ]Load dependencies of overshootC L dependencies of overshoot0.2 0.4 0.6 0.8 1.E −05 1.E −04 1.E −03 1.E −02 1.E −011.E +00I OUT [A]O v e r s h o o t [V ]V IN =V OUT(S)+1 V →V OUT(S)+2 V, C L =1 μF00.20.40.60.81.01.21.40.1110 100CL [μF]O v e r s h o o t [V ]V IN =V OUT(S)+1 V →V OUT(S)+2 V, I OUT =30 mAV DD dependencies of overshootTemperature dependencies of overshoot0.51.01.52.00 2 4 6 810V DD [V]O v e r s h o o t [V ]V IN =V OUT(S)+1 V →V DD , I OUT =30 mA, C L =1 μF00.20.40.60.81.0−5050100Ta [°C]O v e r s h o o t [V ]V IN =V OUT(S)+1 V →V OUT(S)+2 V, I OUT =30 mA, C L =1 μFLoad dependencies of undershootC L dependencies of undershoot0.2 0.4 0.6 0.81.E −05 1.E −04 1.E −03 1.E −02 1.E −011.E +00I OUT [A]U n d e r s h o o t [V ]V IN =V OUT(S)+2 V →V OUT(S)+1 V, C L =1 μF00.20.40.60.81.01.21.40.1110 100CL [μF]U n d e r s h o o t [V ]V IN =V OUT(S)+2 V →V OUT(S)+1 V, I OUT =30 mALOW DROPOUT CMOS VOLTAGE REGULATORRev.2.1_00S-814 SeriesV DD dependencies of undershootTemperature dependencies of undershoot0.20.40.60.81.0 0 2 4 6 810V DD [V]U n d e r s h o o t [V ]V IN =V DD →V OUT(S)+1 V, I OUT =30 mA, C L =1 μF00.20.40.60.81.0−5050 100Ta [°C]U n d e r s h o o t [V ]V IN =V OUT(S)+2 V →V OUT(S)+1 V, I OUT =30 mA, C L =1 μFLOW DROPOUT CMOS VOLTAGE REGULATOR S-814 SeriesRev.2.1_001-4. At load fluctuation Output voltage (V OUT ) – Time (t)I OUT =10 μA →30 mA, V IN =4 Vt [20 μs/div]V O U T [0.2 V /d i v ]3 V10 μAI OUT =30 mA →10 μA, V IN =4 Vt [20 ms/div]V O U T [0.1 V /d i v ] 10 μLoad current dependencies of overshootC L dependencies of overshoot0 0.2 0.4 0.6 0.8 1 1.E −031.E −021.E −011.E +00ΔI OUT [A]O v e r s h o o t[V ]Remark ΔI OUT shows larger load current at loadcurrent fluctuation. Smaller current at load current fluctuation is fixed to 10 µA.i.e. ΔI OUT =1.E −02 [A] means load currentfluctuation from 10 mA to 10 µA. 00.20.40.60.81.00.1110 100C L [μF]O v e r s h oo t [V ] V IN =V OUT(s)+1 V, I OUT =30 mA →10 μAV DD dependencies of overshootTemperature dependencies of overshoot0.2 0.4 0.6 0.8 1.0 0 2 46 810V DD [V]O v e r s h o o t [V ]0.20.40.60.81.0−50050 100Ta [°C]O v e r s h o o t [V ]V IN =V OUT(S)+1 V, I OUT =30 mA →10 μA, C L =1 μFLOW DROPOUT CMOS VOLTAGE REGULATORRev.2.1_00S-814 SeriesLoad current dependencies of undershootC L dependence of undershoot0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.E −031.E −021.E −011.E +00ΔI OUT [A]U n d e r s h o o t [V ]V=V +1 V, C =1 μFRemark ΔI OUT shows larger load current at loadcurrent fluctuation. Lower current at load current fluctuation is fixed to 10 µA.i.e. ΔI OUT =1.E −02 [A] means load currentfluctuation from 10 µA to 10 mA. 00.20.40.60.81.01.20.1110 100C L [μF]U n d e r s h o o t [V ]V IN =V OUT(S)+1 V, I OUT =10 μA →30 mAV DD dependencies of undershootTemperature dependencies of undershoot0.20.40.60.81.00 2 4 6 810V DD [V]U n d e r s h o o t [V ]00.20.40.60.81.0−5050 100Ta [°C]U n d e r s h o o t [V ]V IN =VOUT(S)+1 V, I OUT =10 μA →30 mA, C L =1 μF。
ICH 指导原则文件目录(中英文)
人用药品注册技术要求国际协调会（ICH）文件目录ICH的论题主要分为四类，因此ICH根据论题的类别不同而进行相应的编码分类：1. “Q”类论题：Q代表QUALITY，指那些与化工和医药，质量保证方面的相关的论题。
Q1/Q2...Q10都属于这类。
2. “S”类论题：S代表SAFETY，指那些与实验室和动物实验，临床前研究方面的相关的论题。
3. “E”类论题：E代表EFFICACY，指那些与人类临床研究相关的课题。
4. “M”类论题：M代表MULTIDISCIPLINARY, 指那些不可单独划入以上三个分类的交叉涉及的论题。
同时M又细分为5个小类：M1: 常用医学名词（Med DRA）M2: 药政信息传递之电子标准M3: 与临床试验相关的临床前研究时间的安排M4: 常规技术文件(CTD)M5: 药物词典的数据要素和标准一、ICH. 质量部分（Quality）稳定性1.Quality质量2.Q1: Stability稳定性3.Q1A(R2): Stability Testing of New Drug Substances and Products 新原料药和制剂的稳定性试验4.Q1B: Photostability Testing of New Drug Substances and Products 新原料药和制剂的光稳定性试验5.Q1C: Stability Testing for New Dosage Forms 新剂型的稳定性试验6.Q1D: Bracketing and Matrixing Designs for Stability Testing of Drug Substances and Drug Products原料药和制剂稳定性试验的交叉和矩阵设计 Q1E: Evaluation of Stability Data 稳定性数据的评估7.Q1F: Stability Data Package for Registration Applications in Climatic Zones III andIV在气候带III和IV，药物注册申请所提供的稳定性数据8.Q2: Analytical Validation分析验证9.Q2(R1): Validation of Analytical Procedures: Text and Methodology分析程序的验证：正文及方法论10.Q3: Impurities 杂质11.Q3A(R2): Impurities in New Drug Substances 新原料药中的杂质12.Q3B(R2): Impurities in New Drug Products (Revised Guideline) 新制剂中的杂质13.Q3C(R3): Impurities: Guideline for Residual Solvents 杂质：残留溶剂指南Impurities: Guideline for Residual Solvents (Maintenance) 杂质：残留溶剂指南(保留)PDE for Tetrahydrofuran (in Q3C(R3)) 四氢呋喃的日允许接触剂量PDE for N-Methylpyrrolidone (in Q3C(R3)) N-甲基吡咯烷酮的日允许接触剂量14.Q4: Pharmacopoeias药典15.Q4A: Pharmacopoeial Harmonisation 药典的协调16.Q4B: Evaluation and Recommendation of Pharmacopoeial Texts for Use in the ICH Regions药典内容的评估及推荐为用于ICH地区17.Q4B Annex1 Evaluation and Recommendation of Pharmacopoeial Texts for Use in the ICH Regionson Residue on Ignition/Sulphated Ash General Chapter附录1 药典内容的评估及推荐为用于ICH地区关于灼烧残渣/灰分常规篇18.Q4B Annex2 Evaluation and Recommendation of Pharmacopoeial Texts for Use in the ICH Regionson Test for Extractable Volume of Parenteral Preparations General Chapter附录2 药典内容的评估及推荐为用于ICH地区关于注射剂可提取容量测试常规篇19.Q4B Annex3 Evaluation and Recommendation of Pharmacopoeial Texts for Use in the ICH Regionson Test for Particulate Contamination: Sub-Visible Particles General Chapter附录3 药典内容的评估及推荐为用于ICH地区关于颗粒污染物测试:不溶性微粒常规篇20.Q5: Quality of Biotechnological Products 生物技术制品质量21.Q5A(R1): Viral Safety Evaluation of Biotechnology Products Derived from Cell Lines of Human or Animal Origin来源于人或者动物细胞系的生物技术产品的病毒安全性评估22.Q5B: Quality of Biotechnological Products: Analysis of the Expression Construct in Cells Used for Production of r-DNA Derived Protein Products生物技术产品的质量：源于重组DNA的蛋白质产品的生产中所用的细胞中的表达构建分析23.Q5C: Quality of Biotechnological Products: Stability Testing of Biotechnological/Biological Products生物技术产品的质量：生物技术/生物产品的稳定性试验24.Q5D: Derivation and Characterization of Cell Substrates Used for Production of Biotechnological/Biological Products用于生产生物技术/生物产品的细胞底物的起源和特征描述25.Q5E: Comparability of Biotechnological/Biological Products Subject to Changes inTheir Manufacturing Process基于不同生产工艺的生物技术产品/生物产品的可比较性26.Q6: Specifications规格27.Q6A: Specifications: Test Procedures and Acceptance Criteria for New Drug Substances and New Drug Products: Chemical Substances (including decision trees) 质量规格：新原料药和新制剂的检验程序和可接收标准：化学物质(包括决定过程)28.Q6B: Specifications: Test Procedures and Acceptance Criteria for29.Biotechnological/Biological Products质量规格：生物技术/生物产品的检验程序和可接收标准30.Q7: Good Manufacturing Practices （GMP）31.Q7A: Good Manufacturing Practice Guide for Active Pharmaceutical Ingredients活性药物成份的GMP指南32.Q8: Pharmaceutical Development药物研发33.Annex to Q8Q8附录34.Q9: Quality Risk Management质量风险管理35.Q10: Pharmaceutical Quality System药物质量体系二、ICH.安全性部分(Safety) 致癌试验1.S1A Guideline on the Need for Carcinogenicity Studies of Pharmaceuticals 药物致癌试验的必要性2.S1B Testing for Carcinogenicity of Pharmaceuticals 药物致癌试验3.S1C(R2) Dose Selection for Carcinogenicity Studies of Pharmaceuticals药物致癌试验的剂量选择4.S1C’药物致癌试验的剂量选择的附件：补充剂量限度和有关注释遗传毒性5.S2(R1) Guidance on Genotoxicity Testing and Data Interpretation forPharmaceuticals Intended for Human Use 人用药物的遗传毒性试验和数据分析指导原则6.S2A药物审评遗传毒性试验的特殊性指导原则7.S2B遗传毒性：药物遗传毒性试验标准组合药代8.S3A Note for Guidance on Toxicokinetics: The Assessment of Systemic Exposurein Toxicity Studies 毒代动力学指导原则：毒性研究中全身暴露的评价9.S3B Pharmacokinetics: Guidance for Repeated Dose Tissue Distribution Studies药代动力学：重复给药的组织分布研究指导原则慢性毒性10.S4Duration of Chronic Toxicity Testing in Animals (Rodent and Non RodentToxicity Testing) 动物慢性毒性试验的周期（啮齿类和非啮齿类）生殖毒性11.S5(R2) Detection of Toxicity to Reproduction for Medicinal Products andToxicity to Male Fertility (the Addendum dated November 1995 has beenincorporated into the core guideline in November 2005 )12.S5A药品的生殖毒性检测13.S5B雄性生育力毒性其他14.S6Preclinical Safety Evaluation of Biotechnology-Derived Pharmaceuticals 生物技术药品的临床前安全性试验15.S7A Safety Pharmacology Studies for Human Pharmaceuticals 人用药物的安全性药理研究16.S7B The Non-clinical Evaluation of the Potential for Delayed VentricularRepolarization (QT Interval Prolongation) by Human Pharmaceuticals人用药延迟心室复极化（QT间期延长）潜在作用的非临床评价指导原则17.S8Immunotoxicity Studies for Human Pharmaceuticals人类药品的免疫毒性研究18.S9 Nonclinical Evaluation for Anticancer Pharmaceuticals抗癌药物的临床前评价19.S10 Photosafety Evaluation三、ICH.临床部分(Efficacy)1.E1The Extent of Population Exposure to Assess Clinical Safety for Drugs Intended for Long-Term Treatment of Non-Life-Threatening Conditions 评价临床长期给药方案的安全性2.E2A Definitions and Standards for Expedited Reporting 快速报告的定义和标准3.E2B(R3) Data Elements for Transmission of Individual Case Safety Reports个体病例安全性报告传递的数据要素4.E2C Periodic Benefit-Risk Evaluation Report 上市药品定期安全性更新报告5.E2D Post-Approval Safety Data Management: Definitions and Standards for Expedited Reporting批准后安全性数据管理：快速报告的定义和标准6.E2E Pharmacovigilance Planning药物警戒计划7. E2F Development Safety Update Report8.E3Structure and Content of Clinical Study Reports 临床研究报告的结构与内容9.E4Dose-Response Information to Support Drug Registration 新药注册所需量-效关系的资料10.E5(R1)Ethnic Factors in the Acceptability of Foreign Clinical Data 对国外临床研究资料的种族因素的可接受性11.E6(R1) Good Clinical Practice: Consolidated Guideline 药品临床研究规范（GCP）一致性指导原则12.E7Studies in Support of Special Populations: Geriatrics 老年人群的临床研究13.E8General Considerations for Clinical Trials 临床试验的一般考虑14.E9Statistical Principles for Clinical Trials 临床试验统计原则15.E10Choice of Control Group and Related Issues in Clinical Trials 对照组的选择16.E11Clinical Investigation of Medicinal Products in the Pediatric Population 儿童人群的临床研究17.E12按治疗分类的各类药物临床评价E12 Principles for Clinical Evaluation of New Antihypertensive Drugs18.E14The Clinical Evaluation of QT/QTc Interval Prolongation and Proarrhythmic Potential for Non-Antiarrhythmic Drugs 非抗心律失常药物致QT/QTc间期延长及潜在心律失常作用的临床评价19.E15 Definitions for Genomic Biomarkers, Pharmacogenomics, Pharmacogenetics, Genomic Data and Sample Coding Categories20.E16 Biomarkers Related to Drug or Biotechnology Product Development: Context, Structure and Format of Qualification Submissions四、ICH.综合部分 (Multidisciplinary)1.M1医学术语Med DRA2.M2Electronic Transmission of Individual Case Safety Reports MessageSpecification (ICH ICSR DTD Version 2.1) companion document to E2B(R3)注册资料传递所需的电子代码3.M3Guidance on Nonclinical Safety Studies for the Conduct of Human ClinicalTrials and Marketing Authorization for Pharmaceuticals与临床研究有关的临床前研究的时间安排4.M4 Organisation of the Common Technical Document for the Registration ofPharmaceuticals for Human Use (Edited with Numbering and Section Header Changes, September 2002). Including the Annex : the Granularity Document(Revised November 2003).CTD（common technical document）（包括CTD、CTD-Q、CTD-S、CTD-E和eCTD）药品词汇的数据要素和标准5.M4Q (R1) The Common Technical Document for the Registration ofPharmaceuticals for Human Use: Quality (Edited with Numbering and Section Header Changes, September 2002)6.M4S (R2) The Common Technical Document for the Registration ofPharmaceuticals for Human Use: Safety (Edited with Numbering and SectionHeader Changes, September 2002)7.M4E (R1) The Common Technical Document for the Registration ofPharmaceuticals for Human Use: Efficacy (Edited with Numbering and Section Header Changes, September 2002)8.M7 Assessment and Control of DNA Reactive (Mutagenic) Impurities inPharmaceuticals to Limit Potential Carcinogenic Risk Reference:1. 《ICH 药品注册的国际要求》2. 3. /health/Health/yx/yao/2007-08-07/6326.html。
SMBT2222中文资料
SMBT 2222 A
Noise figure
F
IC = 100 µA, VCE = 10 V, RS = 1 kΩ
f = 1 kHz
SMBT 2222 A
250 – 300 –
–
–
–
–
–
–
2
–
0.25 –
–
–
–
–
50
–
75
–
5
–
25
–
–
–
–
–
MHz
– –
8
pF
30 25
kΩ
8
1.25
10–4
8.0
Permissible pulse load Ptot max/Ptot DC = f (tp)
Transition frequency fT = f (IC) VCE = 20 V
Semiconductor Group
5
元器件交易网
SMBT 2222 SMBT 2222 A
0.6 –
IC = 500 mA, IB = 50 mA
SMBT 2222
–
–
SMBT 2222 A
–
–
1) Pulse test conditions: t ≤ 300 µs, D = 2 %.
V – –
– –
– –
10 nA
10 nA
10
µA
10
µA
10 nA
– – – – – 300 – –
–
Semiconductor Group
4
元器件交易网
SMBT 2222 SMBT 2222 A
Total power dissipation Ptot = f (TA*; TS) * Package mounted on epoxy
112B中文资料
Previous Page | Return to Index | Next Page1/4" ENCLOSED PHONE JACKS1. Series 11*2. PC Terminal View*3. Series N11*click here to download a schematic drawing(you will need to have Adobe Acrobat installed on your system to do this)Hi-D® Jax 2- and 3-CONDUCTORHi-D Jax® 2- and 3-conductor enclosed phone jacks are ideal for panel/chassis and PC board mounting. Unitized molded housing protects springs, provides mechanical and electrical reliability, minimizes leakage and provides low capacity between springs. Mounts on .625 inch minimum centers in rows or arrays. .25 inch or .21 in inside diameter bushing types, metal or thermoplastic bushings (for insulated mounting). Insulated Hi-D Jax® jacks are specifically designed for in-circuit (insulated) mounting from mounting surface and have fully protected enclosed internal sleeve feature. Solder lugs or PC terminals may be selected.MOUNTINGJacks mount in a single .375 inch diameter hole on .625 inch minimum centers. Series11*, N11*, NS11* and S11* mount in panels up to .156 inch thick. Series L11* andNL11* (long bushing) mount in panels up to .25 inch thick. Jacks with PC terminals mount on PC boards up to .094 inch thick. Formed "shoulders" on each terminal provide stable stand-off mount. Threaded bushing permits mechanical connection to equipment panel. Mounting hardware is supplied.SERIES 11* - 2- and 3-conductor types, threaded metalbushing .276 inch long. .25 inch inside diameterbushings.SERIES L11* - Same as Series 11*, except bushing is .375inch long for mounting in panels up to .25 inch thick.SERIES N11* - Same as Series 11*, except bushing ismolded thermoplastic for insulated mounting.SERIES NL11* - Same as Series N11*, except bushingis .375 inch long for insulated mounting in panels up to.25 inch thick.SERIES S11* - Same as Series 11*, except bushing has.21 inch inside diameter. Smaller diameter protects againstaccidental insertion of plugs with .25 inch diameter fingers.ý NS11* - (SPECIAL ORDER ONLY) - Same asSeries N11*, except bushing is .21 inch inside diameter.113BPC1M AND 114BPC1M - Versatile, 3-conductor 113BPC1M and 114BPC1M feature springs which accept a wide variety of 1/4 inch plug designs. Self-aligning PC terminals allow for easier insertion into a printed circuit board. Also feature a metric thread mounting.TWO CONDUCTOR PART NUMBERSSolder Lug Part Number PC TerminalsPart NumberDescription Jack Schematic1TypicalMating Plug2111111PC Open circuit I250 N111N111PC Insulated bushing I250NL111-.375 " long insulatedbushingI250112A112APC Single closed circuit III250 L112A L112APC.375" long bushing III250 N112A N112APC Insulated bushing III250NL112A-.375" long insulatedbushingIII250113113PC Isolated "make" circuit V250 N113-Insulated bushing V250ý 113D113DPC Transfer circuit (1-C)VI 3250 113E113EPC Isolated "break" circuit IX250 THREE CONDUCTOR PART NUMBERS112B112BPC Double open circuit IV267L112B-.375" long bushing IV267 N112B N112BPC Insulated bushing IV267 NL112B-.375" long bushing IV267-S112BPC .210" inside diameterbushingIV S-267113B113BPC Single closed circuit VII267-113BPC1M Single closed circuit VII-L113B-.375" long bushing VII267 N113B N113BPC Insulated bushing VII267 NL113B-.375" long bushing VII267 113F113FPC Ring circuit closed XXVIII267 114B114BPC Double closed circuit XII267 114BPC1M Double closed circuit XII-L114B L114BPC.375" long bushing XII267 N114B N114BPC Insulated bushing XII267 NL114B NL114BPC.375" long bushing XII2671 Other circuits available; contact factory. Schematics pages 65 and 66.2 See Plug Section for other options.3 Two tip springs.ý Special order only. Contact Switchcraft.SPECIFYING NOTE:Unless otherwise shown in "Description", jacks have .276 inch long threaded bushings with .25 inch inside diameter.Hi-D Jax® 2- and 3-CONDUCTORSPECIFICATIONSMATERIALMounting Bushing: Series 11*, L11*, S11* - Nickel-plated copper alloy. Series N11*, NL11*, NS11* - Molded thermoplastic over nickel-plated copper alloy sleeve.Previous Page | Return to Index | Next PageTo search a category please click on the corresponding icon:| Connectors | Jacks and Plugs || Patch Panels, Patch Kits & Jackfields | Cable Assemblies and Patch Cords | Switches | All products shown are covered by Switchcraft's limited lifetime warranty.| Switchcraft home |About Us | Products | What's New | Search | Contact Us。
AVS12中文资料
Repetitive peak off-state voltage (2)
RMS on-state current (360° conduction angle)
Non repetitive surge peak on-state current ( Tj initial = 25°C )
TC = 70°C
tion and high security triggering of the triac. When connected to VSS, the mode input activates an additional option. If the main power drops from 220V to 110V, the triac control remains locked to the 220V mode and avoids any high voltage spike when the voltage comes back to 220V. When connected to VDD, the mode input desactivates this option. • The TRIAC is specially designed for this application. An optimization between sensitivity and dynamic parameters of the triac gate highly reduces the losses of supply resistor and allows excellent immunity against disturbances.
TRIAC
s HIGH EFFICIENCY AND SAFETY SWITCHING s UNINSULATED PACKAGE : AVS12CB s VDRM = ± 600V s IT(RMS): 12A
ADG732中文资料
ADG726/ADG732 =REV. PrD 2001Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.One T echnology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. T el: 781/329-4700World Wide Web Site: Fax: 781/326-8703Analog Devices, Inc., 200116-/32- Channel, 3.5 Ω1.8 V to 5.5 V, ±2.5 V, Analog Multiplexers Preliminary Technical DataPRELIMINARY TECHNICAL DATAFEATURES1.8 V to 5.5 V Single Supply±2.5 V Dual Supply Operation3.5 Ω On Resistance0.5 Ω On Resistance FlatnessRail to Rail Operation30ns Switching TimesSingle 32 to 1 Channel MultiplexerDual/Differential 16 to 1 Channel MultiplexerTTL/CMOS Compatible InputsFor Functionally Equivalent devices with Serial InterfaceSee ADG725/ADG731APPLICATIONSOptical ApplicationsData Acquisition SystemsCommunication SystemsRelay replacementAudio and Video SwitchingBattery Powered SystemsMedical InstrumentationAutomatic Test EquipmentGENERAL DESCRIPTIONThe ADG726/ADG732 are monolithic CMOS 32channel/dual 16 channel analog multiplexers. TheADG732 switches one of thirty-two inputs (S1-S32) to acommon output, D, as determined by the 5-bit binaryaddress lines A0, A1, A2, A3 and A4. The ADG726switches one of sixteen inputs as determined by the fourbit binary address lines, A0, A1, A2 and A3.On chip latches facilitate microprocessor interfacing. TheADG726 device may also be configured for differential operation by tying CSA and CSB together. An EN input is used to enable or disable the devices. When disabled, all channels are switched OFF.These multiplexers are designed on an enhanced submi-cron process that provides low power dissipation yet gives high switching speed, very low on resistance and leakage currents. They operate from single supply of 1.8V to 5.5V and ±2.5 V dual supply, making them ideally suited to a variety of applications. On resistance is in the region of a few Ohms and is closely matched between switches and very flat over the full signal range. These parts can operate equally well as either Multiplexers or De-Multiplexers PRODUCT HIGHLIGHTS1.+1.8 V to +5.5 V Single or ±2.5 V Dual Supplyoperation. These parts are specified and guaranteedwith +5 V ±10%, +3 V ±10% single supply and±2.5 V ±10% dual supply rails.2.On Resistance of3.5 Ω.3.Guaranteed Break-Before-Make Switching Action.4.7mm x 7mm 48 lead LF Chip Scale Package (CSP)or 48 lead TQFP package.FUNCTIONAL BLOCK DIAGRAMSS1S32A0DA3A1ENA2A4WRS1ADAS16AS1BS16BDBWRCSACSCSBand have an input signal range which extends to the sup-plies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break before make switching action preventing momentary shorting when switching channels.They are available in either 48 lead LFCSP or TQFP package.元器件交易网–2–REV. PrDADG726/ADG732–SPECIFICATIONS 1PRELIMINARY TECHNICAL DATAB Version–40°CParameter+25o C to +85°C Units Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to V DD V On-Resistance (R ON )3.5Ω typ V S = 0 V to V DD , I DS = 10 mA;5.56Ω max Test Circuit 1On-Resistance Match Between 0.3Ω typ V S = 0 V to V DD , I DS = 10 mA Channels (∆R ON )0.8Ω max On-Resistance Flatness (R FLAT(ON))0.5Ω typ V S = 0 V to V DD , I DS = 10 mA 1.2Ω max LEAKAGE CURRENTSV DD = 5.5 VSource OFF Leakage I S (OFF)±0.01nA typ V D = 4.5 V/1 V, V S = 1 V/4.5 V;±0.5±5nA max Test Circuit 2Drain OFF Leakage I D (OFF)±0.01nA typ V D = 4.5 V/1 V, V S = 1 V/4.5 V;±0.5±5nA max Test Circuit 3Channel ON Leakage I D , I S (ON)±0.01nA typ V D = V S = 1 V, or 4.5V;±1±10nA max Test Circuit 4DIGITAL INPUTSInput High Voltage, V INH 2.4V min Input Low Voltage, V INL 0.8V max Input Current I INL or I INH 0.005µA typ V IN = V INL or V INH±0.1µA max C IN , Digital Input Capacitance 5pF typ DYNAMIC CHARACTERISTICS 2t TRANSITION 40ns typ R L = 300 Ω, C L = 35 pF,Test Circuit 5;60ns max V S1 = 3 V/0 V, V S32 = 0 V/3V Break-Before-Make Time Delay, t D 30ns typ R L = 300 Ω, C L = 35 pF;1ns min V S = 3 V, Test Circuit 6t ON (EN, WR )32ns typ R L = 300 Ω, C L = 35 pF;50ns max V S = 3 V, Test Circuit 7t OFF (EN)10ns typ R L = 300 Ω, C L = 35 pF;14ns max V S = 3 V, Test Circuit 8Charge Injection ±5pC typ V S = 0 V, R S = 0 Ω, C L = 1 nF;Test Circuit 9Off Isolation-60dB typ R L = 50 Ω, C L = 5 pF, f = 100 kHz;Test Circuit 10Channel to Channel Crosstalk -60dB typ R L = 50 Ω, C L = 5 pF, f = 100 kHz;Test Circuit 11-3 dB Bandwidth 10MHz typ R L = 50 Ω, C L = 5 pF, Test Circuit 10C S (OFF)13pF typ f = 1 MHz C D (OFF) ADG726180pF typ f = 1 MHz ADG732360pF typ f = 1 MHz C D , C S (ON) ADG726200pF typ f = 1 MHz ADG732400pF typ f = 1 MHzPOWER REQUIREMENTS V DD = +5.5 VI DD10µA typ Digital Inputs = 0 V or +5.5 V20µA maxNOTES 1Temperature range is as follows: B Version: –40°C to +85°C.2Guaranteed by design, not subject to production test.Specifications subject to change without notice.(V DD= 5V ± 10%, V SS= 0V, GND = 0 V, unless otherwise noted)元器件交易网–3–REV. PrD ADG726/ADG732PRELIMINARY TECHNICAL DATAB Version–40°CParameter+25o C to +85°CUnits Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 V to V DD V On-Resistance (R ON )6Ω typ V S = 0 V to V DD , I DS = 10 mA;1112Ω max Test Circuit 1On-Resistance Match Between 0.4Ω typ V S = 0 V to V DD , I DS = 10 mA Channels (∆R ON )1.2Ω max On-Resistance Flatness (R FLAT(ON))3Ω max V S = 0 V to V DD , I DS = 10 mA LEAKAGE CURRENTSV DD = 3.3 VSource OFF Leakage I S (OFF)±0.01nA typ V S = 3 V/1 V, V D = 1 V/3 V;±1±5nA max Test Circuit 2Drain OFF Leakage I D (OFF)±0.01nA typ V S = 1 V/3 V, V D = 3 V/1 V;±1±5nA max Test Circuit 3Channel ON Leakage I D , I S (ON)±0.01nA typ V S = V D = +1 V or +3 V;±1±10nA max Test Circuit 4DIGITAL INPUTSInput High Voltage, V INH 2.0V min Input Low Voltage, V INL 0.8V max Input Current I INL or I INH 0.005µA typ V IN = V INL or V INH±0.1µA max C IN , Digital Input Capacitance 5pF typ DYNAMIC CHARACTERISTICS 2t TRANSITION 45ns typ R L = 300 Ω, C L = 35 pF Test Circuit 575ns max V S1 = 2 V/0 V, V S32 = 0 V/2 V Break-Before-Make Time Delay, t D 30ns typ R L = 300 Ω, C L = 35 pF;1ns min V S = 2 V,Test Circuit 6t ON (EN, WR )40ns typ R L = 300 Ω, C L = 35 pF;70ns max V S = 2 V, Test Circuit 7t OFF (EN)20ns typ R L = 300 Ω, C L = 35 pF;28ns max V S = 2 V, Test Circuit 8Charge Injection ±5pC typ V S = 0 V, R S = 0 Ω, C L = 1 nF;Test Circuit 9Off Isolation-60dB typ R L = 50 Ω, C L = 5 pF, f = 1 MHz;Test Circuit 10Channel to Channel Crosstalk -60dB typ R L = 50 Ω, C L = 5 pF, f = 1 MHz;Test Circuit 11-3 dB Bandwidth 10MHz typ R L = 50 Ω, C L = 5 pF, Test Circuit 10C S (OFF)13pF typ f = 1 MHz C D (OFF) ADG726180pF typ f = 1 MHz ADG732360pF typ f = 1 MHz C D , C S (ON) ADG726200pF typ f = 1 MHz ADG732400pF typ f = 1 MHzPOWER REQUIREMENTS V DD = +3.3 VI DD10µA typ Digital Inputs = 0 V or +3.3 V20µA maxNOTES 1Temperature ranges are as follows: B Version: –40°C to +85°C.2Guaranteed by design, not subject to production test.Specifications subject to change without notice.(V DD = 3V ± 10%, V SS = 0V, GND = 0 V, unless otherwise noted)SPECIFICATIONS1元器件交易网–4–REV. PrDADG726/ADG732–SPECIFICATIONS 1PRELIMINARY TECHNICAL DATAB Version–40°CParameter+25o C to +85°C Units Test Conditions/Comments ANALOG SWITCHAnalog Signal Range V SS to V DD V On-Resistance (R ON )3.5Ω typ V S = V SS to V DD , I DS = 10 mA;5.56Ω max Test Circuit 1On-Resistance Match Between 0.3Ω typ V S = V SS to V DD , I DS = 10 mA Channels (∆R ON )0.8Ω max On-Resistance Flatness (R FLAT(ON))0.5Ω typ V S = V SS to V DD , I DS = 10 mA1.2Ω max LEAKAGE CURRENTSV DD = +2.75 V, V SS = -2.75 VSource OFF Leakage I S (OFF)±0.01nA typ V S = +2.25 V/-1.25 V, V D = -1.25 V/+2.25 V;±1±5nA max Test Circuit 2Drain OFF Leakage I D (OFF)±0.01nA typ V S = +2.25 V/-1.25 V, V D = -1.25 V/+2.25 V;±1±5nA max Test Circuit 3Channel ON Leakage I D , I S (ON)±0.01nA typ V S = V D = +2.25 V/-1.25 V, Test Circuit 4±1±10nA max DIGITAL INPUTSInput High Voltage, V INH 1.7V min Input Low Voltage, V INL 0.7V max Input Current I INL or I INH 0.005µA typ V IN = V INL or V INH±0.1µA max C IN , Digital Input Capacitance 5pF typ DYNAMIC CHARACTERISTICS 2t TRANSITION 40ns typ R L = 300 Ω, C L = 35 pF Test Circuit 560ns max V S1 = 1.5 V/0 V,V S32 = 0 V/1.5 V Break-Before-Make Time Delay, t D 15ns typ R L = 300 Ω, C L = 35 pF;1ns min V S = 1.5 V, Test Circuit 6t ON (EN, WR )32ns typ R L = 300 Ω, C L = 35 pF;50ns max V S = 1.5 V, Test Circuit 7t OFF (EN)16ns typ R L = 300 Ω, C L = 35 pF;26ns max V S = 1.5 V, Test Circuit 8Charge Injection ±8pC typ V S = 0 V, R S = 0 Ω, C L = 1 nF; Test 9Off Isolation-60dB typ R L = 50 Ω, C L = 5 pF, f = 1 MHz;Test Circuit 10Channel to Channel Crosstalk -60dB typ R L = 50 Ω, C L = 5 pF, f = 1 MHz;Test Circuit 11-3 dB Bandwidth 10MHz typ R L = 50 Ω, C L = 5 pF, Test Circuit 10C S (OFF)13pF typ C D (OFF) ADG726180pF typ f = 1 MHz ADG732360pF typ f = 1 MHz C D , C S (ON) ADG726200pF typ f = 1 MHz ADG732400pF typ f = 1 MHzPOWER REQUIREMENTS V DD = +2.75 VI DD 10µA typ Digital Inputs = 0 V or +2.75 V 20µA max I SS10µA typ V SS = -2.75 V20µA maxDigital Inputs = 0 V or +2.75 VNOTES 1Temperature range is as follows: B Version: –40°C to +85°C.2Guaranteed by design, not subject to production test.Specifications subject to change without notice.(V DD= +2.5 V ±10%, V SS= -2.5 V ±10%, GND = 0 V, unless otherwise noted)Dual Supply 元器件交易网–5–REV. PrD ADG726/ADG732PRELIMINARY TECHNICAL DATATIMING C HARACTERISTICS 1,2, 3Parameter Limit at T MIN , T MAX Units Conditions/Comments t 10ns min CS to WR Setup Time t 20ns min CS to WR Hold Time t 320ns min WR pulse widtht 410ns min Time between WR cycles t 55ns min Address, Enable Setup Time t 62ns minAddress, Enable Hold TimeNOTES 1See Figure 1.2All input signals are specified with tr =tf = 5ns (10% to 90% of V DD ) and timed from a voltage level of (V IL + V IH )/2.3Guaranteed by design and characterisation, not production tested.Specifications subject to change without notice.Figure 1. Timing DiagramFigure 1 shows the timing sequence for latching the switch address and enable inputs. The latches are level sensitive;therefore, while WR is held low, the latches are transparent and the switches respond to the address and enable inputs.This input data is latched on the rising edge of WR . The ADG726 has two CS inputs. This enables the part to be used either as a dual 16-1 channel multiplexer or a differential 16 channel multiplexer. If a differential output is required, tie CSA and CSB together.元器件交易网–6–REV. PrDADG726/ADG732PRELIMINARY TECHNICAL DATAABSOLUTE MAXIMUM RATINGS 1(T A = +25°C unless otherwise noted)V DD to V SS +7 VV DD to GND –0.3 V to +7 V V SS to GND +0.3 V to -7 VAnalog Inputs 2V SS - 0.3 V to V DD +0.3 Vor 30 mA, Whichever Occurs FirstDigital Inputs 2-0.3V to V DD +0.3 V or30 mA, Whichever Occurs FirstPeak Current, S or D 60mA(Pulsed at 1 ms, 10% Duty Cycle max)Continuous Current, S or D 30mA Operating Temperature Range Industrial (B Version)–40°C to +85°CCAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection.Although the ADG726/ADG732 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.Storage Temperature Range –65°C to +150°C Junction Temperature +150°C48 lead CSP θJA Thermal ImpedanceTBD°C/W 48 lead TQFP θJA Thermal Impedance TBD°C/W Lead Temperature, Soldering (10seconds)300°C IR Reflow, Peak Temperature +220°CNOTES 1Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.2Overvoltages at A, WR , RS , S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.ORDERING GUIDEModel Temperature Range Package Description Package Option ADG726BCP -40 o C to +85 o C Chip Scale Package (CSP)CP-48ADG726BSU-40 o C to +85 o C Thin Quad FlatpackSU-48ADG732BCP -40 o C to +85 o C Chip Scale Package (CSP)CP-48ADG732BSU-40 o C to +85 o CThin Quad FlatpackSU-48PIN CONFIGURATIONSCSP & TQFPS12S11S10S9S8S7S6S5S4S3S2S1NC = NO CONNECTV D D 13V D D 14A 0 15A 1 16A 2 17A 3 1A 4 19C S 20W R 21E N 22G N D 23V S S 2436 S2835 S2734 S2633 S2532 S2431 S2330 S2229 S2128 S2027 S1926 S1825 S178 S 137 S 146 S 155 S 164 N C 3 D 2 N C 1 N C 40 S 3239 S 3138 S 3037 S 291S12A 2S11A 3S10A 4S9A 5S8A 6S7A 7S6A 8S5A 9S4A 10S3A 11S2A 12S1A NC = NO CONNECTV D D 13V D D 14A 0 15A 1 16A 2 17A 3 18C S A 19C S B 20W R 21E N 22G N D 23V S S 2436 S12B 35 S11B 34 S10B 33 S9B 32 S8B 31 S7B 30 S6B 29 S5B 28 S4B 27 S3B 26 S2B 25 S1B8 S 13A 7 S 14A 6 S 15A 5 S 16A 4 N C 3 D A 2 N C 1 D B 40 S 16B 39 S 15B 38 S 14B 37 S 13B123456789101112元器件交易网ADG726/ADG732–7–REV. PrDPRELIMINARY TECHNICAL DATATable 2. ADG732 Truth TableA4A3A2A1A0E N C S W R Switch ConditionX X X X X X 1L->H Retains previous switch condition X X X X X X 1X No Change in Switch Condition X X X X X 100NONE 00000000100001000200010000300011000400100000500101000600110000700111000801000000901001000100101000011010110001201100000130110100014011100001501111000161000000017100010001810010000191001100020101000002110101000221011000023101110002411000000251100100026110100002711011000281110000029111010003011110000311111132X = Don’t Care Table 1. ADG726 Truth TableA3A2A1A0E N C S A C S B W R ON SwitchX X X X X 11L->H Retains previous switch condition X X X X X 11X No Change in Switch condition X X X X 1000NONE00000000S1A - DA, S1B - DB 00010000S2A - DA, S2B - DB 00100000S3A - DA, S3B - DB 00110000S4A - DA, S4B - DB 01000000S5A - DA, S5B - DB 01010000S6A - DA, S6B - DB 01100000S7A - DA, S7B - DB 01110000S8A - DA, S8B - DB 10000000S9A - DA, S9B - DB 10010000S10A - DA, S10B - DB 10100000S11A - DA, S11B - DB 10110000S12A - DA, S12B - DB 11000000S13A - DA, S13B - DB 11010000S14A - DA, S14B - DB 11100000S15A - DA, S15B - DB 1111S16A - DA, S16B - DB元器件交易网–8–REV. PrDADG726/ADG732PRELIMINARY TECHNICAL DATAV DD Most positive power supply potential.V SS Most Negative power supply in a dual supply application. In single supply applications, connect to GND.I DD Positive supply current.I SSNegative supply current.G N D Ground (0 V) reference.S Source terminal. May be an input or output.D Drain terminal. May be an input or output.I N Logic control input.V D (V S )Analog voltage on terminals D, S R ON Ohmic resistance between D and S.∆R ONOn resistance match between any two channels, i.e. R ON max - R ON minR FLAT(ON)Flatness is defined as the difference between the maximum and minimum value of on-resistance as mea sured over the specified analog signal range.I S (OFF)Source leakage current with the switch “OFF.”I D (OFF)Drain leakage current with the switch “OFF.”I D , I S (ON)Channel leakage current with the switch “ON.”V INL Maximum input voltage for logic “0”.V INHMinimum input voltage for logic “1”.I INL (I INH )Input current of the digital input.C S (OFF)“OFF” switch source capacitance. Measured with reference to ground.CD (OFF)“OFF” switch drain capacitance. Measured with reference to ground.C D ,C S (ON)“ON” switch capacitance. Measured with reference to ground.C INDigital input capacitance.t TRANSITION Delay time measured between the 50% and 90% points of the digital inputs and the switch “ON” condi tion when switching from one address state to another.t ON (EN )Delay time between the 50% and 90% points of the EN digital input and the switch “ON” condition.t OFF (EN )Delay time between the 50% and 90% points of the EN digital input and the switch “OFF” condition.t OPEN“OFF” time measured between the 80% points of both switches when switching from one address state to another.Charge A measure of the glitch impulse transferred from the digital input to the analog output during switching.InjectionOff Isolation A measure of unwanted signal coupling through an “OFF” switch.Crosstalk A measure of unwanted signal is coupled through from one channel to another as a result of parasiticcapacitance.On Response The Frequency response of the “ON” switch.Insertion The loss due to the ON resistance of the switch.LossTERMINOLOGY元器件交易网ADG726/ADG732–9–REV. PrD PRELIMINARY TECHNICAL DATATYPICAL PERFORMANCE CHARACTERISTICSTBD TPC 1. On Resistance as a Function ofV D (V S ) for for Single SupplyTBD TPC 2. On Resistance as a Function ofV D (V S ) for Dual SupplyTBD TPC 3. On Resistance as a Function of V D (V S ) for Different Temperatures,Single SupplyTBD TPC 4. On Resistance as a Function of V D (V S ) for Different Temperatures,Single SupplyTBD TPC 5. On Resistance as a Function of V D (V S ) for Different Temperatures,Dual SupplyTBD TPC 6. Leakage Currents as a functionof V D (V S )TBDTPC 7. Leakage Currents as a functionof V D (V S )TBDTPC 8. Leakage Currents as a functionof V D (V S )TBDTPC 9. Leakage Currents as a functionof Temperature元器件交易网ADG726/ADG732PRELIMINARY TECHNICAL DATATBDTPC 10. Leakage Currents as a Function of TemperatureTBDTPC 11. Supply Currents vs. Input Switching FrequencyTBDTPC 12. Charge Injection vs. SourceVoltageTBDTPC 13. T ON/T OFF Times vs.TemperatureTBDTPC 14. Off Isolation vs. FrequencyTBDTPC 15. Crosstalk vs. FrequencyTBDTPC 16. On Response vs. Frequency元器件交易网–10–REV. PrDADG726/ADG732–11–REV. PrD PRELIMINARY TECHNICAL DATATest Circuit 1.On Resistance.Test CircuitsTest Circuit 2.I S (OFF).D Test Circuit 4.I D (ON)Test Circuit 5.Switching Time of Multiplexer, t TRANSITION .Test Circuit 6.Break Before Make Delay, t OPEN .V OUTVADDRESS DR IVE (V IN )3VV OUT0VV S *SIMILAR CONNECTION FOR ADG726V TRANSITION TRANSITIONV INV V DV V DV 元器件交易网ADG726/ADG732PRELIMINARY TECHNICAL DATATest Circuit 7.ON OFF(WR).Test Circuit 9.Charge Injection.Test Circuit 10.OFF Isolation and Bandwidth.Test Circuit 11.Channel-to-Channel Crosstalk.V*SIMILAR CONNECTION FOR ADG726V OUT WITHOUT SWITCHCHANNEL TO CHANNEL CROSSTALK=20LOG10(V OUT/V S)*SIMILAR CONNECTION FOR ADG726V OUTV*SIMILAR CONNECTION FOR ADG726VV OUTV*SIMILAR CONNECTION FOR ADG726VTest Circuit 8.Enable Delay, t ON(EN), t OFF(EN)元器件交易网–12–REV. PrDADG726/ADG732–13–REV. PrD PRELIMINARY TECHNICAL DATA48-Lead CSP (CP-48)48-Lead TQFP(SU-48)OUTLINE DIMENSIONSDimensions shown in inches and (mm).0.024 (0.60) 0.017 (0.42) 0.012 (0.30) 0.009 (0.23) BSC PIN 1CONTROLLING DIMENSIONS ARE IN MILLIMETERS0.035 (0.90) MAX 0.033 (0.85) NOMREF0.006 (0.17)BSC元器件交易网。
ALT、AST、UA与非酒精性脂肪肝病理的相关性研究
ALT、AST、UA与非酒精性脂肪肝病理的相关性研究龚先琼;李珊珊;陈少彬;王敏【摘要】目的探讨临床指标和非酒精性脂肪肝的病理的相关性.方法回顾性分析94例非酒精性脂肪肝患者的临床资料和肝组织病理资料,通过单因素分析和Logistic多元回归分析临床指标与NAFLD活动度积分(NAS)和纤维化分期的相关性.结果在单因素分析中,年龄、体重指数(body mass index,BMI)、谷丙转氨酶(alanine aminotransferase,ALT)、谷草转氨酶(aspartate aminotransferase,AST)、尿酸(uric acid,UA)水平在非酒精性脂肪性肝炎(non alcoholic steatohepatitis,NASH)组和非NASH组差异有统计学意义,ALT、AST、碱性磷酸酶(alkaline phosphatase,AKP)水平在S0-1组明显高于S2～4组,差异有统计学意义.Logistic多因素回归分析提示,AST、UA水平与NAS有相关性,AST 水平与肝组织纤维化程度有相关性.结论 AST、UA水平与NAFLD活动度积分,AST水平与肝纤维化分期独立相关.【期刊名称】《医学研究杂志》【年(卷),期】2016(045)008【总页数】4页(P90-93)【关键词】非酒精性脂肪肝;非酒精性脂肪性肝炎;肝组织病理【作者】龚先琼;李珊珊;陈少彬;王敏【作者单位】361009 福建中医药大学附属厦门中医院肝病中心;363100 福州,福建中医药大学肝病中心中西医结合系;363100 福州,福建中医药大学肝病中心中西医结合系;361009 福建中医药大学附属厦门中医院肝病中心【正文语种】中文【中图分类】R575非酒精性脂肪肝病(nonalcoholic fatty liver disease，NAFLD)是指除外乙醇和其他明确的肝损害因素所致的、以弥漫性肝细胞大泡性脂肪变为主要特征的临床病理综合征。
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Characteristics
Maximum Recurrent Peak Reverse Voltage Maximum RMS Voltage Maximum DC Blocking Voltage Maximum Average Forward Rectified Current @TC=100 C Peak Forward Surge Current, 8.3 ms Single Half Sine-Wave Superimposed on Rated Load (JEDEC Method) Maximum Instantaneous At 1.0A DC Maximum DC Reverse Current @Tj=25 C At Rated DC Blocking Voltage @Tj=125 C Typical Junction Capacitance (Note 1) Typical Thermal Resistance (Note 2) Operating Temperature Range Storage Temperature Range
Symbol S1A S1B VRRM VRMS VDC IF(AV) 50 35 50 100 70 100
S1D S1G S1J S1K S1M Unit
200 140 200 400 280 400 1.0 600 420 600 800 1000 560 800 700 1000
V V V A
FIG.2 Maximum Non-Pepetitive Surge Current
10
1000
INSTANTANEOUS FORWARD CURRENT, (A)
INSTANTANEOUS REVERSE CURRENT, (uA)
100
TJ = 125 C
1.0
10
TJ = 25 C
1.0
TJ = 25 C
WEITRON
元器件交易网
S1A thru S1M
AVERAGE FORWARD CURRENT AMPERES
1.0
PEAK FORWARD SURGE CURRENT, AMPERES
30
0.8 0.6
20
0.4
10
Pulse Width 8.3ms Single Half-Sine-Wave (JEDEC METHOD)
元器件交易网
S1A thru S1M
Surface Mount Standard Recovery Glass Passivated
REVERSE VOLTAGE 50 TO 1000 VOLTS FORWARD CURRENT 1.0 AMPERE
Features:
*For Surface Mount Application *Glass Passivated Chip *Low Reverse Leakage Current *Low Forward Voltage Drop And High Current Capability *Plastic Meterial Has UL Flammability Classification 94V-0
0.2 0 25
SINGLE PHASE HALF WAVE 60Hz RESISTIVE OR INDUCTIVE LOAD
0 1 2 5 10 20 50 100
50
75
100
125
150
175
LEAD TEMPERATURE , C
NUMBER OF CYCLES AT 60Hz
FIG.1 Forward Current Derating Curve
IFSM VF IR CJ R θJL TJ TSTG
30 1.10 5.0 100 10 30 -55 to+150 -55 to+150
A
V
PF C/W
C C
NOTES: 1.Measured at 1.0MHz applied reverse voltage of 4.0V DC. 2.Thermal Resistance Junction to case.
Maximum Ratings and Electrical Characteristics
Rating 25 C Ambient Temperature Unless Otherwise Specified. Single Phase Half Wave, 60Hz , Resistive or Inductive Load. For Capacitive Load, Derate Current by 20%.
Mechanical Data
*Case : Molded Plastic *Polarity :Indicated by cathode band *Weight : 0.002 Ounce ,0.064 grams
SMA(DO-214AC)
SMA Outline Dimension
B
Unit:mm
A
C
D J H E G
Dim A B C D E G H J
SMA Min 2.20 4.00 1.27 0.15 4.48 0.10 0.76 1.70
Max 2.92 4.60 1.63 0.31 5.59 0.20 1.52 2.62
WEITRON
元器件交易网
S1A thru S1M
0.1
0.1
PULSEWIDTH:300us
.01 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
0.01 0 20 40 60 80 100 120 140
INSTANTANEOUS FORWARD VOLTAGE, (VOLTS)
PERCENT OF RATED PEAK REVERSE VOLTAGE, (%)
FIG.3 Typcial Forward Characteristics
FIG.4 Typical Reverse Characteristics
WEITRON