D. Maximum CMRR The

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大连交通大学coa考试题1

1.In floating-point arithmetic,multiplication can divide to 4 steps:A. Check for zero, add exponets,multiply significands,normalize, and roundB. Fetch instrution,indirectly address operand,execute instrction and interruptC.process scheduling states:creats,get ready,is running and is blocked.D.load first operand,add second operand ,check overflow and store result2.Which the following is not the area that the source and result operands can be stored in_______?A.Main or virtual memoryB.CPU registerC.I/O deviceD.Instruction3.The advantage of Immediate Addressing is _______A.limited address rangeB.more memory accessC.limit value rangeD.no memory access4.The address is known as a type of date, because it is represented by ____.A.twos complementB.a signed integerC.an unsigned integerD.a number of hexadecimal5.In direct addressing mode, the operanad is in ____A.the main memoryB.the register RC.the instructionD.none6.In ____ sub-cycle,CPU fetch the operand’s address from memory.A.indirectB.fetchC.executeD.interrupt7.Which is not in the ALU? _____A,shifterB.adderplementerD.accumulator8.Instruction pipeline can improve______A.processing speed of programB.accessing speed of memoryC.accessing speed of I?OD.accessing speed of RAID9.The protocol “mesi” is alse called _______.A.write back policyB.write -update protocolC.write -invalidate protocolD.write through policy10.MESI protocol can solve the ______.A.problem of cache coherenceB.problem of memory write bottle-nekmunication problem of person-computerD.volatile problem of DRAM11.At the end of fetch cycle,IR holds______.A.instructionB.operandC.address of operandD.address of instruction12.There are three kinds of BUS,Which does not belong to themA.address busB.system busC.data busD.control bus13.Cache’s write-back policy means write operation to main memory_____.A.as well as to cacheB.only when the relative cache is replacedC.when the difference between cache and main mimory is foundD.only when using direct mapping14.A four-way set associative chache has 63k words,main memory has 256M words and divided 32M blocks.line size is _____words.A.4B.8C.16D.3215.In the following description,which is NOT right6?________.A.SRAM is faster than DRAMB.DRAM needs periodic charg refreshing circuitC.DRAM is slower than FlashD.ROM does not require power supplied continuously16.Which RAID level make use of parallel access technique?______.A.RAID0B.RAID2C.RAID4D.RAID617.RAID stored _____information that enable the recovery of data lost due to a disk failure.A.parityer dataC.OSD.interrupt18.The signals of interrupt request and acknowledgement exchange between CPU and requesting I?O module. The rason of CPU’s acknowledgement is ______.A.to let the I?O module remove request signalB.to let CPU get the vector from data busC.both A&BD.other aims19.In DMA,the DMA module takes over the operations of data transferring from CPU,it means_______.A.the DMA module can fetch and execute instructions like CPU doesB.the DMA module can control the bus to transfer data to or from meory using stealing cycle techniqueC.the DMA module and CPU work together(co-operate)to transfer data into or from memoryD.the DMA module get ready,it issues interrupt request signal to CPU for getting interrupt service20.In twos complement,two positive intergers add,when does overflow occur?A.There is a carryB.Sign bit of result is 1C.There is a carry,and sign bit of result is 0D.Can’t determine21.The 8-bits twos complement -128 is 10000000,its 16-bits twos complement is ___A.1000 0000 1000 0000B.0000 0000 1000 0000C.1111 1111 1000 0000D.1000 0000 0000 000022.The address of the top of stack is stored in ____ registerA.PCB. ACC.SPD.BP23.The REGISTER ADDRESSING is very fast,but it has_______.A.very less value rangeB.very less address spaceC.more memory accessD.very complex address’ calculating24.In instrucion,the number of addressed is 2,One address doubles as____A.a result and the address of next instructionB.an operand and a resultC.an operand and the address of next instructionD.two closed operands25.A branch instruction performed by CPU is to updatae ______.A.MBR to contain the instructionB.Program counter to contain the address of next instructionC.MAR to contain the address of current instructionD.IR to contain the instruction that just fetched from memory26.In register indirect addressing,the effective address of operand is stored in ____.A.registerB.main memoryC.instructionD.PC27.The Memory Address Register of CPU connects to ______BUSA.systemB.addressC.dataD.control28.The Accumulator is a(n)______register in 8086A.general purposeB. DataC.addressD.control29.Which is the worst instruction to limit instruction pipeline?A.ADD AX,XB.MOV AX,[X]C.RETURND.ISZ X30.In MESI protocol,the line in the cache is the same as that in main memory and is not present in other cache,which state is the line in______.A.ModifiedB.exclusiveC.sharedD.invalid31.Which of the following attributes associated with architectureA.Control signalsB.interfacesC.Instruction setD.memory technology32.Which of the following statement is not correct?A.N bits binary address coding can be 2N storage word to identify a wordB.N bits unsigned binary number can represent a value in the range between 0 to 2N-1C.The length of address is 32 bits ,so addressing range is 4GD.8086 has 20 bite address bus giving 220-1 address spaceputer memory is organized into a hierarchy .At the top level are the_____.A.registers B cache C.main memory D.external memory34.On address mapping of cache ,the data in any block of main memory can be mapped to ______of cache ,it is direct mapping.A.any lineB.fixed lineC.fixed set any lineD.A and B35.Which is the nonvolatile and permanent storge semiconductor memory?___A.SRAMB.CD-ROMC.FLASHD.DRAM36.In hamming code ,if syndrome contains one & only one 1,it means____.A.the old correct bit is errorB.the data is errorC.more than one errorD.nor error37.In _____,two copies of each stripe on separate disks,read from either and write to both.A.RAID 1B.RAID2C.RAID 3D.RAID438.When aprocessor access to the disk physical block ,it must know that the physical blocks on the disk location of three parameters:________.A.side,head and trackB.side ,sector and cylinderC.cylinder,sector and trackD.side,sector and platter39.There are three types of the Input Output Techniques,Which one is not belong them?______.A.Interrupt-driven I/OB.programmed I/O \C.direct I/O accessD.DMA40.In DMA,when does DMA module issue interrupt request signal to CPU?A.before DMA module transfers a block dataB.after DMA module finishes a block data transferC.before DMA module seizes to use busD.after DMA module ends to size bus1 2 3 4 5 6 7 8 9 10D D D C A A D A C A11 12 13 14 15 16 17 18 19 20A B B B C B A C B B21 22 23 24 25 26 27 28 29 30C C B B B B B AD B31 32 33 34 35 36 37 38 39 40C D A B C A A B C BII Answer the following questions1)Interrupt Processing,The CPU save information of current program to stack forresuming it.What is the important information?2) In MESI protocol , READ MISS, initiating in invalid and snooping in modified,fill in the following table.initiating snoopingState in beginning invalid ModifyactionState in end3)In Displacement Addressing,EA=A+(R),what is the R register holds? In RelativeAddressing,what is the R register?1）PC, PSW （4分）2）initiating SnoopingBegin invalid ModifiedAction Read data from ……Write to memoryEnd shared shared（4分）3）base or displacement, PC (4分)得分15III A four-way set associative main memory has 256M words,cache has 4M words and block size is 32-words. Please answer the following questions:1)Show the format of main memory addresses2)Which set of cache is memory location FCB5C6AH mapped to?What is the tag?3)Which words of main memory may be mapped to cache set 6E8A and tag value is B5H?1)-2分- Line size=Block size=32words=25words =>Word# =5bits(2)-3分- Number of sets=4M/32 lines/ 4lines/set =215sets =>Set# =15bits(3)-2分-Memory size=256Mwords=228words => Length of RA =28bits =>Tag=28-5-15=8 bitsTag 8 itb Set# 15 bit Word# 5 bit-1分-2) （3分）FCB5C6AH=1111 1100 1011 0101 1100 011 0 1010 is mapping to set# 5AE3, tag#FC3) （4分）B5 6E8A1011 0101 110 1 110 1 000 1 010 0 00001011 0101 110 1 110 1 000 1 010 1 1111words of main memory: B5 DD140~ B5 DD15IV According to the instruction of the following,Answer the questions. 1) Show all the micro-operations for the following instruction: BSA X -Branch and save addressAddress of instruction following BSA is saved in X Execution continues from X+12) Which addressing mode is included in this instruction? Please draw the figure of its addressing mode3) According to the initial value of the following figure ,at the end of Execute cycle,what is the value of PC,MBU,MAR and IR holdⅣAnswer:2) （4分） PC:2012MAR:2012（应该是2011） MBR:1124 IR:BSA 20113) （4分）Direct Addressing1) （10分）Fetch cycle t1: (PC) -> MAR t2: (MAR) ---> Memory read ---> Memory t3: Memory ---> MBR t4: (MBR) -> IR (PC) +1 -> PC Execute cycle t1: Ad(MBR) ->MAR t2: (PC) ->MBR t3: (MAR)-> Memory (MBR) ->Memory write ->Memory t4: (MAR)+1 ->PCFor the 8-bit data 0011 1001,Using the Hamming algorithm,the check bits stored with it.Suppose when the word is read from memory,the check bit are calculated to be 1101.1)What is the data word that was read from memory?2)Write the correct Hamming code(1) （2分）2k-1≥m+k =>k=4-bit(2) （4分）Set up a tableBit Position PositionnumberCheckbitDatabit12 1100 D8011 1011 D7010 1010 D6 19 1001 D5 18 1000 C87 0111 D4 16 0110 D305 0101 D204 0100 C43 0011 D1 12 0010 C21 0001 C1(3)（4分）Calculates old check bits:C1(1,2,4,5,7)=1⊕0⊕1⊕1⊕0=1C2(1,3,4,6,7)=1⊕0⊕1⊕1⊕0=1C4(2,3,4,8) =0⊕0⊕1⊕0 =1C8(5,6,7,8) =1⊕1⊕0⊕0 = 0old check bits：C8C4C2C1=0111 (4)（2分）Syndrome word: 0111⊕1101=1010 =>D6 is wrong, so the data from memory is 00011001.2) （3分）0011 0 100 1 1 11。

程式性直流电压负载 Chroma 63200系列说明书

ProgrammableChroma's 63200 series of programmable electronicloads are designed for a wide variety of dc powerconversion products including; DC power sources,battery chargers, server power supplies, dc-dcconverters, batteries and many others. Thehigh power rating, parallel and synchronizationcapabilities, and the ability to provide up to 2.7times of rated power for short duty cycle loadingmake 63200 series especially well-suited for highpower applications such as switch-mode rectifiersand for discharging batteries packs and fuel cells.The 63200 series offers 12 different models withpower ranges from 2600 watts to 15600 watts,currents from 50A to 1000A and operatingvoltages from 0 to 1000V. By paralleling modulesvery large systems can be assembled existing93.6kW. Four operating modes provide differentload simulation methods designed for variousapplications. The CC/CR modes are designedto test constant voltage power supplies andconverters. CV mode simulates the battery fortesting battery chargers and current sources, andCP mode is ideal for battery testing by simulatingreal discharge profiles.The 63200 series can sink rated current downto 1VDC even under the highest specified risetime. This unique feature guarantees the bestloading performance for low voltage/high currentapplications. With it's unique external waveformsimulation and Master / Slave control capability,the 63200 series electronic loads allow users toparallel and synchronize more than one loadtogether using an internal or external loadingcontrol signal. This feature provides unlimited loadsimulation and increased power.The 63200 series also provides necessar ymeasurement func tions and shor t circuitsimulations that extend the test capability for themost demanding engineering and automated testapplications.With front LCD displays and rotary knob, the 63200loads offer versatile bench top operation. Users arealso able to control the loads remotely via GPIB orRS-232 interface or with a USB adapter. Complexwaveforms can also be created by driving theloads from an analog programming source (i.e.function generator).Chroma 63200 loads incorporate built-in fanspeed controls to minimize audio noise. The self-diagnosis routines, built-in protection against OC,OP, OT, and an alarm indicating OV reverse polarityto ensure safe operation and reliability. PROGRAMMABLE DC ELECTRONIC LOADMODEL 63200 SERIESRS-232GPIBChroma's 63200 series electronic loads provide constant current, constant resistance, constant voltage and constant power modes.The CC and CR mode load simulation is helpful to test whether the output voltage of the UUT remains stable, or regulated under different load conditions. For battery chargers, CV mode can change the output voltage to test if the battery charger is providing the correct charging current corresponding to the battery voltage. If the UUT is a battery, the electronic load is able to simulate the behavior of the device that uses the battery. For many battery discharge applications, power consumption patterns need to be analyzed. The constant power, or CP mode, is ideal for these applications.For low voltage/high current applications, the 63200 series is available with a low voltage mode, which provides ultra-low voltage operation and in many cases can compensate for large voltage loss in the input wiring.The 63200 series loads use a current closed loop design connecting all power MOSFET devices in parallel, to insure high accuracy load control with minimal drift (less than 0.15% of the current setting). The MOSFET technology keeps the input impedance to a minimum and enables the load to draw very high current even at very low voltages. For example, the model 63209 is capable of drawing 1,000A at only 1V input.Model 63209(15600W) Input CharacteristicsThe Chroma 63200 series loads have a built-in 15-bit precision A/D converter that can achieve 0.05%+0.05% F.S., 0.1%+0.1% F.S. and 0.3%+0.3% F.S. accuracy for voltage, current, and power measurements respectively. These measurements can be displayed simultaneously on three big LED readouts for convenience. In addition to standard measurements, the 63200 series also provides voltage and current monitor outputs, which are useful when the user needs to monitor the voltage and current waveform via a scope.Arbitrary Waveform Generatorexternal loadinG waveform SimulationmaSter / Slave parallel controlThe 63200 series electronic loads can be controlled by an external analog control signal, which is generated by any kind of signal or an arbitrary waveform generator. This makes it capable of simulating any loading waveform observed in the field within the load specifications.When higher power is required, it is common to parallel two electronic loads together to draw higher current. The 63200 series high power loads have a smart Master/Slave control mode. When the loads are set to Master/Slave mode, users can program the loading (CC mode only) on the master unit. The loading current values of the slave unit(s) will be calculated and downloaded by the master unit automatically. In short, unlike traditional designs, users now have the option of operating several loads in Master/Slave mode as a single load unit.Modern electronic devices operate at very high speeds; therefore, it is important for an electronic load to perform well during the transient and dynamic testing. To satisfy these testing applications, the 63200 loads offer outstanding high speed, programmable dynamic load simulation and control capabilities. The figure below shows the programmable parameters of the 63200 load modules. The programmable slew rate makes the simulation of transient load changes demanded by the requirement of real life application possible. The internal waveform generator of the 63200 is capable of producing a maximum slew rate of 25A/µs (63208), and dynamic cycling up to 20kHz. Its dedicated remote load sense and control circuitry guarantee theminimum waveform distortion during continuous load changes.Chroma's 63200 Series DC Loads provide a unique surge load simulation capability which allows users to overdrive the loads up to 2.7 times their rated power for short periods. This feature is ideal when the average power required by the UUT is low compared to short-term peak power demands. Plasma Display Panel (PDP) testing is one typical applications, others include battery 3C discharge, breaker & fuse over rating (300% to 1000%) tests, car engine startup simulation and DC motor startup simulation.The amount of surge loading available using the 63200 loads is related to initial loading conditions. Figures 1 and 2 show the relationship of the initial state (Load_Low under Dynamic mode) and the maximum acceptable overdrive power. Under this operation, the load will display an Over Power Protection Alarm (OPP) and will disable the load current if the user violates the maximum surge load capability showed in the figures.Note 1 :The Initial state under Static Mode should last at least 1 second.Note 2 :This surge load capability will be regulated by the temperature de-rating characteristics. (Refer to Note 1 in Specifications)Note 3 :Examples below assume the use of the Model 63201 load with a continuous rating of 2600W/300A/1-80VDC Note 4 :Model 63211/63212 does not support this feature.Example 1: STATIC LOADINGThe Model 63201 can be overdriven to approximately 5200W (200% of its rated continuous power rating) for 6.0 ms when the starting power is 650W (25% of its rated power). This is represented by DOT on the blue curve in Figure 1.Example 2: DYNAMIC LOADINGThe Model 63201 is capable of a zero - to- 6500W (250%) pulse at a duty cycle of 5%. This is represented by the DOT on the purple curve in Figure 2.Chroma's 63200 series electronic loads can also simulate a short circuit condition. The load can short a DC power source or any power supply that has abuilt in current limit function and measure its short circuit current so that users can verify if the UUT current limit is functional.The 63200 loads include a unique timing and measurement function. This allows for precision time settings and measurements in the range of 1s to 99,999s. This feature also allows users to set a final cutoff voltage and timeout value for battery discharge testing and similar applications. For example, the figure to the right shows that the 63200's internal timer can be initiated automatically when starting load on. The timer will stop counting until the cutoff voltage value is reached, or timeout occurs.Electronic & Electrical Devices TestingAlmost all modern electronic equipment have a built in power supply. Therefore, a DC electronic load is an important instrument for these devices during the R/D and Q/A phases. For example, A/D, D/D and D/A stages are normally integrated within a UPS. The Chroma 63200 electronic loads are helpful in testing the internal A/D and D/D boards of UPS devices.Battery TestingFor most applications, power consumption patterns are based on constant power. Therefore, the CP mode of the 63200 series electronic load is ideal to use as a discharge load for battery testing.System integrationChroma 63200 series electronic loads provide GPIB, RS-232 and RS-485 PC controllable interfaces. These features combined with the external waveformsimulation and voltage / current monitoring capability make Chroma 63200 series ideal for automatic system integration.Power Supply TestingPower supplies play a critical role in electrical and electronic devices. They have diversified into several different configurations for various applications. For example, AC/AC power supplies are used for UPS and AVR, AC/DC power supplies are used for server power supplies, and DC/AC power supplies areused for inverters that transfer battery power to AC for home appliances. Lastly, DC/DC converters are widely used in battery powered devices such ascellular phones and laptop computers. With four different load modes, Chroma 63200 series electronic loads are capable of testing many different DC output power supplies either directly or via a rectifier. They can also be used to test AC output power supplies.Server Power SupplyUPS/AVRRectifier1. Power Switch2. LED Display: Voltage read back3. LED Display: Current/ ohm read back4. LED Display: Power read back5. LCD Display: For setting and editing6. Rotary knob: To adjust the loading and parameter setting7. Numeric key: For data setting8. Function key: To select load mode, control mode, and define the reading specification9. System key:For system config and data store, recall 10. Load terminal11. Voltage sense terminal 12. RS-485 connector 13. GPIB connector 14. RS-232C connector15. Voltage monitor output:Analog output which indicates the voltage waveform 16. Current monitor output: Analog output which indicates the current waveform 17. External V reference:External programming voltage inputModel: 63203, 63204panel deScriptionThe 63200 series can be operated from the front panel or controlled by softpanel software. The user friendly software includes all the functions of 63200 series, and is easy to understand and operate. The 63200 series can be configured with either GPIB or RS-232 interfaces as an option for remote control and automated testing applications.Sequence TestBattery Discharge Test Dynamic Test Main Operation Menu OCP Test1002003004005006007008009001000110010020030040050060070080090010001020304050607080901001101201301401501600123456789101100.10.20.30.40.50.60.70.80.9 1.0 1.1102030405060708090100V-I Curve :Model 63201/ 63203/ 63205/ 63206/ 63207/ 63208/ 63209Low Voltage Operating :Model 63201/ 63203/ 63205/ 63206/ 63207/ 63208/ 63209Low Voltage Operating :Model 63202/ 63204/ 63210/ 63211/ 63212V-I Curve :Model 63202/ 63204/ 63210/ 63211/ 63212 Voltage(V)Voltage(V)Current(A)Current(A)Current (A)Current (A)Voltage (V)Voltage (V) Note: All specifications are measured at load input terminals. (Ambient temperature of +25)Model 63208 / 63209 / 63210Model 63211 / 63212Model 63203 / 63204Model 63201 / 63202Model 63205Model 63206 / 63207NOTE*1 : The power rating specifications at ambient temperature=25˚C and see the diagram below for power derating. NOTE*2 : If the operating voltage exceeds the rated voltage for 1.1 times, it would cause permanent damage to the device. NOTE*3 : S (siemens) is the SI unit of conductance, equal to one reciprocal ohm.NOTE*4 : The Vin must be greater than min. operating voltage of each model.NOTE*5 : Setting error will be 1% for R<0.005 at CRL range.NOTE*6 : The Vin must be greater than 7V of each model.NOTE*7 : Power F.S. = Vrange x Irange F.S.63200-E-201408-1000Worldwide Distribution andService NetworkJAPANCHROMA JAPAN CORP .472 Nippa-cho, Kouhoku-ku, Yokohama-shi, Kanagawa,223-0057 JapanTel: +81-45-542-1118Fax: +81-45-542-1080http://www.chroma.co.jp E-mail:******************U.S.A.CHROMA SYSTEMS SOLUTIONS, INC.19772 Pauling, Foothill Ranch, CA 92610Tel: +1-949-600-6400Fax: +1-949-600-6401 E-mail:*******************Developed and Manufactured by :HEADQUARTERS CHROMA ATE INC.66 Hwaya 1st Rd., KueishanHwaya Technology Park,Taoyuan County 33383,Taiwan Tel: +886-3-327-9999Fax: +886-3-327-8898 E-mail:******************EUROPECHROMA ATE EUROPE B.V.Morsestraat 32, 6716 AH Ede,The Netherlands Tel: +31-318-648282Fax: +31-318-648288 E-mail:******************CHINA CHROMA ELECTRONICS(SHENZHEN) CO., LTD.8F, No.4, Nanyou Tian An Industrial Estate, Shenzhen, China PC: 518052Tel: +86-755-2664-4598Fax: +86-755-2641-9620A632001A632004A63200663201 : DC Electronic Load 80V/300A/2.6kW 63202 : DC Electronic Load 600V/50A/2.6kW 63203 : DC Electronic Load 80V/600A/5.2kW 63204 : DC Electronic Load 600V/100A/5.2kW 63205 : DC Electronic Load 80V/180A/6.5kW 63206 : DC Electronic Load 80V/600A/10.4kW 63207 : DC Electronic Load 80V/300A/10.4kW 63208 : DC Electronic Load 80V/600A/15.6kW 63209 : DC Electronic Load 80V/1000A/15.6kW 63210 : DC Electronic Load 600V/150A/14.5kW 63211 : DC Electronic Load 1000V/150A/15.6kW 63212 : DC Electronic Load 1000V/150A/10kW A632001 : Remote ControllerA632002 : Load Cable 38mm/242A/200cmx2A632003 : Load Cable 80mm/390A/200cmx2A632004 : Sync. Link Box for 6330A & 63200 series A632005 : Softpanel for 63200 seriesA632006 :NI USB-6211 Bus-Powered Multifunction DAQnumber of parallel load unitS and ratinGorderinG information。

2N5566中文资料

Unit
V mA pA nA pA nA W V
mS mS mS
pF nV⁄ √Hz dB
mV mV/ _C
dB NCBD
8-2
Document Number: 70254 S-04031—Rev. D, 04-Jun-01
元器件交易网
2N5564/5565/5566
元器件交易网
2N5564/5565/5566
Vishay Siliconix
Matched N-Channel JFET Pairs
PRODUCT SUMMARY
Part Number
2N5564 2N5565 2N5566
VGS(off) (V)
–0.5 to –3 –0.5 to –3 –0.5 to –3
76
Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. Pulse test: PW v300 ms duty cycle v3%. c. This parameter not registered with JEDEC.
160
0 –10
rDS(on) – Drain-Source On-Resistance ( W )
120 VGS(off) = –2 V
80
40
gfs – Forward Transconductance (mS)
0 –55 –35 –15 5
APPLICATIONS
D Wideband Differential Amps D High-Speed,

MAX44242 低输入偏置电流、低噪声操作放大器 (OP 放大器) 评估套件说明书

General DescriptionThe MAX44242 evaluation kit (EV kit) provides a prov-en design to evaluate the MAX44242 low-input biascurrent, low-noise operational amplifier (op amp) in an8-pin µMAX ® package. The EV kit circuit is preconfig-ured as noninverting amplifiers, but can be adapted toother topologies by changing a few components. Thecomponent pads accommodate 0805 packages, makingthem easy to solder and replace. The EV kit comes with aMAX44242AUA+ installed.Features and Benefits●Accommodates Multiple Op-Amp Configurations●Rail-to-Rail Outputs●Accommodates Easy-to-Use 0805 Components● 2.7V to 20V Single Supply or ±1.35V to Q 10V DualSupplies●Proven PCB Layout●Fully Assembled and TestedQuick StartRequired Equipment●MAX44242 EV kit●+5V, 10mA DC power supply (PS1)●Two precision voltage sources●Two digital multimeters (DMMs)Procedure The EV kit is fully assembled and tested. Follow the steps below to verify board operation:1) Verify that the jumpers are in their default position, as shown in Table 1.2) Connect the positive terminal of the +5V supply to VDD and the negative terminal to GND and VSS.3) Connect the positive terminal of the precision voltage source to INAP . Connect the negative terminal of the precision voltage source to GND.4) Connect INAM to GND.5) Connect the positive terminal of the second precision voltage source to the INBP pad. Connect the nega-tive terminal of the precision voltage source to GND.6) Connect INBM to GND.7) Connect the DMMs to monitor the voltages on OUTA and OUTB. With the 10kΩ feedback resistors and 1kΩ series resistors, the gain of each noninverting amplifier is +11.8) Turn on the +5V power supply.9) Apply 100mV from the precision voltage sources. Observe the output at OUTA and OUTB on the DMMs. Both should read approximately +1.1V.10) Apply 400mV from the precision voltage sources. Both OUTA and OUTB should read approximately +4.4V.19-6917; Rev 0; 2/14Ordering Information appears at end of data sheet.μMAX is a registered trademark of Maxim Integrated Products, Inc.Detailed Description of HardwareThe MAX44242 EV kit provides a proven layout for theMAX44242 low input bias current, low-noise dual op amp.The IC is a single-supply dual op amp whose primaryapplication is operating in the noninverting configuration;however, the IC can operate with a dual supply as long asthe voltage across the VDD and GND pins of the IC do notexceed the absolute maximum ratings. When operatingwith a single supply, short VSS to GND.Op-Amp Configurations The IC is a single-supply dual op amp ideal for differential sensing, noninverting amplification, buffering, and filter-ing. A few common configurations are shown in the next few sections.The following sections explain how to configure one of the device’s op amps (op-amp A). To configure the device’s second op amp (op-amp B), the same equations can be used after modifying the component reference designa-tors. For op-amp B, the equations should be modified by adding 10 to the number portion of the reference designa-tors (e.g., for the noninverting configuration, equation R1 becomes R11 and R5 becomes R15).Noninverting ConfigurationThe EV kit comes preconfigured as a noninvertingamplifier. The gain is set by the ratio of R5 and R1. TheEV kit comes preconfigured for a gain of +11. The outputvoltage for the noninverting configuration is given by the equation below:OUTA INAP R5V 1V R1 =+ *Default position.JUMPERSHUNT POSITION DESCRIPTION JU1Installed*Connects INAM to R1. Also shorts capacitor C5.OpenConnects INAM to R1 through capacitor C5. When AC-coupling is desired, remove the shunt and install capacitor C5. JU2Installed*Connects INAP to JU3 position 1. Also shorts capacitor C6. OpenConnects INAP to JU3 position 1 through capacitor C6. When AC-coupling is desired, remove the shunt and install capacitor C6. JU31-2*Connects INAP to JU2 and C6 through R2 and R82-3Connects INAP to GND through R2 and R8JU4Installed*Connects OUTA to OUTA OpenConnects OUTA to OUTA through capacitor C10. When AC-coupling is desired, remove the shunt and install capacitor C10. JU5Installed*Connects INBM to R11. Also shorts capacitor C15. OpenConnects INBM to R11 through capacitor C15. When AC-coupling is desired, remove the shunt and install capacitor C15. JU6Installed*Connects INBP to JU6 position 1. Also shorts capacitor C16. OpenConnects INBP to JU6 position 1 through capacitor C16. When AC-coupling is desired, remove the shunt and install capacitor C16. JU71-2*Connects INBP to JU7 and C16 through R12 and R182-3Connects INBP to GND through R12 and R18JU8Installed*Connects OUTB to OUTB Open Connects OUTB to OUTB through capacitor C20. When AC-coupling is desired, remove the shunt and install capacitor C20.R1–R3, and R5 with appropriate resistors. WhenR1 = R2 and R3 = R5, the CMRR of the differential ampli-fier is determined by the matching of the resistor ratiosR1/R2 and R3/R5.OUTA INAP INAM V GAIN (V V )=−where:R5R3GAIN R1R2==Sallen-Key Filter ConfigurationThe Sallen-Key filter topology is ideal for filtering sensorsignals with a second-order filter and acting as a buffer.Schematic complexity is reduced by combining the filterand buffer operations. The EV kit can be configured ina Sallen-Key topology by replacing and populating afew components. The Sallen-Key topology is typicallyconfigured as a unity-gain buffer, which can be done byreplacing R1 and R5 with 0Ω resistors and short JU2. Thenoninverting signal is applied to the INAP test point withJU2 short and short pins 1-2 on JU3 or do the same on theINBP pad similarly. The filter component pads are R2–R4,and R8, where some have to be populated with resistorsand others with capacitors.Lowpass Sallen-Key FilterTo configure the Sallen-Key as a lowpass filter, populatethe R2 and R8 pads with resistors, and populate the R3and R4 pads with capacitors. The corner frequency and Qare then given by:C R3R2R8f Q ==the R3 and R4 pads with resistors and populate the R2 and R8 pads with capacitors. The corner frequency and Qare then given by:C R4R2R8f Q ==Transimpedance Application To configure op-amp U1-A as a transimpedance amplifier (TIA), replace R1 with a 0Ω resistor and install a shunt on jumper JU1 and shunt on pins 2-3 on jumper JU3. The output voltage of the TIA is the input current multiplied by the feedback resistor:OUT IN BIAS OS V (I I )R4V =+×+where R4 is installed as a 10kΩ resistor, I IN is defined as the input current source applied at the INAM pad, I BIAS is the input bias current, and V OS is the input offset voltage of the op amp. Use capacitor C8 (and C7, if applicable) to stabilize the op amp by rolling off high-frequency gain due to a large cable capacitance. Similarly, we can configure op-amp U1-B for transimpedance application.Capacitive Loads Some applications require driving large capacitive loads. To improve the stability of the amplifier, replace R6 (R16 for U1-B) with a suitable resistor value to improve ampli-fier phase margin. The R6/C9 (R16/C19 for U1-B) filter can also be used as an anti-alias filter, or to limit amplifier output noise by reducing its output bandwidth.DESIGNATION QTY DESCRIPTIONC1, C320.1µF ±10%, 25V X7R ceramic capacitors (0805)C2, C424.7µF ±10%, 25V X5R ceramic capacitors (0805)C5–C10, C15–C200Not installed, ceramic capacitors(0805)GND2Black test points INAM, INAP,INBM, INBP,OUTA, OUTB,VDD, VSS8Red test pointsJU1, JU2,JU4–JU6, JU862-pin headers JU3, JU723-pin headers DESIGNATION QTY DESCRIPTION R1, R2,R11, R1241kΩ ±1% resistors (0805)R3, R4, R7,R13, R14, R170Not installed, resistors (0805) R5, R15210kΩ ±1% resistors (0805)R6, R8,R16, R1840Ω ±5% resistors (0805) TP1, TP20Not installed, miniature test points U11Dual low-power, rail-to-rail I/O opamp (8 µMAX)Maxim MAX44242AUA+—8Shunts—1PCB: MAX44242 EVKITFigure 1. MAX44242 EV Kit SchematicFigure 3. MAX44242 EV Kit PCB Layout—Component SideComponent SideFigure 4. MAX44242 EV Kit PCB Layout—Solder SidePART TYPE MAX44242EVKIT#EV Kit #Denotes ROHS compliant.Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time.REVISIONNUMBERREVISION DATE DESCRIPTION PAGES CHANGED 02/14Initial release —For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at .。

分析器设备-AMP03精确差分放大器手册说明书

REV.FInformation furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700 Fax: 781/326-8703© 2003 Analog Devices, Inc. All rights reserved.aAMP03Precision, Unity-Gain Differential AmplifierFEATURESHigh CMRR: 100 dB TypLow Nonlinearity: 0.001% Max Low Distortion: 0.001% Typ Wide Bandwidth: 3MHz Typ Fast Slew Rate: 9.5V/␮s Typ Fast Settling (0.01%): 1␮s Typ Low CostAPPLICATIONSSumming AmplifiersInstrumentation Amplifiers Balanced Line Receivers Current-Voltage Conversion Absolute Value Amplifier4to 20mA Current TransmitterPrecision Voltage Reference ApplicationsLower Cost and Higher Speed Version of INA105GENERAL DESCRIPTIONThe AMP03 is a monolithic unity-gain, high speed differential amplifier. Incorporating a matched thin film resistor network,the AMP03 features stable operation over temperature without requiring expensive external matched components. The AMP03is a basic analog building block for differential amplifier and instrumentation applications.The differential amplifier topology of the AMP03 both amplifies the difference between two signals and provides extremely high rejection of the common-mode input voltage. By providing common-mode rejection (CMR) of 100 dB typical, the AMP03solves common problems encountered in instrumentation design.As an example, the AMP03 is ideal for performing either addi-tion or subtraction of two signals without using expensive externally matched precision resistors. The large common-mode rejection is made possible by matching the internal resistors to better than 0.002% and maintaining a thermally symmetric layout. Additionally, due to high CMR over frequency, the AMP03 is an ideal general amplifier for buffering signals in a noisy environment into data acquisition systems.The AMP03 is a higher speed alternative to the INA105.Featuring slew rates of 9.5 V/µs and a bandwidth of 3 MHz, the AMP03 offers superior performance to the INA105 for high speed current sources, absolute value amplifiers, and summing amplifiers.FUNCTIONAL BLOCK DIAGRAMSENSE +V CC OUTPUT –V EEREFERENCEPIN CONNECTIONS8-Lead PDIP (P Suffix)NC = NO CONNECT–IN +IN V–8-Lead SOIC (S Suffix)NC = NO CONNECTSENSEOUTPUT V+NCHeader (J Suffix)–IN 2V–NC = NO CONNECTAMP03* Product Page Quick Links Last Content Update: 11/01/2016Comparable PartsView a parametric search of comparable partsDocumentationApplication Notes•AN-244: A User's Guide to I.C. Instrumentation Amplifiers •AN-245: Instrumentation Amplifiers Solve Unusual Design Problems•AN-348: Avoiding Passive-Component Pitfalls•AN-589: Ways to Optimize the Performance of aDifference Amplifier•AN-671: Reducing RFI Rectification Errors in In-AmpCircuitsData Sheet•AMP03: Military Data Sheet•AMP03: Precision, Unity-Gain Differential Amplifier Data SheetTechnical Books• A Designer's Guide to Instrumentation Amplifiers, 3rdEdition, 2006Reference MaterialsTechnical Articles•Auto-Zero Amplifiers•High-performance Adder Uses Instrumentation Amplifiers •Input Filter Prevents Instrumentation-amp RF-Rectification Errors•The AD8221 - Setting a New Industry Standard forInstrumentation AmplifiersDesign Resources•AMP03 Material Declaration•PCN-PDN Information•Quality And Reliability•Symbols and FootprintsDiscussionsView all AMP03 EngineerZone DiscussionsSample and BuyVisit the product page to see pricing optionsTechnical SupportSubmit a technical question or find your regional support number* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. This content may be frequently modified.–2–REV. FAMP03–SPECIFICATIONSELECTRICAL CHARACTERISTICS AMP03F AMP03B AMP03GParameter Symbol Conditions Min Typ Max MinTyp Max Min Typ Max UnitOffset Voltage V OSV CM = 0 V–400+10+400–700+20+700–750+25+750µVGain ErrorNo Load, V IN = ±10 V,R S = 0 Ω0.000040.0080.000040.0080.0010.008%Input Voltage RangeIVR (Note 1)±20±20±20VCommon-Mode Rejection CMR V CM = ±10 V8510080958095dB Power Supply Rejection Ratio PSRR V S = ±6 V to ±18 V 0.6100.6100.710µV/V Output SwingV O R L = 2 k Ω±12±13.7±12±13.7±12±13.7VShort-Circuit Current Limit I SC Output Shorted to Ground +45/–15+45/–15+45/–15mASmall-Signal Bandwidth (–3 dB)BW R L = 2 k Ω333MHz Slew RateSR R L = 2 k Ω69.569.569.5V/µs Capacitive Load Drive Capability C L No Oscillation 300300300pF Supply CurrentI SYNo Load2.53.5 2.53.5 2.53.5mANOTES 1Input voltage range guaranteed by CMR test.Specifications subject to change without notice.ELECTRICAL CHARACTERISTICS AMP03BParameterSymbol ConditionsMin TypMax Unit Offset Voltage V OS V CM = 0 V–1500+150+1500µV Gain ErrorNo Load, V IN = ±10 V, R S = 0 Ω0.00140.02%Input Voltage RangeIVR ±20V Common-Mode Rejection CMR V CM = ±10 V 7595dB Power Supply Rejection RatioPSRR V S = ±6 V to ±18 V 0.720µV/V Output Swing V O R L = 2 k Ω±12±13.7V Slew RateSR R L = 2 k Ω9.5V/µs Supply CurrentI SYNo Load3.04.0mASpecifications subject to change without notice.ELECTRICAL CHARACTERISTICS AMP03F AMP03G ParameterSymbol ConditionsMin Typ Max Min Typ Max UnitOffset Voltage V OS V CM = 0 V–1000+100+1000–2000+200+2000µV Gain ErrorNo Load, V IN = ±10 V, R S = 0 Ω0.00080.0150.0020.02%Input Voltage RangeIVR ±20±20V Common-Mode Rejection CMR V CM = ±10 V 80957590dB Power Supply Rejection RatioPSRR V S = ±6 V to ±18 V 0.7151.015µV/V Output Swing V O R L = 2 k Ω±12±13.7±12±13.7V Slew RateSR R L = 2 k Ω9.59.5V/µs Supply CurrentI SYNo Load2.64.02.64.0mASpecifications subject to change without notice.(@ V S= ؎15 V, T A= +25؇C, unless otherwise noted.)(@ V S= ؎15 V, –55؇C ≤ T A≤ +125؇C for B Grade)(@ V S= ؎15 V, –40؇C ≤ T A≤ +85؇C for F and G Grades)–3–REV. F AMP03(@ V = ؎15 V, T = 25؇C, unless otherwise noted.)*CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection.Although the AMP03 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.DIE SIZE 0.076 inch ؋ 0.076 inch, 5,776 sq. mmAMP03–Typical Performance Characteristics–4–REV. FTPC 1.Small Signal TransientResponse TPC rge Signal Transient ResponseI N P U T O F F S E T V O L T A G E (␮V )1000800–8000–200–400–600600200400TEMPERATURE (؇C)TPC 7.Input Offset Voltage vs. TemperatureFREQUENCY (Hz)C O M M O N -M ODE R E J E C T I O N (d B )TPC mon-Mode Rejection vs. Frequency FREQUENCY (Hz)P O W E R S U P P L Y R E J E C T I O N (d B )01101M1001k 10k 100k 904030201080705060TPC 5.Power Supply Rejection vs.Frequency FREQUENCY (Hz)C L O S ED -L O O P G A I N (d B )50401001k10M10k 100k 1M 1003020 TPC 8.Closed-Loop Gain vs. FrequencyFREQUENCY (Hz)T HD +N (%)0.10.0100.00010.001TPC 3.Total Harmonic Distortion vs. FrequencyFREQUENCY (Hz)D I M (%)TPC 6.Dynamic Intermodulation Distortion vs. FrequencyFREQUENCY (Hz)O U T P U T I M P E D A N C E (⍀)1081001k1M10k 100k 642TPC 9.Closed-Loop Output Impedance vs. FrequencyAMP03–5–REV. F TEMPERATURE (؇C)G A I N E R R O R (%)0.0030.0020.000–0.001–0.002–0.003TPC 10.Gain Error vs. Temperature SUPPLY VOLTAGE (V)S U P P L Y C U R R EN T (m A )4213TPC 13.Supply Current vs. Supply VoltageFREQUENCY (Hz)120100080604020H z )V O L T A G E N O I S E D E N S I T Y (n / TPC 16.Voltage Noise Density vs.Frequency+10␮V 0V –10␮VNOTE: EXTERNAL AMPLIFIER GAIN = 1000;THEREFORE, VERTICAL SCALE = 10␮V/DIV.TPC 19.Voltage Noise from 0kHz to 10 kHzTEMPERATURE (؇C)S L E W R A T E (V /␮s )136121098711TPC 11.Slew Rate vs. TemperatureOUTPUT SOURCE CURRENT (mA)17.56361218243015.012.510.05.02.57.5M A X I M U M O U T P U T V O L T A G E (V )TPC 14.Maximum Output Voltage vs. Output Current (Source)0.1 TO 10Hz PEAK-TO-PEAK NOISETPC 17.Low Frequency Voltage NoiseTEMPERATURE (؇C)S U P P L Y CU R R E N T (m A )65324 TPC 12.Supply Current vs. TemperatureOUTPUT SINK CURRENT (mA)–17.5–2–12–4–6–8–10–15.0–12.5–10.0–5.0–2.5–7.5M A X I M U M O U T P U T V O L T A G E (V)TPC 15.Maximum Output Voltagevs. Output Current (Sink)NOTE: EXTERNAL AMPLIFIER GAIN = 1000;THEREFORE, VERTICAL SCALE = 10␮V/DIV.TPC 18.Voltage Noise from 0kHz to 1kHzAMP03–6–REV. FGROUND REFERENCE 1GROUND REFERENCE 2= –V SIGNALFigure 1.AMP03 Serves to Reject Common-Mode Volt- ages in Instrumentation Systems. Common-Mode Volt- ages Occur Due to Ground Current Returns. V SIGNAL and E CM Must Be within the Common-Mode Range of AMP03.APPLICATIONS INFORMATIONThe AMP03 represents a versatile analog building block. In order to capitalize on the fast settling time, high slew rate, and high CMR, proper decoupling and grounding techniques must be employed. Figure 1 illustrates the use of 0.1µF decoupling capacitors and proper ground connections.MAINTAINING COMMON-MODE REJECTIONIn order to achieve the full common-mode rejection capability of the AMP03, the source impedance must be carefully con-trolled. Slight imbalances of the source resistance will result in a degradation of dc CMR—even a 5Ω imbalance will degrade CMR by 20dB. Also, the matching of the reactive source impedance must be matched in order to preserve the CMRR over frequency.APPLICATION CIRCUITS+IN E 2–IN E E 0 = E 2 – E 1Figure 2.Precision Difference Amplifier. Rejects Common-Mode Signal = (E 1 + E 2)/2 by 100dBE 0 = –E 1Figure 3.Precision Unity-Gain Inverting Amplifier–10V OUTFigure 4.؎10 V Precision Voltage Reference–5V OUT+5V OUTFigure 5.؎5 V Precision Voltage ReferenceE 0 = E 1 + E 2Figure 6.Precision Summing AmplifierR2R1E 0 = (R2/R1+1)E 1= E 22Figure 7.Precision Summing Amplifier with GainAMP03–7–REV. F System Design Suggested Op Amp RequirementFor A1 and A2Source Impedance Low, Need Low OP27, OP37Voltage Noise PerformanceOP227 (Dual Matched)OP270 (Dual)OP271OP470OP471Source Impedance HighOP80(R S ≥ 15 k Ω). Need Low Current OP41 NoiseOP43OP249OP97Require Ultrahigh Input ImpedanceOP80OP97OP41OP43Need Wider Bandwidth and High OP42SpeedOP43OP249E E Figure 8.Differential Input Voltage-to-Current Converter for Low I OUT . OP80EJ maintains 250 fA max input current,allowing I O to be less than 1pA.–IN E +IN E E 0 OUTPUTE 0 = (1 + 2R2/R1) (E 2 – E 1)Figure 9.Suitable Instrumentation Amplifier Requirements Can Be Addressed by Using an Input Stage Consisting of A1,A2, R1, and R2. The following matrix suggests a suitable amplifier.AMP03–8–REV. FOUTLINE DIMENSIONSC 00249–0–12/03(F )Revision HistoryLocationPage12/03—Data Sheet changed from REV. E to REV. F.Changes to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78-Lead Plastic Dual In-Line Package [PDIP][P Suffix](N-8)Dimensions shown in inches and (millimeters)CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FORREFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGNCOMPLIANT TO JEDEC STANDARDS MO-095AA8-Lead Small Outline Package [SOIC][S Suffix](R-8)Dimensions shown in millimeters and (inches)45؇PLANECONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGNCOMPLIANT TO JEDEC STANDARDS MS-012AA8-Lead Metal Can [TO-99][J Suffix](H-08B)Dimensions shown in inches and (millimeters)CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FORREFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGNCOMPLIANT TO JEDEC STANDARDS MO-002AK。

Meggitt MPC4 机器人保护卡型号M版特色说明书

Information contained in this document may be subject to Export Control Regulations of the European Union, USA or other countries. Each recipient of this document is responsible for ensuring that transfer or use of any information contained in this document complies with all relevant Export ControlRegulations. ECN N/A.MPC4Machinery protection card Type MPC4FEATURES»From the Vibro-Meter ® product line»Continuously online machinery protection card »Real-time measurement and monitoring using state-of-the-art DSP techniques» 4 dynamic signal inputs and 2 tachometer (speed) inputs, all individually programmable »Programmable broad-band and narrow-band filters»Simultaneous amplitude and phase monitoring in order tracking mode»Programmable Alert, Danger and OK set points »Adaptive Alert and Danger levels»Front panel BNC connectors for easy analysis of raw signals»7 front panel LEDs show status and alarms »Integrated power supply for many Vibro-Meter front-ends, including ICP accelerometers and proximity systems»Live insertion and removal of cards»Available in ‘standard’, ‘separate circuits’ and‘safety’ (SIL) versions‘Standard’MPC4‘Safety’MPC4Machinery protection card MPC4DESCRIPTIONMPC4 cardThe MPC4 machinery protection card is the central element in the VM600 series machinery protection system (MPS), from Meggitt Sensing Systems’Vibro-Meter® product line. This very versatile card is capable of measuring and monitoring up to four dynamic signal inputs and up to two speed inputs simultaneously.The dynamic signal inputs are fully programmable and can accept signals representing acceleration, velocity and displacement (proximity), among others. On-board multi-channel processing allows measurement of various physical parameters, including relative and absolute vibration, S max, eccentricity, thrust position, absolute and differential housing expansion, displacement and dynamic pressure.Digital processing includes digital filtering, integration or differentiation (if required), rectification (RMS, mean value, true peak or true peak-to-peak), order tracking (amplitude and phase) and measurement of the transducer-target gap.The speed (tachometer) inputs accept signals from a variety of speed sensors, including systems based on proximity probes, magnetic pulse pick-up sensors or providing TTL signals. Fractional tacho ratios are also supported.The calibration may be expressed in metric or imperial units. Alert and Danger set points are fully programmable, as are alarm time delay, hysteresis and latching. The Alert and Danger levels can be adapted as a function of the speed or any external information.A digital output is available internally (on the corresponding IOC4T card) for each alarm level. These alarm signals may be routed on a bus within the VM600 rack to drive relays on optional relay cards (such as the IRC4 and RLC16).The processed dynamic (vibration) signals and speed signals are available at the rear of the rack (on the front panel of the IOC4T) as analog output signals. Voltage-based (0to10V) and current-based(4to20mA) signals are provided.The MPC4 performs a self-test and diagnostic routine on power-up. In addition, the card’s built-in“OK System” continuously monitors the level of signals provided by the sensors and indicates any problem due to a broken transmission line, faulty transducer or conditioner.An LED indicator on the MPC4 front panel indicates whether a processing or hardware error has occurred. Six additional LEDs (one per input channel) indicate whether the OK System has detected a fault and whether an alarm has occurred on the channel.The MPC4 card is available in three versions: a‘standard’ version, a ‘separate circuits’ version and a ‘safety’ (SIL) version, all of which function as a card pair using an IOC4T input/o utput card.‘Standard’ and ‘safety’ (SIL) versions of the MPC4 Both the ‘standard’ version and the ‘safety’ (SIL) version of the MPC4 card are certified to IEC61508 and ISO13849.The ‘standard’ MPC4 card is the original version, intended for safety systems using a VM600 rack with a limited range of cards, that is, ‘standard’ MPC4/ IOC4T card pairs and RLC16 relay cards. It has a VME-compatible slave interface and is fully software configurable via RS-232 (on the front panel of the card) or VME.The ‘safety’ MPC4 card, also known as the MPC4 SIL, was developed to permit a wider range of installation options. Specifically, VM600 racks that also contain condition monitoring cards (such as the CMC16 and XMx16) and relay cards (such as the IRC4 and RLC16). To safety certify these configurations, it was necessary to ensure that the ‘safety’ MPC4 is isolated from the other cards in a VM600 rack, so that there is no possibility of its configuration being inadvertently modified. Therefore, the ‘safety’ (SIL) version of the MPC4 does not include a VME-compatible slave interface, nor does it provide all of the signal processing capabilities of the ‘standard’ MPC4 card (see Specifications –‘standard’ and ‘separate circuits’ MPC4 cards only on page6).Segregation of MPS and CMSThe VM600 rack, machinery protection cards, condition monitoring cards and associated software are designed for compliance with the machinery protection system (MPS) and condition monitoring system (CMS) “segregation” requirements of the API670 standard, which ensures that the functionality of the MPS does not depend on and is notMachinery protection cardMPC4 DESCRIPTION (continued)compromised in any way by the operation of the CMS.So although machinery protection cards and condition monitoring cards can easily share sensor signals from measurement chains, MPC4/IOC4T card pairs do not share any communication buses with XMx16/XIO16T condition monitoring card pairs in a VM600 rack, and MPC4/IOC4T card pairs are configured and operated using the VM600 MPSx software (while XMx16/XIO16T card pairs are configured and operated using the VibroSight® software).Applications informationThe MPC4 cards are highly suitable for machinery protection in a wide range of industrial applications. For further information on the use of MPC4 cards, refer to the VM600 Functional Safety Manual MAVM600-FS/E. For specific applications, contact your nearest Meggitt Sensing Systems representative.SPECIFICATIONS – ALL MPC4 CARDSDynamic signal inputsNumber of inputs:4 per MPC4 cardDC range:0 to +20 V or 0 to −20 VAC range:±10 V (maximum)Common mode voltage range:−50 to +50 VCMRR:>60 dB at 50 HzCrosstalk:−72 dBInput impedance:200 kΩCurrent input range•DC signals:0 to 25 mA•AC signals:±8 mA (maximum)Analog AC frequency band(without integration):0.1 Hz to 10 kHzAnalog AC frequency band(with integration):2.5 Hz to 10 kHzAnalog frequency band for throughput toother cards and buffered AC outputs:DC to 60 kHz (−3 dB)Current measuring resistor:324.5ΩProcessing optionsBroad-bandFiltering options:High-pass, low-pass or band-passLP/H P ratio in pass band:500 (maximum)Ripple:±0.3 dBSlope:6 to 60 dB/o ctave (software configurable) Attenuation outside pass band:>50 dBAmplitude accuracy:±1% of full-scaleLinearity error:<±1%Equivalent input noise(without integration):<200 µV RMSMachinery protection card ArrayMPC4SPECIFICATIONS – ALL MPC4 CARDS(continued)Narrow-band (tracking)The ‘standard’ and ‘separate circuits’ versions of the MPC4 card support narrow-band tracking (see Specifications – ‘standard’ and ‘separate circuits’ MPC4 cards only on page6).The ‘safety’ MPC4 card does not support narrow-band tracking.Relative shaft vibrationFrequency band•Vibration:0.1 Hz to 10 kHz•Gap/p osition:DC to 1 HzAmplitude accuracy•Vibration:±1.2% of full-scale•Gap/p osition:±1% of full-scale•Linearity error:<±1%Initial gap/o ffset compensation:AvailableBuffered (raw) dynamic signal outputsThese signals are available on the MPC4 card’s BNC outputs and the IOC4T card’s raw outputs.Frequency range:DC to 10 kHz (−0.1 dB or 1%).DC to 60 kHz (−3 dB).Admissible load on output:>50 kΩAmplitude error:<2%Phase error:<5° (DC to 10 kHz)Transfer ratio•Voltage input:1 V/V•Current input:0.3245 V/m ASpeed/p hase reference inputs and outputsThe ‘standard’ and ‘separate circuits’ versions of the MPC4 card support speed/p hase reference inputs and outputs (see Specifications – ‘standard’ and ‘separate circuits’ MPC4 cards only on page6).The ‘safety’ MPC4 card does not support speed/p hase reference inputs and outputs.Alarm programmingLevel detectors•Vibration systems:Over-level switching (A+, D+) and under-level switching (A−, D−)•Accelerometer systems:Over-level switching (A+, D+)•Speed channel:2 Alert levels (A−, A+)Alarm scanning interval:100 ms (maximum)Alarm level value:User-programmable within rangeHysteresis:User-programmable within rangeLatching:User-programmable within rangeAlarm delay time:User-programmable within rangeAlarm outputs:Individual alarms and common alarms (open-collector transistor) Adaptation criteria (for adaptive:Speed or digital inputmonitoring)Logical combinations:AND, OR, majority voting logicNumber of logical combinations:8 basic functions and 4 advanced functionsMachinery protection cardMPC4 SPECIFICATIONS – ALL MPC4 CARDS(continued)OK systemRange:−20 to +20 VOperating principle•Powered sensors:DC voltage monitoring (open circuit and short circuit line check)•Unpowered sensors:Open circuit line check onlyTransducer power supplyVoltage power supply:+27.2 V ±5% in the range 0 to 25 mA.−27.2 V ±5% in the range 0 to 25 mA.+15.0 V ±5% in the range 0 to 25 mA.Current power supply: 6.16 mA ±5% in the range 1 to 23 VOver-current protection (on-board):11.0 A on +5 V linePower supply to MPC4 cardSupply voltage:5 V DC ±5% and ±12 V DCConsumption from +5 V DC supply:12.5 W, plus an additional 1 W per sensor usedConsumption from ±12 V DC supply:2.5 W (maximum)CommunicationsVME bus:D16 / A24 slave mode.The ‘standard’ and ‘separate circuits’ versions of the MPC4 card includea VME bus. The ‘safety’ MPC4 card does not include a VME bus.RS-232 port:Configuration port, proprietary protocolBus to IOC4T card:IP (Industry Pack)Notes: The ‘standard’ and ‘separate circuits’ versions of the MPC4 card are fully software configurable viaRS-232 or VME. The ‘safety’ MPC4 card is fully software configurable via RS-232 only.EnvironmentalOperating•Temperature:−25 to +65°C (−13 to +149°F)•Humidity:0 to 90% non-condensingStorage•Temperature:−40 to +85°C (−40 to +185°F)•Humidity:0 to 95% non-condensingPhysicalHeight:6U (262 mm, 10.3 in)Width:20 mm (0.8 in)Depth:187 mm (7.4 in)Weight:0.40 kg (0.88 lb)Machinery protection cardMPC4SPECIFICATIONS – ‘STANDARD’ AND ‘SEPARATE CIRCUITS’ MPC4 CARDS ONLYProcessing optionsNarrow-band (tracking)Constant Q filter:Q = 28Frequency range:0.15Hz to 10kHzMax. frequency ratio in selected band:f upper / f lower = 25Rate of change of speed:450 Hz/s ec. (in band 25 to 500 Hz)Order extraction:1/3X, 1/2X, 1X, 2X, 3X, 4XPhase error:<±6° maximum.<±1° typical (with order = 1X).Amplitude accuracy:±1.2%Linearity error:<±1%Speed/p hase reference inputsNumber of inputs:2 per MPC4 cardTriggering method:Crossing of thresholds on rising/f alling edge of signalTriggering thresholds:Rising = 2/3 of peak-peak value, falling = 1/3 of peak-peak valueTacho range:0.016Hz to 50kHz on input.0.016Hz to 1092Hz (1 to 65535RPM) after division by the“wheel teeth number”.Speed resolution:0.001 Hz (internal)Input voltage range:0.4 to 500 Vpp in the range 0.3 Hz to 10 kHz.2.0 to 500 Vpp in the range 10 kHz to 50 kHz.Minimum input voltage for reliable detection•Square-wave input signal:0.8 Vpp (0.016 Hz to 10 kHz).2.0 Vpp (10 kHz to 50 kHz).•Sinusoidal input signal:10 Vpp (0.016 Hz to 1 Hz).2.0 Vpp (1 Hz to 10 Hz).0.8 Vpp (10 Hz to 10 kHz).2.0 Vpp (10 kHz to 50 kHz).Range of DC component:−20 to +20 VFor speed/phase reference input channels, it can be more difficult to achieve the minimum input voltage required when current is selected as the signal transmission mode. Therefore, the 200Ω current-to-voltage conversionresistor used by the MPC4 card for current-modulated input signals should be used in any system designcalculations in order to ensure reliable detection.Speed/p hase reference outputsBNC outputs:TTL compatibleOutputs to IOC4T and:TTL compatibleTacho Bus (VM600 rack)Speed resolution:1 RPM (external)Machinery protection cardMPC4Headquartered in the UK, Meggitt PLC is a global engineering group specializing in extreme environment components and smart sub-systems for aerospace, defence and energy markets.Meggitt Sensing Systems is the operating division of Meggitt specializing in sensing and monitoring systems, which has operated through its antecedents since 1927 under the names of ECET, Endevco, Ferroperm Piezoceramics, Lodge Ignition, Sensorex, Vibro-Meter and Wilcoxon Research. Today, these operations areintegrated under one strategic business unit called Meggitt Sensing Systems, headquartered in Switzerland and providing complete systems, using these renowned brands, from a single supply base.The Meggitt Sensing Systems facility in Fribourg, Switzerland was formerly known as Vibro-Meter SA, but is now Meggitt SA. This site produces a wide range of vibration and dynamic pressure sensors capable of operation in extreme environments, leading-edge microwave sensors, electronics monitoring systems and innovative software for aerospace and land-based turbo-machinery.All statements, technical information, drawings, performance rates and descriptions in this document, whilst stated in good faith, are issued for the sole purpose of giving an approximate indication of the products described in them, and are not binding on Meggitt SA unless expressly agreed in writing. Before acquiring this product, you must evaluate it and determine if it is suitable for your intended application. Unless otherwise expressly agreed in writing with Meggitt SA, you assume all risks and liability associated with its use. Any recommendations and advice given without charge, whilst given in good faith, are not binding on Meggitt SA.Meggitt Sensing Systems takes no responsibility for any statements related to the product which are not contained in a current Meggitt Sensing Systems publication, nor for any statements contained in extracts, summaries, translations or any other documents not authored by Meggitt Sensing Systems. We reserve the right to alter any part of this publication without prior notice.In this publication, a dot (.) is used as the decimal separator and thousands are separated by thin spaces. Example: 12 345.678 90.Sales officesYour local agent Head officeMeggitt Sensing Systems has offices in more than 30 countries. For a complete list, please visit our website.Meggitt SARoute de Moncor 4PO Box 1616CH - 1701 FribourgSwitzerland Tel: +41 26 407 11 11Fax: +41 26 407 13 01ABCDISO 9001FS584089ORDERING INFORMATION To order please specify Type DesignationOrdering number MPC4Machinery protection card: ‘Standard’ version200-510-SSS-1Hh ‘Separate circuits’ version, in accordance with CEI / I EC 60255-5200-510-SSS-2Hh ‘Safety’ (SIL) version, safety certified in accordance with IEC 61508 and ISO 13849200-510-SSS-3HhNote: “SSS” represents the firmware (embedded software) version and “Hh” the hardware version. “H” increments are for major modifications that can affect product interchangeability. “h” increments are for minor modifications that have no effect on interchangeability.。

12-bit Low-power fully differential switched capacitor noncalibrating successive approximation ADC

12-bit Low-Power Fully Differential Switched Capacitor Noncalibrating Successive Approximation ADC with1MS/sGilbert PromitzerAbstract—Based on a conventional successive approximation ADC architecture a new and faster solution is presented.The input structure of the new solution consists of transmission gates and capacitors only and there is no need for any active element.A switching circuit is implemented to allow a wider input voltage range of the ADC.Together with a self-timed comparator the power consumption is noticeably reduced while at the same time the sampling rate is doubled.Smaller input and reference capaci-tances reduce the requirements on the input and reference sources, respectively.Additionally,a widely clock-duty-cycle-independent control logic improves the applicability of the converter cell, especially for systems on chip.Results of measurements confirm the theoretical improvements.Index Terms—CMOS,low power,SC technique,self-timed com-parator.I.I NTRODUCTIONN EW systems on silicon need more functionality integrated in one rge digital parts and more analog func-tions such as analog to digital converters are integrated on one chip.Interference-insensitive fully differential structures with low power consumption should be used to avoid crosstalk be-tween the converters and the digital part and to minimize self-heating effects.More and more applications require converters with higher sampling rates at lower power consumption.To ac-commodate these apparently incompatible properties into one ADC,the well-known structure of a fully differential switched capacitor ADC,working in successive approximation,had to be revised.Section II gives a short description of the ADC structure used so far,while Section III explains the new structure.The success of the new concept is confirmed by measured results in Sec-tion IV.II.C ONVENTIONAL ADC A RCHITECTUREThe ADC architecture of the fully differential successive ap-proximation switched capacitor ADC which was used so far consists of two capacitor arrays,two blocking capacitors,a fully differential buffer,a fully differential comparator with offset cancellation,a successive approximation register(SAR),and a control logic[1],[2].Various possible structures to realize the track-and-hold function exist[3],[4].In this solution,the whole capacitor array is used as a track-and-hold stage and as a DAC (Maindac)to perform the successive approximation.To increase the resolution and to avoid a large capacitor array another DACManuscript received November20,2000;revised January22,2001.The author is with Austria Mikro Systeme Int.AG,A-8141Unterpremstätten, Austria(e-mail:gilbert.promitzer@)Publisher Item Identifier S0018-9200(01)04517-6.Fig.1.Conventional ADCarchitecture.Fig.2.Timing of the conventional ADC.(Subdac)is used,which interpolates the least significant bit of the capacitive Maindac and may be either resistive or capacitive. Fig.1shows the block diagram ofan–bit Maindac andanFig.3.Input voltages of the comparator.of the critical output signals of the two Maindacs,which is re-duced by the large blocking capacitors.These additional capac-itors increase the input and reference capacitance of the ADC. For a12-bit converter,the input and reference capacitance is four times larger than that for a10-bit converter.In most appli-cations,an on-chip buffer is used to provide the input signal to the ADC,but with such a large input capacitance,it is very hard to achieve more than250kHz with12-bit accuracy in an inte-grated system.During the tracking phase,the offset cancellation is per-formed.In this phase,the common-mode input voltage of the comparator depends on the voltage VCM,which is derived from the reference voltage.During the successive approxima-tion phase the common mode input voltage of the comparator depends on the common mode voltage of the input signal. So the operating point of the comparator during the offset cancellation is different to that at a critical decision.This difference can be up to one quarter of the supply voltage and might cause a gain error or INL error due to an insufficient common-mode rejection ratio(CMRR)of the comparator. Fig.3illustrates the variation of the operating point for two different input voltages in single ended mode.In both casesthe Fig.4.New ADCarchitecture.Fig.5.Timing of the new ADC architecture.input VINB is connected to the VCM voltage.In Fig.3,the conversion of the maximum negative voltage difference at the input,which corresponds to the digital output code0,is shown on the top whereas the maximum positive voltage difference, which is converted to the digital output code1023,is shown on the bottom.Another problem is the reduction of the input voltage swing at the comparator input due to the voltage divider built by the blocking capacitors.The swing is reduced to one quarter of the supply voltage,which decreases the signal to noise ratio of the whole converter.The second part of the conversion is the successive approx-imation phase,whichtakesFig.6.Input voltages of the comparator.During the tracking phase,the sample switch S1and the input switches S2are on.Both capacitor arrays are charged to (VIN–VINB)/2,even in single-ended mode.In Fig.6,the input voltagesofthecomparatorareshownforthesamesetupasinFig.3. During the whole conversion,no overshoots or undershoots are possible,even without the blocking capacitors.This elimi-nates the need for blocking capacitors and increases the input voltage swing of the comparator to half of the supply,which increases the signal to noise ratio of the whole converter by2. Because of the series connection of the two capacitor arrays and the nonexisting blocking capacitors,it was possible to improve the resolution from10to12bit without rising the capacitive load.This makes the implementation of an on-chip input buffer easier and allows higher frequencies for the input signal.An additional advantage is a more simplified implementation of a power-down option,because the only active component re-maining has enough time to perform the power up.B.Enhanced Range of the Input VoltageFor decoupling the comparator stage from the input voltage during the tracking phase,some additional switches are inserted, as shown in Fig.7and described in[6].Fig.7.Decoupling of the comparatorstage.Fig.8.Self-timedcomparator.Fig.9.Timing of self-timed comparator.In the tracking phase,the switches S4are off and the switches S1and S5are on,while in the successive approximation phase, switches S4are on and switches S1and S5are off.During the tracking phase,the voltage VCM is applied to the comparator stage.The voltage VCM has to be(VREFPFig.10.Measured staticcharacteristics.Fig.11.Measured dynamic characteristics.large capacitors are necessary to obtain enough linearity while the resistance arises from the on resistance of the transmission gates.The whole comparator stage consists of a fast open-loop gain stage with offset cancellation,a fast clocked comparator,and some additional logic in the SAR as well as in the control logic (see Fig.8).When the control signal LATCH of the comparator is low,its output signals CP and CN are set to low and its positive feedback is open.With the rising clock edge,the LATCH signal is set to high,which triggers the comparator and has the effect that one of the output signals CP or CN changes to high,depending on the input voltage difference.When the high signal is detected the LATCH signal is reset to low,the bits for the DACs are set and a new charge redistribution is started.The next rising clock edge begins this procedure anew.This increases the critical time for the charge redistribution to nearly one whole clock cycle,independent from the clock duty cycle.TABLE I K EY FEATURES The second clock edge is only used to abort a decision of the comparator if its input signal difference is too small to decide within a few nanoseconds.The successive approximation algo-rithm ensures that the error of a wrong decision caused by an aborted decision is always only a fraction of an LSB.This usage of the second clock edge reduces the freedom of the clock duty cycle to the range between about 25%and 75%.This self-timed solution does the time partitioning itself.When the comparator has to detect a very small voltage differ-ence,the time for the charge redistribution is longer,because the previous one was an easy and fast decision.The subsequent charge redistribution needs less time,because an uncritical decision always follows.This correlation and the timing of the comparator are shown in Fig.9.The combination of all those improvements makes it possible to increase the sampling rate and to reduce the power consump-tion at the same time.IV .I MPLEMENTATION AND M EASURED R ESULTSThe conventional 10-bit converter which was described in Section II was designed in the0.6-m process as well,to compare thenew architecture with the old one.Both converters are noncali-brating ADCs with poly1-poly2capacitor arrays.To achieve the required linearity a special common centroid layout technique was used to build a 12-bit accurate capacitor array [7],[8].The greatest advantage of the new architecture is to have a higher sampling rate and lower power consumption at the same time,as shown in Table I.The sampling rate is increased by the factor 2,the power consumption is decreased by the factor 1.5.This results in an overall improvement by the factor 3.Further-more the resolution is increased from 10to 12bit and the input and reference capacitances are almost the same for the 10-bit and the 12-bit ADC which is comparable with an effective re-duction of about the factor 4.The area of the new 12-bit cell is about the same as that for the old 10-bit cell.Altogether this is an effective size reduction of about one third,mainly because the buffer as well as the blocking capacitors were removed.In Table II,typical parameters of the conventional 10-bit and the new 12-bit converter are listed.The measurements were done at the maximum conversion rate with a supply voltage ofTABLE IIM EASURED R ESULTS AT 5.0-V SUPPLYFig.12.Chip photograph.5V and a dynamic input rangeofV ,temperatureC,worst-case process).The resolution was improved from 10-bit to 12-bit while the area remained roughly the same.Furthermore,the applicability of the converter in an integrated system was facilitated noticeably because of the re-duction of the input and reference capacitance.A CKNOWLEDGMENTThe author would like to thank G.Schatzberger,W.Meus-burger,and C.Trattler for useful discussions.R EFERENCES[1]K.S.Tan et al.,“Error correction techniques for high-performancedifferential A/D converters,”IEEE J.Solid-State Circuits,vol.25,pp.1318–1327,Dec.1990.[2]J.L.McCreary et al.,“All-MOS charge redistribution analog-to-dig-ital conversion techniques—Part I,”IEEE J.Solid-State Circuits,vol.SC-10,pp.371–379,Dec.1975.[3] C.A.Leme and J.E.Franca,“An overview and novel solutions for high-resolution self-calibrating analogue-digital converters,”presented at the Int.Symp.Signals,Systems and Electronics,Erlangen,1989.[4]R.Van De Plassche,Integrated Analog-to-Digital and Digital-to-AnalogConverters,The Netherlands:Kluwer,1994.[5]“Differentieller analog-digitalwandler,”Austria Mikro Systeme Int.AG,Österreichisches Gebrauchsmuster Nr.3853,Aug.2000.[6]R.R.Hester et al.,“Fully differential ADC with rail-to-railcommon-mode range and nonlinear capacitor compensation,”IEEE J.Solid-State Circuits,vol.25,no.1,pp.173–183,Feb.1990. [7]T.Brandtner,“Device-Generator für Kapazitätsarrays,”,Institut fürElektronik L1415,1997.[8]P.O’Leary,Practical Aspects of Mixed Analogue and Digital Design,Austria Mikro Systeme International AG,1991.。

2N5564中文资料

76
Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. Pulse test: PW v300 ms duty cycle v3%. c. This parameter not registered with JEDEC.
APPLICATIONS
D Wideband Differential Amps D High-Speed,
Temp-Compensated, Single-Ended Input Amps D High-Speed Comparators D Impedance Converters D Matched Switches
IG = –1 mA, VDS = 0 V
VDS = 15 V, ID = 1 nA
VDS = 15 V, VGS = 0 V VGS = –20 V, VDS = 0 V
TA = 150_C VDG = 15 V, ID = 2 mA
TA = 125_C VGS = 0 V, ID = 1 mA VDG = 15 V, ID = 2 mA IG = 2 mA , VDS = 0 V
The hermetically-sealed TO-71 package is available with full military processing (see Military Information).
For similar products see the low-noise U/SST401 series, and the low-leakage 2N5196/5197/5198/5199 data sheets.

LT1990 微电流精密差分放大器说明书

LT1990IS8#TRPBF LT1990IS8#PBF LT1990ACS8#PBF LT1990CS8#PBF LT1990AIS8#PBF LT1990AIS8#PBF.134LT199051990fbLT1990H SYMBOL PARAMETER CONDITIONSMINTYP MAXUNITS∆GGain ErrorV OUT = 0.5V to (+V S ) – 0.75V LT1990, G = 1●0.69%LT1990A, G = 1●0.37%G = 10●0.97%G/T Gain vs Temperature G = 1 (Note 10)●210ppm/°C G = 10 (Note 10)●720ppm/°CV CMInput Voltage RangeGuaranteed by CMRR V S = 3V, 0V, V REF = 1.25V ●–525V V S = 5V, 0V, V REF = 1.25V ●–580V V S = 5V, 0V, V REF = 2.5V ●–3748VCMRR Common Mode Rejection Ratio, RTIV S = 3V, 0V (Note 7)V CM = –5V to 25V, V REF = 1.25V LT1990●56dB LT1990A●66dBV S = 5V, 0VV CM = –5V to 80V, V REF = 1.25V LT1990●56dB LT1990A●66dBV S = 5V, 0V (Note 7)V CM = –38V to 47V, V REF = 2.5V LT1990●56dB LT1990A●66dB3V/5V ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of –40°C ≤ T A ≤ 85°C. V S = 3V, 0V; V S = 5V, 0V;R L = 10k, V CM = V REF = half supply, G = 1, 10, unless otherwise noted. (Notes 4, 6)LT1990C/LT1990I SYMBOL PARAMETERCONDITIONS MIN TYP MAXUNITS V OSInput Offset Voltage, RTIV S = 3V, 0V G = 1, 10● 4.5mV V S = 5V, 0V G = 1, 10● 4.5mV V OS /T Input Offset Voltage Drift, RTI (Note 10)●522µV/°C V OSH Input Offset Voltage Hysteresis, RTI (Note 11)●230µV PSRRPower Supply Rejection Ratio, RTI V S = 2.7V to 12.7V V CM = V REF = 1.25V ●76dB Minimum Supply VoltageGuaranteed by PSRR ● 2.7V I S Supply Current(Note 8)●170µA V OL Output Voltage Swing LOW –IN = V +, +IN = Half Supply (Note 8)●70mV V OHOutput Voltage Swing HIGH–IN = 0V, +IN = Half Supply V S = 3V, 0V, Below V +●200mV V S = 5V, 0V, Below V +●275mV I SCOutput Short-Circuit CurrentShort to GND (Note 9)●2mA Short to V + (Note 9)●8mAThe ● denotes the specifications which apply over the temperature range of –40°C ≤ T A ≤ 125°C. V S = 3V, 0V; V S = 5V, 0V; R L = 10k,V CM = V REF = half supply, G = 1, 10, unless otherwise noted. (Notes 4, 6)3V/5V ELECTRICAL CHARACTERISTICSLT199061990fb±15V ELECTRICAL CHARACTERISTICSV S = ±15V, R L = 10k, V CM = V REF = 0V, G = 1, 10, T A = 25°C, unless otherwise noted. (Note 6)SYMBOL PARAMETER CONDITIONSMINTYP MAX UNITSG Gain Pins 5 and 8 = Open 1Pins 5 and 8 = V REF 10∆GGain ErrorV OUT = ±10V LT1990, G = 10.40.6%LT1990A, G = 10.070.28%G = 100.20.8%GNL Gain NonlinearityV OUT = ±10V G = 10.00080.002%G = 100.0050.02%V CM Input Voltage RangeGuaranteed by CMRR –250250V CMRRCommon Mode Rejection Ratio, RTIV CM = –250V to 250V LT19906068dB LT1990A 7075dBV OS Offset Voltage, RTI G = 1, 100.9 5.2mV e n Input Noise Voltage, RTI f O = 0.1Hz to 10Hz 22µV P-P Noise Voltage Density, RTI f O = 1kHz 1µV/√Hz R IN Input ResistanceDifferential 2M ΩCommon Mode 0.5M ΩPSRR Power Supply Rejection Ratio, RTI V S = ±1.35V to ±18V 82100dBMinimum Supply Voltage Guaranteed by PSRR±1.2±1.35V I S Supply Current 140180µA V OUTOutput Voltage Swing±14.5±14.79VLT1990H SYMBOL PARAMETERCONDITIONS MINTYP MAXUNITS V OSInput Offset Voltage, RTIV S = 3V, 0V G = 1, 10● 5.2mV V S = 5V, 0V G = 1, 10● 5.2mV V OS /T Input Offset Voltage Drift, RTI (Note 10)●522µV/°C V OSH Input Offset Voltage Hysteresis, RTI (Note 11)●250µV PSRRPower Supply Rejection Ratio, RTI V S = 2.7V to 12.7V V CM = V REF = 1.25V ●75dBMinimum Supply VoltageGuaranteed by PSRR ● 2.7V I S Supply Current(Note 8)●200µA V OL Output Voltage Swing LOW –IN = V +, +IN = Half Supply (Note 8)●80mV V OHOutput Voltage Swing HIGH–IN = 0V, +IN = Half Supply V S = 3V, 0V, Below V +●230mV V S = 5V, 0V, Below V +●275mV I SCOutput Short-Circuit CurrentShort to GND (Note 9)●1mA Short to V + (Note 9)●5mAThe ● denotes the specifications which apply over the temperature range of –40°C ≤ T A ≤ 125°C. V S = 3V, 0V; V S = 5V, 0V; R L = 10k,V CM = V REF = half supply, G = 1, 10, unless otherwise noted. (Notes 4, 6)3V/5V ELECTRICAL CHARACTERISTICSLT199071990fbLT1990C/LT1990I SYMBOL PARAMETER CONDITIONS MIN TYP MAXUNITS∆GGain ErrorV OUT = ±10V LT1990, G = 1●0.65%LT1990A, G = 1●0.33%G = 10●0.9%GNL Gain NonlinearityV OUT = ±10V G = 1●0.0025%G = 10●0.025%G/T Gain vs Temperature G = 1 (Note 10)●210ppm/°C G = 10 (Note 10)●720ppm/°CV CM Input Voltage RangeGuaranteed by CMRR ●–250250V CMRRCommon Mode Rejection Ratio, RTIV CM = –250V to 250V LT1990●59dB LT1990A ●68dB V OS Input Offset Voltage, RTI G = 1, 10● 6.2mV V OS /T Input Offset Voltage Drift, RTI (Note 10)●522µV/°C V OSH Input Offset Voltage Hysteresis, RTI (Note 11)●250µV PSRR Power Supply Rejection Ratio, RTI V S = ±1.35V to ±18V ●80dB Minimum Supply Voltage Guaranteed by PSRR●±1.35V I S Supply Current ●230µA V OUT Output Voltage Swing ●±14.4V I SC Output Short-Circuit Current Short to V –●5mA Short to V +●13mA SRSlew RateG = 1, V OUT = ±10V●0.25V/µs±15V ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of 0°C ≤ T A ≤ 70°C. V S = ±15V, R L = 10k, V CM = V REF = 0V,G = 1, 10, unless otherwise noted. (Notes 4, 6)SYMBOL PARAMETERCONDITIONS MIN TYP MAXUNITS I SC Output Short-Circuit Current Short to V –69mA Short to V +1522mA BW Bandwidth G = 1105kHz G = 107kHz SR Slew RateG = 1, V OUT = ±10V 0.30.55V/µs Settling Time to 0.01%10V Step, G = 160µsAV REFReference Gain to OutputG = 1 1 ± 0.0007G = 101 ± 0.007V S = ±15V, R L = 10k, V CM = V REF = 0V, G = 1, 10, T A = 25°C, unless otherwise noted. (Note 6)LT199081990fbLT1990C/LT1990I SYMBOL PARAMETER CONDITIONS MIN TYP MAXUNITS∆GGain ErrorV OUT = ±10V LT1990, G = 1●0.67%LT1990A, G = 1●0.35%G = 10●0.95%GNL Gain NonlinearityV OUT = ±10V G = 1●0.003%G = 10●0.03%G/T Gain vs Temperature G = 1 (Note 10)●210ppm/°C G = 10 (Note 10)●720ppm/°CV CM Input Voltage RangeGuaranteed by CMRR ●–250250V CMRRCommon Mode Rejection Ratio, RTIV CM = –250V to 250V LT1990●58dB LT1990A ●67dB V OS Input Offset Voltage, RTI G = 1, 10● 6.7mV V OS /T Input Offset Voltage Drift, RTI (Note 10)●522µV/°C V OSH Input Offset Voltage Hysteresis, RTI (Note 11)●250µV PSRR Power Supply Rejection Ratio, RTI V S = ±1.35V to ±18V ●78dB Minimum Supply Voltage Guaranteed by PSRR●±1.35V I S Supply Current ●280µA V OUT Output Voltage Swing ●±14.3V I SC Output Short-Circuit Current Short to V –●3mA Short to V +●10mA SRSlew RateG = 1, V OUT = ±10V●0.2V/µs±15V ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of –40°C ≤ T A ≤ 85°C. V S = ±15V, R L = 10k, V CM = V REF = 0V,G = 1, 10, unless otherwise noted. (Notes 4, 6)LT1990H SYMBOL PARAMETER CONDITIONS MINTYP MAXUNITS∆GGain ErrorV OUT = ±10V LT1990, G = 1●0.69%LT1990A, G = 1●0.37%G = 10●0.97%GNL Gain NonlinearityV OUT = ±10V G = 1●0.0035%G = 10●0.035%G/T Gain vs Temperature G = 1 (Note 10)●210ppm/°C G = 10 (Note 10)●720ppm/°CV CM Input Voltage RangeGuaranteed by CMRR ●–250250V CMRRCommon Mode Rejection Ratio, RTIV CM = –250V to 250V LT1990●57dB LT1990A ●66dBV OS Input Offset Voltage, RTI G = 1, 10●7.4mV V OS /TInput Offset Voltage Drift, RTI(Note 10)●522µV/°C±15V ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of –40°C ≤ T A ≤ 125°C. V S = ±15V, R L = 10k, V CM = V REF = 0V,G = 1, 10, unless otherwise noted. (Notes 4, 6)LT199091990fbLT1990H SYMBOL PARAMETERCONDITIONS MIN TYP MAX UNITS V OSH Input Offset Voltage Hysteresis, RTI (Note 11)●250µV PSRR Power Supply Rejection Ratio, RTI V S = ±1.35V to ±18V ●77dB Minimum Supply Voltage Guaranteed by PSRR●±1.35V I S Supply Current ●330µA V OUT Output Voltage Swing ●±14.2V I SC Output Short-Circuit Current Short to V –● 1.5mAShort to V +●7mA SRSlew RateG = 1, V OUT = ±10V ●0.1V/µs±15V ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of –40°C ≤ T A ≤ 125°C. V S = ±15V, R L = 10k, V CM = V REF = 0V,G = 1, 10, unless otherwise noted. (Notes 4, 6)Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: ESD (Electrostatic Discharge) sensitive device. Extensive use of ESD protection devices are used internal to the LT1990, however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions.Note 3: A heat sink may be required to keep the junction temperature below absolute maximum.Note 4: The LT1990C/LT1990I are guaranteed functional over the operating temperature range of –40°C to 85°C. The LT1990H isguaranteed functional over the operating temperature range of –40°C to 125°C.Note 5: The LT1990C is guaranteed to meet the specified performance from 0°C to70°C and is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QAsampled at these temperatures. The LT1990I is guaranteed to meetspecified performance from –40°C to 85°C. The LT1990H is guaranteed to meet specified performance from –40°C to 125°C.Note 6: G = 10 limits are guaranteed by correlation to G = 1 tests and gain error tests at G = 10.Note 7: Limits are guaranteed by correlation to –5V to 80V CMRR tests.Note 8: V S = 3V limits are guaranteed by correlation to V S = 5V and V S = ±15V tests.Note 9: V S = 5V limits are guaranteed by correlation to V S = 3V and V S = ±15V tests.Note 10: This parameter is not 100% tested.Note 11: Hysteresis in offset voltage is created by package stress that differs depending on whether the IC was previously at a higher or lower temperature. Offset voltage hysteresis is always measured at 25°C, but the IC is cycled to 85°C I-grade (70°C C-grade or 125°C H-grade) or –40°C I/H-grade (0°C C-grade) before successive measurement.101112TIME (S)801990 G262010305070904060100TIME (S)081990 G252135794610V S = ±1.5V TO ±15V T A = 25°C G = 1V S = ±1.5V TO ±15V T A = 25°C G = 113V S = ±15V G = 1, –1R L = 10k V REF = GND50µs/DIV1990 G30V S = ±15V G = 1, –1R L = 10k V REF = GNDV S = 3V, 0V G = 1, –1R L = 10k V REF = 1.5V50µs/DIV50µs/DIV1990 G281990 G29LT1990141990fbV CM+ ≤ 27 • V + – 26 • V REF – 23 – V GAIN V CM– ≥ 27 • V – – 26 • V REF + 27 – V GAINFor split supplies over about ±11V, the full ±250V common mode range is normally available (with V REF a small fraction of the supply). With lower supply voltages, an appropriate selection of V REF can tailor the input common mode range to a specific requirement. As an example, the following low supply voltage scenarios are readily imple-mented with the LT1990:Supply V REF V CM Range+3V 1.25V –5V to 25V (e.g. 12V automotive environment)+5V 1.25V –5V to 80V (e.g. 42V automotive environment)+5V4.00V–77V to 8V (e.g. telecom environment;use downward signaling)Configuring Other GainsAn intermediate gain G ranging between 1 and 10 may be produced by placing an adjustable resistance between the GAIN1 and GAIN2 pins according to the following nominal relationship:R GAIN ≈ (180k/(G – 1)) – 20kWhile the expression is exact, the value is approximate because the absolute resistance of the internal network could vary on a unit-to-unit basis by as much as ±30%from the nominal figures and the external gain resistance is required to accommodate that deviation. Once ad-justed, however, the gain stability is excellent by virtue of the –30ppm/°C typical temperature coefficient offered by the on-chip thin-film resistor process.Preserving and Enhancing Common Mode Rejection The basic difference amplifier topology of the LT1990requires that source impedances seen by the input pins +IN and –IN, should be matched to within a few tens of ohms to avoid increasing common mode induced errors beyond the basic production limits of the part. Known source imbalances beyond that level should be compen-sated for by the addition of series resistance to the lower-impedance source. Also the source impedance of a signal connected to the REF pin must be on the order of a few ohms or less to preserve the high accuracy of the LT1990.APPLICATIO S I FOR ATIOW UUU Primary FeaturesThe LT1990 is a complete gain-block solution for high input common mode voltage applications, incorporating a low power precision operational amplifier providing rail-to-rail output swing along with on-chip precision thin-film resistors for high accuracy. The Block Diagram shows the internal architecture of the part. The on-chip resistors form a modified difference amplifier including a reference port for introducing offset or other additive waveforms.With pin-strapping alone either unity gain or gain of 10 is produced with high precision. The resistor network is designed to produce internal common-mode voltage divi-sion of 27 so that a very large input range is available compared to the power supply voltage(s) used by the LT1990 itself. The LT1990 is ideally suited to situations where relatively small signals need to be extracted from high voltage circuits, as is the case in many current monitoring instrumentation applications for example. With the ability to accept a range of input voltages well outside the limits of the local power rails and its greater than 1M Ωinput impedances, development of precision low power over-the-top and under-the-bottom instrumentation de-signs is greatly simplified with the LT1990 single chip solution over conventional discrete implementations.Classic Difference AmplifierUsed in the basic difference amplifier topology where the gain G is pin-strap configurable to be unity or ten, the following relationship is realized:V O = G • (V +IN – V –IN ) + V REFTo operate in unity gain, the GAIN1 and GAIN2 pins are left disconnected. For G = 10 operation, the GAIN1 and GAIN2pins are simply connected to the REF pin.The input common mode range capability is up to ±250V,governed by the following relationships:For G = 1 and G = 10 where GAIN1 and GAIN2 are only tied together (not grounded,etc):V CM+ ≤ 27 • V + – 26 • V REF – 23V CM– ≥ 27 • V – – 26 • V REF + 27For G = 10 where GAIN1 and GAIN2 are tied to a common potential V GAIN :15Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.16© LINEAR TECHNOLOGY CORPORA TION 2004LT 0406 REV B • PRINTED IN USALT1990IS8#TRPBF LT1990IS8#PBF LT1990ACS8#PBF LT1990CS8#PBF LT1990AIS8#PBF LT1990AIS8#PBF.。

单通道运算放大器 LM321说明书

Single Channel Operational AmplifierLM321LM321 is a general purpose, single channel op amp with internal compensation and a true differential input stage. This op amp features a wide supply voltage ranging from 3V to 32V for single supplies and ±1.5 to ±16V for split supplies, suiting a variety of applications. LM321 is unity gain stable even with large capacitive loads up to 1.5nF. LM321 is available in a space-saving TSOP−5/SOT23−5 package.Features•Wide Supply V oltage Range: 3V to 32V•Short Circuit Protected Outputs•True Differential Input Stage•Low Input Bias Currents•Internally Compensated•Single and Split Supply Operation•Unity Gain Stable with 1.5nF Capacitive Load•This Device is Pb-Free, Halogen Free/BFR Free and is RoHS CompliantTypical Applications•Gain Stage •Active Filter •Signal ProcessingMARKING DIAGRAMTSOP−5CASE 483PIN CONNECTIONADY= Specific Device CodeA= Assembly LocationY= YearW= Work WeekG= Pb-Free Package15(Note: Microdot may be in either location)VCCIN+VEEOUTIN−Device Package Shipping†ORDERING INFORMATIONLM321SN3T1G TSOP−5(Pb−Free)3000 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.Table 1. ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature, unless otherwise stated)Parameter Rating UnitSupply Voltage36VINPUT AND OUTPUT PINSInput Voltage V EE–0.3 to 32VInput Current±10 mAOutput Short Circuit Duration (Note1)ContinuousTEMPERATUREOperating Temperature–40 to +125 °CStorage Temperature–65 to +150 °C Junction Temperature–65 to +150°CESD RATINGS (Note 2)Human Body Model (HBM)200VCharged Device Model (CDM)800VMachine Model (MM)100VOTHER RATINGSLatch-Up Current (Note 3)100mAMSL Level 1Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.1.Short circuits can cause excessive heating and eventual destruction.2.This device series incorporates ESD protection and is tested by the following methods:ESD Human Body Model tested per JEDEC standard: JESD22−A114ESD Machine Model tested per JEDEC standard: JESD22−A115tch-up Current tested per JEDEC standard: JESD78Table 2. THERMAL INFORMATION (Note4)Parameter Symbol Package Value Unit Junction to Ambient q JA TSOP−5/SOT23−5235°C/W4.As mounted on an 80×80×1.5mm FR4 PCB with 650mm2 and 2oz (0.034mm) thick copper heat spreader. Following JEDECJESD/EIA51.1, 51.2, 51.3 test guidelines.Table 3. RECOMMENDED OPERATING CONDITIONSParameter Symbol Range UnitSupply Voltage (V CC− V EE)V S 3 to 32V Specified Operating Range T A−40 to 85°C Common Mode Input Voltage Range V CM V EE to V CC−1.7V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.Table 4. ELECTRICAL CHARACTERISTICS − V S = 5V(At T A = +25°C, R L = 10k W connected to mid-supply, V CM = V OUT = mid-supply, unless otherwise noted.Boldface limits apply over the specified temperature range, T A = –40°C to 85°C, guaranteed by characterization and/or design.) Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICSOffset Voltage V OS V S=5V, V CM=V EE to V CC – 1.7VT A = 25°CT A = –40°C to 85°C −−0.3−79mVOffset Voltage Drift vs Temp D V OS/D T T A = –40°C to 85°C−7−m V/°CInput Bias Current I IB T A = 25°CT A = –40°C to 85°C −−−10−−−500nAInput Offset Current I OS T A = 25°CT A = –40°C to 85°C −−1−−150nACommon Mode Rejection Ratio CMRR V CM = V EE to V CC – 1.7V6585−dBInput Resistance R IN DifferentialCommon Mode −−85300−−G WInput Capacitance C IN DifferentialCommon Mode −−0.61.6−−pFOUTPUT CHARACTERISTICSOpen Loop Voltage Gain A VOL−100−dB Open Loop Output Impedance Z OUT_OL f = UGBW, I O = 0mA−1,200−WOutput Voltage High V OH R L = 2 k W to V EER L = 10 k W to V EE V CC–1.8V CC−1.8V CC−1.4V CC−1.4−−VOutput Voltage Low V OL R L = 10 k W to V CC−V EE+0.8V EE+1.0VOutput Current Capability I O Sinking CurrentV S = 5 VV S = 15 V 10102020−−mAOutput Current Capability I O Sourcing CurrentV S = 5 VV S = 15 V 20204040−−mACapacitive Load Drive C L Phase Margin = 15°−1,500−pF NOISE PERFORMANCEVoltage Noise Density e N f IN = 1 kHz−40−nV/√Hz DYNAMIC PERFORMANCEGain Bandwidth Product GBWP C L = 25 pF, R L to V CC−750−kHz Gain Margin A M C L = 25 pF, R L to V CC−14−dB Phase Margin a M C L = 25 pF, R L to V CC−60−°Slew Rate SR C L = 25 pF, R L = ∞−0.3−V/m s POWER SUPPLYPower Supply Rejection Ratio PSRR V S = 5 V to 32 V62100−dB Quiescent Current I Q No Load−0.250.5mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.Table 5. ELECTRICAL CHARACTERISTICS − V S = 32V(At T A = +25°C, R L = 10k W connected to mid-supply, V CM = V OUT = mid-supply, unless otherwise noted.Boldface limits apply over the specified temperature range, T A = –40°C to 85°C, guaranteed by characterization and/or design.) Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICSOffset Voltage V OS V S=32V, V CM=V EE to V CC – 1.7VT A = 25°CT A = –40°C to 85°C −−0.3−79mVOffset Voltage Drift vs Temp D V OS/D T T A = –40°C to 85°C−7−m V/°C Common Mode Rejection Ratio CMRR V CM = V EE to V CC – 1.7V−100−dB OUTPUT CHARACTERISTICSOpen Loop Voltage Gain A VOL T A = 25°CT A = –40°C to 85°C −84100−−−dBOpen Loop Output Impedance Z OUT_OL f = UGBW, I O = 0mA−2,000−WOutput Voltage High V OH R L = 2 k W to V EER L = 10 k W to V EE V CC−2.5V CC−2.5V CC−2.0V CC−1.5−−VOutput Voltage Low V OL R L = 10 k W to V CC−V EE+1.0V EE+1.5V Capacitive Load Drive C L Phase Margin = 15°−1,500−pF NOISE PERFORMANCEVoltage Noise Density e N f IN = 1 kHz−40−nV/√Hz Total Harmonic Distortion +NoiseTHD+N V S=30V, f IN = 1 kHz, R L to V CC−0.02−% DYNAMIC PERFORMANCEGain Bandwidth Product GBWP C L = 25 pF, R L to V CC−900−kHz Gain Margin A M C L = 25 pF, R L to V CC−18−dB Phase Margin a M C L = 25 pF, R L to V CC−66−°Slew Rate SR C L = 25 pF, R L = ∞−0.4−V/m s POWER SUPPLYPower Supply Rejection Ratio PSRR V S = 5 V to 32 V62100−dB Quiescent Current I Q No Load, V S=32V−0.3 1.2mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.Figure 1. Open Loop Gain and Phase Margin vs. FrequencyFigure 2. CMRR vs. FrequencyFigure 3. Inverting Large Signal Step ResponseFigure 4. Inverting Small Signal Step ResponseFigure 5. Phase Margin vs. Load Capacitance Figure 6. Voltage Noise Density vs. FrequencyFrequency (Hz)P h a s e M a r g i n (5)A V O L (dB )100−601001k10k100k1M10M−40−20020406080100120306090120150180210240270Frequency (Hz)C M R R (d B )1001020304050607080901001101001k10k100k1MTime (m s)V o l t a g e (V )−10−40102030405060708090100−3−2−101234Time (m s)V o l t a g e (V )−2−0.12468101214−0.08−0.06−0.04−0.020.00.020.040.060.080.1Load Capacitance (pF)P h a s e M a r g i n (5)100020030050010001500102030405060Frequency (Hz)V o l t a g e N o i s e D e n s i t y (n V //H z )101001000Figure 7. THD+N vs. FrequencyFigure 8. Quiescent Current vs. TemperatureFigure 9. Input Offset Voltage vs. CommonMode Voltage at 3 V SupplyFigure 10. Input Offset Voltage vs. CommonMode Voltage at 5 V SupplyFigure 11. Input Offset Voltage vs. CommonMode Voltage at 32 V Supply Figure 12. Input Bias and Offset Current vs.TemperatureFrequency (Hz)T H D +N (%)10101001k 10k 100k1001000Temperature (5C)Q u i e s c e n t C u r r e n t (m A )0.00−40−200204060801000.050.100.150.200.250.300.35Common Mode Voltage (V)I n p u t O f f s e t V o l t a g e (m V )−0.6−0.4−0.20.00.20.40.60.8Common Mode Voltage (V)I n p u t O f f s e t V o l t a g e (m V )−0.6−0.4−0.20.00.20.40.60.8Common Mode Voltage (V)I n p u t O f f s e t V o l t a g e (m V )−0.651015202530−0.4−0.20.00.20.40.60.8Temperature (5C)C u r r e n t (n A )−10−40−2020406080−8−6−4−20246810100Figure 13. High Level Output Voltage Swing vs.Output Current at 3V SupplyFigure 14. Low Level Output Voltage Swing vs.Output Current at 3V SupplyFigure 15. High Level Output Voltage Swing vs.Output Current at 5V SupplyFigure 16. Low Level Output Voltage Swing vs.Output Current at 5V SupplyFigure 17. High Level Output Voltage Swing vs.Output Current at 32V Supply Figure 18. Low Level Output Voltage Swing vs.Output Current at 32V SupplyOutput Source Current (mA)V C C − V O H (V )0510152025300.51.01.52.02.53.0Output Sink Current (mA)V O L − V E E (m V )5101520200400600800100012001400Output Source Current (mA)V C C − V O H (V )0.51.01.52.02.53.03.54.04.55.0Output Sink Current (mA)V O L − V E E (m V )020040060080010001200140016001800Output Source Current (mA)V C C −V O H (V )00510301525200.51.01.52.02.53.03.54.04.55.0Output Sink Current (mA)V O L − V E E (V )3930152118123456786122427APPLICATION INFORMATIONCIRCUIT DESCRIPTIONThe LM321 is made using two internally compensated, two−stage operational amplifiers. The first stage of each consists of differential input devices Q20 and Q18 with input buffer transistors Q21 and Q17 and the differential to single ended converter Q3 and Q4. The first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q20 and Q18. Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single−ended converter. The second stage consists of a standard current source load amplifier stage. Each amplifier is biased from an internal−voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as well as excellent power supply rejection.OutputV CCV EE/Gnd Figure 19. LM321 Representative Schematic DiagramLM321 has a class B output stage, which is comprised of push −pull transistors. This type of output is inherently subject to crossover distortion near mid −rail where neither push or pull transistors are conducting. Several techniques can be used to minimize crossover distortion. Connecting the output load to either the positive or negative supply rail instead of mid −rail can reduce the crossover distortion.Additionally, increasing the load resistance relativelydecreases the amount of crossover distortion.VCCVEEOUTFigure 20. Simplified Class B OutputFigure 21. Sine wave with crossover distortionTSOP −5CASE 483ISSUE NDATE 12 AUG 2020SCALE 2:115GENERICMARKING DIAGRAM*ǒmm inchesǓ*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT**This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “ G ”,may or may not be present.XXX = Specific Device Code A = Assembly Location Y = YearW = Work Week G = Pb −Free Package15Discrete/Logic Analog(Note: Microdot may be in either location)XXX = Specific Device Code M = Date Code G = Pb −Free PackageNOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLDFLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A.5.OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION.TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2FROM BODY .DIM MIN MAX MILLIMETERSA B C 0.90 1.10D 0.250.50G 0.95 BSC H 0.010.10J 0.100.26K 0.200.60M 0 10 S2.503.00__2XDETAIL ZTOP VIEW1.35 1.652.853.15MECHANICAL CASE OUTLINEPACKAGE DIMENSIONSON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor theADDITIONAL INFORMATIONTECHNICAL PUBLICATIONS:Technical Library:/design/resources/technical−documentation onsemi Website: ONLINE SUPPORT: /supportFor additional information, please contact your local Sales Representative at /support/sales。

Agilent U2300A Series USB模块多功能数据采集(DAQ)数据手册说明书

Agilent U2300A Series USB Modular Multifunction Data Acquisition(DAQ) Data SheetFeatures•Up to 3 MSa/s sampling rate for a single channel•Functions as standalone ormodular•Easy to use – plug-and-play and hot-swappable with high speedUSB 2.0•Up to 384 channels whenincorporated into Agilent ModularInstrument chassis (U2781A)•FREE and easy to use bundled software for quick set up and datalogging•12-bit or 16-bit A/D resolution •24-bit programmable digitalinput/output•Self-calibration capability •Compatible with wide range of Application DevelopmentEnvironments•USBTMC 488.2 standards High performance deviceAgilent U2300A series USB modularmultifunction data acquisition (DAQ) is ahigh performance plug-and-play solution. Ittargets a wide range of applications in bothindustrial and scientific environments. TheU2300A series DAQ devices providefunctionality that is much easier to use andcosts less. It helps you lower your cost oftest and accelerates your test systemintegration and development.The U2300A series DAQ devices comeswith a dual play USB connectivity. The USBinterface that is compliant with theUSBTMC 488.2 standards works seamlesslywith the Agilent Measurement Managersoftware and can be controlled remotely viaindustry standard SCPI commands. Inaddition, the U2300A series DAQ devicescome with Agilent IO Libraries Suite 14.2 orhigher. The IO Libraries Suite providesrobust instrument control and works withthe software development environment youchoose. IVI-COM driver is also included toensure an easy integration andcompatibility with different programmingenvironments.The U2300A series DAQ consists of:•Basic multifunction DAQ(U2351A, U2352A, U2353A, U2354A)•High density multifunction DAQ(U2355A, U2356A, U2331A)Optimized for test systemsBasic multifunction DAQ module consistsof four models. They can sample up to 500kSa/s with a resolution of 16 bits. Whereas,the high density multifunction DAQ modulecan sample up to 3 MSa/s for singlechannel and 1 MSa/s for multi channels.This makes it ideal when dealing with highdensity analog input/output signals,especially with different input ranges andsampling requirements.The U2300 series DAQ also features a 24-bitprogrammable I/O lines and 2 independent31 bits general purpose digital counter. Inaddition to that, this series of DAQ is able toperform analog and digital functions at fullspeed. It has a resolution of 12 or 16 bits,with no missing codes. It is also equippedwith self-calibration capability. This enablesthe device to re-adjust its offset within thespecified accuracy and ranges.Agilent TechnologiesModules provide flexible system stimulus and controlPolling and continuous mode - TheU2300A series DAQ provides two modes, which are the polling and continuous modes.Trigger sources - None (intermediate trig-ger),analog/external digital trigger, SSI/ star trigger and master/slavetrigger sources. You can configure all these trigger sources for A/D and D/A operations. Master/slave trigger and SSI/Start Trigger are recommended when used with the Agilent U2781A modular instrument chassis.Predefined function generator - Sine-wave, square-wave, triangle wave, sawtooth and noise waveforms.Burst mode - Incorporated to simulate simultaneous analog input.Arbitary waveform - Arbitary waveform generation through user’s input.Remote access and controlThe built-in user interface providesremote access and control of the U2300series DAQ instruments via the AgilentMeasurement Manager software andSCPI commands. Using the software, youcan:•View and modify instrument setup•Send trigger signals to instrument•Open, close, or monitor I/O channels•Send SCPI commands via Agilent IOLibraries 14.2 Suite or higher.Works with your choice of softwareThe Agilent U2300A series USB modularmultifunction DAQ works with yourchoice of software so you can save timeand this preserves your software andhardware investments. Program directlywith SCPI, or use the IVI-COM softwaredriver that provide compatibility with themost popular development environmentsand tools as listed below:•Agilent VEE, Agilent T&M T oolkit•Microsoft Visual , C/C++and Visual Basic 6•LabVIEW•MATLABFor more information, please visit/find/DAQ.Figure 1The Agilent Measurement Manager software user interfaceELECTRICAL SPECIFICATIONS Basic Multifunction USB DAQ[1] System Scynchronous Interface (SSI) and Star Trigger commands are used when the modular device is incorporated into the chassis.[2] Maximum external reference voltage for analog output channels (AO_EXT_REF) is ±10 V.[3] 20 minutes warm-up time is recommended.High Density Multifunction USB DAQ[1] System Scynchronous Interface (SSI) and Star Trigger commands are used when the modular device is incorporated into the chassis.[2] Maximum external reference voltage for analog output channels (AO_EXT_REF) is ±10 V.[3] 20 minutes warm-up time is recommended.ELECTRICAL MEASUREMENT SPECIFICATIONSBasic Multifunction USB DAQHigh Density Multifunction USB DAQAnalog Input Measurement [1]Model NumberU2351A/U2352AU2353A/U2354AFunction 23 °C ± 5 °C0 °C to 18 °C 28 °C to 45 °C 23 °C ± 5 °C0 °C to 18 °C 28 °C to 45 °C Offset Error ±1 mV ±5 mV ±1 mV ±5 mV Gain Error±2 mV ±5 mV±2 mV ±5 mV–3dB small signal bandwidth 760 kHz 1.5 MHz 1% THD large signal bandwidth 300 kHz300 kHzSystem noise 1 mVrms 2 mVrms1 mVrms 2.5 mVrmsCMRR62 dB 62 dB Spurious-free dynamic range (SFDR)88 dB 82 dB Signal-to-noise and distortion ratio (SINAD)80 dB78 dBT otal harmonic distortion (THD)–90 dB –88 dB Signal-to-noise ration (SNR)80 dB 78 dB Effective number of bits (ENOB)1312.6Analog Output Measurement [1]Model NumberU2351A/U2353AFunction 23 °C ± 5 °C0 °C to 18 °C 28 °C to 45 °C Offset Error ±1 mV ±4 mV Gain Error ±4 mV ±5 mVSlew rate 19 V/µsRise time 0.7 µs 0.8 µs Fall time0.7 µs 0.8 µsSettling time to 1% output error 4 µs Driving capability 5 mA Glitch energy5 ns-V (typical),80 ns-V (maximum)Analog Input Measurement [1]Model NumberU2355A U2356A U2331AFunction 23 °C ± 5 °C 0 °C to 18 °C 28 °C to 45 °C 23 °C ± 5 °C 0 °C to 18 °C 28 °C to 45 °C 23 °C ± 5 °C 0 °C to 18 °C28 °C to 45 °C Offset Error ±1 mV ±2 mV ±1 mV ±2 mV ±2 mV ±3 mV Gain Error ±2 mV ±3 mV ±2 mV ±6 mV ±6 mV ±7.5 mV –3dB small signal bandwidth 760 kHz 1.3 MHz 1.2 MHz 1% THD large signal bandwidth 400 kHz 400 kHz N/A System noise 1 mVrms 2 mVrms 1 mVrms 4 mVrms 3 mVrms 5 mVrms CMRR 64 dB 61 dB 62 dB Spurious-free dynamic range (SFDR)88 dB 86 dB 71 dB Signal-to-noise and distortion ratio (SINAD)80 dB 78 dB 72 dB T otal harmonic distortion (THD)–90 dB –90 dB –76 dB Signal-to-noise ration (SNR)80 dB 78 dB 72 dB Effective number of bits (ENOB)1312.611.6[1] Specifications are for 20 minutes of warm-up time, calibration temperature at 23 °C and input range of ±10 V.TEST CONDITIONS[2] DUT setting at ±10 V bipolar.Analog Output Measurement [1]Model NumberU2355A/U2356AU2331AFunction 23 °C ± 5 °C0 °C to 18 °C 28 °C to 45 °C 23 °C ± 5 °C0 °C to 18 °C 28 °C to 45 °C Offset Error ±1 mV ±4 mV ±1.5 mV ±3 mV Gain Error ±4 mV ±5 mV±4 mV ±5 mVSlew rate 19 V/µs19 V/µsRise time 0.7 µs 0.8 µs 0.7 µs 0.8 µs Fall time0.7 µs 0.8 µs0.7 µs 0.8 µsSettling time to 1% output error 4 µs 4 µs Driving capability 5 mA 5 mA Glitch energy5 ns-V(Typical),80 ns-V (Maximum)5 ns-V(Typical),80 ns-V (Maximum)Dynamic Range TestModel Number Test Conditions [2]SFDR, THD, SINAD, SNR, ENOBU2351A U2352A U2355A Sampling rate:Fundamental frequency:Number of points:Fundamental input voltage: 250 kSa/s 2.4109 kHz 8192FSR –1 dB FS U2353A U2354A U2356A Sampling rate:Fundamental frequency:Number of points:Fundamental input voltage:500 kSa/s 4.974 kHz 16384FSR –1 dB FS U2331ASampling rate:Fundamental frequency:Number of points:Fundamental input voltage:3 MSa/s 29.892 kHz 65536FSR –1 dB FSDynamic Range Test Model Number Test Conditions [2] •–3dB small signal bandwidth •1% THD large signal bandwidthU2351A U2352A U2355A Sampling rate:Input voltage:•–3dB small signal bandwidth •1% THD large signal bandwidth 250 kSa/s 10% FSR FSR –1 dB FS U2353A U2354A U2356A Sampling rate:Input voltage:•–3 dB small signal bandwidth •1% THD large signal bandwidth 500 kSa/s 10% FSR FSR –1 dB FS U2331ASampling rate:Input voltage:•–3 dB small signal bandwidth •1% THD large signal bandwidth3 MSa/s 10% FSR FSR –1 dB FSGENERAL SPECIFICATIONSREMOTE INTERFACE USB 2.0 High Speed USBTMC Class Device POWER CONSUMPTION +12 VDC, 550 mA maximumOPERATING ENVIRONMENTOperating temperature from 0 °C to +55 °CRelative humidity at 15% to 85% RH (non-condensing) Altitude up to 4600 meters STORAGE COMPLIANCE –20 °C to +70 °CSAFETY COMPLIANCE Certified with:•IEC 61010-1:2001/EN 61010-1:2001 (2nd Edition)•USA: UL61010-1: 2004•Canada: CSA C22.2 No.61010-1:2004EMC COMPLIANCE Certified with:•IEC/EN 61326-1 1998•CISPR 11: 1990/EN55011:1991 , Group 1, Class A •CANADA: ICES-001: 1998•Australia/New Zealand: AS/NZS 2064.1SHOCK and VIBRATION T ested to IEC/EN 60068-2IO CONNECTOR68-pin female VHDCI TypeDIMENSION (WxDxH)•120 mm x 182.40 mm x 44 mm (with plastic casing)•105 mm x 174.54 mm x 25 mm (without plastic casing)WEIGHT•565 g (with plastic casing)•400 g (without plastic casing)WARRANTY One yearStandard Shipped Components:•USB Interface Cable•L-Mount Kit (used with modular instrument chasis) •Quick Start G uide •Certificate of Calibration (CoC) •Product Reference CD-ROM•Agilent IO Libraries Suite 14.2 CD-ROMPRODUCT OVERVIEWFRONT VIEWREAR VIEWTOP VIEW120 mmSOFTWARE REQUIREMENTSAgilent connectivity software included Agilent IO Libraries Suite 14.2Minimum system requirements (IO libraries and drivers)PC hardware 500 MHz Pentium III or higher, 256 MB RAM,40 GB hard disk space, CD-ROM drive Operating System Windows 2000 and above Computer Interface USB 2.0 high SpeedSoftware driver : IVI-COMCompatible with programming environments:Agilent VEE, Agilent T&M Toolkit Microsoft Visual , C/C++ Visual Basic 6 LabVIEW MATLABOptional Accessories:•U2901A - Terminal Board with SCSI-II 68 pin connector with 1 meter cable •U2902A - Terminal Board with SCSI-II 68 pin connector with 2 meter cable •U2781A 6-slot USB Modular Instrument Chassis182.40 mmAgilent Technologies’ Test and Measurement Support, Services, and AssistanceAgilent Technologies aims to maximize the value you receive, while minimizing your risk and problems. We strive to ensure that you get the test and measurement capabilities you paid for and obtain the support you need. Our extensive support resources and services can help you choose the right Agilent products for your applications and apply them successfully. Every instrument and system we sell has a global warranty. Two concepts underlie Agilent’s overall support policy: “Our Promise” and “Your Advantage.”Our PromiseOur Promise means your Agilent test and measurement equipment will meet its advertised performance and functionality. When you are choosing new equipment, we will help you with product information, including realistic performance specifications and practical recommendations from experienced test engineers. When you receive your new Agilent equipment, we can help verify that it works properly and help with initial product operation. Your AdvantageYour Advantage means that Agilent offers a wide range of additional expert test and measurement services, which you can purchase according to your unique technical and business needs. Solve problems efficiently and gain a competitive edge by contracting with us for calibration, extra-cost upgrades, out-of-warranty repairs, and on-site education and training, as well as design, system integration, project management, and other professional engineering services. Experienced Agilent engineers and technicians worldwide can help you maximize your productivity, optimize the return on investment of your Agilent instruments and systems, and obtain dependable measurement accuracy for the life of those products.Agilent Email Updates/find/emailupdatesGet the latest information on the products and applications you select.Agilent Direct/find/agilentdirectQuickly choose and use your test equipment solutions with confidence.For more information on Agilent Technologies’ products, applications or services, please con-tact your local Agilent office. The complete list is available at:/find/contactusPhone or FaxUnited States:(tel) 800 829 4444(fax) 800 829 4433Canada:(tel) 877 894 4414(fax) 800 746 4866China:(tel) 800 810 0189(fax) 800 820 2816Europe:(tel) 31 20 547 2111Japan:(tel) (81) 426 56 7832(fax) (81) 426 56 7840Korea:(tel) (080) 769 0800(fax) (080) 769 0900Latin America:(tel) (305) 269 7500Taiwan:(tel) 0800 047 866(fax) 0800 286 331Other Asia Pacific Countries:(tel) (65) 6375 8100(fax) (65) 6755 0042Email:*****************Product specifications and descriptions in this document subject to change without notice.© Agilent Technologies, Inc. 2006Printed in USA, 29 September, 20065989-5626ENAgilent Technologies。

3GPP协议-36521-1-e40_s00-s05

3GPP TS 36.521-1 V14.4.0 (2017-09)Technical Specification3rd Generation Partnership Project; Technical Specification Group Radio Access Network; Evolved Universal Terrestrial Radio Access (E-UTRA);User Equipment (UE) conformance specification;Radio transmission and reception;Part 1: Conformance Testing(Release 14)The present document has been developed within the 3rd Generation Partnership Project (3GPP TM) and may be further elaborated for the purposes of 3GPP.KeywordsUMTS LTE3GPPPostal address3GPP support office address650 Route des Lucioles - Sophia AntipolisValbonne - FRANCETel.: +33 4 92 94 42 00 Fax: +33 4 93 65 47 16InternetCopyright NotificationNo part may be reproduced except as authorized by written permission.The copyright and the foregoing restriction extend to reproduction in all media.© 2017, 3GPP Organizational Partners (ARIB, ATIS, CCSA, ETSI, TSDSI, TTA, TTC).All rights reserved.UMTS™ is a Trade Mark of ETSI registered for the benefit of its members3GPP™ is a Trade Mark of ETSI registered for the benefit of its Members and of the 3GPP Organizational Partners LTE™ is a Trade Mark of ETSI registered for the benefit of its Members a nd of the 3GPP Organizational Partners GSM® and the GSM logo are registered and owned by the GSM AssociationContentsForeword (92)Introduction (92)1Scope (93)2References (94)3Definitions, symbols and abbreviations (96)3.1Definitions (96)3.2Symbols (98)3.3Abbreviations (100)4General (103)4.1Categorization of test requirements in CA, UL-MIMO, ProSe, Dual Connectivity, UE category 0, UEcategory M1, UE category 1bis, UE category NB1 and V2X Communication (104)4.2RF requirements in later releases (105)5Frequency bands and channel arrangement (106)5.1General (106)5.2Operating bands (106)5.2A Operating bands for CA (108)5.2B Operating bands for UL-MIMO (116)5.2C Operating bands for Dual Connectivity (116)5.2D Operating bands for ProSe (117)5.2E Operating bands for UE category 0 and UE category M1 (118)5.2F Operating bands for UE category NB1 (118)5.2G Operating bands for V2X Communication (118)5.3TX–RX frequency separation (119)5.3A TX–RX frequency separation for CA (120)5.4Channel arrangement (120)5.4.1Channel spacing (120)5.4.1A Channel spacing for CA (121)5.4.1F Channel spacing for UE category NB1 (121)5.4.2Channel bandwidth (121)5.4.2.1Channel bandwidths per operating band (122)5.4.2A Channel bandwidth for CA (124)5.4.2A.1Channel bandwidths per operating band for CA (126)5.4.2B Channel bandwidth for UL-MIMO (171)5.4.2B.1Channel bandwidths per operating band for UL- MIMO (171)5.4.2C Channel bandwidth for Dual Connectivity (171)5.4.2D Channel bandwidth for ProSe (171)5.4.2D.1Channel bandwidths per operating band for ProSe (171)5.4.2F Channel bandwidth for category NB1 (172)5.4.2G Channel bandwidth for V2X Communication (173)5.4.2G.1Channel bandwidths per operating band for V2X Communication (173)5.4.3Channel raster (174)5.4.3A Channel raster for CA (175)5.4.3F Channel raster for UE category NB1 (175)5.4.4Carrier frequency and EARFCN (175)5.4.4F Carrier frequency and EARFCN for category NB1 (177)6Transmitter Characteristics (179)6.1General (179)6.2Transmit power (180)6.2.1Void (180)6.2.2UE Maximum Output Power (180)6.2.2.1Test purpose (180)6.2.2.4Test description (182)6.2.2.4.1Initial condition (182)6.2.2.4.2Test procedure (183)6.2.2.4.3Message contents (183)6.2.2.5Test requirements (183)6.2.2_1Maximum Output Power for HPUE (185)6.2.2_1.1Test purpose (185)6.2.2_1.2Test applicability (185)6.2.2_1.3Minimum conformance requirements (185)6.2.2_1.4Test description (185)6.2.2_1.5Test requirements (186)6.2.2A UE Maximum Output Power for CA (187)6.2.2A.0Minimum conformance requirements (187)6.2.2A.1UE Maximum Output Power for CA (intra-band contiguous DL CA and UL CA) (189)6.2.2A.1.1Test purpose (189)6.2.2A.1.2Test applicability (189)6.2.2A.1.3Minimum conformance requirements (189)6.2.2A.1.4Test description (189)6.2.2A.1.5Test Requirements (191)6.2.2A.2UE Maximum Output Power for CA (inter-band DL CA and UL CA) (192)6.2.2A.2.1Test purpose (192)6.2.2A.2.2Test applicability (192)6.2.2A.2.3Minimum conformance requirements (192)6.2.2A.2.4Test description (192)6.2.2A.2.5Test Requirements (194)6.2.2A.3UE Maximum Output Power for CA (intra-band non-contiguous DL CA and UL CA) (196)6.2.2A.4.1UE Maximum Output Power for CA (intra-band contiguous 3DL CA and 3UL CA) (196)6.2.2A.4.1.1Test purpose (196)6.2.2A.4.1.2Test applicability (196)6.2.2A.4.1.3Minimum conformance requirements (196)6.2.2A.4.1.4Test description (196)6.2.2A.4.1.5Test Requirements (198)6.2.2A.4.2UE Maximum Output Power for CA (inter-band 3DL CA and 3UL CA) (198)6.2.2A.4.2.1Test purpose (199)6.2.2A.4.2.2Test applicability (199)6.2.2A.4.2.3Minimum conformance requirements (199)6.2.2A.4.2.4Test description (199)6.2.2A.4.2.5Test Requirements (201)6.2.2B UE Maximum Output Power for UL-MIMO (201)6.2.2B.1Test purpose (201)6.2.2B.2Test applicability (202)6.2.2B.3Minimum conformance requirements (202)6.2.2B.4Test description (204)6.2.2B.4.1Initial condition (204)6.2.2B.4.2Test procedure (205)6.2.2B.4.3Message contents (205)6.2.2B.5Test requirements (205)6.2.2B_1HPUE Maximum Output Power for UL-MIMO (207)6.2.2B_1.1Test purpose (207)6.2.2B_1.2Test applicability (207)6.2.2B_1.3Minimum conformance requirements (207)6.2.2B_1.4Test description (207)6.2.2B_1.5Test requirements (208)6.2.2C 2096.2.2D UE Maximum Output Power for ProSe (209)6.2.2D.0Minimum conformance requirements (209)6.2.2D.1UE Maximum Output Power for ProSe Discovery (209)6.2.2D.1.1Test purpose (209)6.2.2D.1.2Test applicability (209)6.2.2D.1.3Minimum Conformance requirements (209)6.2.2D.2UE Maximum Output Power for ProSe Direct Communication (211)6.2.2D.2.1Test purpose (211)6.2.2D.2.2Test applicability (211)6.2.2D.2.3Minimum conformance requirements (211)6.2.2D.2.4Test description (211)6.2.2E UE Maximum Output Power for UE category 0 (212)6.2.2E.1Test purpose (212)6.2.2E.2Test applicability (212)6.2.2E.3Minimum conformance requirements (212)6.2.2E.4Test description (212)6.2.2E.4.3Message contents (213)6.2.2E.5Test requirements (213)6.2.2EA UE Maximum Output Power for UE category M1 (215)6.2.2EA.1Test purpose (215)6.2.2EA.2Test applicability (215)6.2.2EA.3Minimum conformance requirements (215)6.2.2EA.4Test description (216)6.2.2EA.4.3Message contents (217)6.2.2EA.5Test requirements (217)6.2.2F UE Maximum Output Power for category NB1 (218)6.2.2F.1Test purpose (218)6.2.2F.2Test applicability (218)6.2.2F.3Minimum conformance requirements (218)6.2.2F.4Test description (219)6.2.2F.4.1Initial condition (219)6.2.2F.4.2Test procedure (220)6.2.2F.4.3Message contents (220)6.2.2F.5Test requirements (220)6.2.2G UE Maximum Output Power for V2X Communication (221)6.2.2G.1UE Maximum Output Power for V2X Communication / Non-concurrent with E-UTRA uplinktransmission (221)6.2.2G.1.1Test purpose (221)6.2.2G.1.2Test applicability (221)6.2.2G.1.3Minimum conformance requirements (221)6.2.2G.1.4Test description (222)6.2.2G.1.4.1Initial conditions (222)6.2.2G.1.4.2Test procedure (222)6.2.2G.1.4.3Message contents (222)6.2.2G.1.5Test requirements (223)6.2.2G.2UE Maximum Output Power for V2X Communication / Simultaneous E-UTRA V2X sidelinkand E-UTRA uplink transmission (223)6.2.2G.2.1Test purpose (223)6.2.2G.2.2Test applicability (223)6.2.2G.2.3Minimum conformance requirements (223)6.2.2G.2.4Test description (224)6.2.2G.2.4.1Initial conditions (224)6.2.2G.2.4.2Test procedure (225)6.2.2G.2.4.3Message contents (226)6.2.2G.2.5Test requirements (226)6.2.3Maximum Power Reduction (MPR) (226)6.2.3.1Test purpose (226)6.2.3.2Test applicability (226)6.2.3.3Minimum conformance requirements (227)6.2.3.4Test description (227)6.2.3.4.1Initial condition (227)6.2.3.4.2Test procedure (228)6.2.3.4.3Message contents (228)6.2.3.5Test requirements (229)6.2.3_1Maximum Power Reduction (MPR) for HPUE (231)6.2.3_1.1Test purpose (231)6.2.3_1.4Test description (232)6.2.3_1.5Test requirements (232)6.2.3_2Maximum Power Reduction (MPR) for Multi-Cluster PUSCH (232)6.2.3_2.1Test purpose (232)6.2.3_2.2Test applicability (232)6.2.3_2.3Minimum conformance requirements (233)6.2.3_2.4Test description (233)6.2.3_2.4.1Initial condition (233)6.2.3_2.4.2Test procedure (234)6.2.3_2.4.3Message contents (234)6.2.3_2.5Test requirements (234)6.2.3_3Maximum Power Reduction (MPR) for UL 64QAM (235)6.2.3_3.1Test purpose (236)6.2.3_3.2Test applicability (236)6.2.3_3.3Minimum conformance requirements (236)6.2.3_3.4Test description (236)6.2.3_3.4.1Initial condition (236)6.2.3_3.4.2Test procedure (237)6.2.3_3.4.3Message contents (237)6.2.3_3.5Test requirements (238)6.2.3_4Maximum Power Reduction (MPR) for Multi-Cluster PUSCH with UL 64QAM (240)6.2.3_4.1Test purpose (240)6.2.3_4.2Test applicability (240)6.2.3_4.3Minimum conformance requirements (240)6.2.3_4.4Test description (241)6.2.3_4.4.1Initial condition (241)6.2.3_4.4.2Test procedure (242)6.2.3_4.4.3Message contents (242)6.2.3_4.5Test requirements (242)6.2.3A Maximum Power Reduction (MPR) for CA (243)6.2.3A.1Maximum Power Reduction (MPR) for CA (intra-band contiguous DL CA and UL CA) (243)6.2.3A.1.1Test purpose (243)6.2.3A.1.2Test applicability (243)6.2.3A.1.3Minimum conformance requirements (244)6.2.3A.1.4Test description (245)6.2.3A.1.5Test Requirements (248)6.2.3A.1_1Maximum Power Reduction (MPR) for CA (intra-band contiguous DL CA and UL CA) for UL64QAM (250)6.2.3A.1_1.1Test purpose (251)6.2.3A.1_1.2Test applicability (251)6.2.3A.1_1.3Minimum conformance requirements (251)6.2.3A.1_1.4Test description (252)6.2.3A.1_1.5Test requirement (254)6.2.3A.2Maximum Power Reduction (MPR) for CA (inter-band DL CA and UL CA) (255)6.2.3A.2.1Test purpose (255)6.2.3A.2.2Test applicability (255)6.2.3A.2.3Minimum conformance requirements (255)6.2.3A.2.4Test description (256)6.2.3A.2.5Test Requirements (260)6.2.3A.2_1Maximum Power Reduction (MPR) for CA (inter-band DL CA and UL CA) for UL 64QAM (263)6.2.3A.2_1.1Test purpose (263)6.2.3A.2_1.2Test applicability (263)6.2.3A.2_1.3Minimum conformance requirements (263)6.2.3A.2_1.4Test description (264)6.2.3A.2_1.5Test Requirements (266)6.2.3A.3Maximum Power Reduction (MPR) for CA (intra-band non-contiguous DL CA and UL CA) (267)6.2.3A.3.1Test purpose (267)6.2.3A.3.2Test applicability (267)6.2.3A.3.3Minimum conformance requirements (268)6.2.3A.3.4Test description (268)6.2.3A.3_1Maximum Power Reduction (MPR) for CA (intra-band non-contiguous DL CA and UL CA) forUL 64QAM (270)6.2.3A.3_1.1Test purpose (270)6.2.3A.3_1.2Test applicability (270)6.2.3A.3_1.3Minimum conformance requirements (270)6.2.3A.3_1.4Test description (271)6.2.3A.3_1.5Test Requirements (272)6.2.3B Maximum Power Reduction (MPR) for UL-MIMO (272)6.2.3B.1Test purpose (272)6.2.3B.2Test applicability (272)6.2.3B.3Minimum conformance requirements (273)6.2.3B.4Test description (273)6.2.3B.4.1Initial condition (273)6.2.3B.4.2Test procedure (274)6.2.3B.4.3Message contents (275)6.2.3B.5Test requirements (275)6.2.3D UE Maximum Output Power for ProSe (277)6.2.3D.0Minimum conformance requirements (277)6.2.3D.1Maximum Power Reduction (MPR) for ProSe Discovery (278)6.2.3D.1.1Test purpose (278)6.2.3D.1.2Test applicability (278)6.2.3D.1.3Minimum conformance requirements (278)6.2.3D.1.4Test description (278)6.2.3D.1.4.1Initial condition (278)6.2.3D.1.4.2Test procedure (279)6.2.3D.1.4.3Message contents (279)6.2.3D.1.5Test requirements (280)6.2.3D.2Maximum Power Reduction (MPR) ProSe Direct Communication (281)6.2.3D.2.1Test purpose (282)6.2.3D.2.2Test applicability (282)6.2.3D.2.3Minimum conformance requirements (282)6.2.3D.2.4Test description (282)6.2.3D.2.4.1Initial conditions (282)6.2.3D.2.4.2Test procedure (282)6.2.3D.2.4.3Message contents (282)6.2.3D.2.5Test requirements (282)6.2.3E Maximum Power Reduction (MPR) for UE category 0 (282)6.2.3E.1Test purpose (282)6.2.3E.2Test applicability (282)6.2.3E.3Minimum conformance requirements (282)6.2.3E.4Test description (282)6.2.3E.4.1Initial condition (282)6.2.3E.4.2Test procedure (283)6.2.3E.4.3Message contents (283)6.2.3E.5Test requirements (283)6.2.3EA Maximum Power Reduction (MPR) for UE category M1 (284)6.2.3EA.1Test purpose (284)6.2.3EA.2Test applicability (284)6.2.3EA.3Minimum conformance requirements (284)6.2.3EA.4Test description (285)6.2.3EA.4.1Initial condition (285)6.2.3EA.4.2Test procedure (287)6.2.3EA.4.3Message contents (287)6.2.3EA.5Test requirements (287)6.2.3F Maximum Power Reduction (MPR) for category NB1 (290)6.2.3F.1Test purpose (290)6.2.3F.2Test applicability (290)6.2.3F.3Minimum conformance requirements (290)6.2.3F.4Test description (291)6.2.3F.4.1Initial condition (291)6.2.3F.5Test requirements (292)6.2.3G Maximum Power Reduction (MPR) for V2X communication (292)6.2.3G.1Maximum Power Reduction (MPR) for V2X Communication / Power class 3 (293)6.2.3G.1.1Maximum Power Reduction (MPR) for V2X Communication / Power class 3 / Contiguousallocation of PSCCH and PSSCH (293)6.2.3G.1.1.1Test purpose (293)6.2.3G.1.1.2Test applicability (293)6.2.3G.1.1.3Minimum conformance requirements (293)6.2.3G.1.1.4Test description (293)6.2.3G.1.1.4.1Initial condition (293)6.2.3G.1.1.4.2Test procedure (294)6.2.3G.1.1.4.3Message contents (294)6.2.3G.1.1.5Test Requirements (294)6.2.3G.1.2 2956.2.3G.1.3Maximum Power Reduction (MPR) for V2X Communication / Power class 3 / SimultaneousE-UTRA V2X sidelink and E-UTRA uplink transmission (295)6.2.3G.1.3.1Test purpose (295)6.2.3G.1.3.2Test applicability (295)6.2.3G.1.3.3Minimum conformance requirements (295)6.2.3G.1.3.4Test description (295)6.2.3G.1.3.4.1Initial conditions (295)6.2.3G.1.3.4.2Test procedure (296)6.2.3G.1.3.4.3Message contents (297)6.2.3G.1.3.5Test requirements (297)6.2.4Additional Maximum Power Reduction (A-MPR) (297)6.2.4.1Test purpose (297)6.2.4.2Test applicability (297)6.2.4.3Minimum conformance requirements (298)6.2.4.4Test description (310)6.2.4.4.1Initial condition (310)6.2.4.4.2Test procedure (339)6.2.4.4.3Message contents (339)6.2.4.5Test requirements (344)6.2.4_1Additional Maximum Power Reduction (A-MPR) for HPUE (373)6.2.4_1.2Test applicability (374)6.2.4_1.3Minimum conformance requirements (374)6.2.4_1.4Test description (375)6.2.4_1.5Test requirements (376)6.2.4_2Additional Maximum Power Reduction (A-MPR) for UL 64QAM (378)6.2.4_2.1Test purpose (378)6.2.4_2.2Test applicability (378)6.2.4_2.3Minimum conformance requirements (378)6.2.4_2.4Test description (378)6.2.4_2.4.1Initial condition (378)6.2.4_2.4.2Test procedure (392)6.2.4_2.4.3Message contents (392)6.2.4_2.5Test requirements (392)6.2.4_3Additional Maximum Power Reduction (A-MPR) with PUSCH frequency hopping (404)6.2.4_3.1Test purpose (404)6.2.4_3.2Test applicability (404)6.2.4_3.3Minimum conformance requirements (405)6.2.4_3.4Test description (405)6.2.4_3.5Test requirements (406)6.2.4A Additional Maximum Power Reduction (A-MPR) for CA (407)6.2.4A.1Additional Maximum Power Reduction (A-MPR) for CA (intra-band contiguous DL CA and ULCA) (407)6.2.4A.1.1Test purpose (407)6.2.4A.1.2Test applicability (407)6.2.4A.1.3Minimum conformance requirements (407)6.2.4A.1.3.5A-MPR for CA_NS_05 for CA_38C (411)6.2.4A.1.4Test description (413)6.2.4A.1.5Test requirements (419)6.2.4A.1_1Additional Maximum Power Reduction (A-MPR) for CA (intra-band contiguous DL CA and ULCA) for UL 64QAM (425)6.2.4A.1_1.1Test purpose (425)6.2.4A.1_1.2Test applicability (425)6.2.4A.1_1.3Minimum conformance requirements (426)6.2.4A.1_1.3.5A-MPR for CA_NS_05 for CA_38C (429)6.2.4A.1_1.3.6A-MPR for CA_NS_06 for CA_7C (430)6.2.4A.1_1.3.7A-MPR for CA_NS_07 for CA_39C (431)6.2.4A.1_1.3.8A-MPR for CA_NS_08 for CA_42C (432)6.2.4A.1_1.4Test description (432)6.2.4A.1_1.5Test requirements (437)6.2.4A.2Additional Maximum Power Reduction (A-MPR) for CA (inter-band DL CA and UL CA) (443)6.2.4A.2.1Test purpose (443)6.2.4A.2.2Test applicability (444)6.2.4A.2.3Minimum conformance requirements (444)6.2.4A.2.4Test description (444)6.2.4A.2.4.1Initial conditions (444)6.2.4A.2.4.2Test procedure (457)6.2.4A.2.4.3Message contents (458)6.2.4A.2.5Test requirements (461)6.2.4A.3Additional Maximum Power Reduction (A-MPR) for CA (intra-band non-contiguous DL CAand UL CA) (466)6.2.4A.3.1Minimum conformance requirements (466)6.2.4A.2_1Additional Maximum Power Reduction (A-MPR) for CA (inter-band DL CA and UL CA) forUL 64QAM (466)6.2.4A.2_1.1Test purpose (466)6.2.4A.2_1.2Test applicability (466)6.2.4A.2_1.3Minimum conformance requirements (467)6.2.4A.2_1.4Test description (467)6.2.4A.2_1.4.1Initial conditions (467)6.2.4A.2_1.4.2Test procedure (479)6.2.4A.2_1.4.3Message contents (480)6.2.4A.2_1.5Test requirements (480)6.2.4B Additional Maximum Power Reduction (A-MPR) for UL-MIMO (484)6.2.4B.1Test purpose (484)6.2.4B.2Test applicability (485)6.2.4B.3Minimum conformance requirements (485)6.2.4B.4Test description (485)6.2.4B.4.1Initial condition (485)6.2.4B.4.2Test procedure (508)6.2.4B.4.3Message contents (508)6.2.4B.5Test requirements (508)6.2.4E Additional Maximum Power Reduction (A-MPR) for UE category 0 (530)6.2.4E.1Test purpose (530)6.2.4E.2Test applicability (531)6.2.4E.3Minimum conformance requirements (531)6.2.4E.4Test description (531)6.2.4E.4.1Initial condition (531)6.2.4E.4.2Test procedure (535)6.2.4E.4.3Message contents (535)6.2.4E.5Test requirements (536)6.2.4EA Additional Maximum Power Reduction (A-MPR) for UE category M1 (542)6.2.4EA.1Test purpose (542)6.2.4EA.2Test applicability (542)6.2.4EA.3Minimum conformance requirements (543)6.2.4EA.4Test description (544)6.2.4EA.4.1Initial condition (544)6.2.4EA.4.2Test procedure (552)6.2.4G Additional Maximum Power Reduction (A-MPR) for V2X Communication (562)6.2.4G.1Additional Maximum Power Reduction (A-MPR) for V2X Communication / Non-concurrentwith E-UTRA uplink transmissions (562)6.2.4G.1.1Test purpose (562)6.2.4G.1.2Test applicability (562)6.2.4G.1.3Minimum conformance requirements (563)6.2.4G.1.4Test description (563)6.2.4G.1.4.1Initial condition (563)6.2.4G.1.4.2Test procedure (564)6.2.4G.1.4.3Message contents (564)6.2.4G.1.5Test Requirements (564)6.2.5Configured UE transmitted Output Power (564)6.2.5.1Test purpose (564)6.2.5.2Test applicability (564)6.2.5.3Minimum conformance requirements (564)6.2.5.4Test description (594)6.2.5.4.1Initial conditions (594)6.2.5.4.2Test procedure (595)6.2.5.4.3Message contents (595)6.2.5.5Test requirement (596)6.2.5_1Configured UE transmitted Output Power for HPUE (596)6.2.5_1.1Test purpose (596)6.2.5_1.2Test applicability (597)6.2.5_1.3Minimum conformance requirements (597)6.2.5_1.4Test description (597)6.2.5_1.4.1Initial conditions (597)6.2.5_1.4.2Test procedure (597)6.2.5_1.4.3Message contents (597)6.2.5_1.5Test requirement (598)6.2.5A Configured transmitted power for CA (599)6.2.5A.1Configured UE transmitted Output Power for CA (intra-band contiguous DL CA and UL CA) (599)6.2.5A.1.1Test purpose (599)6.2.5A.1.2Test applicability (599)6.2.5A.1.3Minimum conformance requirements (599)6.2.5A.1.4Test description (601)6.2.5A.1.5Test requirement (602)6.2.5A.2Void (603)6.2.5A.3Configured UE transmitted Output Power for CA (inter-band DL CA and UL CA) (603)6.2.5A.3.1Test purpose (603)6.2.5A.3.2Test applicability (603)6.2.5A.3.3Minimum conformance requirements (603)6.2.5A.3.4Test description (605)6.2.5A.3.5Test requirement (606)6.2.5A.4Configured UE transmitted Output Power for CA (intra-band non-contiguous DL CA and ULCA) (607)6.2.5A.4.1Test purpose (607)6.2.5A.4.2Test applicability (607)6.2.5A.4.3Minimum conformance requirements (607)6.2.5A.4.4Test description (608)6.2.5A.4.5Test requirement (610)6.2.5B Configured UE transmitted Output Power for UL-MIMO (611)6.2.5B.1Test purpose (611)6.2.5B.2Test applicability (611)6.2.5B.3Minimum conformance requirements (611)6.2.5B.4Test description (612)6.2.5B.4.1Initial conditions (612)6.2.5B.4.2Test procedure (612)6.2.5B.4.3Message contents (613)6.2.5B.5Test requirement (613)6.2.5E Configured UE transmitted Output Power for UE category 0 (614)6.2.5E.4.1Initial conditions (614)6.2.5E.4.2Test procedure (614)6.2.5E.4.3Message contents (614)6.2.5E.5Test requirement (615)6.2.5EA Configured UE transmitted Power for UE category M1 (615)6.2.5EA.1Test purpose (615)6.2.5EA.2Test applicability (615)6.2.5EA.3Minimum conformance requirements (615)6.2.5EA.4Test description (616)6.2.5EA.4.1Initial condition (616)6.2.5EA.4.2Test procedure (617)6.2.5EA.4.3Message contents (617)6.2.5EA.5Test requirements (617)6.2.5F Configured UE transmitted Output Power for UE category NB1 (618)6.2.5F.1Test purpose (618)6.2.5F.2Test applicability (618)6.2.5F.3Minimum conformance requirements (618)6.2.5F.4Test description (619)6.2.5F.4.1Initial conditions (619)6.2.5F.4.2Test procedure (620)6.2.5F.4.3Message contents (620)6.2.5F.5Test requirement (620)6.2.5G Configured UE transmitted Output Power for V2X Communication (620)6.2.5G.1Configured UE transmitted Output Power for V2X Communication / Non-concurrent with E-UTRA uplink transmission (621)6.2.5G.1.1Test purpose (621)6.2.5G.1.2Test applicability (621)6.2.5G.1.3Minimum conformance requirements (621)6.2.5G.1.4Test description (622)6.2.5G.1.4.1Initial conditions (622)6.2.5G.1.4.2Test procedure (622)6.2.5G.1.4.3Message contents (622)6.2.5G.1.5Test requirements (622)6.2.5G.2Configured UE transmitted Output Power for V2X Communication / Simultaneous E-UTRAV2X sidelink and E-UTRA uplink transmission (622)6.2.5G.2.1Test purpose (623)6.2.5G.2.2Test applicability (623)6.2.5G.2.3Minimum conformance requirements (623)6.2.5G.2.4Test description (625)6.2.5G.2.4.1Initial conditions (625)6.2.5G.2.4.2Test procedure (626)6.2.5G.2.4.3Message contents (626)6.2.5G.2.5Test requirements (626)6.3Output Power Dynamics (627)6.3.1Void (627)6.3.2Minimum Output Power (627)6.3.2.1Test purpose (627)6.3.2.2Test applicability (627)6.3.2.3Minimum conformance requirements (627)6.3.2.4Test description (627)6.3.2.4.1Initial conditions (627)6.3.2.4.2Test procedure (628)6.3.2.4.3Message contents (628)6.3.2.5Test requirement (628)6.3.2A Minimum Output Power for CA (629)6.3.2A.0Minimum conformance requirements (629)6.3.2A.1Minimum Output Power for CA (intra-band contiguous DL CA and UL CA) (629)6.3.2A.1.1Test purpose (629)6.3.2A.1.4.2Test procedure (631)6.3.2A.1.4.3Message contents (631)6.3.2A.1.5Test requirements (631)6.3.2A.2Minimum Output Power for CA (inter-band DL CA and UL CA) (631)6.3.2A.2.1Test purpose (631)6.3.2A.2.2Test applicability (632)6.3.2A.2.3Minimum conformance requirements (632)6.3.2A.2.4Test description (632)6.3.2A.2.4.1Initial conditions (632)6.3.2A.2.4.2Test procedure (633)6.3.2A.2.4.3Message contents (633)6.3.2A.2.5Test requirements (633)6.3.2A.3Minimum Output Power for CA (intra-band non-contiguous DL CA and UL CA) (634)6.3.2A.3.1Test purpose (634)6.3.2A.3.2Test applicability (634)6.3.2A.3.3Minimum conformance requirements (634)6.3.2A.3.4Test description (634)6.3.2A.3.4.1Initial conditions (634)6.3.2A.3.4.2Test procedure (635)6.3.2A.3.4.3Message contents (635)6.3.2A.3.5Test requirements (635)6.3.2B Minimum Output Power for UL-MIMO (636)6.3.2B.1Test purpose (636)6.3.2B.2Test applicability (636)6.3.2B.3Minimum conformance requirements (636)6.3.2B.4Test description (636)6.3.2B.4.1Initial conditions (636)6.3.2B.4.2Test procedure (637)6.3.2B.4.3Message contents (637)6.3.2B.5Test requirement (637)6.3.2E Minimum Output Power for UE category 0 (638)6.3.2E.1Test purpose (638)6.3.2E.2Test applicability (638)6.3.2E.3Minimum conformance requirements (638)6.3.2E.4Test description (638)6.3.2E.4.1Initial conditions (638)6.3.2E.4.2Test procedure (639)6.3.2E.4.3Message contents (639)6.3.2E.5Test requirement (639)6.3.2EA Minimum Output Power for UE category M1 (639)6.3.2EA.1Test purpose (639)6.3.2EA.2Test applicability (640)6.3.2EA.3Minimum conformance requirements (640)6.3.2EA.4Test description (640)6.3.2EA.4.1Initial condition (640)6.3.2EA.4.2Test procedure (641)6.3.2EA.4.3Message contents (641)6.3.2EA.5Test requirements (641)6.3.2F Minimum Output Power for category NB1 (641)6.3.2F.1Test purpose (641)6.3.2F.2Test applicability (641)6.3.2F.3Minimum conformance requirements (642)6.3.2F.4Test description (642)6.3.2F.4.1Initial conditions (642)6.3.2F.4.2Test procedure (643)6.3.2F.4.3Message contents (643)6.3.2F.5Test requirements (643)6.3.3Transmit OFF power (643)6.3.3.5Test requirement (644)6.3.3A UE Transmit OFF power for CA (644)6.3.3A.0Minimum conformance requirements (644)6.3.3A.1UE Transmit OFF power for CA (intra-band contiguous DL CA and UL CA) (645)6.3.3A.1.1Test purpose (645)6.3.3A.1.2Test applicability (645)6.3.3A.1.3Minimum conformance requirements (645)6.3.3A.1.4Test description (645)6.3.3A.1.5Test Requirements (645)6.3.3A.2UE Transmit OFF power for CA (inter-band DL CA and UL CA) (646)6.3.3A.2.1Test purpose (646)6.3.3A.2.2Test applicability (646)6.3.3A.2.3Minimum conformance requirements (646)6.3.3A.2.4Test description (646)6.3.3A.2.5Test Requirements (646)6.3.3A.3UE Transmit OFF power for CA (intra-band non-contiguous DL CA and UL CA) (646)6.3.3A.3.1Test purpose (646)6.3.3A.3.2Test applicability (646)6.3.3A.3.3Minimum conformance requirements (647)6.3.3A.3.4Test description (647)6.3.3A.3.5Test Requirements (647)6.3.3B UE Transmit OFF power for UL-MIMO (647)6.3.3B.1Test purpose (647)6.3.3B.2Test applicability (647)6.3.3B.3Minimum conformance requirement (647)6.3.3B.4Test description (647)6.3.3B.5Test requirement (648)6.3.3C 6486.3.3D UE Transmit OFF power for ProSe (648)6.3.3D.0Minimum conformance requirements (648)6.3.3D.1UE Transmit OFF power for ProSe Direct Discovery (648)6.3.3D.1.1Test purpose (649)6.3.3D.1.2Test applicability (649)6.3.3D.1.3Minimum Conformance requirements (649)6.3.3D.1.4Test description (649)6.3.3D.1.5Test requirements (650)6.3.3E UE Transmit OFF power for UE category 0 (650)6.3.3E.1Test purpose (650)6.3.3E.2Test applicability (650)6.3.3E.3Minimum conformance requirement (650)6.3.3E.4Test description (651)6.3.3E.5Test requirement (651)6.3.3EA UE Transmit OFF power for UE category M1 (651)6.3.3EA.1Test purpose (651)6.3.3EA.2Test applicability (651)6.3.3EA.3Minimum conformance requirements (651)6.3.3EA.4Test description (651)6.3.3EA.5Test requirements (652)6.3.3F Transmit OFF power for category NB1 (652)6.3.3F.1Test purpose (652)6.3.3F.2Test applicability (652)6.3.3F.3Minimum conformance requirement (652)6.3.3F.4Test description (652)6.3.3F.5Test requirement (652)6.3.4ON/OFF time mask (652)6.3.4.1General ON/OFF time mask (652)6.3.4.1.1Test purpose (652)6.3.4.1.2Test applicability (653)。

TI MC33078 双高速低噪声运放说明书

FEATURES12348765OUT1IN1−IN1+V CC −V CC+OUT2IN2−IN2+D (SOIC), DGK (MSOP), OR P (PDIP) PACKAGE(TOP VIEW)DESCRIPTION/ORDERINGINFORMATIONOUT•Dual-Supply Operation ...±5V to ±18V •Low Noise Voltage ...4.5nV/√Hz •Low Input Offset Voltage ...0.15mV•Low Total Harmonic Distortion ...0.002%•High Slew Rate ...7V/µs•High-Gain Bandwidth Product ...16MHz •High Open-Loop AC Gain ...800at 20kHz •Large Output-Voltage Swing ...14.1V to –14.6V•Excellent Gain and Phase MarginsThe MC33078is a bipolar dual operational amplifier with high-performance specifications for use in quality audio and data-signal applications.This device operates over a wide range of single-and dual-supply voltages and offers low noise,high-gain bandwidth,and high slew rate.Additional features include low total harmonic distortion,excellent phase and gain margins,large output voltage swing with no deadband crossover distortion,and symmetrical sink/source performance.ORDERING INFORMATIONT APACKAGE (1)ORDERABLE PART NUMBER TOP-SIDE MARKING (2)PDIP –PTube of 50MC33078P MC33078P Tube of 75MC33078D SOIC –DM33078–40°C to 85°CReel of 2500MC33078DR Reel of 2500MC33078DGKR VSSOP/MSOP –DGKMY_Reel of 250MC33078DGKT(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at /sc/package.(2)DGK:The actual top-side marking has one additional character that designates the assembly/test site.SYMBOL (EACH AMPLIFIER)Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date.Copyright ©2004–2006,Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.Absolute Maximum Ratings (1)Recommended Operating ConditionsDUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CC+Supply voltage (2)18V V CC–Supply voltage (2)–18V V CC+–V CC–Supply voltage36V Input voltage,either input (2)(3)V CC+or V CC–V Input current (4)±10mADuration of output short circuit (5)UnlimitedD package97θJA Package thermal impedance,junction to free air (6)(7)DGK package 172°C/W P package85T J Operating virtual junction temperature 150°C T stg Storage temperature range–65150°C (1)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)All voltage values,except differential voltages,are with respect to the midpoint between V CC+and V CC–.(3)The magnitude of the input voltage must never exceed the magnitude of the supply voltage.(4)Excessive input current will flow if a differential input voltage in excess of approximately 0.6V is applied between the inputs,unless some limiting resistance is used.(5)The output may be shorted to ground or either power supply.Temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded.(6)Maximum power dissipation is a function of T J (max),θJA ,and T A .The maximum allowable power dissipation at any allowable ambient temperature is P D =(T J (max)–T A )/θJA .Operating at the absolute maximum T J of 150°C can affect reliability.(7)The package thermal impedance is calculated in accordance with JESD 51-7.MINMAX UNIT V CC––5–18Supply voltageV V CC+518T AOperating free-air temperature range–4085°C2Submit Documentation FeedbackElectrical CharacteristicsOperating CharacteristicsV CC–=–15V,V CC+=15V,T A =25°C (unless otherwise noted)PARAMETERTEST CONDITIONSMINTYP MAXUNIT T A =25°C0.152V IO Input offset voltage V O =0,R S =10Ω,V CM =0mV T A =–40°C to 85°C 3Input offset voltage αV IO V O =0,R S =10Ω,V CM =0T A =–40°C to 85°C 2µV/°C temperature coefficient T A =25°C300750I IB Input bias current V O =0,V CM =0nA T A =–40°C to 85°C 800T A =25°C25150I IO Input offset currentV O =0,V CM =0nA T A =–40°C to 85°C175Common-mode input voltage V ICR ∆V IO =5mV,V O =0±13±14V rangeT A =25°C90110Large-signal differential A VDR L ≥2k Ω,V O =±10VdBvoltage amplificationT A =–40°C to 85°C 85V OM+10.7R L =600ΩV OM––11.9V OM+13.213.8V OMMaximum output voltage swing V ID =±1VR L =2k ΩVV OM––13.2–13.7V OM+13.514.1R L =10k ΩV OM––14–14.6CMMR Common-mode rejection ratio V IN =±13V80100dB k SVR (1)Supply-voltage rejection ratio V CC+=5V to 15V,V CC–=–5V to –15V 80105dB Source current 1529I OS Output short-circuit current |V ID |=1V,Output to GND mA Sink current –20–37T A =25°C2.052.5I CC Supply current (per channel)V O =0mA T A =–40°C to 85°C 2.75(1)Measured with V CC ±differentially varied at the same timeV CC–=–15V,V CC+=15V,T A =25°C (unless otherwise noted)PARAMETERTEST CONDITIONSMIN TYP MAXUNIT SR Slew rate at unity gain A VD =1,V IN =–10V to 10V,R L =2k Ω,C L =100pF57V/µs GBW Gain bandwidth product f =100kHz 1016MHz B 1Unity gain frequency Open loop 9MHz C L =0pF –11G m Gain margin R L =2k ΩdB C L =100pF –6C L =0pF 55ΦmPhase margin R L =2k Ωdeg C L =100pF40Amp-to-amp isolation f =20Hz to 20kHz–120dB Power bandwidthV O =27V (PP),R L =2k Ω,THD ≤1%120kHz THD Total harmonic distortion V O =3V rms ,A VD =1,R L =2k Ω,f =20Hz to 20kHz 0.002%z o Open-loop output impedance V O =0,f =9MHz 37Ωr id Differential input resistance V CM =0175k ΩC id Differential input capacitance V CM =012pF V n Equivalent input noise voltage f =1kHz,R S =100Ω 4.5nV/√Hz I nEquivalent input noise currentf =1kHz0.5pA/√Hz3Submit Documentation FeedbackScope x 1= 1.0 M ΩΩNOTE:All capacitors are non-polarized.DUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006Figure 1.Voltage Noise Test Circuit (0.1Hz to 10Hz)4Submit Documentation FeedbackTYPICAL CHARACTERISTICS10020030040050060056789101112131415161718V CC+/–V CC––Supply Voltage –VI I B –I n p u t B i a s C u r r e n t –nA0100200300400500600-15-10-5051015V CM –Common Mode Voltage –VI I B –I n p u t B i a s C u r r e n t –nA1002003004005006007008009001000-55-35-15525456585105125T A –Temperature –°CI I B –I n p u t B i a s C u r r e n t –nA-2-1.5-1-0.500.511.52-55-35-15525456585105125T A –Temperature –°CV I O –I n p u t O f f s e t V o l t a g e –mVINPUT BIAS CURRENTINPUT BIAS CURRENTvsvsCOMMON-MODE VOLTAGESUPPLY VOLTAGEINPUT BIAS CURRENTINPUT OFFSET VOLTAGEvsvsTEMPERATURETEMPERATURE5Submit Documentation Feedback00.20.40.60.811.21.4-55-255356595125T A –Temperature –°CI n p u t C o m m o n -M o d e V o l t a g e L o w P r o x i m i t y t o V C C ––V-1.4-1.2-1-0.8-0.6-0.4-0.20-55-255356595125T A –Temperature –°CI n p u t C o m m o n -M o d e V o l t a g e H i g h P r o x i m i t y t o V C C +–V01234567891000.511.522.533.544.5R L –Load Resistance–k @O u t p u t S a t u r a t i o n V o l t a g eP r o x i m i t y t o V C C ––VW -10-9-8-7-6-5-4-3-2-1000.511.522.533.544.5R L –Load Resistance –k hO u t p u t S a t u r a t i o n V o l t a g e P r o x i m i t y t o V C C +–VW DUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006TYPICAL CHARACTERISTICS (continued)INPUT COMMON-MODE VOLTAGEINPUT COMMON-MODE VOLTAGELOW PROXIMITY TO V CC–HIGH PROXIMITY TO V CC+vsvsTEMPERATURETEMPERATUREOUTPUT SATURATION VOLTAGE PROXIMITY TO V CC+OUTPUT SATURATION VOLTAGE PROXIMITY TO V CC–vsvsLOAD RESISTANCE LOAD RESISTANCE6Submit Documentation Feedback10203040506070-55-35-15525456585105125T A –Temperature –°CI O S –O u t p u t S h o r t -C i r c u i t C u r r e n t –m A012345678910-55-35-15525456585105125T A –Temperature –°CI C C –S u p p l y C u r r e n t –m A01020304050607080901001.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07f –Frequency –HzC M M R –d B1001k 10k 100k 1M 10M 01020304050607080901001101201.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07f –Frequency –HzP S R R –d B1001k 10k 100k 1M10M TYPICAL CHARACTERISTICS (continued)OUTPUT SHORT-CIRCUIT CURRENTSUPPLY CURRENTvsvsTEMPERATURETEMPERATURECMRR PSSR vsvsFREQUENCYFREQUENCY7Submit Documentation Feedback051015202530-55-35-15525456585105125T A –Temperature –°CG B W –G a i n B a n d w i d t h P r o d u c t –M Hz05101520253056789101112131415161718V CC+/–V CC––Supply Voltage –VG B W –G a i n d B a n d w i d t h P r o d u c t –M H z510152025301.E+011.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07f –Frequency –HzV O –O u t p u t V o l t a g e –V1001k 10k 100k 1M 10M 10-20-15-10-50510152056789101112131415161718V CC+/–V CC––Supply Voltage –VV O –O u t p u t V o l t a g e –VDUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006TYPICAL CHARACTERISTICS (continued)GAIN BANDWIDTH PRODUCTGAIN BANDWIDTH PRODUCTvsvsSUPPLY VOLTAGETEMPERATUREOUTPUT VOLTAGEOUTPUT VOLTAGEvsvsSUPPLY VOLTAGEFREQUENCY8Submit Documentation Feedback8085909510010511056789101112131415161718V CC+/–V CC––Supply Voltage –VA V –O p e n -L o o p G a i n –dB80859095100105110115120-55-35-15525456585105125T A –Temperature –°CA V –O p e n -L o o p G a i n –dB1001101201301401501601701801902001.E+01 1.E+02 1.E+031.E+04 1.E+05f –Frequency –HzC r o s s t a l k R e j e c t i o n –d B1k 10k 100k101001.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07f –Frequency –HzZ O –O u t p u t I m p e d a n c e –W1k10k 100k 1M 10MTYPICAL CHARACTERISTICS (continued)OPEN-LOOP GAINOPEN-LOOP GAINvsvsSUPPLY VOLTAGETEMPERATUREOUTPUT IMPEDANCECROSSTALK REJECTIONvsvsFREQUENCYFREQUENCY9Submit Documentation Feedback0.00010.0010.010.111.E+011.E+021.E+031.E+041.E+05f –Frequency –HzT H D –T o t a l H a r m o n i c D i s t o r t i o n –%1k 10k 100k 101000.00010.0010.010.110123456789V O –Output Voltage –V rmsT H D –T o t a l H a r mo n i c D i s t o r t i o n –%234567891056789101112131415161718V CC+/–V CC––Supply Voltage –VS R –S l e w R a t e –V /µs2345678910-55-35-15525456585105125T A –Temperature –°CS R –S l e w R a t e –V /µsDUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006TYPICAL CHARACTERISTICS (continued)TOTAL HARMONIC DISTORTIONTOTAL HARMONIC DISTORTIONvsvsFREQUENCYOUTPUT VOLTAGESLEW RATESLEW RATEvsvsSUPPLY VOLTAGETEMPERATURE10Submit Documentation Feedbackf –Frequency –HzC out –Output Load Capacitance –pF0102030405060708090100101001000C out –Output Load Capacitance –pFO v e r s h o o t –%110100100100010000100000f –Frequency –HzI n p u t V o l t a g e N o i s e 0.1110I n p u t C u r r e n t N o i s e 101k 10k 100k OVERSHOOTINPUT VOLTAGE AND CURRENT NOISEvsvsOUTPUT LOAD CAPACITANCEFREQUENCY11010010001.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06R S –Source Resistance –èI n p u t R e f e r r e d N o i s e V o l t a g e W101001k 10k 100k 1M246810121416010*******10000100000R SD –Differential Source Resistance –èG a i n M a r g i n –d B481216202428323640444852566064P h a s e M a r g i n –d e gW 1k 10k 100k 1000110-22610141822Time –µs-22610141822Time –µsV I –I n p u t V o l t a g e –VMC33078DUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006TYPICAL INPUT REFERRED NOISE VOLTAGEvsSOURCE RESISTANCELARGE SIGNAL TRANSIENT RESPONSELARGE SIGNAL TRANSIENT RESPONSE(A V =1)(A V =–1)-0.50.00.5 1.0 1.5Time–µs-500-400-300-200-100100200300400-5-4-3-2-1012345Time–sMC33078 DUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER2004–REVISED NOVEMBER2006TYPICAL CHARACTERISTICS(continued)SMALL SIGNAL TRANSIENT RESPONSE LOW_FREQUENCY NOISEAPPLICATION INFORMATIONOutput Characteristics250 ns per Division250 ns per Division250 ns per Division0.25V p e r D i v i s i o n250 ns per Division0.25V p e r D i v i s i o n250 ns per Division0.25V p e r D i v i s i o n250 ns per Division0.25V p e r D i v i s i o n5V –5VV OΩMC33078DUAL HIGH-SPEED LOW-NOISE OPERATIONAL AMPLIFIERSLLS633C–OCTOBER 2004–REVISED NOVEMBER 2006All operating characteristics are specified with 100-pF load capacitance.The MC33078can drive higher capacitance loads.However,as the load capacitance increases,the resulting response pole occurs at lower frequencies,causing ringing,peaking,or oscillation.The value of the load capacitance at which oscillation occurs varies from lot to lot.If an application appears to be sensitive to oscillation due to load capacitance,adding a small resistance in series with the load should alleviate the problem (see Figure 2).PULSE RESPONSE PULSE RESPONSE PULSE RESPONSE (R L =600Ω,C L =380pF)(R L =2k Ω,C L =560pF)(R L =10k Ω,C L =590pF)PULSE RESPONSEPULSE RESPONSEPULSE RESPONSE(R O =0Ω,C O =1000pF,R L =2k Ω)(R O =4Ω,C O =1000pF,R L =2k Ω)(R O =35Ω,C O =1000pF,R L =2k Ω)Figure 2.Output CharacteristicsPACKAGING INFORMATION(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement.(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width.Addendum-Page 1Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF MC33078 :•Enhanced Product : MC33078-EPNOTE: Qualified Version Definitions:•Enhanced Product - Supports Defense, Aerospace and Medical ApplicationsAddendum-Page 2TAPE AND REEL INFORMATIONA0B0K0W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSSprocket HolesP1*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1 (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant MC33078DGKR VSSOP DGK 82500330.012.4 5.3 3.3 1.38.012.0Q1MC33078DGKT VSSOP DGK 8250180.012.4 5.3 3.3 1.38.012.0Q1MC33078DRSOICD82500330.012.46.45.22.18.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length (mm)Width (mm)Height (mm) MC33078DGKR VSSOP DGK82500346.0346.035.0 MC33078DGKT VSSOP DGK8250200.0183.025.0 MC33078DR SOIC D8*******.5336.125.0TUBET - Tube*All dimensions are nominalDevice Package Name Package Type Pins SPQ L (mm)W (mm)T (µm) B (mm) MC33078D D SOIC875506.683940 4.32 MC33078D D SOIC87550783940 4.32 MC33078P P PDIP85050613.9711230 4.32PACKAGE OUTLINESOIC - 1.75 mm max heightD0008ASMALL OUTLINE INTEGRATED CIRCUITNOTES:1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M.2. This drawing is subject to change without notice.3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side.4. This dimension does not include interlead flash.5. Reference JEDEC registration MS-012, variation AA.EXAMPLE BOARD LAYOUTSOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUITNOTES: (continued)6. Publication IPC-7351 may have alternate designs.7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.EXAMPLE STENCIL DESIGNSOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUITNOTES: (continued)8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.9. Board assembly site may have different recommendations for stencil design.IMPORTANT NOTICE AND DISCLAIMERTI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements.These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.TI objects to and rejects any additional or different terms you may have proposed.Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023, Texas Instruments Incorporated。

Multisim 11 常用的英文翻译

notconnected=未连接
power=功率
ground=地线
failed to find a pin model=未能找到引脚模型
failed to copy the records=未能复制记录
the component was not saved=元件未保存
the user database is not open=用户数据库未打开
automatic=自动
white=白色
aqua=浅绿色
fuchsia=紫红色
blue=蓝色
yellow=黄色
lime=橙色
red=红色
silver=银色
gray=灰色
purple=紫色
navy=海军蓝
olive=黄褐色
green=绿色
maroon=褐紫色
black=黑色
output module base address=输出模块基址
vco output offset=压控振荡器输出偏移
pd input offset pd=输入偏移
pll input offset=锁相回路输入偏移
initial count value=初步计数值
input frequency division factor=输入频率分频系数
find and replace=搜索和替换
find=查找
s=插入
edit=编辑
functions=函数
standard=标准
redo=重做
undo=撤销
size=大小
color=颜色
italic=斜体
bold=粗

Fluke ScopeMeter 测试仪说明书

Chapter 9 SpecificationsIntroductionPerformance CharacteristicsFLUKE guarantees the properties expressed in numerical values with the stated tolerance. Specified non-tolerance numerical values indicate those that could be nominally expected from the mean of a range of identical ScopeMeter test tools.Environmental DataThe environmental data mentioned in this manual are based on the results of the manufacturer’s verification procedures.Safety CharacteristicsThe test tool has been designed and tested in accordance with Standards ANSI/ISA S82.01-1994, EN 61010.1 (1993) (IEC 1010-1), CAN/CSA-C22.2No.1010.1-92 (including approval), UL3111-1 (including approval) Safety Requirements for Electrical Equipment for Measurement, Control, and Laboratory Use.This manual contains information and warnings that must be followed by the user to ensure safe operation and to keep the instrument in a safe condition. Use of this equipment in a manner not specified by the manufacturer may impair protection provided by the equipment.198187Fluke 192/196/199Users Manual88Dual Input OscilloscopeIsolated Inputs A and B (Vertical)Bandwidth, DC CoupledFLUKE 199.......................................200 MHz (-3 dB)FLUKE 196.......................................100 MHz (-3 dB)FLUKE 192.........................................60 MHz (-3 dB)Lower Frequency Limit, AC Coupledwith 10:1 probe......................................<2 Hz (-3 dB)direct (1:1).............................................<5 Hz (-3 dB)Rise TimeFLUKE 199.......................................................1.7 ns FLUKE 196.......................................................3.5 ns FLUKE 192.......................................................5.8 ns Analog Bandwidth Limiters..............20 MHz and 10 kHz Input Coupling ...................................................AC, DC Polarity................................................Normal, Inverted Sensitivity Rangeswith 10:1 probe............................50 mV to 1000 V/div direct (1:1)......................................5 mV to 100 V/div Trace Positioning Range..............................±4 divisions Input Impedance on BNCDC Coupled.....................1 M Ω (±1 %)//15 pF (±2 pF)Max. Input Voltagewith 10:1 probe......................................600 V CAT III1000 V CAT IIdirect (1:1).............................................300 V CAT III (For detailed specifications, see “Safety ”)Vertical Accuracy....................±(1.5 % + 0.04 range/div)Digitizer Resolution...................8 bits, separate digitizerfor each inputHorizontalMaximum Time Base Speed:FLUKE 199.....................................................5 ns/div FLUKE 196.....................................................5 ns/div FLUKE 192...................................................10 ns/div Minimum Time Base Speed (Scope Record)....2 min/div Real Time Sampling Rate (for both inputs simultaneously)FLUKE199:5 ns to 2 µs /div.................................up to 2.5 GS/s 5 µs to 120 s/div..........................................20 MS/s FLUKE 196:5 ns to 2 µs /div....................................up to 1 GS/s 5 µs to 120 s/div..........................................20 MS/s FLUKE 19210 ns to 2 µs /div..............................up to 500 MS/s 5 µs to 120 s/div..........................................20 MS/sSpecificationsDual Input Oscilloscope989Record LengthScope Record Mode..........27500 points on each input Scope Normal Mode............1000 points on each input Scope Glitch Capture Mode...500 points on each input Glitch Detection5 µs to 120 s/div.......displays glitches as fast as 50 ns Waveform Display...............A, B, A+B, A-B, A*B, A vs BNormal, Average (2,4,8,64 x), Persistence Time Base Accuracy......................................±100 ppmTrigger and DelayTrigger Modes.....................................Automatic, Edge,External, Video, Pulse Width Trigger Delay............................... up to +1000 divisions Pre Trigger View...........................one full screen length Max. Delay...................................................10 secondsAutomatic Connect-and-View TriggerSource...........................................................A, B, EXT Slope.................................................Positive, NegativeEdge TriggerScreen Update..........Free Run, On Trigger, Single Shot Source...........................................................A, B, EXT Slope.................................................Positive, NegativeTrigger Level Control Range.........................±4 divisions Trigger Sensitivity A and BDC to 5 MHz at >5 mV/div........................0.5 divisions DC to 5 MHz at 5 mV/div..............................1 division 200 MHz (FLUKE 199).................................1 division 250 MHz (FLUKE 199)...............................2 divisions 100 MHz (FLUKE 196).................................1 division 150 MHz (FLUKE 196)...............................2 divisions 60 MHz (FLUKE 192)...................................1 division 100 MHz (FLUKE 192)...............................2 divisionsIsolated External TriggerBandwidth...........................................................10 kHz Modes..................................................Automatic, Edge Trigger Levels (DC to 10 kHz).................120 mV, 1.2 VVideo TriggerStandards...........................PAL, PAL+, NTSC, SECAM Modes.....................Lines, Line Select, Field 1 or Field 2Source........................................................................A Polarity...............................................Positive, Negative Sensitivity.....................................0.7 division sync levelFluke 192/196/199Users Manual90Pulse Width TriggerScreen Update...........................On Trigger, Single Shot Trigger Conditions..........<T, >T, ≈T (±10 %), ≠T(±10 %)Source.........................................................................A Polarity...................................Positive or negative pulse Pulse Time Adjustment Range.......1/100 div. to 250 div.with a maximum resolution of 50 ns.Continuous Auto SetAutoranging attenuators and time base, automatic Connect-and-View ™ triggering with automatic source selection.ModesNormal..................................15 Hz to max. bandwidth Low Frequency.......................1 Hz to max. bandwidth Minimum Amplitude A and BDC to 1 MHz.....................................................10 mV 1 MHz to max. bandwidth..................................20 mVAutomatic Capturing Scope ScreensCapacity..........................100 dual input scope Screens For viewing screens, see Replay function.Automatic Scope MeasurementsThe accuracy of all readings is within ± (% of reading +number of counts) from 18 °C to 28 °C. Add 0.1x (specific accuracy) for each °C below 18 °C or above 28 °C. For voltage measurements with 10:1 probe, add probe accuracy unless the probe has been calibrated on the test tool. At least 1.5 waveform period must be visible on the screen.GeneralInputs..................................................................A and B DC Common Mode Rejection (CMRR)................>100 dB AC Common Mode Rejection at 50, 60, or 400 Hz......>60 dBDC Voltage (VDC)Maximum Voltagewith 10:1 probe..................................................1000 V direct (1:1)...........................................................300 V Maximum Resolutionwith 10:1 probe.....................................................1 mV direct (1:1).........................................................100 µV Full Scale Reading........................................1100 counts Accuracy at 5 s to 5 µs/div..................±(1.5 % +5 counts)Normal Mode AC Rejection at 50 or 60 Hz ...........>60 dBSpecificationsAutomatic Scope Measurements991AC Voltage (VAC)Maximum Voltagewith 10:1 probe................................................1000 V direct (1:1).........................................................300 V Maximum Resolutionwith 10:1 probe...................................................1 mV direct (1:1).......................................................100 µV Full Scale Reading.....................................1100 counts AccuracyDC coupled:DC to 60 Hz..............................±(1.5 % +10 counts)AC coupled, low frequencies:50 Hz direct (1:1).....................±(2.1 % + 10 counts)60 Hz direct (1:1).....................±(1.9 % + 10 counts)With the 10:1 probe the low frequency roll off point will be lowered to 2 Hz, which improves the AC accuracy for low frequencies. When possible use DC coupling for maximum accuracy.AC or DC coupled, high frequencies:60 Hz to 20 kHz.......................±(2.5 % + 15 counts)20 kHz to 1 MHz.........................±(5 % + 20 counts)1 MHz to 25 MHz......................±(10 % + 20 counts)For higher frequencies the instrument ’s frequency roll off starts affecting accuracy.Normal Mode DC Rejection...........................>50 dBAll accuracies are valid if:• The waveform amplitude is larger than one division • At least 1.5 waveform period is on the screenAC+DC Voltage (True RMS)Maximum Voltagewith 10:1 probe................................................1000 V direct (1:1).........................................................300 V Maximum Resolutionwith 10:1 probe...................................................1 mV direct (1:1).......................................................100 µV Full Scale Reading.....................................1100 counts AccuracyDC to 60 Hz ...............................±(1.5 % + 10 counts)60 Hz to 20 kHz..........................±(2.5 % + 15 counts)20 kHz to 1 MHz............................±(5 % + 20 counts)1 MHz to 25 MHz ........................±(10 % + 20 counts)For higher frequencies the instrument ’s frequency roll off starts affecting accuracy.Fluke 192/196/199Users Manual92Amperes (AMP)With Optional Current Probe or Current ShuntRanges...........................same as VDC, VAC, VAC+DC Probe Sensitivity................100 µV/A, 1 mV/A, 10 mV/A,100 mV/A, 1 V/A, 10 V/A, and 100 V/A Accuracy ........................same as VDC, VAC, VAC+DC(add current probe or current shunt accuracy)PeakModes.........................Max peak, Min peak, or pk-to-pk Maximum Voltagewith 10:1 probe...............................................1000 V direct (1:1)........................................................300 V Maximum Resolutionwith 10:1 probe................................................10 mV direct (1:1).........................................................1 mV Full Scale Reading.......................................800 counts AccuracyMax peak or Min peak.............................±0.2 division Peak-to-peak..........................................±0.4 divisionFrequency (Hz)Range....................................1.000 Hz to full bandwidth Full Scale Reading....................................9 999 counts with at least 10 waveform periods on screen.Accuracy1 Hz to full bandwidth....................±(0.5 % +2 counts)Duty Cycle (DUTY)Range...................................................4.0 % to 98.0 %Pulse Width (PULSE)Resolution (with GLITCH off).......................1/100 division Full Scale Reading.......................................999 counts Accuracy1 Hz to full bandwidth....................±(0.5 % +2 counts)SpecificationsAutomatic Scope Measurements993PowerPower Factor .....................ratio between Watts and VA Range......................................................0.00 to 1.00Watt.................................RMS reading of multiplicationcorresponding samples of input A (volts)and Input B (amperes)Full Scale Reading ....................................999 counts VA............................................................Vrms x Arms Full Scale Reading ....................................999 counts VA Reactive................................................√((VA)2-W 2)Full Scale Reading ....................................999 countsPhaseRange..........................................-180 to +180 degrees Resolution.......................................................1 degree Accuracy0.1 Hz to 1 MHz........................................±1 degrees 1 MHz to 10 MHz......................................±3 degreesTemperature (TEMP)With Optional Temperature ProbeRanges (°C or °F)...............................-40.0 to +100.0 °-100 to +250 °-100 to +500 °-100 to +1000 °-100 to + 2500 °Probe Sensitivity..........................1 mV/°C and 1 mV/°FDecibel (dB)dBV..............................................dB relative to one volt dBm.................dB relative to one mW in 50 Ω or 600 ΩdB on........................................VDC, VAC, or VAC+DC Accuracy.........................same as VDC, VAC, VAC+DCFluke 192/196/199Users Manual94MeterMeter InputInput Coupling ..........................................................DC Frequency Response.....................DC to 10 kHz (-3 dB)Input Impedance..............1 M Ω(±1 %)//10 pF (±1.5 pF)1000 V CAT II600 V CAT III(For detailed specifications, see “Safety ”)Meter FunctionsRanging....................................................Auto, Manual Modes.................................................Normal, RelativeDMM Measurements on Meter InputsThe accuracy of all measurements is within ± (% of reading + number of counts) from 18 °C to 28 °C.Add 0.1x (specific accuracy) for each °C below 18 °C or above 28 °C.GeneralDC Common Mode Rejection (CMRR)................>100 dB AC Common Mode Rejection at 50, 60, or 400 Hz......>60 dBOhms (Ω)Ranges..............................500.0 Ω, 5.000 k Ω, 50.00 k Ω,500.0 k Ω, 5.000 M Ω, 30.00 M ΩFull Scale Reading500 Ω to 5 M Ω...........................................5000 counts 30 M Ω........................................................3000 counts Accuracy.............................................±(0.6 % +5 counts)Measurement Current.................0.5 mA to 50 nA, ±20 %decreases with increasing ranges Open Circuit Voltage.................................................<4 VContinuity (CONT)Beep.......................................................<50 Ω (±30 Ω)Measurement Current............................0.5 mA, ±20 %Detection of shorts of...........................................≥1 msSpecificationsDMM Measurements on Meter Inputs995DiodeMaximum Voltage Reading....................................2.8 V Open Circuit Voltage..............................................<4 V Accuracy.............................................±(2 % +5 counts)Measurement Current............................0.5 mA, ±20 %Temperature (TEMP)With Optional Temperature ProbeRanges (°C or °F)...............................-40.0 to +100.0 °-100.0 to +250.0 °-100.0 to +500.0 °-100 to +1000 °-100 to + 2500 °Probe Sensitivity..........................1 mV/°C and 1 mV/°FDC Voltage (VDC)Ranges....500.0 mV, 5.000 V, 50.00 V, 500.0 V, 1100 V Full Scale Reading.....................................5000 counts Accuracy..........................................±(0.5 % +5 counts)Normal Mode AC Rejection at 50 or 60 Hz ±1 %>60 dBAC Voltage (VAC)Ranges....500.0 mV, 5.000 V, 50.00 V, 500.0 V, 1100 V Full Scale Reading.....................................5000 counts Accuracy15 Hz to 60 Hz...............................±(1 % +10 counts)60 Hz to 1 kHz.............................±(2.5 % +15 counts)For higher frequencies the frequency roll off of the Meter input starts affecting accuracy.Normal Mode DC Rejection................................>50 dBAC+DC Voltage (True RMS)Ranges....500.0 mV, 5.000 V, 50.00 V, 500.0 V, 1100 V Full Scale Reading.....................................5000 counts AccuracyDC to 60 Hz ...................................±(1 % +10 counts)60 Hz to 1 kHz.............................±(2.5 % +15 counts)For higher frequencies the frequency roll off of the Meter input starts affecting accuracy.All accuracies are valid if the waveform amplitude is larger than 5 % of full scale.Fluke 192/196/199Users Manual96Amperes (AMP)With Optional Current Probe or Current ShuntRanges...........................same as VDC, VAC, VAC+DC Probe Sensitivity................100 µV/A, 1 mV/A, 10 mV/A,100 mV/A, 1 V/A, 10 V/A, and 100 V/A Accuracy ........................same as VDC, VAC, VAC+DC(add current probe or current shunt accuracy)RecorderTrendPlot (Meter or Scope)Chart recorder that plots a graph of min and max values of Meter or Scope measurements over time.Measurement Speed...................> 2.5 measurements/s Time/Div.......................................10 s/div to 20 min/div Record Size................................13500 points per input Recorded Time Span...........................90 min to 8 days Time Reference...................time from start, time of dayScope RecordRecords scope waveforms in deep memory while displaying the waveform in Roll mode.Source...................................................Input A, Input B Max. Sample Speed (10 ms/div to 1 min/div).....20 MS/s Glitch capture (10 ms/div to 1 min/div)..................50 ns Time/Div in normal mode.............10 ms/div to 2 min/div Record Size.................................27500 points per input Recorded Time Span............................11 s to 30 hours Acquisition Modes.....................................Single SweepContinuous Roll External Triggering Time Reference...................time from start, time of dayZoom, Replay and CursorsZoomHorizontal MagnificationScope Record........................................... up to 100x TrendPlot.....................................................up to 50x Scope............................................................up to 8x ReplayDisplays a maximum of 100 captured dual input Scope screens.Replay modes..........Step by Step, Replay as Animation Cursor MeasurementsCursor Modes................................single vertical cursordual vertical cursorsdual horizontal cursors (Scope mode)Markers....................automatic markers at cross points Measurements.....................................value at cursor 1value at cursor 2 difference between values at cursor 1 and 2time between cursorsTime of Day (Recorder modes)Time from Start (Recorder modes)Rise Time MiscellaneousDisplayView Area......................................132 mm (5.2 inches) Backlight...................Cold Cathode Fluorescent (CCFL)Temperature compensated Brightness.............................Power Adapter: 60 cd / m2Batteries: 35 cd / m2 Rechargeable NiMH Batteries:Operating Time...............................................4 hours Charging Time.................................................4 hours Allowable ambienttemperature during charging:.0 to 40 °C (32 to 104 °F) Auto power downtime (battery saving):............5 min, 30 min or disabled Battery Charger / Power Adapter BC190:•BC190/801 European line plug 230 V ±10 %•BC190/803 North American line plug 120 V ±10 %•BC190/804 United Kingdom line plug 230 V ±10 %•BC190/806 Japanese line plug 100 V ±10 %•BC190/807 Australian line plug 230 V ±10 %•BC190/808 Universal switchable adapter 115 V ±10 % or 230 V ±10 %, with plug EN60320-2.2GLine Frequency........................................ 50 and 60 Hz97Users Manual98Probe CalibrationManual pulse adjustment and automatic DC adjustment with probe check.Generator Output....................................3 Vpp / 500 Hzsquare waveMemoryNumber of Scope Memories.......................................10Each memory can contain two waveforms plus corresponding setupsNumber of Recorder Memories....................................2Each memory can contain:• a dual input TrendPlot(2 x 13500 points per input)• a dual input Scope Record (2 x 27500 points per input)• 100 dual input Scope screensMechanicalSize.....................64 x 169 x 254 mm (2.5 x 6.6 x 10 in)Weight..................................................1.95 kg (4.3 lbs)including batteryOptical InterfacePortType.......................................RS-232, optically isolated To Printer...........................supports Epson FX, LQ, andHP Deskjet ®, Laserjet ®, and Postscript• Serial via PM9080 (optically isolated RS-232 Adapter/Cable, optional).• Parallel via PAC91 (optically isolated Print Adapter Cable, optional).To PC/Notebook• Serial via PM9080 (optically isolated RS-232 Adapter/Cable, optional), using SW90W (FlukeView ®softwarefor Windows 95®, 98®, Me ®, 2000® and NT4®).Environmental -PRF-28800F, Class 2TemperatureOperating:battery only.........................0 to 50 °C (32 to 122 °F) power adapter....................0 to 40 °C (32 to 104 °F) Storage..........................-20 to +60 °C (-4 to +140 °F)HumidityOperating:0 to 10 °C (32 to 50 °F).....................noncondensing10 to 30 °C (50 to 86 °F).................................. 95 %30 to 40 °C (86 to 104 °F).................................75 %40 to 50 °C (104 to 122 °F)...............................45 % Storage:-20 to +60 °C (-4 to +140 °F)............noncondensingAltitude Operating.......................................3 km (10 000 feet) Storage........................................12 km (40 000 feet)Vibration (Sinusoidal).......................................max. 3 gShock............................................................max. 30 g Electromagnetic Compatibility (EMC)Emission and immunitiy...........EN-IEC61326-1 (1997) Enclosure Protection...........................IP51, ref: IEC52999Users Manual100Designed for measurements on 1000 V Category II Installations, 600 V Category III Installations, Pollution Degree 2, per:• ANSI/ISA S82.01-1994• EN61010-1 (1993) (IEC1010-1)• CAN/CSA-C22.2 No.1010.1-92• UL3111-1Max. Input VoltagesInput A and B directly.............................300 V CAT III Input A and B via 10:1 probe.................1000 V CAT II600 V CAT IIIMETER/EXT TRIG inputs......................1000 V CAT II600 V CAT III From any terminal to ground.................1000 V CAT II600 V CAT IIIBetween any terminal............................1000 V CAT II600 V CAT III Voltage ratings are given as “working voltage”. They should be read as Vac-rms (50-60 Hz) for AC sinewave applications and as Vdc for DCapplications.Figure 51. Max. Input Voltage v.s. FrequencyNoteOvervoltage Category III refers to distribution level and fixed installation circuits inside abuilding. Overvoltage Category II refers to local level, which is applicable for appliances and portable equipment.Figure 52. Safe Handling: Max. Input Voltage Between Scope References, and BetweenScope References and Meter Reference 10:1 ProbeSafetyMax. Input Voltage..........................1000 V CAT II600 V CAT III Max. Floating Voltagefrom any terminal to ground...................1000 V CAT II600 V CAT IIIup to 400 Hz Electrical specificationsInput Impedance at probe tip10 MΩ (±2 %)//14 pF (±2 pF)Capacity Adjustment Range.........................10 to 22 pF Attenuation at DC (1 MΩ input)....................10 x (±2 %) Bandwidth (with FLUKE 199)......DC to 200 MHz (-3 dB) EnvironmentalTemperatureOperating...........................0 to 50 °C (32 to 122 °F) Storage........................-20 to +60 °C (-4 to +140 °F) AltitudeOperating....................................3 km (10 000 feet) Storage......................................12 km (40 000 feet) HumidityOperating at 10 to 30 °C (50 to 86 °F).............. 95 %101Users Manual102FR E QUE NCY (MHz)MAX. INPUTVOLT Figure 53. Max. Voltage From Probe Tip to Groundand From Probe Tip to Probe ReferenceFR E QUE NCY (MHz)MAX. VOLT AGEF ROM PR OBE R E FE R E NCE T O GROUNDFigure 54. Safe Handling: Max. Voltage From ProbeReference to GroundElectromagnetic ImmunityThe Fluke 190 series, including standard accessories, conforms with the EEC directive 89/336 for EMC immunity, as defined by EN-61326-1, with the addition of the following tables.Scope Mode (10 ms/div): Trace disturbance with VPS200 voltage probe shortedTable 1No visible disturbance E = 3V/mFrequency range 10 kHz to 20 MHz 5 mV/div to 100 V/divFrequency range 20 MHz to 100 MHz100 mV/div to 100 V/divFrequency range 100 MHz to 1 GHz500 mV/div to 100 V/div *)(*)With the 20 MHz Bandwidth Filter switched on: no visible disturbance.With the 20 MHz Bandwidth Filter switched off: disturbance is max 2 div.Table 2Disturbance less than 10% of full scale E = 3V/mFrequency range 20 MHz to 100 MHz10 mV/div to 50 mV/divTest Tool ranges not specified in tables 1 and 2 may have a disturbance of more than 10% of full scale.Meter Mode (Vdc, Vac, Vac+dc, Ohm and Continuity): Reading disturbance with test leads shortedTable 3Disturbance less than 1% of full scale E = 3V/mFrequency range 10 kHz to 1 GHz500mV to 1000V , 500Ohm to 30 MOhm ranges103。

大气科学词汇A

绝对稳定性一级标准气压表绝对温度绝对温标绝对形势绝对单位绝对真空绝对值绝对变率绝对涡度绝对零度吸收比吸收剂量被吸层云吸收过滤器吸收溶液（1）吸收器（2）吸收体，吸收剂吸收剂吸收函数吸收介质吸收能力，吸收本领吸收比，吸收率 (1)[液体]吸气计（2）吸收光度计吸收吸收[光谱]带吸收系数吸收截面吸收因子吸收函数吸收[式]温度表吸收线吸收液体吸收分光计吸收[光]谱吸收本领吸收率，吸收比丰度丰度值丰产年深海环境深海平原深海区加速运动
加速度重力加速度加速度势加速谱加速器；催速器加速度表容许范围（1）存取，访问（2）取数附属云声压插入管偶然误差气候适应，气候驯化调节係数（1）撞冻（2）积冰撞冻效率积温曲线累积[作用] 积冰区累积带累积雨量器累加器准确度声达乙醛含酸煤烟酸性沉积物酸露点酸雾酸雾酸化[作用] 酸度，酸性酸霭酸性降水酸雨零磁倾角线，磁赤道声吸收声导纳声衰减常数声指令系统发声器，声辐射器声全息摄影扫描法
acoustical level acoustical transparent layer acoustical measurement acoustical phase constant acoustical profile acoustic reflectivity acoustic spectrum acoustic capacitance acoustic characteristic impendence acoustic cloud acoustic compliance acoustic conductance acoustic conductivity acoustic cutoff frequency acoustic detection and ranging(ACDAR) acoustic dispersion acoustic Doppler sounder acoustic Doppler system acoustic echo sounder acoustic echo sounding acoustic emission acoustic energy acoustic environment acoustic feedback acoustic field acoustic fluctuation acoustic fog acoustic frequency generator acoustic-gravity wave acoustic imaging acoustic independence acoustic inertance acoustic intensity acoustic interferometer temperature sensing acoustic mass acoustic-microwave radar acoustic mobility acoustic navigation system acoustic pollution acoustic pressure acoustic propagation constant

INA333 微功耗、零漂移、轨到轨输出仪表放大器说明书

V OUTREFR GProduct FolderSample &BuyTechnical Documents Tools &SoftwareSupport &CommunityINA333ZHCSAK0C –JULY 2008–REVISED DECEMBER 2015INA333微功耗(50μA)、零漂移、轨到轨输出仪表放大器1特性•低偏移电压：25µV （最大值），G ≥100•低漂移：0.1μV/°C ，G ≥100•低噪声：50nV/√Hz ，G ≥100•高共模抑制比(CMRR)：100dB （最小值），G ≥10•低输入偏置电流：200pA （最大值）•电源范围：1.8V 至5.5V•输入电压：(V–)+0.1V 至(V+)–0.1V •输出电压：(V–)+0.05V 至(V+)–0.05V •低静态电流：50μA•工作温度范围：-40°C 至+125°C •已过滤射频干扰(RFI)的输入•8引脚VSSOP 和8引脚WSON 封装2应用范围•桥式放大器•心电图(ECG)放大器•压力传感器•医疗仪表•便携式仪表•衡器•热电偶放大器•电阻式温度检测器(RTD)传感器放大器•数据采集3说明INA333器件是一款低功耗的精密仪表放大器，具有出色的精度。

该器件采用通用的三运算放大器设计，并且拥有小巧尺寸和低功耗特性，非常适合各类便携式应用。

可通过单个外部电阻在1到1000范围内设置增益。

INA333设计为采用符合行业标准的增益公式：G =1+(100k Ω/R G )。

INA333器件拥有超低的偏移电压（25μV ，G ≥100），出色的偏移电压漂移（0.1μV/°C ，G ≥100），以及较高的共模抑制比（100dB ，G ≥10）。

该器件可由低至1.8V (±0.9V)的电源供电运行，静态电流仅为50μA ，因此非常适合电池供电类系统。

NI 6351 X Series数据收集仪特性说明书

DEVICE SPECIFICATIONSNI 6351X Series Data Acquisition: 1.25 MS/s, 16 AI, 24 DIO, 2 AOThe following specifications are typical at 25 °C, unless otherwise noted. For more information about the NI 6351, refer to the X Series User Manual available from / manuals.Analog InputNumber of channels8 differential or 16 single endedADC resolution16 bitsDNL No missing codes guaranteedINL Refer to the AI Absolute Accuracy section. Sample rateSingle channel maximum 1.25 MS/sMultichannel maximum (aggregate) 1.00 MS/sMinimum No minimumTiming resolution10 nsTiming accuracy50 ppm of sample rateInput coupling DCInput range±0.1 V, ±0.2 V, ±0.5 V, ±1 V, ±2 V, ±5 V,±10 V±11 V of AI GNDMaximum working voltage for analoginputs (signal + common mode)CMRR (DC to 60 Hz)100 dBInput impedanceDevice onAI+ to AI GND>10 GΩ in parallel with 100 pFAI- to AI GND>10 GΩ in parallel with 100 pFDevice offAI+ to AI GND820 ΩAI- to AI GND820 ΩInput bias current±100 pACrosstalk (at 100 kHz)Adjacent channels-75 dBNon-adjacent channels-95 dBSmall signal bandwidth (-3 dB) 1.7 MHzInput FIFO size2,047 samplesScan list memory4,095 entriesData transfersPCIe DMA (scatter-gather), programmed I/O USB USB Signal Stream, programmed I/O Overvoltage protection for all analog input and sense channelsDevice on±25 V for up to two AI pinsDevice off±15 V for up to two AI pinsInput current during overvoltage condition±20 mA max/AI pinSettling Time for Multichannel Measurements2| | NI 6351 SpecificationsTypical Performance GraphsFigure 1. Settling Error versus Time for Different Source Impedances10 KTime (µs)E r r o r (p p m o f S t e p S i z e )101001 KFigure 2. AI <0..15> Small Signal Bandwidth–8–7–6–5–4–3–2–1011 k10 k100 k 1000 k10000 kFrequency (Hz)N o r m a l i z e d S i g n a l A m p l i t u d e (d B )NI 6351 Specifications | © National Instruments | 3Figure 3. AI <0..15> CMRRFrequency (Hz)C M R R (d B )AI Absolute AccuracyTable 1. AI Absolute Accuracy4 | | NI 6351 SpecificationsFor more information about absolute accuracy at full scale, refer to the AI Absolute Accuracy Example section.Gain tempco13 ppm/°CReference tempco 1 ppm/°CINL error46 ppm of rangeNote Accuracies listed are valid for up to two years from the device externalcalibration.AI Absolute Accuracy EquationAbsoluteAccuracy = Reading · (GainError) + Range · (OffsetError) + NoiseUncertainity GainError = ResidualGainError + GainTempco · (TempChangeFromLastInternalCal) + ReferenceTempco · (TempChangeFromLastExternalCal)OffsetError = ResidualOffsetError + OffsetTempco · (TempChangeFromLastInternalCal) + INLErrorNoiseUncertainty10,000 points.AI Absolute Accuracy ExampleAbsolute accuracy at full scale on the analog input channels is determined using the following assumptions:•TempChangeFromLastExternalCal = 10 °C •TempChangeFromLastInternalCal = 1 °C•number_of_readings = 10,000•CoverageFactor = 3 σFor example, on the 10 V range, the absolute accuracy at full scale is as follows: GainError = 48 ppm + 13 ppm · 1 + 1 ppm · 10 = 71 ppmOffsetError = 13 ppm + 21 ppm · 1 + 46 ppm = 80 ppmAbsoluteAccuracy = 10 V · (GainError) + 10 V · (OffsetError) + NoiseUncertainty = 1,520 µVNI 6351 Specifications| © National Instruments| 5Analog T riggersNumber of triggers1Source AI <0..15>, APFI 0Functions Start Trigger, Reference Trigger, PauseTrigger, Sample Clock, Convert Clock, SampleClock TimebaseSource levelAI <0..15>±Full scaleAPFI 0±10 VResolution16 bitsModes Analog edge triggering, analog edge triggeringwith hysteresis, and analog window triggering Bandwidth (-3 db)AI <0..15> 3.4 MHzAPFI 0 3.9 MHzAccuracy±1% of rangeAPFI 0 characteristicsInput impedance10 kΩCoupling DCProtection, power on±30 VProtection, power off±15 VAnalog OutputNumber of channels2DAC resolution16 bitsDNL±1 LSBMonotonicity16 bit guaranteedAccuracy Refer to the AO Absolute Accuracy table. Maximum update rate1 channel 2.86 MS/s2 channels 2.00 MS/sTiming accuracy50 ppm of sample rateTiming resolution10 ns6| | NI 6351 SpecificationsOutput range±10 V, ±5 V, ±external reference on APFI 0 Output coupling DCOutput impedance0.2 ΩOutput current drive±5 mAOverdrive protection±25 VOverrdrive current26 mAPower-on state±5 mVPower on/off glitchPCIe 1.5 V peak for 200 msUSB 1.5 V for 1.2 s1Output FIFO size8,191 samples shared among channels used Data transfersPCIe DMA (scatter-gather), programmed I/OUSB USB Signal Stream, programmed I/OAO waveform modes Non-periodic waveform, periodic waveformregeneration mode from onboard FIFO,periodic waveform regeneration from hostbuffer including dynamic updateSettling time, full-scale step, 15 ppm2 μs(1 LSB)Slew rate20 V/μsGlitch energy at midscale transition,10 nV · s±10 V rangeExternal ReferenceAPFI 0 characteristicsInput impedance10 kΩCoupling DCProtection, device on±30 VProtection, device off±15 VRange±11 VSlew rate20 V/μs1Typical behavior. Time period may be longer due to host system USB performance. Time period will be longer during firmware updates.NI 6351 Specifications| © National Instruments| 7Figure 4. AO External Reference Bandwidth–90–80–70–60–50–40–30–20–10010Frequency (Hz)N o r m a l i z e d A O A m p l i t u d e A t t e n u a t i o n (d B )AO Absolute AccuracyAbsolute accuracy at full-scale numbers is valid immediately following self calibration and assumes the device is operating within 10 °C of the last external calibration.Note Accuracies listed are valid for up to two years from the device externalcalibration.AO Absolute Accuracy EquationAbsoluteAccuracy = OutputValue · (GainError) + Range · (OffsetError )GainError = ResidualGainError + GainTempco · (TempChangeFromLastInternalCal ) +ReferenceTempco · (TempChangeFromLastExternalCal )OffsetError = ResidualOffsetError + OffsetTempco · (TempChangeFromLastInternalCal)+ INLError8 | | NI 6351 SpecificationsDigital I/O/PFIStatic CharacteristicsNumber of channels24 total, 8 (P0.<0..7>),16 (PFI <0..7>/P1, PFI <8..15>/P2)Ground reference D GNDDirection control Each terminal individually programmable asinput or outputPull-down resistor50 kΩ typical, 20 kΩ minimumInput voltage protection±20 V on up to two pinsCaution Stresses beyond those listed under the Input voltage protectionspecification may cause permanent damage to the device.Waveform Characteristics (Port 0 Only)Terminals used Port 0 (P0.<0..7>)Port/sample size Up to 8 bitsWaveform generation (DO) FIFO2,047 samplesWaveform acquisition (DI) FIFO255 samplesDI Sample Clock frequencyPCIe0 to 10 MHz, system and bus activitydependentUSB0 to 1 MHz, system and bus activity dependent DO Sample Clock frequencyPCIeRegenerate from FIFO0 to 10 MHzStreaming from memory0 to 10 MHz, system and bus activitydependentUSBRegenerate from FIFO0 to 10 MHzStreaming from memory0 to 1 MHz, system and bus activity dependent Data transfersPCIe DMA (scatter-gather), programmed I/OUSB USB Signal Stream, programmed I/ODigital line filter settings160 ns, 10.24 μs, 5.12 ms, disableNI 6351 Specifications| © National Instruments| 9PFI/Port 1/Port 2 FunctionalityFunctionality Static digital input, static digital output, timinginput, timing outputTiming output sources Many AI, AO, counter, DI, DO timing signals Debounce filter settings90 ns, 5.12 μs, 2.56 ms, custom interval,disable; programmable high and lowtransitions; selectable per input Recommended Operating ConditionsInput high voltage (V IH)Minimum 2.2 VMaximum 5.25 VInput low voltage (V IL)Minimum0 VMaximum0.8 VOutput high current (I OH)P0.<0..7>-24 mA maximumPFI <0..15>/P1/P2-16 mA maximumOutput low current (I OL)P0.<0..7>24 mA maximumPFI <0..15>/P1/P216 mA maximumDigital I/O CharacteristicsPositive-going threshold (VT+) 2.2 V maximumNegative-going threshold (VT-)0.8 V minimumDelta VT hysteresis (VT+ - VT-)0.2 V minimumI IL input low current (V IN = 0 V)-10 μA maximumI IH input high current (V IN = 5 V)250 μA maximum10| | NI 6351 SpecificationsFigure 5. P0.<0..7>: I OH versus V OHI O H (m A )V OH (V)Figure 6. P0.<0..7>: I OL versus V OLI O L (m A )1535302520105V OL (V)400Figure 7. PFI <0..15>/P1/P2: I OH versus V OHI O H (m A )–30–5–10–15–20–25–35–40–45V OH (V)0–50Figure 8. PFI <0..15>/P1/P2: I OL versus V OLI O L (m A )5V OL (V)0General-Purpose CountersNumber of counter/timers 4Resolution32 bitsCounter measurements Edge counting, pulse, pulse width,semi-period, period, two-edge separation Position measurements X1, X2, X4 quadrature encoding withChannel Z reloading; two-pulse encoding Output applications Pulse, pulse train with dynamic updates,frequency division, equivalent time sampling Internal base clocks100 MHz, 20 MHz, 100 kHzExternal base clock frequency0 MHz to 25 MHzBase clock accuracy50 ppmInputs Gate, Source, HW_Arm, Aux, A, B, Z,Up_Down, Sample ClockRouting options for inputsPCIe Any PFI, RTSI, analog trigger, many internalsignalsUSB Any PFI, analog trigger, many internal signals FIFO127 samples per counterData transfersPCIe Dedicated scatter-gather DMA controller foreach counter/timer, programmed I/O USB USB Signal Stream, programmed I/OFrequency GeneratorNumber of channels1Base clocks20 MHz, 10 MHz, 100 kHzDivisors 1 to 16Base clock accuracy50 ppmOutput can be available on any PFI or RTSI terminal.Phase-Locked LoopNumber of PLLs1Table 3. Reference Clock Locking FrequenciesOutput of PLL100 MHz Timebase; other signals derived from100 MHz Timebase including 20 MHz and100 kHz TimebasesExternal Digital TriggersSourcePCIe Any PFI, RTSIUSB Any PFIPolarity Software-selectable for most signalsAnalog input function Start Trigger, Reference Trigger, PauseTrigger, Sample Clock, Convert Clock,Sample Clock TimebaseAnalog output function Start Trigger, Pause Trigger, Sample Clock,Sample Clock TimebaseCounter/timer functions Gate, Source, HW_Arm, Aux, A, B, Z,Up_Down, Sample ClockDigital waveform generation (DO) function Start Trigger, Pause Trigger, Sample Clock, Sample Clock TimebaseDigital waveform acquisition (DI) function Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Sample Clock TimebaseDevice-to-Device T rigger BusInput SourcePCIe RTSI <0..7>USB NoneOutput destinationPCIe RTSI <0..7>USB NoneOutput selections10 MHz Clock, frequency generator output,many internal signalsDebounce filter settings90 ns, 5.12 μs, 2.56 ms, custom interval,disable; programmable high and lowtransitions; selectable per inputBus InterfacePCIeForm factor x1 PCI Express, specification v1.1 compliant Slot compatibility x1, x4, x8, and x16 PCI Express slots 2DMA channels8, analog input, analog output, digital input,digital output, counter/timer 0, counter/timer 1,counter/timer 2, counter/timer 3USBUSB compatibility USB 2.0 Hi-Speed or full-speed3USB Signal Stream8, can be used for analog input, analog output,digital input, digital output, counter/timer 0,counter/timer 1, counter/timer 2,counter/timer 32Some motherboards reserve the x16 slot for graphics use. For PCI Express guidelines, refer to/pciexpress.3Operating on a full-speed bus results in lower performance, and you might not be able to achieve maximum sampling/update rates.Power RequirementsPCIeWithout disk drive power connector installed+3.3 V 4.6 W+12 V 5.4 WWith disk drive power connector installed+3.3 V 1.6 W+12 V 5.4 W+5.0 V15 WUSBPower supply requirements11 to 30 VDC, 30 W, 2 positions 3.5 mm pitchpluggable screw terminal with screw lockssimilar to Phoenix Contact MC 1,5/2-STF-3,5 BKPower input mating connector Phoenix Contact MC 1,5/2-GF-3,5 BK orequivalentCaution NI USB-6351 devices must be powered with an NI offered AC adapter ora National Electric Code (NEC) Class 2 DC source that meets the powerrequirements for the device and has appropriate safety certification marks forcountry of use.Current LimitsCaution Exceeding the current limits may cause unpredictable behavior by thedevice and/or PC.PCIeWithout disk drive power connector installedP0/PFI/P1/P2 and +5 V0.59 A maxterminals combinedWith disk drive power connector installed+5 V terminal (connector 0) 1 A max4+5 V terminal (connector 1) 1 A max4P0/PFI/P1/P2 combined 1 A max4Has a self-resetting fuse that opens when current exceeds this specification.USB+5 V terminal 1 A max42 A maxP0/PFI/P1/P2 and +5 V terminalscombinedPhysical CharacteristicsPrinted circuit board dimensionsPCIe9.9 × 16.8 cm (3.9 × 6.6 in.) (half-length) Enclosure dimensions (includes connectors)USB26.4 × 17.3 × 3.6 cm (10.4 × 6.8 × 1.4 in.) WeightPCIe161 g (5.6 oz)USB 1.42 kg (3 lb 2 oz)I/O connectorPCIe 1 68-pin VHDCIUSB64 screw terminalsPCIe disk drive power connector Standard ATX peripheral connector (not serialATA)USB screw terminal wiring16-24 AWGCalibrationRecommended warm-up time15 minutesCalibration interval 2 yearsMaximum Working VoltageMaximum working voltage refers to the signal voltage plus the common-mode voltage. Channel to earth11 V, Measurement Category ICaution Do not use for measurements within Categories II, III, or IV.EnvironmentalOperating temperaturePCIe0 to 50 °CUSB0 to 45 °CStorage temperature-40 to 70 ºCOperating humidity10 to 90% RH, noncondensingStorage humidity 5 to 95% RH, noncondensingPollution Degree2Maximum altitude2,000 mIndoor use only.SafetyThis product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:•IEC 61010-1, EN 61010-1•UL 61010-1, CSA 61010-1Note For UL and other safety certifications, refer to the product label or the OnlineProduct Certification section.Electromagnetic CompatibilityThis product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:•EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity•EN 55011 (CISPR 11): Group 1, Class A emissions•EN 55022 (CISPR 22): Class A emissions•EN 55024 (CISPR 24): Immunity•AS/NZS CISPR 11: Group 1, Class A emissions•AS/NZS CISPR 22: Class A emissions•FCC 47 CFR Part 15B: Class A emissions•ICES-001: Class A emissionsNote In the United States (per FCC 47 CFR), Class A equipment is intended foruse in commercial, light-industrial, and heavy-industrial locations. In Europe,Canada, Australia and New Zealand (per CISPR 11) Class A equipment is intendedfor use only in heavy-industrial locations.Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medicalequipment that does not intentionally generate radio frequency energy for thetreatment of material or inspection/analysis purposes.Note For EMC declarations and certifications, and additional information, refer tothe Online Product Certification section.CE ComplianceThis product meets the essential requirements of applicable European Directives, as follows:•2014/35/EU; Low-V oltage Directive (safety)•2014/30/EU; Electromagnetic Compatibility Directive (EMC)Online Product CertificationRefer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit / certification, search by model number or product line, and click the appropriate link in the Certification column.Environmental ManagementNI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.For additional environmental information, refer to the Minimize Our Environmental Impact web page at /environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.Waste Electrical and Electronic Equipment (WEEE) EU Customers At the end of the product life cycle, all NI products must bedisposed of according to local laws and regulations. For more information abouthow to recycle NI products in your region, visit /environment/weee.电子信息产品污染控制管理办法（中国RoHS）中国客户National Instruments符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。

外文翻译---降低测量噪声的五个技巧

附录A 外文资料翻译Five Tips to Reduce Measurement NoiseEnsuring measurement accuracy often means going beyond reading raw specifications in a data sheet. Understanding an application in the context of its electrical environment is also important for securing success, particularly in a noisy or industrial setting. Ground loops, high common-mode voltages, and electromagnetic radiation are all prevalent examples of noise that can adversely affect a signal.There are many techniques for reducing noise in a measurement system, which include proper shielding, cabling, and termination. Beyond these common best practices, however, there is more you can do to ensure better noise immunity. The following five techniques serve as guidelines for achieving more accurate measurement results.A. Reject DC Common-Mode VoltageMaking highly accurate measurements often starts with differential readings. An ideal differential measurement device reads only the potential difference between the positive and negative terminals of its instrumentation amplifier(s). Practical devices, however, are limited in their ability to reject common-mode voltages. Common-mode voltage is the voltage common to both the positive and negative terminals of an instrumentation amplifier. In Figure 1, 5 V is common to both the AI+ and AI- terminals, and the ideal device reads the resulting 5 V difference between the two terminals.Figure 1 An ideal instrumentation amplifier completely rejects common-modevoltages.The maximum working voltage of a data acquisition (DAQ) device refers to the signal voltage plus the common-mode voltage and specifies the largest potential that may exist between an input and earth ground. The maximum working voltage for most DAQ devices is the same as the input range of the instrumentation amplifier. For example, low-cost M Series DAQ devices such as the NI 6220 devices have a maximum working voltage of 11 V; no input signal can exceed 11 V without causing damage to the amplifier.Isolation can dramatically increase the maximum working voltage of a DAQ device. In the context of a measurement system, “isolation” means physically and electrically separating two parts of a circuit. An isolator passes data from one part of the circuit to another without conducting electricity. Because current cannot flow across this isolation barrier, you can level-shift the DAQ device ground reference away from earth ground. This decouples the maximum working voltage specification from the input range of the amplifier. For example, in Figure 2 the instrumentation amplifier ground reference is electrically isolated from earth ground.Figure 2 Isolation electrically separates the instrumentation amplifier groundreference from earth ground.While the input range is the same as that in Figure 1, the working voltage has been extended to 60 V, rejecting 55 V of common-mode voltage. The maximum working voltage is now defined by the isolation circuitry instead of the amplifier input range.Fuel cell testing is an example application that requires high DC common-mode voltage rejection. Each individual cell may generate approximately 1 V, but a stack of cells may produce several kilovolts or more. To accurately measure the voltage of a single 1 V cell, the measurement device must be able to reject the high common-mode voltages generated by the rest of the stack.B. Reject AC Common-Mode VoltageRarely do common-mode voltages consist of only a DC level. Most sources of common-mode voltage contain an AC component in addition to a DC offset. Noise is inevitably coupled onto a measured signal from the surrounding electromagnetic environment. This is particularly troublesome for low-level analog signals passing through the instrumentation amplifier on a DAQ device.Sources of AC noise may be broadly classified by their coupling mechanisms – capacitive, inductive, or radiative. Capacitive coupling results from time-varying electric fields, such as those created by nearby relays or other measurement signals. Inductive or magnetically coupled noise results from time-varying magnetic fields, such as those created by nearby machinery or motors. If the electromagnetic field source is far from the measurement circuit, such as with fluorescent lighting, the electric and magnetic field coupling is considered combined electromagnetic or radiative coupling. In all cases, a time-varying common-mode voltage is coupled onto the signal of interest, most often in the range of 50-60 Hz (power-line frequency).An ideal measurement circuit has a perfectly balanced path to both the positive and negative terminals of an instrumentation amplifier. Such a system would completely reject any AC-coupled noise. A practical device, however, specifies the degree to which it can reject common-mode voltage with a common-mode rejection ratio (CMRR). The CMRR is the ratio of the measured signal gain to the common-mode gain applied by the amplifier, as noted by the following equation:Choosing a DAQ device with a better CMRR over a broader range of frequencies can make a significant difference in your system’s overall noise immunity. For example, Figure 3 shows the CMRR for a low-cost M Series device compared with that of an industrial M Series device.Figure 3 The NI 6230 provides a much higher CMRR than the NI 6220 relative to earthground.At 60 Hz, NI 6230 industrial M Series devices have 20 dB greater CMRR than NI 6220 low-cost M Series devices. This is equivalent to a 10 times better attenuation of 60 Hz noise.Any application may benefit from rejecting 60 Hz noise. However, those with large rotating machinery or motors require noise immunity at higher frequencies. At 1 kHz, NI 6230 devices reject noise 100 times better than NI 6220 devices, making them ideal for industrial applications.C. Break Ground LoopsGround loops are arguably the most common source of noise in data acquisition systems. Proper grounding is essential for accurate measurements, yet it is a frequently misunderstood concept. A ground loop forms when two connected terminals in a circuit are at different ground potentials. This difference causes a current to flow in the interconnection, which can produce offset errors. Further complicating matters, the voltage potential between signal source ground and DAQ device ground is generally not a DC level. This results in a signal that reveals power-line frequency components in the readings. Consider the simple thermocouple application in Figure 4.Figure 4 A differential thermocouple measurement with a grounded signal source cancreate a ground loop.Here, an otherwise straightforward temperature measurement is complicated by the device under test (DUT) being at a different ground potential than that of the DAQ device. Though both devices share the same building ground, the difference in ground potential could be 200 mV or more if the power distribution circuits are not properly connected. The difference appears as a common-mode voltage with an AC component in the resulting measurement.Recall that isolation is a means of electrically separating signal source ground from the instrumentation amplifier ground reference (see Figure 5).Figure 5 Isolation eliminates ground loops by separating earth ground from theamplifier ground reference.Because current cannot flow across the isolation barrier, the amplifier ground reference can be at a higher or lower potential than earth ground. You cannot inadvertently create a ground loop with this circuit. Using an isolated measurement device removes the ambiguity of properly grounding a measurement system, ensuring more accurate results.D. Use 4-20 mA Current LoopsLong cable lengths and the presence of noise in industrial or electrically harsh environments can make accurate voltage measurements difficult. As a result, industrial transducers that sense pressure, flow, proximity, and so on often emit current signals instead of voltage. A 4-20 mA current loop is a common method of sending sensor information over long distances in many process-monitoring applications, as shown in Figure 6.Figure 6 An instrumentation amplifier uses a shunt resistor to convert processcurrent signals into voltage.Each of these current loops contains three components –a sensor, a power source, and one or more DAQ devices. The current signal from the sensor is typically between 4 and 20 mA, with 4 mA representing the lowest signal value and 20 mA representing the maximum. This transmission scheme has the advantage of using 0 mA to indicate an open circuit or bad connection. Power supplies are typically in the range of 24 to 30 VDC, depending on the total amount of voltage dropped along the circuit. Finally, the DAQ device uses a high-precision shunt resistor between the leads of the instrumentation amplifier to convert the current signal into a voltage measurement. Because all the current that flows from one lead of the power supply must return to the other, current loop signals are immune to most sources of electrical noise and voltage (IR) drops along extensive cable lengths. Furthermore, the leads that provide power to the sensor also carry the measurement signal, greatly simplifying field wiring.An isolation barrier such as the one shown in Figure 6 provides two main benefits in current loop applications. First, because power supply voltages typically exceed the maximum input range of most instrumentation amplifiers, isolation is essential for level-shifting the amplifier ground away from earthground to an acceptable voltage. Second, current loops operate on the principal that current never leaves the circuit. Therefore, isolating the current loop from any path to ground prevents degradation of the signal. Devices such as the NI 6238 and NI 6239 industrial M Series DAQ devices provide a built-in shunt resistor and up to 60 VDC of isolation from earth ground for 4-20 mA current loop applications.E. Use 24 V Digital LogicMeasurement noise is not limited to analog signals. Digital logic may also be affected by a noisy electrical environment, possibly indicating false on/off values or accidental triggers. There are many voltage levels and logic families associated with digital I/O, some more noise resistant than others. Transistor-transistor logic (TTL) is by far the most common logic family, powering everything from microprocessors to LEDs. Though it is widely available, TTL may not always be the best choice for all digital applications.For industrial applications, TTL has the inherent disadvantage of small noise margins. With high- and low-logic levels of 2.0 V and 0.8 V, respectively, there is little room for error. For example, the low-level noise margin for a TTL input is 0.3 V (the difference between 0.8 V, the maximum low-level TTL input, and 0.5 V, the maximum low-level TTL output). Any noise coupled to the digital signal in excess of 0.3 V may shift the voltage into the undefined region between 0.8 V and 2.0 V. Here, the behavior of the digital input is uncertain and may produce incorrect values (see Figure 7).Figure 7 24V logic has better noise margins than TTL.24 V logic, however, offers increased noise margins and better overall noise immunity. Because most industrial sensors, actuators, and control logic already operate off 24 V power supplies, it is convenient to use the corresponding digital logic levels. With a low-level input of 4 V and a high-level input of 11 V, the digital signals are less susceptible to noise.Most measurement devices with 24 V digital I/O capability offer additional noise-reducing features. For example, National Instruments industrial M Series and digital I/O devices have programmable input filters for debouncing relay inputs. When a mechanical relay closes, there is a short period of time (on the order of milliseconds) during which the contact surfaces bounce against each other. Without filtering, the logic input may read this as a burst of on/off signals. These devices also offer isolation, an important factor to consider if parts of the overall system are powered from different supplies.F. ConclusionThere are many factors to consider when attempting to reduce noise in a measurement system. Beyond proper shielding, cabling, and termination, careful consideration of common-mode voltages, grounding, and nearby noise sources is essential for accurate results. However, understanding the electrical environment of your system is not always straightforward. Isolation is an easy means of adding another layer of confidence to your measurements, no matter the signal or application.Charles StiernbergCharles Stiernberg is a product engineer for data acquisition at NI. He holds a bachelor’s degree in electrical engineering, with a focus on embedded systems and VLSI design from The University of Texas at Austin.降低测量噪声的五个技巧确保测量精度通常意味着需要超越产品说明书的基本指标。

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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT,VOL.46,NO.3,JUNE1997739
D.Maximum CMRR
The ampliﬁer’s CMRR is maximized by equating the right side of
(18)to zero.Therefore,let
CMRR2=0CMRR 0 1
CMRR1
:(19) For the3-op-amp instrumentation ampliﬁer,CMRR1=A d1and
CMRR2=0
A d1
1A cm1
1
A d1
=01
1A cm1
:(20)
For an ideal ampliﬁer where1A cm1=0;CMRR2is inﬁnite and the second stage is tweaked for maximum CMR.Since there is always a small butﬁnite imbalance in the common-mode gains of theﬁrst stage,however,the conclusion from the analysis is that the second stage should be adjusted not in isolation but coupled to theﬁrst stage with a common-mode voltage applied to the input of theﬁrst stage;
a standard procedure.
III.E XPERIMENTAL R ESULTS
Using an LM747CN strapped with balanced resistors(r=1) and a differential gain of500,the measured common-mode gain is 7:0021003V/V at low frequencies(10Hz).R1=R3=1:0018k and R2=R4=500:5k :The common-mode rejection ratio for the device is,therefore,CMRR d=500=7:0021003=71430;and CMR d=97:07dB,which agrees with the published data. Tweaking the circuit for minimum common-mode gain by adjusting resistor R4to unbalance the resistive network,the common-mode gain decreases to8:7521004at R4=497:3k :The CMRR increases to5:7142105;or a CMR of115.1dB,an improvement of18.0dB over the device’s common-mode rejection.
The measured R4is equal to the expected theoretical value.For maximum CMRR,the resistance ratio is,from(11),r=1=(1+ 500:6=71430)=0:993;and R4=rR3(R2=R1)=0:993(500:5)= 497k :
IV.C ONCLUSIONS
The study shows that,by redeﬁning the common-mode rejection ratio to include the phase angle,the theoretically derived CMRR is consistent with practice and simulation;that an ampliﬁer’s CMR may exceed the CMR of the device(s)or the external components.The improved CMR is achieved by the unbalancing of the components external to the device.
R EFERENCES
[1]P.H.Garrett.Analog I/O Design Acquisition:Conversion:Recovery.
Reston,V A:Reston,1981,ch.3,pp.54–57.
[2]R.Pallas-Areny and J.G.Webster,“Common mode rejection ratio
in differential ampliﬁers,”IEEE Trans.Instrum.Meas.,vol.40,pp.
669–681,Aug1991.
Correction to“Comments on‘The Modulo Time
Plot:A Useful Data Acquisition Diagnostic Tool’”
Zsolt P´a pay
Manuscript received July16,1996.
The author is with the Department of Telecommunications,Technical University of Budapest,Budapest,Hungary.
Publisher Item Identiﬁer S
0018-9456(97)03613-9.Fig.1Mathcad simulation:spurious components due to quantization.
In the above paper1,an error occurred in Fig.1.An important part of theﬁgure(the reordering of raw samples)was omitted.Shown here is the correctﬁgure in its entirety.
1Z.Papay,IEEE Trans.Instrum.Meas.,vol.45,pp.959,Dec.1996.。