PL-XXL-SC-S45-21中文资料

05001181Rev3October 2005DRAFT Accelar ™10Gbps 850nm XFP Transceiver ModulePL-XXL-SC-S45-21Picolight’s MSA compliant 10Gbps 850 nm XFPtransceiver is a cost-effective, high-reliability opto-electronic (O/E) device that transmits and receivesstandard compliant high-speed serial 10 Gbps optical andelectrical signals. The Picolight design provides a singleproduct solution for the OIF SONET OC-192 VSR4-4,IEEE 802.3ae 10GBASE-SR, and 10GFC opticalinterconnects that are used in Telecommunication, DataCommunication, and Storage Area Network applications.The transceiver features a Picolight 850 nm VerticalCavity Surface Emitting Laser (VCSEL) and a PINphotodiode. The XFI electrical interface uses 10 Gbpsdifferential data channels for communications to themodule as specified in the 10 Gigabit Small Form FactorPluggable Module MSA. The transceiver’s MSA compliant “hot-z-pluggable” mechanical design offers the system designer the smallest footprint 10 Gbps solution and enables the highest density front-panel designs with up to 16 10G ports per line card. The PL-XXL-SC-S45-21 is another 10Gbps product in Picolight’s Accelar product line of 850nm transceivers targeted at short reach (<400 meter) applications.Key benefits •Industry-wide XFP MSA form factor •Standard compliant optical specifications •Superior thermal performance •Denser I/O implementation •Excellent EMI performance•Multivendor availability •High reliability•In-house precision alignment Applications•10 Gigabit Ethernet (LAN PHY) IEEE802.3 ae 10GBASE-SR •OIF - SONET OC-192 VSR •10G Fibre Channel opticalinterconnects •Cross-connect switches•Router interconnect •MAN aggregation links •Computer cluster cross-connect•Custom high-speed data pipes HighlightsCompliant to Ethernet, OIF (SONET) and FiberChannel 10 Gbps Specifications. Simplifies supplychain.Hot pluggable enables real-time in-field system upgradesSerial XFI electrical interface enables flexible routing for line cards and backplanes of up to 8inches over PCB traces System monitoring and component mapping via I 2C management interfaceDesign based on high volume optoelectronicspackagingProven supply chain and reliable long-termsupply based on Picolight’s reliable VCSELs andPIN diodes>400 meter reach over enhanced multimode fiberDRAFT Ordering InformationPart Number:Description:Contact Information:PL-XXL-SC-S45-21850nm XFP duplex LC receptacled 10 Gigabit transceiver module with beige, plastic bail Picolight Incorporated4665 Nautilus Court South Boulder, CO80301Tel:303.530.3189E-mail:sales@ Web site:PL-XXL-SC-S45-21 Features and Specification Highlights:•Incorporates a directly modulated 850nm Picolight oxide VCSEL •Low power consumption (< 2.0 W max.)•Mechanical design features compliant with XFP MSA v 3.1•Center-pull bail mechanism for consistent installation and removal •0°C To 70°C case temperature operating range•9.95 Gbits/s to 10.75 Gbit/s serial optical and electrical interface•LC receptacled optical connector •Durable plastic bail delatchmechanism•30 pin XFP compatible connector •System and line-side loopback modes•Loss of Signal (RX_LOS) Indicator •Transmitter Disable (TX_DIS) pin •Power Down (P_Down) pin.•Module De-select, Module Absent, and Module Not Ready pins•XFI compatible electrical interface, 1 differential channel operating at up to10.75 Gbit/s•Bit error rate < 1x10-12•I2C interface with XFP-compliant diagnostic functions•5V, 3.3V, and 1.8V power supplies •IEC 60825-1 Class 1 laser eye safe •FCC Class B compliant•ESD Class 2 per MIL-STD 883 Method 3015PL-XXL-SC-S45-21 Mechanical Module Electrical Pin DefinitionOctober 2005Page 2 of 1705001181Rev305001181Rev3Page 3 of 17October 2005DRAFTSection 1Functional descriptionThe PL-XXL-SC-S45-21 850 nm VCSEL-based 10 Gigabit XFP transceiver is a full duplex serialelectric, serial optical device with both transmit and receive functions contained in a single module. It is designed to be compliant with OIF OC-192 VSR4-4, IEEE 802.3ae/D5 10GBASE-SR (300 m), and 10 G Fibre Channel specifications. The transceiver is also fully compliant with the XFP 10 Gigabit Small Form Factor Pluggable Module Revision 3.1, Multi-Source Agreement. This device is the ideal solution for high density, cost effective 10Gbps 850nm multimode-mode fiber (mmf) interconnects. A block diagram of the PL-XXL-SC-S45-21 transceiver is shown in Figure 1 below.The PL-XXL-SC-S45-21 XFP transceiver has several low-speed interface connections including a 2-wire serial interface. These connections include; module not ready (Mod_NR), module deselect (Mod_DeSel), Interrupt, transmitter disable (TX_DIS), module absent (Mod_ABS), receive loss (RX_LOS), and power down/reset (P_Down/RST).Figure 1PL-XXL-LC-L45 XFP transceiver block diagramTwo loopback modes are available through the two-wire serial interface. The loopback modes are useful to facilitate stand-alone testing. In system loopback mode, data recovered from the system side transmit interface is re-directed to the system side receive interface. This facilitates system side test and debug. In network loopback mode, data recovered from the line side receive interface (optics) is looped to the line side transmitter output back to the fiber.TransmitterThe transmitter path converts 9.95, 10.3, 10.5, or 10.75 Gbps NRZ electrical data to a standardcompliant optical signal. The transmitter accepts a 100 Ohm differential 40 mV peak-to-peak to 1000 mV peak-to-peak 10Gbps CML electrical signal on TD- and TD+ pins. This performance exceeds the XFI “Ziffy” specification in the XFP MSA revision 3.1 specification and provides over 300 mm (12inches) reach on improved FR4 material (loss tangent of 0.016) and offers greater flexibility to system integrators for host board layout.Inside the module, the differential signals pass through a signal conditioner with equalization that compensates for losses and deterministic jitter present on the input data stream. A reference clock input (RefCLK+, RefCLK-) is used by the internal PLL to determine line rate and signal lock condition. The Tx clock circuit provides a lock alarm output, failure to lock results in Mod_NR asserted. The output of the Tx signal conditioner is input to the laser driver circuit which transforms the small swing digital voltage to an output modulation and bias current that drives a directly modulated 850nmVCSEL. The optical signal is engineered to meet the IEEE 802.3ae 10GBASE-SR, 10 GFC and OIF OC-192 VSR4-4 specifications. Close-loop control of the transmitted laser power over temperatureOctober 2005Page 4 of 1705001181Rev3DRAFTand voltage variations is provided through the module’s microcontroller circuitry. An LC connectorized receptacle provides the mechanical interface to the single-mode fibre plant.ReceiverThe receiver converts incoming arbitrarily encoded serial 9.95, 10.3, 10.5, or 10.75 Gbps NRZ optical data into serial XFI electrical data. An LC connectorized receptacle provides the mechanical interface to the single-mode fibre plant. A high speed PIN photodiode converts the optical signal into a current which is converted to a voltage in a high-gain transimpedance amplifier. The amplified signal is passed to a signal conditioning IC that provides clock and data recovery. Loss of signal, and signal lockdetection is included in the receive circuitry that is reflected in the Mod_NR status pin. The recovered data is output on the RD+ and RD- pins as a 100 Ohms 250mV peak-to-peak CML signal. The output signal meets the OIF OC-192 VSR4-4, IEEE 802.3ae 10GBASE-SR and 10 GFC specifications.Low Speed SignallingLow speed signalling is based on low voltage TTL (LVTTL) operating at a nominal voltage of 3.3V SCL/SDA: Two wire Serial interface clock and data line. Hosts should use a pull-up resistor connected to Vcc 3.3V on the two-wire interface SCL (clock), SDA (data), and all low speed outputs.Mod_NR: Output pin. When asserted high indicates that the module has detected a condition that renders Tx and or Rx data invalid.Mod_DeSel: Input pin. When held low by the host the module responds to 2-wire serial communication commands. When high the module does not respond to or acknowledge any 2-wire interface communication from the host.Interrupt: Output pin. When low indicates possible module operational fault or a status critical to the host system.TX_DIS: Input pin. When asserted high the transmitter output is turned off.Mod_ABS: Input pin. Asserted high when the XFP module is absent and is pulled low when the XFP module is inserted.RX_LOS: Output pin. Asserted high when insufficient optical power for reliable signal receptionP_Down/RST: Multifunction input pin. The module can be powered down or reset by pulling the low-speed P-Down pin high. In power down mode no data is transmitted on the optical Tx or the electrical Rx path. The reset pulse is generated on the falling edge of the P-Down signal. Following reset, the internal PLL’s must reacquire lock and will cause a Mod_NR failure.05001181Rev3Page 5 of 17October 2005DRAFTSection 2Application schematicsRecommended MSA connections to the PL-XXL-SC-S45-21 transceiver are shown in Figure 2 below.Figure 2Application schematic for the PL-XXL-SC-S45-21 transceiverPower supply filtering is recommended for the PL-XXL-SC-S45-21 module. To limit wide band noise power, the host system and module shall each meet a maximum of 2% peak-to-peak noise whenmeasured with a 1MHz low pass filter. In addition, the host system and the module shall each meet a maximum of 3% peak-to-peak noise when measured with a high pass filter from 1MHz-10MHz.A typical board-to-board application using a XAUI based MAC/Framer ASIC is shown below in Figure3. High-speed serial 10Gbps ASICs will eliminate the need for the SER-DES IC. However, the XAUI implementation offers greater flexibility in layout as the XFI interface is limited to reaches of 8 inches, while the XAUI interface can span over 50 inches on the host PCBA.Figure 3Board-to-board XFP application diagramSection 3Technical dataTechnical data related to the 10Gbps 850nm XFP Transceiver includes:•Section 3.1Pin function definitions below•Section 3.2XFP/XFI Reference model compliance points on page9•Section 3.3Absolute maximum ratings on page9•Section 3.4Electrical characteristics on page9•Section 3.5Jitter Specifications on page10•Section 3.6Input Reference Clock Specifications on page12•Section 3.7Timing Requirement of Control and Status I/O on page12•Section 3.8XFP 2-wire interface protocol and Management Interface on page13•Section 3.9Optical characteristics* on page14•Section 3.10Optical link distances on page14•Section 3.11Regulatory compliance on page15•Section 3.12PCB layout on page15•Section 3.13Connectors on page15DRAFT October 2005Page 6 of 1705001181Rev305001181Rev3Page 7 of 17October 2005DRAFT3.1Pin function definitionsTable 1Transceiver pinout on host boardTable 2Pin descriptions Pin no.Type Name Description1GND 1Module Ground2VEE5Not Used; may be left unconnected (Optional -5.2V Power Supply)3LVTTL-I Mod_Desel Module De-select; When held low allows the module to respond to 2-wire serial interface commands”4LVTTL-O Interrupt 2Interrupt; Indicates presence of an important condition which can be read over the serial 2-wire interface5LVTTL-I TX_DIS Transmitter Disable; Transmitter Laser Source Turned Off6VCC5+5V Power Supply7GND 1Module Ground8VCC3+3.3V Power Supply9VCC3+3.3V Power SupplyOctober 2005Page 8 of 1705001181Rev3DRAFT 10LVTTL-I SCL 2Two Wire Interface Clock11LVTTL-I/O SDA 2Two Wire Interface Data Line12LVTTL-O Mod_Abs 2Indicates Module is not present. Grounded in the Module13LVTTL-O Mod_NR 2Module Not Ready; Indicating Module Operational Fault14LVTTL-O RX_LOS 2Receiver Loss Of Signal Indicator15GND 1Module Ground16GND 1Module Ground17CML-O RD-Receiver Inverted Data Output18CML-O RD+Receiver Non-Inverted Data Output19GND 1Module Ground20VCC2+1.8V Power Supply.21LVTTL-I P_Down/RST Power down; When high, requires the module to limit power consumption to 1.5W or below. Serial interface must be functional in the low power mode. Reset; The falling edge initiates a complete reset of the module including the serial interface, equivalent to a power cycle.22VCC2+1.8V Power Supply23GND 1Module Ground24PECL-I RefCLK+Reference Clock Non-Inverted Input, AC coupled on the host board25PECL-I RefCLK-Reference Clock Inverted Input, AC coupled on the host board26GND 1Module Ground27GND 1Module Ground28CML-I TD-Transmitter Inverted Data Input29CML-I TD+Transmitter Non-Inverted Data Input30GND 1Module Ground1. Module ground pins (GND) are isolated from the module case and chassis ground within the module2. Shall be pulled up with 4.7K-10Kohms to a voltage between3.15V and 3.45V on the host boardTable 2Pin descriptionsPin no.Type Name Description05001181Rev3Page 9 of 17October 2005DRAFT3.2XFP/XFI Reference model compliance points3.3Absolute maximum ratings (CW operation unless otherwise stated)Parameter Symbol Ratings UnitStorage Temperature T st -55 to +125°COperating case temperature T op 0 to 70°CRelative Humidity RH 5 to 95 (non-condensing)%3.4Electrical characteristics (T op = 0°C - 70°C case, CW operation unless otherwise stated)Parameter Symbol Min Typ.Max Unit NotesSupply currents and voltagesVoltage 1Vcc 1 3.1355 3.3 3.465V With Respect to GNDVoltage 2Vcc 2 4.75 5.0 5.25VVoltage 3Vcc 3 1.75 1.8 1.95VPSSupply Current 1Icc 1300400mASupply Current 2Icc 25560mASupply Current 3Icc 31015mA VPSLow speed control and sense signals (detailed specification in XFP MSA v3.1 at )Outputs (Interrupt, Mod_NR, RX_LOS)V OL 0.00.4V Rpullup pulled to host _Vcc, measured at host side of connector. IOL(max)=3mAV OH host_Vcc-0.5host_Vcc+0.3V Rpullup pulled to host _Vcc, measured at host side of connector.Inputs (TX_DIS, P_Down/RST)V IL -0.30.8V Rpullup pulled to host _Vcc, measured at XFP side of connector. IIL(max)=-10uAV IH 2.0Vcc+0.3V Rpullup pulled to host _Vcc, measured at XFP side of connector. IIL(max)=10uAOctober 2005Page 10 of 1705001181Rev3DRAFT 3.5Jitter Specifications SCL and SDA Inputs V IL -0.3Vcc*0.3Rpullup pulled to host _Vcc, measured at XFP side of connector. IIL(max)=-10uAV IH Vcc*0.7Vcc3+0.5Rpullup pulled to host _Vcc, measured at XFP side of connector. IIL(max)=10uATransmitter Input (detailed specification in XFP MSA v3.1 at )Data input baud rate nominal 9.9510.312510.75GBdData input bit rate tolerance +/-20ppm SONETData input compliance C internally AC coupled signals Data input Differential Impedance R I 80100120ΩReceiver Output (detailed specification in XFP MSA v3.1 at )Data output baud rate nominal 9.9510.312510.75GBdData output compliance B internally AC coupled signals Data output bit rate stability +/-20ppmReference clock (detailed specification in XFP MSA v3.1 at )Reference clock rate nominal 155161168MHzReference clock differential voltage V O-DIFF 6401600mV Externally AC coupled signals Reference clock bit rate stability +/-20ppmParameter Symbol Min Max Unit NotesTransmitter electrical input jitter from host at B (detailed specification in XFP MSA v3.1 at )Total Non-DDJ Jitter 0.41UI(p-p)Total jitter less ISITotal Jitter TJ 0.61UI(p-p)Eye Mask X10.305UI Mask coordinate X1=0.205 if total non-DDJ is measuredEye Mask Y160mVEye mask Y2410mV 50 mV is allocated for multiple reflectionsReceiver electrical output jitter to host at C (detailed specification in XFP MSA v3.1 at )Deterministic Jitter DJ 0.18UI(p-p)Includes jitter transferred from the optical receiver during any valid operational input condition.Total Jitter TJ 0.34UI(p-p)Sinusoidal Jitter Tolerence SJ See Figure 4, Figure 5Eye Mask 0.17UIEye Mask 0.42UIEye Mask 170mV3.4Electrical characteristics (continued)(T op = 0°C - 70°C case, CW operation unless otherwise stated)Parameter Symbol Min Typ.Max Unit NotesDRAFTFigure 4XFI Host Receiver Telecom Input Sinusoidal Jitter ToleranceFigure 5XFI Host Receiver Input Datacom Sinusoidal Jitter Tolerance Eye Mask 425mVTelecom module transmitter (detailed specification in XFP MSA v3.1 at )Meets the requirements of SONET GR-253Jitter Transfer Bandwidth BW 8MHz PRBS 2^31-1, OC-192 sinusoidal jitter tolerance maskJitter Peaking 0.03dB Freq. < 120 KHz for loop liming1dB Freq. > 120 KHz (does not apply to CMU mode)Module Jitter Generation at Optical Output.10mUI(RMS)Measured 50 KHz-80MHz. Includes jitter that istransferred from the host.100mUI(p-p)Telecom module receiver (detailed specification in XFP MSA v3.1 at )Jitter Transfer Bandwidth BW 8MHz PRBS 2^31-1, OC-192 sinusoidal jitter tolerance maskJitter Peaking 0.03dB Freq. < 120 KHz for loop liming1dB Freq. > 120 KHz (does not apply to CMU mode)Datacom module transmitter and receiver (detailed specification in XFP MSA v3.1 at )Meets the requirements of IEEE802.3ae and 10GFC in addition to the above SONET specificationsJitter Transfer Bandwidth BW 8MHz PRBS 2^31-1, Data or scrambled 64B/66B as detailed in IEEE 802.3ae Clause 52Jitter Peaking 1dB Frequency >50 KHzParameter Symbol Min Max UnitNotesDRAFT3.6Input Reference Clock Specifications3.7Timing Requirement of Control and Status I/O Parameter Symbol Min Typ.Max Unit Notes Clock differential input impedance Zd 80100120ΩDifferential input clock amplitude 6401600mV AC coupled PECLReference clock duty cycle 4060%Reference Clock Rise/Fall time Tr/Tf 2001250ps 20%-80%Reference clock frequency f0Baud/64MHzRMS random jitter σ10ps up to 100 MHzReference clock frequency tolerance Δf -100+100ppmParameter Symbol Min Max Unit Notes TX_DIS assert time t_off 10μsec Rising edge of TX_DIS to fall of output signal below 10% of nominal TX_DIS negate time t_on 2msec Falling edge of TX_DIS to rise of output signal above 90% of nominal Time to initialize t_init 300msec From power on or from power falling edge of P_Down/RSTInterrupt assert delay Interrupt_on 200msec From occurrence of the condition triggering Interrupt.Interrupt negate delay Interrupt_off 500μsec From clear on read Interrupt flags P_Down/RST assert delay P_Down.RST_on 100μsec From power down initiationMod_NR assert delay Mod_NR_on 1msec From occurrence of fault to assertion of Mod_NRMod_NR negate delay Mod_NR_off 1msec From clearance of signal to negation of Mod_NRP-Down reset time 10μsec Min. length of P-Down assert to initiate resetRX_LOS assert delay t_loss_on 100μsec From Occurrence of loss of signal to assertion of RX_LOSRX_LOS negate delay t_loss_off 100μsec From Occurrence of loss of signal to assertion of RX_LOS2-wire serial bus timing is described in Chapter 4 of XFP MSA v3.1DRAFT3.8XFP 2-wire interface protocol and Management InterfaceThe Picolight PL-XXL-SC-S45-21 module incorporates a XFP compliant 2-wire management interface which is used for serial ID, digital diagnostics, and certain control functions. It is modeled on the SFF-8472 Rev 9.3 specification modified to accommodate a single 2-wire interface address. In addition to the basic I2C read/write functionality the modules supports packet error checking that, when enabled, allows the host system to confirm the validity of any read data. Details of the protocol and interface are explicitly detailed in the MSA. Please refer to the MSA for design reference.Figure 6XFP 2-wire serial digital diagnostic memory mapDRAFT3.9Optical characteristics*(T case = 25°C, CW operation unless otherwise stated)Parameter Symbol Min Typ.Max Unit NotesTransmitterSignal speed 9.9510.312510.75GbpsSignal tolerance +/-100ppmAverage Optical Power P Avg -3.19-2.76-2.22dBmExtinction Ratio Er 3 5.5 6.0dBTriple trade off curve compliance Triple trade off curves define OMA, Spectral Width and Center Wavelength (any two parameters fix the third)OMA (Optical modulation amplitude)OMA 380437776uW RMS Spectral Width Δλ0.350.45nmCenter Wavelength λp 840850860nmRelative Intensity Noise RIN 12OMA -128dB/HzReceiverSignal Speed 9.9510.312510.75GBdWavelength λp 840860nmReturn Loss 12.0dBAverage receive power -1.0dBmStressed Rx Sensitivity OMA S S -7.5dBmBit Error Ratio BER 10-12Without FEC* See IEEE P802.3ae Media Access Control (MAC)Para meters, Physical Layer, and Management Parameters for 10 Gb/s Operation for complete specifica-tion3.10Optical link distancesData Rate Fiber Type Modal Bandwidth @ 850nm (MHz-km)Worst case distance range specified (m)Typical range (m)9.95-10.3125 Gbps 62.5/125um MMF 160 2 - 2662.5/125um MMF 200 2 - 3350/125um MMF 400 2 - 6650/125um MMF 500 2 - 8250/125um MMF 2000 2 - 300>400DRAFT3.11Regulatory complianceThe PL-XXL-SC-S45-21 complies with common ESD, EMI, Immunity, and Component requirements and specifications (see details in Table 3 on page 15).ESD, EMI, and Immunity are dependent on the overall system design. Information included herein is intended as a figure of merit for designers to use as a basis for design decisions.3.12PCB layout Recommended PCB layout is given in XFP MSA v 3.13.13ConnectorsFiberThe XFP module has a duplex LC receptacled connector.ElectricalThe electrical connector is the 30-way, two row PCB edge connector. Customer connector is Tyco/AMP Part No. 788862C or equivalent.Table 3Regulatory compliance Feature Test Method PerformanceLaser Eye Safety IEC 60825-1 Amendment 2 (2001-01)IEC 60825-2 1997Class 1 laser safe.Electrostatic Discharge (ESD) to electrical pinsMIL-STD 883C; Method 3015.4Class 1 (> 1 kV)Electrostatic Discharge (ESD) to optical connector IEC 61000-4-2: 1999Withstand discharges of 15 kV using a “Human Body Model” probeElectromagnetic Interference (EMI)FCC Part 15 Subpart J Class B CISPR 22: 1997EN 55022: 1998 Class B VCCI Class INoise frequency range: 30 MHz to 10 GHz. Good system EMI design practice required to achieve Class B margins.Immunity IEC 61000-4-3: 1998Field strength of 3 V/m RMS, from 10 MHz to 1 GHz. No effect on transceiver performance is detectable between these limits.Component UL 1950CSA C22.2 #950IEC 60950: 1999DRAFTSection 4Related informationOther information related to the 10Gbps 850nm XFP Transceiver includes:•Section 4.1Package and handling instructions below•Section 4.2ESD discharge (ESD) below•Section 4.3Eye safety on page 174.1Package and handling instructionsConnector coversThe PL-XXL-SC-S45-21 is supplied with an LC duplex receptacle. The connector covers supplied protect the connector during standard manufacturing processes and handling by preventingcontamination from dust, aqueous solutions, body oils, or airborne particles.Note:It is recommended that the connector plug remain on whenever the transceiver opticalfiber connector is not inserted.Recommended cleaning and de-greasing chemicalsPicolight recommends the use of methyl, isopropyl and isobutyl alcohols for cleaning.Do not use halogenated hydrocarbons (e.g. trichloroethane, ketones such as acetone, chloroform, ethyl acetate, MEK, methylene chloride, methylene dichloride, phenol, N-methylpyrolldone).Flammability The PL-XXL-SC-S45-21 housing is made from aluminum.4.2ESD discharge (ESD)HandlingNormal ESD precautions are required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should removed from the packaging and otherwise handled in an ESD protected environment utilizing standard grounded benches, floor mats, and wrist straps.Test and operationIn most applications, the optical connector will protrude through the system chassis and be subjected to the same ESD environment as the system. Once properly installed in the system, this transceiver should meet and exceed common ESD testing practices and fulfill system ESD requirements.Typical of optical transceivers, this module’s receiver contains a highly sensitive optical detector and amplifier which may become temporarily saturated during an ESD strike. This could result in a short burst of bit errors. Such an event might require that the application re-acquire synchronization at the higher layers (e.g. Serializer/Deserializer chip).4.3Eye safetyThe PL-XXL-SC-S45-21 is an international Class 1 laser product per IEC 60825-1 Amendment 2(2001) and IEC 60825-2 1997. The PL-XXL-SC-S45-21 is an eye safe device when operated withinthe limits of this specification.Operating this product in a manner inconsistent with intended usage and specification may result inhazardous radiation exposure.C AUTION!Tampering with this laser based product or operating this product outside the limits of this specificationmay be considered an act of “manufacturing,” and will require, under law, recertification of the modifiedproduct with the U.S. Food and Drug Administration (21 CFR 1040).DRAFT。