氧化铝P型垂直DMOS高效模拟MOSFET ZVP3310F说明书

Description and Applications
This MOSFET is designed to minimize the on-state resistance (R DS(ON)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications. ∙
Load Switching
Features and Benefits
∙ Low On-Resistance ∙ Low Input Capacitance ∙ Fast Switching Speed ∙ Low Input/Output Leakage
∙ Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) ∙ Halogen and Antimony Free. “Green” Device (Note 3)
∙ An Automotive-Compliant Part is Available Under Separate Datasheet (ZVP3310FQ )
Mechanical Data
∙ Case: SOT23
∙ Case Material: Molded Plastic, “Green” Molding Compound. UL Flammability Classification Rating 94V-0 ∙ Moisture Sensitivity: Level 1 per J-STD-020
∙ Terminals: Finish − Matte Tin Annealed over Copper Leadframe. Solderable per MIL-STD-202, Method 208 ∙ Terminals Connections: See Diagram Below ∙
Weight: 0.008 grams (Approximate)
2. See https:///quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen - and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which c ontain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
4. For packaging details, go to our website at https:///design/support/packaging/diodes-packaging/.
Marking Information
Top View
Internal Schematic
D
S
G
Top View
MR = Product Type Marking Code
SOT23
Thermal Characteristics
Electrical Characteristics(@T A = +25°C, unless otherwise specified.)
Notes: 5. Measured under pulsed conditions. Width = 300ms. Duty cycle <=2%.
6. Short duration pulse test used to minimize self-heating effect.
7. Guaranteed by design. Not subject to product testing.
V DS =-10V
V GS =0V f=1MHz
V DS = -25V
-50V -100V
I D =-0.2A
V GS =-10V I D =-150mA
V GS =V DS I D =-1mA
V D S - D r a i n S o u r c e V o l t a g e (V o l t s )
N o r m a l i s e d R D S (O N ) a n d V G S (T H )
-60
Normalised R DS(ON) and V GS(TH) v Temperature
T J - Junction Temperature (°C)
C iss C oss C rss
V GS =
I D =
Gate Charge v Gate-Source Voltage
Transconductance v Drain Current
Capacitance v Drain-Source Voltage
Package Outline Dimensions
Please see /package-outlines.html for the latest version.
SOT23
Suggested Pad Layout
Please see /package-outlines.html for the latest version.
SOT23
All 7°。