54F399DM资料
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TL F 953354F 74F398 54F 74F399 Quad 2-Port Register
May1995 54F 74F398 54F 74F399
Quad2-Port Register
General Description
The’F398and’F399are the logical equivalents of a quad
2-input multiplexer feeding into four edge-triggered flip-
flops A common Select input determines which of the two
4-bit words is accepted The selected data enters the flip-
flops on the rising edge of the clock The’F399is the16-pin
version of the’F398 with only the Q outputs of the flip-flops
available
Features
Y Select inputs from two data sources
Y Fully positive edge-triggered operation
Y Both true and complement outputs ’F398
Y Guaranteed4000V minimum ESD protection ’F399 Commercial Military
Package
Package Description
Number
74F398PC N20A20-Lead(0 300 Wide)Molded Dual-In-Line
54F398DM(Note2)J20A20-Lead Ceramic Dual-In-Line
74F398SC(Note1)M20B20-Lead(0 300 Wide)Molded Small Outline JEDEC
54F398FM(Note2)W20A20-Lead Cerpack
54F398LM(Note2)E20A20-Lead Ceramic Leadless Chip Carrier Type C 74F399PC N20A20-Lead(0 300 Wide)Molded Dual-In-Line
54F399DM(Note2)J20A20-Lead Ceramic Dual-In-Line
74F399SC(Note1)M20B20-Lead(0 300 Wide)Molded Small Outline JEDEC
74F399SJ(Note1)M20D20-Lead(0 300 Wide)Molded Small Outline EIAJ
54F399FM(Note2)W20A20-Lead Cerpack
54F399LM(Note2)E20A20-Lead Ceramic Leadless Chip Carrier Type C Note1 Devices also available in13 reel Use suffix e SCX and SJX
Note2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Connection Diagrams
’F398
Pin Assignment
for LCC
TL F 9533–5
Pin Assignment
for DIP SOIC and Flatpak
TL F 9533–6 TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995National Semiconductor Corporation RRD-B30M75 Printed in U S A
Connection Diagrams (Continued)
’F399
TL F 9533–7
TL F 9533–8
Logic Symbols
’F398
TL F 9533–2
’F399
TL F 9533–4
IEEE IEC ’F398
TL F 9533–1
’F399
TL F 9533–3
Unit Loading Fan Out
54F 74F
Pin Names Description
U L Input I IH I IL HIGH LOW Output I OH I OL S Common Select Input
1 0 1 020m A b 0 6mA CP Clock Pulse Input (Active Rising Edge)1 0 1 020m A b 0 6mA I 0a –I 0d Data Inputs from Source 01 0 1 020m A b 0 6mA I 1a –I 1d Data Inputs from Source 11 0 1 020m A b 0 6mA Q a –Q d Register True Outputs
50 33 3b 1mA 20mA Q a –Q d
Register Complementary Outputs (’F398)
50 33 3
b 1mA 20mA
2
Functional Description
The’F398and’F399are high-speed quad2-port registers They select four bits of data from either of two sources (Ports)under control of a common Select input(S) The selected data is transferred to a4-bit output register syn-chronous with the LOW-to-HIGH transition of the Clock in-put(CP) The4-bit D-type output register is fully edge-trig-gered The Data inputs(I0x I1x)and Select input(S)must be stable only a setup time prior to and hold time after the LOW-to-HIGH transition of the Clock input for predictable operation The’F398has both Q and Q outputs
Function Table
Inputs Outputs S I0I1Q Q
I I X L H
I h X H L
h X I L H
h X h H L
H e HIGH Voltage Level
L e LOW Voltage Level
h e HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock transition
I e LOW Voltage Level one setup time prior to the LOW-to-HIGH clock transition
X e Immaterial
’F398only
Logic Diagram
TL F 9533–9 ’F398Only
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
3
Absolute Maximum Ratings(Note1)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b65 C to a150 C
Ambient Temperature under Bias b55 C to a125 C
Junction Temperature under Bias b55 C to a175 C Plastic b55 C to a150 C
V CC Pin Potential to
Ground Pin b0 5V to a7 0V Input Voltage(Note2)b0 5V to a7 0V Input Current(Note2)b30mA to a5 0mA Voltage Applied to Output
in HIGH State(with V CC e0V)
Standard Output b0 5V to V CC TRI-STATE Output b0 5V to a5 5V Current Applied to Output
in LOW State(Max)twice the rated I OL(mA) ESD Last Passing Voltage(Min) ’F3994000V Note1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied
Note2 Either voltage limit or current limit is sufficient to protect inputs Recommended Operating Conditions
Free Air Ambient Temperature
Military b55 C to a125 C Commercial0 C to a70 C Supply Voltage
Military a4 5V to a5 5V Commercial a4 5V to a5 5V
DC Electrical Characteristics
Symbol Parameter
54F 74F
Units V CC Conditions Min Typ Max
V IH Input HIGH Voltage2 0V Recognized as a HIGH Signal V IL Input LOW Voltage0 8V Recognized as a LOW Signal V CD Input Clamp Diode Voltage b1 2V Min I IN e b18mA
V OH Output HIGH54F10%V CC2 5I OH e b1mA Voltage74F10%V CC2 5V Min I OH e b1mA
74F5%V CC2 7I OH e b1mA
V OL Output LOW54F10%V CC0 5
V Min I OL e20mA
Voltage74F10%V CC0 5I OL e20mA
I IH Input HIGH Current54F20 0
m A Max V IN e2 7V
74F5 0
I BVI Input HIGH Current54F100
m A Max V IN e7 0V
Breakdown Test74F7 0
I CEX Output HIGH54F250
m A Max V OUT e V CC
Leakage Current74F50
V ID Input Leakage
74F4 75V0 0I ID e1 9m A
Test All Other Pins Grounded
I OD Output Leakage
74F3 75m A0 0V IOD e150mV
Circuit Current All Other Pins Grounded I IL Input LOW Current b0 6mA Max V IN e0 5V
I OS Output Short-Circuit Current b60b150mA Max V OUT e0V
I CCH Power Supply Current(’F398)2538mA Max V O e HIGH
I CCL Power Supply Current(’F398)2538mA Max V O e LOW
I CCH Power Supply Current(’F399)2234mA Max V O e HIGH
I CCL Power Supply Current(’F399)2234mA Max V O e LOW
4
AC Electrical Characteristics
74F54F74F
T A e a25 C
T A V CC e Mil T A V CC e Com Symbol Parameter V CC e a5 0V
C L e50pF C L e50pF Units
C L e50pF
Min Typ Max Min Max Min Max
f max Input Clock Frequency10014080100MHz t PLH Propagation Delay3 0 5 77 53 09 53 08 5
ns t PHL CP to Q or Q3 06 89 03 011 53 010 0
’F3983 3ns
AC Operating Requirements
74F54F74F
Symbol Parameter
T A e a25 C
T A V CC e Mil T A V CC e Com Units V CC e a5 0V
Min Max Min Max Min Max
t s(H)Setup Time HIGH or LOW3 04 53 0
t s(L)I n to CP3 04 53 0
ns t h(H)Hold Time HIGH or LOW1 01 51 0
t h(L)I n to CP1 01 51 0
t s(H)Setup Time HIGH or LOW7 510 58 5
t s(L)S to CP(’F398)7 510 58 5
t s(H)Setup Time HIGH or LOW7 59 58 5
ns t s(L)S to CP(’F399)7 59 58 5
t h(H)Hold Time HIGH or LOW000
t h(L)S to CP000
t w(H)CP Pulse Width4 04 04 0
ns t w(L)HIGH or LOW5 07 05 0
5
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows
74F398 399S C X
Temperature Range Family Special Variations
74F e Commercial QB e Military grade device with
54F e Military environmental and burn-in
processing
Device Type X e Devices shipped in13 reel
Package Code Temperature Range
P e Plastic DIP C e Commercial(0 C to a70 C)
D e Ceramic DIP M e Military(b55 C to a125 C)
F e Flatpak
L e Leadless Chip Carrier(LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ(74F399only)
6
Physical Dimensions inches(millimeters)
20-Lead Ceramic Leadless Chip Carrier(L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package(D)
NS Package Number J20A
7
Physical Dimensions inches(millimeters)(Continued)
20-Lead(0 300 Wide)Molded Small Outline Package JEDEC(S)
NS Package Number M20B
20-Lead(0 300 Wide)Molded Small Outline Package EIAJ(SJ)
NS Package Number M20D
8
Physical Dimensions inches(millimeters)(Continued)
20-Lead(0 300 Wide)Molded Dual-In-Line Package(P)
NS Package Number N20A
9
54F 74F 398 54F 74F 399Q u a d 2-P o r t R e g i s t e r
Physical Dimensions inches (millimeters)(Continued)
20-Lead Ceramic Flatpak (F)NS Package Number W20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectiveness
be reasonably expected to result in a significant injury to the user
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