SN74LVCR2245ADBRE4中文资料
74LVT2245D-T中文资料
19 OE 18 B0 17 B1 16 B2 15 B3 14 B4 13 B5 12 B6 11 B7 mna817
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mna818
Fig 2. IEC logic symbol
SOT339-1
plastic thin shrink small outline package; 20 leads; SOT360-1 body width 4.4 mm
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
74LVTH2245PW −40 °C to +85 °C TSSOP20
Description
Version
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
plastic shrink small outline package; 20 leads; body width 5.3 mm
The 74LVT2245; 74LVTH2245 is designed with 30 Ω series resistance in both the HIGH-state and LOW-state of the output. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceivers and transmitters.
SN74LV8154N,SN74LV8154NE4,SN74LV8154PW,SN74LV8154PWE4,SN74LV8154PWG4, 规格书,Datasheet 资料
PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)SN74LV8154N ACTIVE PDIP N2020Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeSN74LV8154NE4ACTIVE PDIP N2020Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeSN74LV8154PW ACTIVE TSSOP PW2070Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LV8154PWE4ACTIVE TSSOP PW2070Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LV8154PWG4ACTIVE TSSOP PW2070Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LV8154PWR ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LV8154PWRE4ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LV8154PWRG4ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN74LV8154:•Enhanced Product:SN74LV8154-EPNOTE:Qualified Version Definitions:•Enhanced Product-Supports Defense,Aerospace and Medical ApplicationsTAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74LV8154PWR TSSOPPW202000330.016.46.957.11.68.016.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm)SN74LV8154PWR TSSOP PW202000367.0367.038.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components which meet ISO/TS16949requirements,mainly for automotive ponents which have not been so designated are neither designed nor intended for automotive use;and TI will not be responsible for any failure of such components to meet such requirements.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2012,Texas Instruments Incorporated。
74系列芯片标准数字电路资料
74系列芯片标准数字电路资料-功能大全一．74系列芯片标准数字电路资料-功能大全二。
74系列芯片资料三．74HC/LS/HCT/F系列芯片的区别四．逻辑电平介绍TTL,CMOS五．74HC244与245作用与区别六．74芯片分类总汇一．74系列芯片标准数字电路资料-功能大全7400 TTL 2输入端四与非门7401 TTL 集电极开路2输入端四与非门7402 TTL 2输入端四或非门7403 TTL 集电极开路2输入端四与非门7404 TTL 六反相器7405 TTL 集电极开路六反相器7406 TTL 集电极开路六反相高压驱动器7407 TTL 集电极开路六正相高压驱动器7408 TTL 2输入端四与门7409 TTL 集电极开路2输入端四与门7410 TTL 3输入端3与非门74107 TTL 带清除主从双J-K触发器74109 TTL 带预置清除正触发双J-K触发器7411 TTL 3输入端3与门74112 TTL 带预置清除负触发双J-K触发器7412 TTL 开路输出3输入端三与非门74121 TTL 单稳态多谐振荡器74122 TTL 可再触发单稳态多谐振荡器74123 TTL 双可再触发单稳态多谐振荡器74125 TTL 三态输出高有效四总线缓冲门74126 TTL 三态输出低有效四总线缓冲门7413 TTL 4输入端双与非施密特触发器74132 TTL 2输入端四与非施密特触发器74133 TTL 13输入端与非门74136 TTL 四异或门74138 TTL 3-8线译码器/复工器74139 TTL 双2-4线译码器/复工器7414 TTL 六反相施密特触发器74145 TTL BCD—十进制译码/驱动器7415 TTL 开路输出3输入端三与门74150 TTL 16选1数据选择/多路开关74151 TTL 8选1数据选择器74153 TTL 双4选1数据选择器74154 TTL 4线—16线译码器74155 TTL 图腾柱输出译码器/分配器74156 TTL 开路输出译码器/分配器74157 TTL 同相输出四2选1数据选择器74158 TTL 反相输出四2选1数据选择器7416 TTL 开路输出六反相缓冲/驱动器74160 TTL 可预置BCD异步清除计数器74161 TTL 可予制四位二进制异步清除计数器74162 TTL 可预置BCD同步清除计数器74163 TTL 可予制四位二进制同步清除计数器74164 TTL 八位串行入/并行输出移位寄存器74165 TTL 八位并行入/串行输出移位寄存器74166 TTL 八位并入/串出移位寄存器74169 TTL 二进制四位加/减同步计数器7417 TTL 开路输出六同相缓冲/驱动器74170 TTL 开路输出4×4寄存器堆74173 TTL 三态输出四位D型寄存器74174 TTL 带公共时钟和复位六D触发器74175 TTL 带公共时钟和复位四D触发器74180 TTL 9位奇数/偶数发生器/校验器74181 TTL 算术逻辑单元/函数发生器74185 TTL 二进制—BCD代码转换器74190 TTL BCD同步加/减计数器74191 TTL 二进制同步可逆计数器74192 TTL 可预置BCD双时钟可逆计数器74193 TTL 可预置四位二进制双时钟可逆计数器74194 TTL 四位双向通用移位寄存器74195 TTL 四位并行通道移位寄存器74196 TTL 十进制/二-十进制可预置计数锁存器74197 TTL 二进制可预置锁存器/计数器7420 TTL 4输入端双与非门7421 TTL 4输入端双与门7422 TTL 开路输出4输入端双与非门74221 TTL 双/单稳态多谐振荡器74240 TTL 八反相三态缓冲器/线驱动器74241 TTL 八同相三态缓冲器/线驱动器74243 TTL 四同相三态总线收发器74244 TTL 八同相三态缓冲器/线驱动器74245 TTL 八同相三态总线收发器74247 TTL BCD—7段15V输出译码/驱动器74248 TTL BCD—7段译码/升压输出驱动器74249 TTL BCD—7段译码/开路输出驱动器74251 TTL 三态输出8选1数据选择器/复工器74253 TTL 三态输出双4选1数据选择器/复工器74256 TTL 双四位可寻址锁存器74257 TTL 三态原码四2选1数据选择器/复工器74258 TTL 三态反码四2选1数据选择器/复工器74259 TTL 八位可寻址锁存器/3-8线译码器7426 TTL 2输入端高压接口四与非门74260 TTL 5输入端双或非门74266 TTL 2输入端四异或非门7427 TTL 3输入端三或非门74273 TTL 带公共时钟复位八D触发器74279 TTL 四图腾柱输出S-R锁存器7428 TTL 2输入端四或非门缓冲器74283 TTL 4位二进制全加器74290 TTL 二/五分频十进制计数器74293 TTL 二/八分频四位二进制计数器74295 TTL 四位双向通用移位寄存器74298 TTL 四2输入多路带存贮开关74299 TTL 三态输出八位通用移位寄存器7430 TTL 8输入端与非门7432 TTL 2输入端四或门74322 TTL 带符号扩展端八位移位寄存器74323 TTL 三态输出八位双向移位/存贮寄存器7433 TTL 开路输出2输入端四或非缓冲器74347 TTL BCD—7段译码器/驱动器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74447 TTL BCD—7段译码器/驱动器7445 TTL BCD—十进制代码转换/驱动器74450 TTL 16:1多路转接复用器多工器74451 TTL 双8:1多路转接复用器多工器74453 TTL 四4:1多路转接复用器多工器7446 TTL BCD—7段低有效译码/驱动器74460 TTL 十位比较器74461 TTL 八进制计数器74465 TTL 三态同相2与使能端八总线缓冲器74466 TTL 三态反相2与使能八总线缓冲器74467 TTL 三态同相2使能端八总线缓冲器74468 TTL 三态反相2使能端八总线缓冲器74469 TTL 八位双向计数器7447 TTL BCD—7段高有效译码/驱动器7448 TTL BCD—7段译码器/内部上拉输出驱动74490 TTL 双十进制计数器74491 TTL 十位计数器74498 TTL 八进制移位寄存器7450 TTL 2-3/2-2输入端双与或非门74502 TTL 八位逐次逼近寄存器74503 TTL 八位逐次逼近寄存器7451 TTL 2-3/2-2输入端双与或非门74533 TTL 三态反相八D锁存器74534 TTL 三态反相八D锁存器7454 TTL 四路输入与或非门74540 TTL 八位三态反相输出总线缓冲器7455 TTL 4输入端二路输入与或非门74563 TTL 八位三态反相输出触发器74564 TTL 八位三态反相输出D触发器74573 TTL 八位三态输出触发器74574 TTL 八位三态输出D触发器74645 TTL 三态输出八同相总线传送接收器74670 TTL 三态输出4×4寄存器堆7473 TTL 带清除负触发双J-K触发器7474 TTL 带置位复位正触发双D触发器7476 TTL 带预置清除双J-K触发器7483 TTL 四位二进制快速进位全加器7485 TTL 四位数字比较器7486 TTL 2输入端四异或门7490 TTL 可二/五分频十进制计数器7493 TTL 可二/八分频二进制计数器7495 TTL 四位并行输入\\输出移位寄存器7497 TTL 6位同步二进制乘法器二。
SN74LVC8T245DBQR中文资料
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCCA VCCB
Supply voltage range
VI
Input voltage range(2)
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245 is optimized to operate with VCCA and VCCB set at 1.65 V to 5.5 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
Isolation
(1) Input circuits of the data I/Os are always active.
SN74LVC1T45DCKRE4中文资料
FEATURESV CCA V CCBBGNDADBV PACKAGE(TOP VIEW)DCK PACKAGE(TOP VIEW)V CCA V CCBBAV CCBDRL PACKAGE(TOP VIEW)See mechanical drawings for dimensions.DIRDIRYZP PACKAGE(BOTTOM VIEW)V CCAAV CCBBGND DIR DESCRIPTION/ORDERING INFORMATIONWITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES515H–DECEMBER2003–REVISED JANUARY2007•Available in the Texas Instruments•Max Data RatesNanoFree™Package–420Mbps(3.3-V to5-V Translation)•Fully Configurable Dual-Rail Design Allows–210Mbps(Translate to3.3V) Each Port to Operate Over the Full1.65-V to–140Mbps(Translate to2.5V)5.5-V Power-Supply Range–75Mbps(Translate to1.8V)•V CC Isolation Feature–If Either V CC Input Is at•Latch-Up Performance Exceeds100mA Per GND,Both Ports Are in the High-ImpedanceJESD78,Class IIState•ESD Protection Exceeds JESD22•DIR Input Circuit Referenced to V CCA–2000-V Human-Body Model(A114-A)•Low Power Consumption,4-µA Max I CC–200-V Machine Model(A115-A)•±24-mA Output Drive at3.3V–1000-V Charged-Device Model(C101)•I off Supports Partial-Power-Down ModeOperationThis single-bit noninverting bus transceiver uses two separate configurable power-supply rails.The A port is designed to track V CCA.V CCA accepts any supply voltage from1.65V to5.5V.The B port is designed to track V CCB.V CCB accepts any supply voltage from1.65V to5.5V.This allows for universal low-voltage bidirectional translation between any of the1.8-V,2.5-V,3.3-V,and5-V voltage nodes.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING(2)NanoFree™–WCSP(DSBGA)Reel of3000SN74LVC1T45YZPR___TA_0.23-mm Large Bump–YZP(Pb-free)Reel of3000SN74LVC1T45DBVRSOT(SOT-23)–DBV CT1_Reel of250SN74LVC1T45DBVT–40°C to85°CReel of3000SN74LVC1T45DCKRSOT(SC-70)–DCKReel of250SN74LVC1T45DCKT TA_SOT(SOT-533)–DRL Reel of4000SN74LVC1T45DRLR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.(2)DBV/DCK/DRL:The actual top-side marking has one additional character that designates the assembly/test site.YZP:The actual top-side marking has three preceding characters to denote year,month,and sequence code,and one following character to designate the assembly/test site.Pin1identifier indicates solder-bump composition(1=SnPb,•=Pb-free).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.NanoFree is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2003–2007,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DESCRIPTION/ORDERING INFORMATION (CONTINUED)BDIRAV CCA V CCBWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007The SN74LVC1T45is designed for asynchronous communication between two data buses.The logic levels of the direction-control (DIR)input activate either the B-port outputs or the A-port outputs.The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated.The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I CC and I CCZ .The SN74LVC1T45is designed so that the DIR input is powered by V CCA .This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.The V CC isolation feature ensures that if either V CC input is at GND,then both ports are in the high-impedance state.NanoFree™package technology is a major breakthrough in IC packaging concepts,using the die as the package.FUNCTION TABLE (1)INPUT OPERATION DIR L B data to A bus HA data toB bus(1)Input circuits of the data I/Os always are active.LOGIC DIAGRAM (POSITIVE LOGIC)2Submit Documentation FeedbackAbsolute Maximum Ratings (1)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CCA Supply voltage range –0.5 6.5V V CCB V I Input voltage range (2)–0.5 6.5V V O Voltage range applied to any output in the high-impedance or power-off state (2)–0.5 6.5V A port –0.5V CCA +0.5V O Voltage range applied to any output in the high or low state (2)(3)V B port –0.5V CCB +0.5I IK Input clamp current V I <0–50mA I OK Output clamp current V O <0–50mA I OContinuous output current±50mA Continuous current through V CC or GND±100mADBV package165DCK package 259θJAPackage thermal impedance (4)°C/W DRL package 142YZP package123T stg Storage temperature range–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD 51-7.3Submit Documentation FeedbackRecommended Operating Conditions (1)(2)(3)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007V CCIV CCOMIN MAX UNIT V CCA 1.65 5.5Supply voltageVV CCB1.655.51.65V to 1.95VV CCI ×0.652.3V to 2.7V 1.7High-level V IHData inputs (4)Vinput voltage3V to 3.6V 24.5V to5.5V V CCI ×0.71.65V to 1.95VV CCI ×0.352.3V to 2.7V 0.7Low-level V ILData inputs (4)V input voltage3V to 3.6V 0.84.5V to5.5V V CCI ×0.31.65V to 1.95VV CCA ×0.652.3V to 2.7V 1.7High-level DIRV IHVinput voltage(referenced to V CCA )(5)3V to 3.6V 24.5V to5.5V V CCA ×0.71.65V to 1.95VV CCA ×0.352.3V to 2.7V 0.7Low-level DIRV ILV input voltage (referenced to V CCA )(5)3V to 3.6V 0.84.5V to5.5VV CCA ×0.3V I Input voltage 0 5.5V V OOutput voltageV CCOV 1.65V to 1.95V–42.3V to 2.7V –8I OHHigh-level output currentmA 3V to 3.6V –244.5V to 5.5V –321.65V to 1.95V42.3V to 2.7V 8I OLLow-level output currentmA 3V to 3.6V 244.5V to 5.5V321.65V to 1.95V202.3V to 2.7V 20Data inputsInput transition ∆t/∆v3V to 3.6V 10ns/V rise or fall rate4.5V to5.5V5Control inputs1.65V to 5.5V5T A Operating free-air temperature–4085°C (1)V CCI is the V CC associated with the input port.(2)V CCO is the V CC associated with the output port.(3)All unused data inputs of the device must be held at V CCI or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.(4)For V CCI values not specified in the data sheet,V IH min =V CCI ×0.7V,V IL max =V CCI ×0.3V.(5)For V CCI values not specified in the data sheet,V IH min =V CCA ×0.7V,V IL max =V CCA ×0.3V.4Submit Documentation FeedbackElectrical Characteristics (1)(2)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range (unless otherwise noted)T A =25°C –40°C to 85°C PARAMETERTEST CONDITIONS V CCA V CCB UNITMINTYPMAXMIN MAXV CCO I OH =–100µA1.65V to 4.5V1.65V to 4.5V–0.1I OH =–4mA 1.65V 1.65V 1.2V OHV I =V IHVI OH =–8mA 2.3V 2.3V 1.9I OH =–24mA 3V 3V 2.4I OH =–32mA 4.5V 4.5V 3.8I OL =100µA 1.65V to 4.5V1.65V to 4.5V0.1I OL =4mA1.65V 1.65V 0.45V OLI OL =8mA V I =V IL 2.3V 2.3V 0.3V I OL =24mA 3V 3V 0.55I OL =32mA4.5V 4.5V 0.55I I DIR V I =V CCA or GND 1.65V to5.5V1.65V to 5.5V ±1±2µA A port 0V 0to 5.5V ±1±2I off V I or V O =0to 5.5V µA B port 0to 5.5V 0V ±1±2A or B I OZV O =V CCO or GND1.65V to 5.5V 1.65V to 5.5V ±1±2µA port1.65V to 5.5V1.65V to 5.5V3I CCAV I =V CCI or GND,I O =05.5V 0V 2µA 0V 5.5V -21.65V to 5.5V1.65V to 5.5V3I CCBV I =V CCI or GND,I O =05.5V 0V -2µA 0V5.5V 2I CCA +I CCB V I =V CCI or GND,I O =0 1.65V to 5.5V1.65V to 5.5V4µA (see Table 1)A port at V CCA –0.6V,A port50DIR at V CCA ,B port =open ∆I CCA3V to 5.5V3V to 5.5VµA DIR at V CCA –0.6V,DIRB port =open,50A port at V CCA or GNDB port at V CCB –0.6V,∆I CCB B port DIR at GND,3V to 5.5V 3V to 5.5V 50µA A port =openC i DIR V I =V CCA or GND 3.3V 3.3V 2.5pF A or B C io V O =V CCA/B or GND3.3V3.3V6pFport(1)V CCO is the V CC associated with the output port.(2)V CCI is the V CC associated with the input port.5Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =1.8V ±0.15V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 317.7 2.210.3 1.78.3 1.47.2A B ns t PHL 2.814.3 2.28.5 1.87.1 1.77t PLH 317.7 2.316 2.115.5 1.915.1B A ns t PHL 2.814.3 2.112.9212.6 1.812.2t PHZ 5.219.4 4.818.5 4.718.4 5.117.1DIR A ns t PLZ 2.310.5 2.110.5 2.410.7 3.110.9t PHZ 7.421.9 4.911.5 4.610.3 2.88.2DIR B ns t PLZ 4.216 3.79.2 3.38.4 2.46.4t PZH (1)33.725.223.921.5DIR A ns t PZL (1)36.224.422.920.4t PZH (1)28.220.81918.1DIRBns t PZL (1)33.72725.524.1(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =2.5V ±0.2V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 2.316 1.58.5 1.3 6.4 1.1 5.1A B ns t PHL 2.112.9 1.47.5 1.3 5.40.9 4.6t PLH 2.210.3 1.58.5 1.4817.5B A ns t PHL 2.28.5 1.47.5 1.370.9 6.2t PHZ 38.1 3.18.1 2.88.1 3.28.1DIR A ns t PLZ 1.3 5.9 1.3 5.9 1.3 5.91 5.8t PHZ 6.523.7 4.111.4 3.910.2 2.47.1DIR B ns t PLZ 3.918.9 3.29.6 2.88.4 1.85.3t PZH (1)29.218.116.412.8DIR A ns t PZL (1)32.218.917.213.3t PZH (1)21.914.412.310.9DIRBns t PZL (1)2115.613.512.7(1)The enable time is a calculated value,derived using the formula shown in the enable times section.6Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsOperating CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =3.3V ±0.3V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAXMIN MAX MIN MAX t PLH 2.115.5 1.480.7 5.80.7 4.4A B ns t PHL 212.6 1.370.850.74t PLH 1.78.3 1.3 6.40.7 5.80.6 5.4B A ns t PHL 1.87.1 1.3 5.40.850.7 4.5t PHZ 2.97.337.3 2.87.3 3.47.3DIR A ns t PLZ 1.8 5.6 1.6 5.6 2.2 5.7 2.2 5.7t PHZ 5.420.5 3.910.1 2.98.8 2.4 6.8DIR B ns t PLZ 3.314.5 2.97.8 2.47.1 1.74.9t PZH (1)22.814.212.910.3DIR A ns t PZL (1)27.615.513.811.3t PZH (1)21.113.611.510.1DIRBns t PZL (1)19.914.312.311.3(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =5V ±0.5V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 1.915.117.50.6 5.40.5 3.9A B ns t PHL 1.812.20.9 6.20.7 4.50.5 3.5t PLH 1.47.21 5.10.7 4.40.5 3.9B A ns t PHL 1.770.9 4.60.740.5 3.5t PHZ 2.1 5.4 2.2 5.4 2.2 5.5 2.2 5.4DIR A ns t PLZ 0.9 3.81 3.81 3.70.9 3.7t PHZ 4.820.2 2.59.818.5 2.5 6.5DIR B ns t PLZ 4.214.8 2.57.4 2.57 1.64.5t PZH (1)2212.511.48.4DIR A ns t PZL (1)27.214.412.510t PZH (1)18.911.39.17.6DIRBns t PZL (1)17.611.6108.6(1)The enable time is a calculated value,derived using the formula shown in the enable times section.T A =25°CV CCA =V CCA =V CCA =V CCA =TEST V CCB =1.8VV CCB =2.5VV CCB =3.3VV CCB =5VPARAMETERUNITCONDITIONS TYP TYP TYP TYP A-port input,B-port output C L =0pF,3444C pdA(1)f =10MHz,pF B-port input,A-port output 18192021t r =t f =1ns A-port input,B-port output C L =0pF,18192021C pdB (1)f =10MHz,pF B-port input,A-port output3444t r =t f =1ns(1)Power dissipation capacitance per transceiver7Submit Documentation FeedbackPower-Up ConsiderationsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007A proper power-up sequence always should be followed to avoid excessive supply current,bus contention,oscillations,or other anomalies.To guard against such power-up problems,take the following precautions:1.Connect ground before any supply voltage is applied.2.Power up V CCA .3.V CCB can be ramped up along with or after V CCA .Table 1.Typical Total Static Power Consumption (I CCA +I CCB )V CCAV CCB UNIT0V 1.8V 2.5V 3.3V 5V 0V 0<1<1<1<11.8V <1<2<2<222.5V <1<2<2<2<2µA 3.3V <1<2<2<2<25V<12<2<2<28Submit Documentation FeedbackTYPICAL CHARACTERISTICSt P H L − n sC L − pF105101520253035t P L H− n s C L − pF5101520253035t P H L− n sC L − pF5101520253035t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =1.8VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =1.8V9Submit Documentation Feedback5101520253035t P H L − n sC L − pF5t P L H − n sC L − pFt P H L− n s C L − pF12345678910t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =2.5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =2.5V10Submit Documentation Feedbackt P H L − n sC L − pFt P L H − n sC L − pFt P H L− n s C L − pFt P L H − n s C L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =3.3VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =3.3Vt P H L− n s C L − pFt P L H − n s C L − pFt P H L − n sC L − pFt P L H − n sC L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =5VPARAMETER MEASUREMENT INFORMATIONV OH V OLLOAD CIRCUIT × V CCOOpenOutput Control (low-level enabling)Output Waveform 1S1 at 2 × V CCO (see Note B)Output Waveform 2S1 at GND (see Note B)0 V0 VV CCI0 VV CCAV CCOVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESVOLTAGE WAVEFORMS PULSE DURATIONVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMESInputt pd t PLZ /t PZL t PHZ /t PZHOpen 2 × V CCO GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, Z O = 50 Ω, dv/dt ≥ 1 V/ns.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.V CCI is the V CC associated with the input port.I.V CCO is the V CC associated with the output port.J.All parameters and waveforms are not applicable to all devices.1.8 V ± 0.15 V2.5 V ± 0.2 V3.3 V ± 0.3 V 5 V ± 0.5 V2 k Ω2 k Ω2 k Ω2 k ΩV CCO R L 0.15 V 0.15 V 0.3 V 0.3 VV TP C L 15 pF 15 pF 15 pF 15 pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 1.Load Circuit and Voltage WaveformsAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2SN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 2shows an example of the SN74LVC1T45being used in a unidirectional logic level-shifting application.PIN NAME FUNCTION DESCRIPTION1V CCA V CC1SYSTEM-1supply voltage (1.65V to 5.5V)2GND GND Device GND3A OUT Output level depends on V CC1voltage.4B IN Input threshold value depends on V CC2voltage.5DIR DIR GND (low level)determines B-port to A-port direction.6V CCBV CC2SYSTEM-2supply voltage (1.65V to 5.5V)Figure 2.Unidirectional Logic Level-Shifting ApplicationAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2Enable TimesSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 3shows the SN74LVC1T45being used in a bidirectional logic level-shifting application.Since the SN74LVC1T45does not have an output-enable (OE)pin,the system designer should take precautions to avoid bus contention between SYSTEM-1and SYSTEM-2when changing directions.The following table shows data transmission from SYSTEM-1to SYSTEM-2and then from SYSTEM-2to SYSTEM-1.STATE DIR CTRLI/O-1I/O-2DESCRIPTION1H Out In SYSTEM-1data to SYSTEM-2SYSTEM-2is getting ready to send data to SYSTEM-1.I/O-1and I/O-2are disabled.The 2H Hi-Z Hi-Z bus-line state depends on pullup or pulldown.(1)DIR bit is flipped.I/O-1and I/O-2still are disabled.The bus-line state depends on pullup or 3L Hi-Z Hi-Z pulldown.(1)4LOutInSYSTEM-2data to SYSTEM-1(1)SYSTEM-1and SYSTEM-2must use the same conditions,i.e.,both pullup or both pulldown.Figure 3.Bidirectional Logic Level-Shifting ApplicationCalculate the enable times for the SN74LVC1T45using the following formulas:•t PZH (DIR to A)=t PLZ (DIR to B)+t PLH (B to A)•t PZL (DIR to A)=t PHZ (DIR to B)+t PHL (B to A)•t PZH (DIR to B)=t PLZ (DIR to A)+t PLH (A to B)•t PZL (DIR to B)=t PHZ (DIR to A)+t PHL (A to B)In a bidirectional application,these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected.For example,if the SN74LVC1T45initially is transmitting from A to B,then the DIR bit is switched;the B port of the device must be disabled before presenting it with an input.After the B port has been disabled,an input signal applied to it appears on the corresponding A port after the specified propagation delay.PACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LVC1T45DBVR ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVRE4ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVT ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVTE4ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKR ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRE4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRG4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKT ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTE4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTG4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLR ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLRG4ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45YZPRACTIVEWCSPYZP63000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device isin production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is 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SN74LVC2T45DCTRE4
SN74LVC2T45双位双电源总线收发器具有可配置的电压转换和三态输出2003年12月至2007年3月特征德克萨斯州仪器公司提供纳米簧片封装完全可配置的双轨设计允许每个端口在1.65伏至5.5伏电源范围如果任一VCC输入位于，则为VCC隔离特性GND，两个端口都处于高阻态州参考VCCA的直接输入电路低功耗，最大电流10安3.3伏24毫安输出驱动我关闭支持部分掉电模式操作最大数据速率420兆比特每秒(3.3伏至5伏转换)210兆比特每秒(转换为3.3伏)140兆比特每秒(转换为2.5伏)75兆比特每秒(转换为1.8伏)闩锁性能超过100毫安每JESD 78，二级ESD保护超过JESD 22 4000伏人体模型(A114-A) 200伏机器型号(A115-A) 1000伏充电设备型号(C101)描述/订购信息DCT或DCU包(俯视图)12 3 48 7 6 5VCCAA1 A2GNDVCCB B1 B2目录YZP套餐(仰视图)第一等的GNDB1目录A2 B2VCCA·VCCB28346 7 15A1 A2B2C2D2B1C1D1这款双位同相总线收发器使用两条独立的可配置电源轨。
港口是旨在追踪VCCA。
VCCA接受从1.65伏到5.5伏的任何电源电压VCCB。
VCCB接受从1.65伏到5.5伏的任何电源电压。
这允许通用低压双向1.8伏、2.5伏、3.3伏和5伏电压节点之间的转换。
谢谢包装(1)可订购零件号顶部标记(2)40℃至85℃纳米树WCSP(DSBGA)0.23毫米大凸点YZP(无铅)3000卷sn74 LPC 2t 45YZPR_ _ _结核病_SSOP离散余弦变换3000卷SN74LVC2T45DCTRCT2_ _ _250卷sn 74 lc2t 45DCTTDCU3000卷sn 74 lc2t 45DCURCT2_250卷SN74LVC2T45DCUT(1)有关最新的包装和订购信息，请参见本文件末尾的包装选项附录，或参见技术信息网站。
74LVC245A_04中文资料
1/12July 2004s 5V TOLERANT INPUTSs HIGH SPEED: t PD = 6.3ns (MAX.) at V CC = 3V sPOWER DOWN PROTECTION ON INPUTS AND OUTPUTSsSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 24mA (MIN) at V CC = 3Vs PCI BUS LEVELS GUARANTEED AT 24 mA sBALANCED PROPAGATION DELAYS:t PLH ≅ t PHLsOPERATING VOLTAGE RANGE:V CC (OPR) = 1.65V to 3.6V (1.2V Data Retention)sPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245sLATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)sESD PERFORMANCE:HBM > 2000V (MIL STD 883 method 3015); MM > 200VDESCRIPTIONThe 74LVC245A is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. It is ideal for 1.65 to 3.6V CC operations and low power and low noise applications.This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated.It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption.All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.All floating bus terminals during High Z State must be held HIGH or LOW.74LVC245ALOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER(NOT INVERTED) HIGH PERFORMANCE.Table 1: Order CodesPACKAGE T & R SOP 74LVC245AMTR TSSOP74LVC245ATTR74LVC245A2/12Figure 2: Input And Output Equivalent CircuitTable 2: Pin DescriptionTable 3: Truth TableX : Don’t CareZ : High ImpedanceTable 4: Absolute Maximum RatingsAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied1) I O absolute maximum rating must be observed 2) V O< GNDPIN N°SYMBOL NAME AND FUNCTION 1DIR Directional Control 2, 3, 4, 5, 6, 7, 8, 9A1 to A8Data Inputs/Outputs 18, 17, 16, 15, 14, 13, 12, 11B1 to B8Data Inputs/Outputs19GOutput Enable Input 10GND Ground (0V)20V CCPositive Supply VoltageINPUTS FUNCTION OUTPUT G DIR A BUSB BUSYn L L OUTPUT INPUT A = B L H INPUT OUTPUT B = A HXZ ZZSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +7.0V V I DC Input Voltage-0.5 to +7.0V V O DC Output Voltage (High Impedance or V CC = 0V)-0.5 to +7.0V V O DC Output Voltage (High or Low State) (note 1)-0.5 to V CC + 0.5V I IK DC Input Diode Current- 50mA I OK DC Output Diode Current (note 2)- 50mA I O DC Output Current ± 50mA I CC or I GND DC V CC or Ground Current per Supply Pin± 100mA T stg Storage Temperature -65 to +150°C T LLead Temperature (10 sec)300°C74LVC245A3/12Table 5: Recommended Operating Conditions1) Truth Table guaranteed: 1.2V to 3.6V 2) V IN from 0.8V to 2V at V CC = 3.0VTable 6: DC SpecificationsSymbol ParameterValue Unit V CC Supply Voltage (note 1) 1.65 to 3.6V V I Input Voltage0 to 5.5V V O Output Voltage (High Impedance or V CC = 0V)0 to 5.5V V O Output Voltage (High or Low State)0 to V CC V I OH , I OL High or Low Level Output Current (V CC = 3.0 to 3.6V)± 24mA I OH , I OL High or Low Level Output Current (V CC = 2.7 to 3.0V)± 12mA I OH , I OL High or Low Level Output Current (V CC = 2.3 to 2.7V)±8mA I OH , I OL High or Low Level Output Current (V CC = 1.65 to 2.3V)±4mA T op Operating Temperature-55 to 125°C dt/dvInput Rise and Fall Time (note 2)0 to 10ns/VSymbolParameterTest ConditionValueUnitV CC (V)-40 to 85 °C -55 to 125 °C Min.Max.Min.Max.V IHHigh Level Input Voltage 1.65 to 1.950.65V CC0.65V CC V2.3 to 2.7 1.7 1.72.7 to3.622V ILLow Level Input Voltage1.65 to 1.950.35V CC0.35V CC V 2.3 to 2.70.70.72.7 to 3.60.80.8V OHHigh Level Output Voltage1.65 to 3.6I O =-100 µA V CC -0.2V CC -0.2V1.65I O =-4 mA 1.2 1.22.3I O =-8 mA 1.7 1.72.7I O =-12 mA 2.2 2.23.0I O =-18 mA 2.4 2.43.0I O =-24 mA 2.22.2V OLLow Level Output Voltage1.65 to 3.6I O =100 µA 0.20.2V 1.65I O =4 mA 0.450.452.3I O =8 mA 0.70.72.7I O =12 mA 0.40.43.0I O =24 mA 0.550.55I I Input Leakage Current 3.6V I = 0 to 5.5V ± 5± 5µA I off Power Off Leakage Current0V I or V O = 5.5V 1010µA I OZHigh Impedance Output Leakage Current3.6V I = V IH orV IL V O = 0 to 5.5V ± 10± 10µA I CCQuiescent Supply Current3.6V I = V CC or GND1010µA V I or V O = 3.6 to5.5V± 10± 10∆I CCI CC incr. per Input2.7 to3.6V IH = V CC -0.6V500500µA74LVC245A4/12Table 7: Dynamic Switching Characteristics1) Number of output defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state.Table 8: AC Electrical Characteristics1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-ing in the same direction, either HIGH or LOW (t OSLH = | t PLHm - t PLHn |, t OSHL = | t PHLm - t PHLn |2) Parameter guaranteed by designTable 9: Capacitive Characteristics1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /n (per circuit)SymbolParameterTest ConditionValue UnitV CC (V)T A = 25 °C Min.Typ.Max.V OLP Dynamic Low Level Quiet Output (note 1)3.3C L = 50pFV IL = 0V, V IH = 3.3V0.8V V OLV-0.8SymbolParameterTest ConditionValueUnitV CC (V)C L (pF)R L (Ω)t s = t r (ns)-40 to 85 °C -55 to 125 °C Min.Max.Min.Max.t PLH t PHLPropagation Delay Time1.65 to 1.953010002.0 2.09.0 2.012ns2.3 to 2.730500 2.0 2.08.0 2.010.52.750500 2.5 1.57.3 1.58.83.0 to 3.650500 2.5 1.0 6.3 1.07.6t PZL t PZHOutput Enable Time 1.65 to 1.95301000 2.0 2.012 2.016ns2.3 to 2.730500 2.0 2.09.5 2.012.52.750500 2.5 1.09.0 1.0113.0 to 3.650500 2.5 1.08.5 1.010t PLZ t PHZOutput Disable Time 1.65 to 1.95301000 2.0 2.011 2.014ns2.3 to 2.730500 2.0 2.09.0 2.0122.750500 2.5 2.08.5 2.0103.0 to 3.6505002.52.07.5 2.09.0t OSLH t OSHLOutput To Output Skew Time (note1, 2)2.7 to3.611nsSymbolParameterTest ConditionValue UnitV CC (V)T A = 25 °C Min.Typ.Max.C IN Input Capacitance4pF C PDPower Dissipation Capacitance (note 1)1.8f IN = 10MHz28pF 2.5303.33474LVC245A5/12Figure 3: Test CircuitR T = Z OUT of pulse generator (typically 50Ω)Table 10: Test Circuit And Waveform Symbol ValueFigure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)SymbolV CC1.65 to 1.95V2.3 to 2.7V 2.7V3.0 to 3.6V C L 30pF 30pF 50pF 50pF R L = R 11000Ω500Ω500Ω500ΩV S 2 x V CC 2 x V CC 6V 6V V IH V CC V CC 2.7V 2.7V V M VCC /2V CC /2 1.5V 1.5V V OH V CC V CC 3.0V 3.0V V X V OL + 0.15V V OL + 0.15V V OL + 0.3V V OL + 0.3V VY V OH - 0.15V V OH - 0.15V V OH - 0.3V V OH - 0.3V t r = t r<2.0ns<2.0ns<2.5ns<2.5ns74LVC245AFigure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)6/1274LVC245A7/12DIM.mm.inch MIN.TYPMAX.MIN.TYP.MAX.A 2.35 2.650.0930.104A10.10.300.0040.012B 0.330.510.0130.020C 0.230.320.0090.013D 12.6013.000.4960.512E 7.47.60.2910.299e 1.270.050H 10.0010.650.3940.419h 0.250.750.0100.030L 0.4 1.270.0160.050k 0°8°0°8°ddd0.1000.004SO-20 MECHANICAL DATA0016022D74LVC245A8/12DIM.mm.inchMIN.TYPMAX.MIN.TYP.MAX.A 1.20.047A10.050.150.0020.0040.006A20.81 1.050.0310.0390.041b 0.190.300.0070.012c 0.090.200.0040.0079D 6.4 6.5 6.60.2520.2560.260E 6.2 6.4 6.60.2440.2520.260E1 4.34.4 4.480.1690.1730.176e 0.65 BSC0.0256 BSCK 0˚8˚0˚8˚L0.450.600.750.0180.0240.030TSSOP20 MECHANICAL DATAcEbA2AE1D1PIN 1 IDENTIFICATIONA1LK e0087225C74LVC245A Tape & Reel SO-20 MECHANICAL DATAmm.inchDIM.MIN.TYP MAX.MIN.TYP.MAX.A33012.992C12.813.20.5040.519D20.20.795N60 2.362T30.4 1.197Ao10.8110.4250.433Bo13.213.40.5200.528Ko 3.1 3.30.1220.130Po 3.9 4.10.1530.161P11.912.10.4680.4769/1274LVC245ATape & Reel TSSOP20 MECHANICAL DATAmm.inch DIM.MIN.TYP MAX.MIN.TYP.MAX.A33012.992 C12.813.20.5040.519 D20.20.795N60 2.362T22.40.882 Ao 6.870.2680.276 Bo 6.97.10.2720.280 Ko 1.7 1.90.0670.075 Po 3.9 4.10.1530.161 P11.912.10.4680.47610/1274LVC245A Table 11: Revision HistoryDate Revision Description of Changes26-Jul-20044Ordering Codes Revision - pag. 1.11/1274LVC245AInformation furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronicsAll other names are the property of their respective owners© 2004 STMicroelectronics - All Rights ReservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America12/12。
SN74LVC243资料
元器件交易网IMPORTANT NOTICETexas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductorproduct or service without notice, and advises its customers to obtain the latest version of relevant informationto verify, before placing orders, that the information being relied on is current.TI warrants performance of its semiconductor products and related software to the specifications applicable atthe time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques areutilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of eachdevice is not necessarily performed, except those mandated by government requirements.Certain applications using semiconductor products may involve potential risks of death, personal injury, orsevere property or environmental damage (“Critical Applications”).TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTEDTO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS.Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TIproducts in such applications requires the written approval of an appropriate TI officer. Questions concerningpotential risk applications should be directed to TI through a local SC sales office.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards should be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance, customer product design, software performance, orinfringement of patents or services described herein. Nor does TI warrant or represent that any license, eitherexpress or implied, is granted under any patent right, copyright, mask work right, or other intellectual propertyright of TI covering or relating to any combination, machine, or process in which such semiconductor productsor services might be or are used.Copyright © 1996, Texas Instruments Incorporated。
74LVC245AD原版数据手册.pdf-EasyDatasheet
NXP Semiconductors
74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74LVC245AD 74LVCH245AD 74LVC245ADB 74LVCH245ADB 74LVC245APW 74LVCH245APW 74LVC245ABQ 74LVCH245ABQ 74LVC245ABX 74LVCH245ABX 40 C to +125 C DHXQFN20 40 C to +125 C DHVQFN20 40 C to +125 C TSSOP20 40 C to +125 C SSOP20 40 C to +125 C SO20 Description plastic small outline package; 20 leads; body width 7.5 mm plastic shrink small outline package; 20 leads; body width 5.3 mm Version SOT163-1 SOT339-1 Type number
74LVC_LVCH245A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 8 — 28 June 2013
74HC245详细中文资料知识讲解
74HC245详细中文资料74HC245是一款高速CMOS器件，74HC2 45引脚兼容低功耗肖特基TTL （LSTTL）系列。
74HC245译码器可接受3位二进制加权地址输入（A0, A1和A2），并当使能时，提供8个互斥的低有效输出（Y0至Y7）o74HC245特有3个使能输入端：两个低有效（E1和E2）和一个高有效（E3）。
除非E1和E2置低且E3置高，否则74HC138将保持所有输出为高。
利用这种复合使能特性，仅需4片74HC 245芯片和1个反相器，即可轻松实现并行扩展，组合成为一个1-32（5线到3 2线）译码器。
任选一个低有效使能输入端作为数据输入，而把其余的使能输入端作为选通端，则74HC245亦可充当一个8输出多路分配器，未使用的使能输入端必须保持绑定在各自合适的高有效或低有效状态。
74HC245与74HC 238逻辑功能一致，只不过74HC138为反相输出。
功能CD74HC245，CD74HC238 和CD74HCT245，CD74HCT238 是高速硅栅CMOS解码器，适合内存地址解码或数据路由应用。
74HC245作用原理于高性能的存贮译码或要求传输延迟时间短的数据传输系统，在高性能存贮器系统中，用这种译码器可以提高译码系统的效率。
将快速赋能电路用于高速存贮器时, 译码器的延迟时间和存贮器的赋能时间通常小于存贮器的典型存取时间,这就是说由肖特基钳位的系统译码器所引起的有效系统延迟可以忽略不计。
HC138按照三位二进制输入码和赋能输入条件，从8个输出端中译出一个低电平输出。
两个低电平有效的赋能输入端和一个高电平有效的赋能输入端减少了扩展所需要的外接门或倒相器,扩展成24线译码器不需外接门;扩展成32线译码器,只需要接一个外接倒相器。
在解调器应用中,赋能输入端可用作数据输入端。
特性仅供学习与参考复合使能输入，轻松实现扩展兼容JEDEC标准no.7A存储器芯片译码选择的理想选择低有效互斥输出ESD保护HBM EIA/JESD22-A114-C超过20 00 V MM EIA/JESD22-A115-A超过200 V 温度范围-40〜+85 ℃ -40〜+12 5 ℃多路分配功能74HC245是一款高速CMOS器件，74HC245引脚兼容低功耗肖特基TTL （LSTTL）系歹列。
SN74LVC1G11DBVRE4中文资料
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
SN74LVC1G11 SINGLE 3-INPUT POSITIVE-AND GATE
SCES487D – SEPTEMBER 2003 – REVISED JANUARY 2007
Operation • Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II • ESD Protection Exceeds JESD 22
元器件交易网
FEATURES
• Available in the Texas Instruments NanoFree™ Package
• Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.1 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Partial-Power-Down Mode
SN74LVC1T45DRLRG4中文资料
FEATURESV CCA V CCBBGNDADBV PACKAGE(TOP VIEW)DCK PACKAGE(TOP VIEW)V CCA V CCBBAV CCBDRL PACKAGE(TOP VIEW)See mechanical drawings for dimensions.DIRDIRYZP PACKAGE(BOTTOM VIEW)V CCAAV CCBBGND DIR DESCRIPTION/ORDERING INFORMATIONWITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES515H–DECEMBER2003–REVISED JANUARY2007•Available in the Texas Instruments•Max Data RatesNanoFree™Package–420Mbps(3.3-V to5-V Translation)•Fully Configurable Dual-Rail Design Allows–210Mbps(Translate to3.3V) Each Port to Operate Over the Full1.65-V to–140Mbps(Translate to2.5V)5.5-V Power-Supply Range–75Mbps(Translate to1.8V)•V CC Isolation Feature–If Either V CC Input Is at•Latch-Up Performance Exceeds100mA Per GND,Both Ports Are in the High-ImpedanceJESD78,Class IIState•ESD Protection Exceeds JESD22•DIR Input Circuit Referenced to V CCA–2000-V Human-Body Model(A114-A)•Low Power Consumption,4-µA Max I CC–200-V Machine Model(A115-A)•±24-mA Output Drive at3.3V–1000-V Charged-Device Model(C101)•I off Supports Partial-Power-Down ModeOperationThis single-bit noninverting bus transceiver uses two separate configurable power-supply rails.The A port is designed to track V CCA.V CCA accepts any supply voltage from1.65V to5.5V.The B port is designed to track V CCB.V CCB accepts any supply voltage from1.65V to5.5V.This allows for universal low-voltage bidirectional translation between any of the1.8-V,2.5-V,3.3-V,and5-V voltage nodes.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING(2)NanoFree™–WCSP(DSBGA)Reel of3000SN74LVC1T45YZPR___TA_0.23-mm Large Bump–YZP(Pb-free)Reel of3000SN74LVC1T45DBVRSOT(SOT-23)–DBV CT1_Reel of250SN74LVC1T45DBVT–40°C to85°CReel of3000SN74LVC1T45DCKRSOT(SC-70)–DCKReel of250SN74LVC1T45DCKT TA_SOT(SOT-533)–DRL Reel of4000SN74LVC1T45DRLR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.(2)DBV/DCK/DRL:The actual top-side marking has one additional character that designates the assembly/test site.YZP:The actual top-side marking has three preceding characters to denote year,month,and sequence code,and one following character to designate the assembly/test site.Pin1identifier indicates solder-bump composition(1=SnPb,•=Pb-free).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.NanoFree is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2003–2007,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DESCRIPTION/ORDERING INFORMATION (CONTINUED)BDIRAV CCA V CCBWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007The SN74LVC1T45is designed for asynchronous communication between two data buses.The logic levels of the direction-control (DIR)input activate either the B-port outputs or the A-port outputs.The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated.The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I CC and I CCZ .The SN74LVC1T45is designed so that the DIR input is powered by V CCA .This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.The V CC isolation feature ensures that if either V CC input is at GND,then both ports are in the high-impedance state.NanoFree™package technology is a major breakthrough in IC packaging concepts,using the die as the package.FUNCTION TABLE (1)INPUT OPERATION DIR L B data to A bus HA data toB bus(1)Input circuits of the data I/Os always are active.LOGIC DIAGRAM (POSITIVE LOGIC)2Submit Documentation FeedbackAbsolute Maximum Ratings (1)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CCA Supply voltage range –0.5 6.5V V CCB V I Input voltage range (2)–0.5 6.5V V O Voltage range applied to any output in the high-impedance or power-off state (2)–0.5 6.5V A port –0.5V CCA +0.5V O Voltage range applied to any output in the high or low state (2)(3)V B port –0.5V CCB +0.5I IK Input clamp current V I <0–50mA I OK Output clamp current V O <0–50mA I OContinuous output current±50mA Continuous current through V CC or GND±100mADBV package165DCK package 259θJAPackage thermal impedance (4)°C/W DRL package 142YZP package123T stg Storage temperature range–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD 51-7.3Submit Documentation FeedbackRecommended Operating Conditions (1)(2)(3)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007V CCIV CCOMIN MAX UNIT V CCA 1.65 5.5Supply voltageVV CCB1.655.51.65V to 1.95VV CCI ×0.652.3V to 2.7V 1.7High-level V IHData inputs (4)Vinput voltage3V to 3.6V 24.5V to5.5V V CCI ×0.71.65V to 1.95VV CCI ×0.352.3V to 2.7V 0.7Low-level V ILData inputs (4)V input voltage3V to 3.6V 0.84.5V to5.5V V CCI ×0.31.65V to 1.95VV CCA ×0.652.3V to 2.7V 1.7High-level DIRV IHVinput voltage(referenced to V CCA )(5)3V to 3.6V 24.5V to5.5V V CCA ×0.71.65V to 1.95VV CCA ×0.352.3V to 2.7V 0.7Low-level DIRV ILV input voltage (referenced to V CCA )(5)3V to 3.6V 0.84.5V to5.5VV CCA ×0.3V I Input voltage 0 5.5V V OOutput voltageV CCOV 1.65V to 1.95V–42.3V to 2.7V –8I OHHigh-level output currentmA 3V to 3.6V –244.5V to 5.5V –321.65V to 1.95V42.3V to 2.7V 8I OLLow-level output currentmA 3V to 3.6V 244.5V to 5.5V321.65V to 1.95V202.3V to 2.7V 20Data inputsInput transition ∆t/∆v3V to 3.6V 10ns/V rise or fall rate4.5V to5.5V5Control inputs1.65V to 5.5V5T A Operating free-air temperature–4085°C (1)V CCI is the V CC associated with the input port.(2)V CCO is the V CC associated with the output port.(3)All unused data inputs of the device must be held at V CCI or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.(4)For V CCI values not specified in the data sheet,V IH min =V CCI ×0.7V,V IL max =V CCI ×0.3V.(5)For V CCI values not specified in the data sheet,V IH min =V CCA ×0.7V,V IL max =V CCA ×0.3V.4Submit Documentation FeedbackElectrical Characteristics (1)(2)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range (unless otherwise noted)T A =25°C –40°C to 85°C PARAMETERTEST CONDITIONS V CCA V CCB UNITMINTYPMAXMIN MAXV CCO I OH =–100µA1.65V to 4.5V1.65V to 4.5V–0.1I OH =–4mA 1.65V 1.65V 1.2V OHV I =V IHVI OH =–8mA 2.3V 2.3V 1.9I OH =–24mA 3V 3V 2.4I OH =–32mA 4.5V 4.5V 3.8I OL =100µA 1.65V to 4.5V1.65V to 4.5V0.1I OL =4mA1.65V 1.65V 0.45V OLI OL =8mA V I =V IL 2.3V 2.3V 0.3V I OL =24mA 3V 3V 0.55I OL =32mA4.5V 4.5V 0.55I I DIR V I =V CCA or GND 1.65V to5.5V1.65V to 5.5V ±1±2µA A port 0V 0to 5.5V ±1±2I off V I or V O =0to 5.5V µA B port 0to 5.5V 0V ±1±2A or B I OZV O =V CCO or GND1.65V to 5.5V 1.65V to 5.5V ±1±2µA port1.65V to 5.5V1.65V to 5.5V3I CCAV I =V CCI or GND,I O =05.5V 0V 2µA 0V 5.5V -21.65V to 5.5V1.65V to 5.5V3I CCBV I =V CCI or GND,I O =05.5V 0V -2µA 0V5.5V 2I CCA +I CCB V I =V CCI or GND,I O =0 1.65V to 5.5V1.65V to 5.5V4µA (see Table 1)A port at V CCA –0.6V,A port50DIR at V CCA ,B port =open ∆I CCA3V to 5.5V3V to 5.5VµA DIR at V CCA –0.6V,DIRB port =open,50A port at V CCA or GNDB port at V CCB –0.6V,∆I CCB B port DIR at GND,3V to 5.5V 3V to 5.5V 50µA A port =openC i DIR V I =V CCA or GND 3.3V 3.3V 2.5pF A or B C io V O =V CCA/B or GND3.3V3.3V6pFport(1)V CCO is the V CC associated with the output port.(2)V CCI is the V CC associated with the input port.5Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =1.8V ±0.15V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 317.7 2.210.3 1.78.3 1.47.2A B ns t PHL 2.814.3 2.28.5 1.87.1 1.77t PLH 317.7 2.316 2.115.5 1.915.1B A ns t PHL 2.814.3 2.112.9212.6 1.812.2t PHZ 5.219.4 4.818.5 4.718.4 5.117.1DIR A ns t PLZ 2.310.5 2.110.5 2.410.7 3.110.9t PHZ 7.421.9 4.911.5 4.610.3 2.88.2DIR B ns t PLZ 4.216 3.79.2 3.38.4 2.46.4t PZH (1)33.725.223.921.5DIR A ns t PZL (1)36.224.422.920.4t PZH (1)28.220.81918.1DIRBns t PZL (1)33.72725.524.1(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =2.5V ±0.2V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 2.316 1.58.5 1.3 6.4 1.1 5.1A B ns t PHL 2.112.9 1.47.5 1.3 5.40.9 4.6t PLH 2.210.3 1.58.5 1.4817.5B A ns t PHL 2.28.5 1.47.5 1.370.9 6.2t PHZ 38.1 3.18.1 2.88.1 3.28.1DIR A ns t PLZ 1.3 5.9 1.3 5.9 1.3 5.91 5.8t PHZ 6.523.7 4.111.4 3.910.2 2.47.1DIR B ns t PLZ 3.918.9 3.29.6 2.88.4 1.85.3t PZH (1)29.218.116.412.8DIR A ns t PZL (1)32.218.917.213.3t PZH (1)21.914.412.310.9DIRBns t PZL (1)2115.613.512.7(1)The enable time is a calculated value,derived using the formula shown in the enable times section.6Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsOperating CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =3.3V ±0.3V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAXMIN MAX MIN MAX t PLH 2.115.5 1.480.7 5.80.7 4.4A B ns t PHL 212.6 1.370.850.74t PLH 1.78.3 1.3 6.40.7 5.80.6 5.4B A ns t PHL 1.87.1 1.3 5.40.850.7 4.5t PHZ 2.97.337.3 2.87.3 3.47.3DIR A ns t PLZ 1.8 5.6 1.6 5.6 2.2 5.7 2.2 5.7t PHZ 5.420.5 3.910.1 2.98.8 2.4 6.8DIR B ns t PLZ 3.314.5 2.97.8 2.47.1 1.74.9t PZH (1)22.814.212.910.3DIR A ns t PZL (1)27.615.513.811.3t PZH (1)21.113.611.510.1DIRBns t PZL (1)19.914.312.311.3(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =5V ±0.5V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 1.915.117.50.6 5.40.5 3.9A B ns t PHL 1.812.20.9 6.20.7 4.50.5 3.5t PLH 1.47.21 5.10.7 4.40.5 3.9B A ns t PHL 1.770.9 4.60.740.5 3.5t PHZ 2.1 5.4 2.2 5.4 2.2 5.5 2.2 5.4DIR A ns t PLZ 0.9 3.81 3.81 3.70.9 3.7t PHZ 4.820.2 2.59.818.5 2.5 6.5DIR B ns t PLZ 4.214.8 2.57.4 2.57 1.64.5t PZH (1)2212.511.48.4DIR A ns t PZL (1)27.214.412.510t PZH (1)18.911.39.17.6DIRBns t PZL (1)17.611.6108.6(1)The enable time is a calculated value,derived using the formula shown in the enable times section.T A =25°CV CCA =V CCA =V CCA =V CCA =TEST V CCB =1.8VV CCB =2.5VV CCB =3.3VV CCB =5VPARAMETERUNITCONDITIONS TYP TYP TYP TYP A-port input,B-port output C L =0pF,3444C pdA(1)f =10MHz,pF B-port input,A-port output 18192021t r =t f =1ns A-port input,B-port output C L =0pF,18192021C pdB (1)f =10MHz,pF B-port input,A-port output3444t r =t f =1ns(1)Power dissipation capacitance per transceiver7Submit Documentation FeedbackPower-Up ConsiderationsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007A proper power-up sequence always should be followed to avoid excessive supply current,bus contention,oscillations,or other anomalies.To guard against such power-up problems,take the following precautions:1.Connect ground before any supply voltage is applied.2.Power up V CCA .3.V CCB can be ramped up along with or after V CCA .Table 1.Typical Total Static Power Consumption (I CCA +I CCB )V CCAV CCB UNIT0V 1.8V 2.5V 3.3V 5V 0V 0<1<1<1<11.8V <1<2<2<222.5V <1<2<2<2<2µA 3.3V <1<2<2<2<25V<12<2<2<28Submit Documentation FeedbackTYPICAL CHARACTERISTICSt P H L − n sC L − pF105101520253035t P L H− n s C L − pF5101520253035t P H L− n sC L − pF5101520253035t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =1.8VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =1.8V9Submit Documentation Feedback5101520253035t P H L − n sC L − pF5t P L H − n sC L − pFt P H L− n s C L − pF12345678910t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =2.5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =2.5V10Submit Documentation Feedbackt P H L − n sC L − pFt P L H − n sC L − pFt P H L− n s C L − pFt P L H − n s C L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =3.3VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =3.3Vt P H L− n s C L − pFt P L H − n s C L − pFt P H L − n sC L − pFt P L H − n sC L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =5VPARAMETER MEASUREMENT INFORMATIONV OH V OLLOAD CIRCUIT × V CCOOpenOutput Control (low-level enabling)Output Waveform 1S1 at 2 × V CCO (see Note B)Output Waveform 2S1 at GND (see Note B)0 V0 VV CCI0 VV CCAV CCOVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESVOLTAGE WAVEFORMS PULSE DURATIONVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMESInputt pd t PLZ /t PZL t PHZ /t PZHOpen 2 × V CCO GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, Z O = 50 Ω, dv/dt ≥ 1 V/ns.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.V CCI is the V CC associated with the input port.I.V CCO is the V CC associated with the output port.J.All parameters and waveforms are not applicable to all devices.1.8 V ± 0.15 V2.5 V ± 0.2 V3.3 V ± 0.3 V 5 V ± 0.5 V2 k Ω2 k Ω2 k Ω2 k ΩV CCO R L 0.15 V 0.15 V 0.3 V 0.3 VV TP C L 15 pF 15 pF 15 pF 15 pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 1.Load Circuit and Voltage WaveformsAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2SN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 2shows an example of the SN74LVC1T45being used in a unidirectional logic level-shifting application.PIN NAME FUNCTION DESCRIPTION1V CCA V CC1SYSTEM-1supply voltage (1.65V to 5.5V)2GND GND Device GND3A OUT Output level depends on V CC1voltage.4B IN Input threshold value depends on V CC2voltage.5DIR DIR GND (low level)determines B-port to A-port direction.6V CCBV CC2SYSTEM-2supply voltage (1.65V to 5.5V)Figure 2.Unidirectional Logic Level-Shifting ApplicationAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2Enable TimesSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 3shows the SN74LVC1T45being used in a bidirectional logic level-shifting application.Since the SN74LVC1T45does not have an output-enable (OE)pin,the system designer should take precautions to avoid bus contention between SYSTEM-1and SYSTEM-2when changing directions.The following table shows data transmission from SYSTEM-1to SYSTEM-2and then from SYSTEM-2to SYSTEM-1.STATE DIR CTRLI/O-1I/O-2DESCRIPTION1H Out In SYSTEM-1data to SYSTEM-2SYSTEM-2is getting ready to send data to SYSTEM-1.I/O-1and I/O-2are disabled.The 2H Hi-Z Hi-Z bus-line state depends on pullup or pulldown.(1)DIR bit is flipped.I/O-1and I/O-2still are disabled.The bus-line state depends on pullup or 3L Hi-Z Hi-Z pulldown.(1)4LOutInSYSTEM-2data to SYSTEM-1(1)SYSTEM-1and SYSTEM-2must use the same conditions,i.e.,both pullup or both pulldown.Figure 3.Bidirectional Logic Level-Shifting ApplicationCalculate the enable times for the SN74LVC1T45using the following formulas:•t PZH (DIR to A)=t PLZ (DIR to B)+t PLH (B to A)•t PZL (DIR to A)=t PHZ (DIR to B)+t PHL (B to A)•t PZH (DIR to B)=t PLZ (DIR to A)+t PLH (A to B)•t PZL (DIR to B)=t PHZ (DIR to A)+t PHL (A to B)In a bidirectional application,these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected.For example,if the SN74LVC1T45initially is transmitting from A to B,then the DIR bit is switched;the B port of the device must be disabled before presenting it with an input.After the B port has been disabled,an input signal applied to it appears on the corresponding A port after the specified propagation delay.PACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LVC1T45DBVR ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVRE4ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVT ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVTE4ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKR ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRE4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRG4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKT ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTE4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTG4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLR ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLRG4ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45YZPRACTIVEWCSPYZP63000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device isin production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is 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SN74LVC2T45DCTRE4中文资料
D D
VCCA A1 A2 GND
1 2 3 4
8 7 6 5
VCCB B1 B2 DIR
GND A2 A1 VCCA
4 5 3 6 2 7 1 8
DIR B2 B1 VCCB
description/ordering information
元器件交易网
SN74LVC2T45 DUALĆBIT DUALĆSUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3ĆSTATE OUTPUTS
SCES516E − DECEMBER 2003 − REVISED MAY 2004
SN74LVC2T45 DUALĆBIT DUALĆSUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3ĆSTATE OUTPUTS
description/ordering information (continued)
The SN74LVC2T45 is designed so that the DIR input circuit is supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
SN74ALS520NSR,SN74ALS521DWRE4,SN74ALS521NSRE4,SN74ALS520NSRE4,SN74ALS520NE4, 规格书,Datasheet 资料
Addendum-Page 1PACKAGING INFORMATIONOrderable Device Status(1)Package Type PackageDrawingPins Package QtyEco Plan(2)Lead/Ball Finish MSL Peak Temp (3)Samples (Requires Login)5962-88691012A ACTIVE LCCC FK 201TBD Call TI Call TI 5962-8869101RA ACTIVE CDIP J 201TBD Call TI Call TISN54ALS520J ACTIVE CDIP J 201TBDA42N / A for Pkg TypeSN74ALS518DW ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS518DWE4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS518DWG4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS518N ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS518NE4ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS520DW ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS520DWE4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS520DWG4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS520N ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS520NE4ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS520NSR ACTIVE SO NS 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS520NSRE4ACTIVE SO NS 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS520NSRG4ACTIVE SO NS 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521DW ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521DWE4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521DWG4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521DWRACTIVESOICDW202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM芯天下--/Addendum-Page 2Orderable Device Status(1)Package Type PackageDrawingPins Package QtyEco Plan(2)Lead/Ball FinishMSL Peak Temp(3)Samples (Requires Login)SN74ALS521DWRE4ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521DWRG4ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521N ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS521NE4ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type SN74ALS521NSR ACTIVE SO NS 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521NSRE4ACTIVE SO NS 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS521NSRG4ACTIVE SO NS 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ54ALS520FK ACTIVE LCCC FK 201TBD POST-PLATE N / A for Pkg TypeSNJ54ALS520JACTIVECDIPJ201TBDA42N / A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3)MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.芯天下--/PACKAGE OPTION ADDENDUM5-Sep-2011Addendum-Page 3In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN54ALS520, SN74ALS520 :•Catalog: SN74ALS520•Military: SN54ALS520NOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense Applications芯天下--/TAPE AND REELINFORMATION*Alldimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74ALS520NSR SO NS 202000330.024.48.213.0 2.512.024.0Q1SN74ALS521DWR SOIC DW 202000330.024.410.813.0 2.712.024.0Q1SN74ALS521NSRSONS202000330.024.48.213.02.512.024.0Q114-Jul-2012*Alldimensions are nominalDevice Package TypePackage DrawingPins SPQ Length (mm)Width (mm)Height (mm)SN74ALS520NSR SO NS 202000367.0367.045.0SN74ALS521DWR SOIC DW 202000367.0367.045.0SN74ALS521NSRSONS202000367.0367.045.014-Jul-2012IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components which meet ISO/TS16949requirements,mainly for automotive ponents which have not been so designated are neither designed nor intended for automotive use;and TI will not be responsible for any failure of such components to meet such requirements.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2012,Texas Instruments Incorporated。
SN74LVCH245ADBRG4中文资料
LOGIC DIAGRAM (POSITIVE LOGIC)
1 DIR
19 OE
A1 2
18 B1
To Seven Other Channels
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
GQN OR ZQN PACKAGE (TOP VIEW) 1234
A B C D E
TERMINAL ASSIGNMENTS
1
2
3
4
A
A1
DIR
VCC
OE
B
A3
B2
A2
B1
C
A5
A4
B4
B3
D
A7
B6
A6
B5
E
GND
A8
B8
B7
FUNCTION TABLE
74ALVCH32245LB资料
1/9February 2002s 3.6V TOLERANT INPUTS AND OUTPUTS sHIGH SPEED:t PD = 3.0ns (MAX.) at V CC = 3.0 to 3.6V t PD = 3.7ns (MAX.) at V CC = 2.3 to 2.7VsPOWER DOWN PROTECTION ON INPUTS AND OUTPUTSsSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 24mA (MIN) at V CC = 3V |I OH | = I OL = 8mA (MIN) at V CC = 2.3V sOPERATING VOLTAGE RANGE:V CC (OPR) = 1.65V to 3.6VsPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32245s BUS HOLD PROVIDED ON BOTH SIDE sLATCH-UP PERFORMANCE EXCEEDS 300mAsESD PERFORMANCE:HBM > 2000V (MIL STD 883 method 3015); MM > 200VDESCRIPTIONThe 74ALVCH32245 is a low voltage CMOS 32-BIT BUS TRANSCEIVER (3-STATE)fabricated with sub-micron silicon gate and five-layer metal wiring C 2MOS technology. It is ideal for 1.65 to 3.6 V applications; it can be interfaced to 3.6V signal enviroment for both inputs and outputs. This IC is intended for two-ways asynchronous communication between data buses: the direction of data trasmission is determined by DIR input.Any nG contol output governs eight BUS TRANSCEIVERS. Output Enable input (nG) tied together gives full 32-bit operation. When nG is LOW, the output are enabled. When nG is HIGH,the output are in high impedance state so that the buses are effectively isolated. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor.All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.74ALVCH32245LOW VOLTAGE CMOS 32-BIT BUS TRANSCEIVER(3-STATE) WITH 3.6V TOLERANTAT INPUTS AND OUTPUTSORDER CODESPACKAGE TRAY T & RLFBGA9674ALVCH32245LB74ALVCH32245LBR74ALVCH322452/9PIN CONNECTION (Top view)TERMINAL ASSIGNMENTINPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTIONTRUTH TABLEX : Don‘t CareZ : High ImpedanceAB C D E F G H J K L M N P R T 61A21A41A61A82A22A42A62A73A23A43A63A84A24A44A64A751A11A31A51A72A12A32A52A83A13A33A53A74A14A34A54A841GGNDV CC GND GND V CC GND2G3GGNDV CC GND GND V CC GND4G31DIR GND V CC GND GND V CC GND 2DIR 3DIR GND V CC GND GND V CC GND 4DIR 21B11B31B51B72B12B32B52B83B13B33B53B74B14B34B54B811B21B41B61B82B22B42B62B73B23B43B63B84B24B44B64B7SYMBOL NAME AND FUNCTION nDIR Directional Control nA1 to nA8Data Inputs/Outputs nB1 to nB8Data Inputs/Outputs nG Output Enable Inputs GND Ground (0V)V CC Positive Supply VoltageINPUTS FUNCTION OUTPUT nG nDIR A BUSB BUSYn L L OUTPUT INPUT A = B L H INPUT OUTPUT B = A HXZ ZZ74ALVCH322453/9ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied1) I O absolute maximum rating must be observed 2) V O < GNDRECOMMENDED OPERATING CONDITIONS1) Truth Table guaranteed: 1.2V to 3.6V 2) V IN from 0.8V to 2V at V CC = 3.0VSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +4.6V V I DC Input Voltage-0.5 to +4.6V V O DC Output Voltage (V CC = 0V)-0.5 to +4.6V V O DC Output Voltage (High or Low State) (note 1)-0.5 to V CC + 0.5V I IK DC Input Diode Current- 50mA I OK DC Output Diode Current (note 2)- 50mA I ODC Output Current± 50mA I CC or I GND DC V CC or Ground Current per Supply Pin± 100mA P D Power Dissipation400mW T stg Storage Temperature -65 to +150°C T LLead Temperature (10 sec)300°CSymbol ParameterValue Unit V CC Supply Voltage (note 1) 1.65 to 3.6V V I Input Voltage0 to 3.6V V O Output Voltage (V CC = 0V)0 to 3.6V V O Output Voltage (High or Low State)0 to V CC V I OH , I OL High or Low Level Output Current (V CC = 3.0 to 3.6V)± 24mA I OH , I OL High or Low Level Output Current (V CC =2.7V)± 12mA I OH , I OL High or Low Level Output Current (V CC = 2.3 to 2.5V)±8mA T op Operating Temperature-40 to +85°C dt/dvInput Rise and Fall Time (note 2)0 to 10ns/V74ALVCH322454/9DC SPECIFICATIONSSymbolParameterTest ConditionValue UnitV CC (V)-40 to 85 °C Min.Max.V IHHigh Level Input Voltage1.65 to 1.950.65V CC V2.3 to 2.7 1.72.7 to3.6 2.0V ILLow Level Input Voltage1.65 to 1.950.35V CC V2.3 to 2.70.72.7 to3.60.8V OHHigh Level Output Voltage1.65 to 3.6I O =-100 µA V CC -0.2V1.65I O =-4 mA 1.22.3I O =-8 mA 1.72.7I O =-12 mA 2.23.0I O =-12 mA 2.43.0I O =-24 mA 2.2V OLLow Level Output Voltage1.65 to 3.6I O =100 µA 0.2V 1.65I O =4 mA 0.452.3I O =8 mA 0.72.7I O =12 mA 0.43.0I O =12 mA 0.43.0I O =24 mA 0.55I I Input Leakage Current 3.6V I = V CC or GND ± 5µA I I(HOLD)Input Hold Current1.65V I = 0.58V 25µA1.65V I = 1.07V -252.3V I = 0.7V 452.3V I = 1.7V -453V I = 0.8V 753V I = 2V -753.6V I = 0 to 3.6V ± 500I OZ High Impedance Output Leakage Current3.6V O = V CC or GND ± 10µA I off Power Off Leakage Current 0V I or V O = 0 to 3.6V 20µA I CC Quiescent Supply Current 3.6V I = V CC or GND, I O = 040µA ∆I CCI CC incr. per Input3.0 to 3.6V IH = V CC -0.6V other V I = V CC or GND750µA74ALVCH322455/9AC ELECTRICAL CHARACTERISTICSCAPACITIVE CHARACTERISTICS1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /32 (per circuit)SymbolParameterTest ConditionValue UnitV CC (V)C L (pF)-40 to 85 °C Min.Max.t PLH t PHLPropagation Delay Time2.3 to 2.730 1.03.7ns 2.750 1.0 3.63.0 to 3.650 1.0 3.0t PZL t PZHOutput Enable Time2.3 to 2.730 1.0 5.7ns2.750 1.0 5.43.0 to 3.650 1.04.4t PLZ t PHZOutput Disable Time2.3 to 2.730 1.0 5.2ns2.750 1.0 4.63.0 to 3.6501.04.1SymbolParameterTest ConditionValue UnitV CC (V)T A = 25 °C Min.Typ.Max.C IN Input Capacitance 3.3V I = 0V or V CC 4pF C OUT Output Capacitance3.3V I = 0V or V CC 8pF C PDPower Dissipation Capacitance (note 1)2.5f IN = 10MHz V I = 0V or V CC22pF 3.32874ALVCH322456/9TEST CIRCUITR T = Z OUT of pulse generator (typically 50Ω)TEST CIRCUIT AND WAVEFORM SYMBOL VALUETESTSWITCH t PLH , t PHLOpen t PZL , t PLZ (V CC = 3.0 to 3.6V)6V t PZL , t PLZ (V CC = 2.3 to 2.7V)2V CC t PZH , t PHZGNDSymbolV CC3.0 to 3.6V2.7V 2.3 to 2.7V1.65 to 1.95VV IH 2.7V 2.7V V CC V CC V M 1.5V 1.5V V CC /2V CC /2V X V OL +0.3V V OL +0.3V V OL +0.15V V OL +0.15V V Y V OH -0.3V V OH -0.3V V OH -0.15V V OH -0.15V C L50pF 50pF 30pF 30pF R L =R 1 500Ω500Ω500Ω1000Ωt r = t r<2.5ns<2.5ns<2.0ns<2.0ns74ALVCH322457/9WAVEFORM 1: PROPAGATION DELAY (f=1MHz; 50% duty cycle)WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME(f=1MHz; 50% duty cycle)74ALVCH32245 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2002 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.© 9/9。
74LVT2245资料
元器件交易网SO20:plastic small outline package; 20 leads; body width 7.5 mm SOT163-1SSOP20:plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1TSSOP20:plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-174LVT22453.3V Octal transceiver with 30Ω termination resistors(3-State)Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.DisclaimersLife support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.Philips Semiconductors811 East Arques AvenueP .O. Box 3409Sunnyvale, California 94088–3409Telephone 800-234-7381© Copyright Philips Electronics North America Corporation 1998All rights reserved. Printed in U.S.A.print codeDate of release: 05-96。
SN74LVCH245APWRG4资料
FEATURESSN74LVCH245A...RGY PACKAGE(TOP VIEW)I RB G NC CSN54LVCH245A...J OR W PACKAGE SN74LVCH245A...DB, DGV, DW, NS,OR PW PACKAGE(TOP VIEW)1234567891020191817161514131211DIR A1A2A3A4A5A6A7A8GNDV CC OE B1B2B3B4B5B6B7B8SN54LVCH245A...FK PACKAGE(TOP VIEW)3212019910111213456781817161514B1B2B3B4B5A3A4A5A6A7A 2A 1D I RB 7B 6O EA 8G N DB 8VC CDESCRIPTION/ORDERING INFORMATIONSN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSSCES008O–JULY 1995–REVISED DECEMBER 2005•Operate From 1.65V to 3.6V •I off Supports Partial-Power-Down Mode Operation•Inputs Accept Voltages to 5.5V •Bus Hold on Data Inputs Eliminates the Need •Max t pd of 6.3ns at 3.3Vfor External Pullup/Pulldown Resistors•Typical V OLP (Output Ground Bounce)•Latch-Up Performance Exceeds 250mA Per <0.8V at V CC =3.3V,T A =25°CJESD 17•Typical V OHV (Output V OH Undershoot)•ESD Protection Exceeds JESD 22>2V at V CC =3.3V,T A =25°C–2000-V Human-Body Model (A114-A)•Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With –200-V Machine Model (A115-A)3.3-V V CC )The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V V CC operation,and the SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V V CC operation.Inputs can be driven from either 3.3-V or 5-V devices.This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.These devices are designed for asynchronous communication between data buses.These devices transmit data from the A bus to the B bus or from the B bus to the A bus,depending on the logic level at the direction-control (DIR)input.The output-enable (OE)input can be used to disable the device so the buses are effectively isolated.These devices are fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the devices when they are powered down.To ensure the high-impedance state during power up or power down,OE should be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic e of pullup or pulldown resistors with the bus-hold circuitry is not recommended.The bus-hold circuitry is part of the input circuit and is not disabled by OE or DIR.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.GQN OR ZQN PACKAGE(TOP VIEW)1234A B C D ESN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSSCES008O–JULY 1995–REVISED DECEMBER 2005ORDERING INFORMATIONT APACKAGE (1)ORDERABLE PART NUMBER TOP-SIDE MARKING QFN –RGY Reel of 1000SN74LVCH245ARGYR LCH245A Tube of 25SN74LVCH245ADW SOIC –DW LVCH245A Reel of 2000SN74LVCH245ADWR SOP –NS Reel of 2000SN74LVCH245ANSR LVCH245A SSOP –DBReel of 2000SN74LVCH245ADBR LCH245A–40°C to 85°CTube of 70SN74LVCH245APW TSSOP –PW Reel of 2000SN74LVCH245APWR LCH245AReel of 250SN74LVCH245APWT TVSOP –DGV Reel of 2000SN74LVCH245ADGVR LCH245A VFBGA –GQNSN74LVCH245AGQNR Reel of 1000LCH245AVFBGA –ZQN (Pb-free)SN74LVCH245AZQNR CDIP –JTube of 20SNJ54LVCH245AJ SNJ54LVCH245AJ –55°C to 125°CCFP –W Tube of 85SNJ54LVCH245AW SNJ54LVCH245AW LCCC –FKTube of 55SNJ54LVCH245AFKSNJ54LVCH245AFK (1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at /sc/package.TERMINAL ASSIGNMENTS1234A A1DIR V CC OE B A3B2A2B1C A5A4B4B3D A7B6A6B5EGNDA8B8B7FUNCTION TABLEINPUTS OPERATION OE DIR L L B data to A bus L H A data to B busHXIsolationDIROEA1B1To Seven Other ChannelsAbsolute Maximum Ratings (1)SN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSSCES008O–JULY 1995–REVISED DECEMBER 2005LOGIC DIAGRAM (POSITIVE LOGIC)over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CC Supply voltage range –0.5 6.5V V I Input voltage range (2)–0.5 6.5V V O Voltage range applied to any output in the high-impedance or power-off state (2)–0.5 6.5V V O Voltage range applied to any output in the high or low state (2)(3)–0.5V CC +0.5V I IK Input clamp current V I <0–50mA I OK Output clamp current V O <0–50mA I OContinuous output current±50mA Continuous current through V CC or GND±100mADB package (4)70DGV package (4)92DW package (4)58θJAPackage thermal impedanceGQN/ZQN package (4)78°C/W NS package (4)60PW package (4)83RGY package (5)37T stg Storage temperature range–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD 51-7.(5)The package thermal impedance is calculated in accordance with JESD 51-5.Recommended Operating Conditions (1)SN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSSCES008O–JULY 1995–REVISED DECEMBER 2005SN54LVCH245A SN74LVCH245AUNIT MINMAX MIN MAX Operating2 3.61.65 3.6V CCSupply voltageVData retention only 1.51.5V CC =1.65V to 1.95V0.65×V CCV IHHigh-level input voltageV CC =2.3V to 2.7V 1.7VV CC =2.7V to 3.6V 22V CC =1.65V to 1.95V0.35×V CCV IL Low-level input voltage V CC =2.3V to 2.7V 0.7V V CC =2.7V to 3.6V0.80.8V I Input voltage 0 5.50 5.5V High or low state 0V CC 0V CC V OOutput voltageV 3-state 05.55.5V CC =1.65V–4V CC =2.3V –8I OHHigh-level output currentmA V CC =2.7V –12–12V CC =3V –24–24V CC =1.65V4V CC =2.3V 8I OLLow-level output currentmA V CC =2.7V 1212V CC =3V2424∆t/∆v Input transition rise or fall rate 1010ns/V T A Operating free-air temperature–55125–4085°C (1)All unused control inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.Electrical CharacteristicsSN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERSWITH3-STATE OUTPUTS SCES008O–JULY1995–REVISED DECEMBER2005over recommended operating free-air temperature range(unless otherwise noted)SN54LVCH245A SN74LVCH245A PARAMETER TEST CONDITIONS V CC UNITMIN TYP(1)MAX MIN TYP(1)MAXV CC1.65V to3.6V–0.2I OH=–100µAV CC2.7V to3.6V–0.2I OH=–4mA 1.65V 1.2V OH VI OH=–8mA 2.3V 1.72.7V 2.2 2.2I OH=–12mA3V 2.4 2.4I OH=–24mA3V 2.2 2.21.65V to3.6V0.2I OL=100µA2.7V to3.6V0.2I OL=4mA 1.65V0.45V OL VI OL=8mA 2.3V0.7I OL=12mA 2.7V0.40.4I OL=24mA3V0.550.55I I Control inputs V I=0to5.5V 3.6V±5±5µAI off V I or V O=5.5V0±10µAV I=0.58V251.65VV I=1.07V–25V I=0.7V452.3VI I(hold)V I=1.7V–45µAV I=0.8V75753VV I=2V–75–75V I=0to3.6V(2) 3.6V±500±500I OZ(3)V O=0V or(V CC to5.5V) 2.3V to3.6V±15±5µAV I=V CC or GND1010I CC I O=0 3.6VµA3.6V≤V I≤5.5V(4)1010One input at V CC–0.6V,∆I CC 2.7V to3.6V500500µA Other inputs at V CC or GNDC i Control inputs V I=V CC or GND 3.3V4124pFC io A or B port V O=V CC or GND 3.3V 5.512 5.5pF(1)All typical values are at V CC=3.3V,T A=25°C.(2)This is the bus-hold maximum dynamic current required to switch the input from one state to another.(3)For the total leakage current in an I/O port,please consult the I I(hold)specification for the input voltage condition0V<V I<V CC,and theI OZ specification for the input voltage conditions V I=0V or V I=V CC to5.5V.The bus-hold current,at input voltage greater than V CC,isnegligible.(4)This applies in the disabled state only.Switching CharacteristicsSwitching CharacteristicsOperating CharacteristicsSN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSSCES008O–JULY 1995–REVISED DECEMBER 2005over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)SN54LVCH245AFROM TO V CC =3.3V PARAMETERV CC =2.7V UNIT(INPUT)(OUTPUT)±0.3V MIN MAXMIN MAXt pd A or B B or A 817ns t en OE A or B 9.518.5ns t disOEA or B8.517.5ns over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)SN74LVCH245AFROM TO V CC =1.8V V CC =2.5V V CC =3.3V PARAMETERV CC =2.7V UNIT(INPUT)(OUTPUT)±0.15V ±0.2V ±0.3V MINMAXMINMAXMINMAX MIN MAX t pd A or B B or A (1)(1)(1)(1)7.3 1.5 6.3ns t en OE A or B (1)(1)(1)(1)9.5 1.58.5ns t dis OEA or B(1)(1)(1)(1)8.51.77.5ns t sk(o)1ns(1)This information was not available at the time of publication.T A =25°CV CC =1.8VV CC =2.5VV CC =3.3VTEST PARAMETERUNIT CONDITIONS TYPTYPTYP Outputs enabled (1)(1)47Power dissipation capacitance C pd f =10MHzpFper transceiverOutputs disabled(1)(1)2(1)This information was not available at the time of publication.PARAMETER MEASUREMENT INFORMATIONFrom Output Under TestLOAD CIRCUITOpen Data InputTiming InputV I0 VV I0 V0 VInputVOLTAGE WAVEFORMS SETUP AND HOLD TIMESVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOLTAGE WAVEFORMS PULSE DURATIONV OHV OHV OLV OLV I0 V InputOutput Waveform 1S1 at V LOAD (see Note B)Output Waveform 2S1 at GND (see Note B)V OLV OH V LOAD /20 V≈0 VV IVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLINGOutputOutputt PLH /t PHL t PLZ /t PZL t PHZ /t PZHOpen V LOAD GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 Ω.D.The outputs are measured one at a time with, one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.All parameters and waveforms are not applicable to all devices.Output Control V I1.8 V ± 0.15 V2.5 V ± 0.2 V2.7 V3.3 V ± 0.3 V1 k Ω500 Ω500 Ω500 ΩV CC R L 2 × V CC 2 × V CC 6 V 6 VV LOAD C L 30 pF 30 pF 50 pF 50 pF0.15 V 0.15 V 0.3 V 0.3 VV ∆V CC V CC 2.7 V 2.7 VV I V CC /2V CC /21.5 V 1.5 VV M t r /t f ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 nsINPUTS SN54LVCH245A,SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSSCES008O–JULY 1995–REVISED DECEMBER 2005Figure 1.Load Circuit and Voltage WaveformsPACKAGING INFORMATIONOrderableDevice Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)5962-9754301Q2A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 5962-9754301QRA ACTIVE CDIP J 201TBD A42SNPB N /A for Pkg Type 5962-9754301QSA ACTIVE CFP W 201TBD A42N /A for Pkg Type 5962-9754301V2A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type5962-9754301VRA ACTIVE CDIP J 201TBD A42SNPB N /A for Pkg Type 5962-9754301VSA ACTIVE CFP W 201TBD A42N /A for Pkg Type SN74LVCH245ADBLE OBSOLETE SSOP DB 20TBDCall TI Call TISN74LVCH245ADBR ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADBRE4ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADBRG4ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADGVR ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADGVRE4ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADGVRG4ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADW ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADWE4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADWG4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADWR ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADWRE4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ADWRG4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245AGQNRNRNDBGA MI CROSTA R JUNI ORGQN201000TBDSNPBLevel-1-240C-UNLIMSN74LVCH245ANSR ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ANSRE4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245ANSRG4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245APW ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245APWE4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245APWG4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH245APWLEOBSOLETETSSOPPW20TBDCall TICall TI3-Jan-2008Orderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)SN74LVCH245APWR ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LVCH245APWRE4ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LVCH245APWRG4ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LVCH245APWT ACTIVE TSSOP PW20250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LVCH245APWTE4ACTIVE TSSOP PW20250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LVCH245APWTG4ACTIVE TSSOP PW20250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LVCH245ARGYR ACTIVE QFN RGY201000Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARSN74LVCH245ARGYRG4ACTIVE QFN RGY201000Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARSN74LVCH245AZQNR ACTIVE BGA MICROSTAR JUNIOR ZQN201000Green(RoHS&no Sb/Br)SNAGCU Level-1-260C-UNLIMSN74LVCH245AZXYR ACTIVE BGA MICROSTAR JUNIOR ZXY202500Green(RoHS&no Sb/Br)SNAGCU Level-1-260C-UNLIMSNJ54LVCH245AFK ACTIVE LCCC FK201TBD POST-PLATE N/A for Pkg Type SNJ54LVCH245AJ ACTIVE CDIP J201TBD A42SNPB N/A for Pkg Type SNJ54LVCH245AW ACTIVE CFP W201TBD A42N/A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part ina new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited 3-Jan-2008information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.3-Jan-2008TAPE AND REEL BOXINFORMATIONDevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74LVCH245ADBR DB 20SITE 41330168.27.5 2.51216Q1SN74LVCH245ADGVR DGV 20SITE 41330127.0 5.6 1.6812Q1SN74LVCH245ADWR DW 20SITE 413302410.813.0 2.71224Q1SN74LVCH245AGQNR GQN 20SITE 3233012 3.3 4.3 1.5812Q1SN74LVCH245AGQNR GQN 20SITE 6033012 3.3 4.3 1.6812Q1SN74LVCH245APWR PW 20SITE 4133016 6.957.1 1.6816Q1SN74LVCH245ARGYR RGY 20SITE 4118012 3.8 4.8 1.6812Q1SN74LVCH245AZQNR ZQN 20SITE 3233012 3.3 4.3 1.5812Q1SN74LVCH245AZQNR ZQN 20SITE 6033012 3.3 4.3 1.6812Q1SN74LVCH245AZXYRZXY20SITE 60330122.83.31.0412Q212-Jan-2008DevicePackage Pins Site Length (mm)Width (mm)Height (mm)SN74LVCH245ADBR DB 20SITE 41346.0346.033.0SN74LVCH245ADGVR DGV 20SITE 41346.0346.029.0SN74LVCH245ADWR DW 20SITE 41346.0346.041.0SN74LVCH245AGQNR GQN 20SITE 32346.0346.029.0SN74LVCH245AGQNR GQN 20SITE 60342.9338.120.64SN74LVCH245APWR PW 20SITE 41346.0346.033.0SN74LVCH245ARGYR RGY 20SITE 41190.5212.731.75SN74LVCH245AZQNR ZQN 20SITE 32346.0346.029.0SN74LVCH245AZQNR ZQN 20SITE 60342.9338.120.64SN74LVCH245AZXYRZXY20SITE 60342.9338.120.6412-Jan-2008IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right, or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is 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TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use any non-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandClocks and Timers /clocks Digital Control /digitalcontrolInterface Medical /medicalLogic Military /militaryPower Mgmt Optical Networking /opticalnetwork Microcontrollers Security /securityRFID Telephony /telephonyRF/IF and ZigBee®Solutions /lprf Video&Imaging /videoWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright2008,Texas Instruments Incorporated。
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FEATURESDB, DBQ, DGV, DW, NS, OR PW PACKAGE(TOP VIEW)1 2 3 4 5 6 7 8 9 1020 19 18 17 16 15 14 13 12 11DIR A1 A2 A3 A4 A5 A6 A7 A8 GND V CCOEB1B2B3B4B5B6B7B8RGY PACKAGE(TOP VIEW)A1A2A3A4A5A6A7A8IRBGNCCDESCRIPTION/ORDERING INFORMATIONSN74LVCR2245AOCTAL BUS TRANSCEIVERWITH3-STATE OUTPUTS SCAS581M–NOVEMBER1996–REVISED MARCH2005•Supports Mixed-Mode Signal Operation on All Ports(5-V Input/Output Voltage•Operates From1.65V to3.6VWith3.3-V V CC)•Inputs Accept Voltages to5.5V•I off Supports Partial-Power-Down Mode •Max t pd of6.3ns at3.3VOperation•All Outputs Have Equivalent26-ΩSeries•Latch-Up Performance Exceeds250mA Per Resistors,So No External Resistors AreJESD17Required•ESD Protection Exceeds JESD22•Typical V OLP(Output Ground Bounce)–2000-V Human-Body Model(A114-A)<0.8V at V CC=3.3V,T A=25°C–1000-V Charged-Device Model(C101)•Typical V OHV(Output V OH Undershoot)>2V at V CC=3.3V,T A=25°CORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING QFN–RGY Reel of1000SN74LVCR2245ARGYR LER245ATube of25SN74LVCR2245ADWSOIC–DW LVCR2245AReel of2000SN74LVCR2245ADWRSOP–NS Reel of2000SN74LVCR2245ANSR LVCR2245ASSOP–DB Reel of2000SN74LVCR2245ADBR LER245ASSOP(QSOP)–DBQ Reel of2500SN74LVCR2245ADBQR LVCR2245A–40°C to85°CTube of70SN74LVCR2245APWTSSOP–PW Reel of2000SN74LVCR2245APWR LER245AReel of250SN74LVCR2245APWTTVSOP–DGV Reel of2000SN74LVCR2245ADGVR LER245AVFBGA–GQN SN74LVCR2245AGQNRReel of1000LER245A VFBGA–ZQN(Pb-free)SN74LVCR2245AZQNR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.DESCRIPTION/ORDERING INFORMATION (CONTINUED)GQN OR ZQN PACKAGE(TOP VIEW)1234A B C D ESN74LVCR2245AOCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTSSCAS581M–NOVEMBER 1996–REVISED MARCH 2005This octal bus transceiver is designed for 1.65-V to 3.6-V V CC operation.The SN74LVCR2245A is designed for asynchronous communication between data buses.The device transmits data from the A bus to the B bus or from the B bus to the A bus,depending on the logic level at the direction-control (DIR)input.The output-enable (OE)input can be used to disable the device so the buses are effectively isolated.All outputs,which are designed to sink up to 12mA,include equivalent 26-Ωresistors to reduce overshoot and undershoot.Inputs can be driven from either 3.3-V or 5-V devices.This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.To ensure the high-impedance state during power up or power down,OE should be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.TERMINAL ASSIGNMENTS1234A A1DIR V CC OE B A3B2A2B1C A5A4B4B3D A7B6A6B5EGNDA8B8B7FUNCTION TABLEINPUTS OPERATION OE DIR L L B data to A bus L H A data to B busHXIsolationDIROEA1B1To Seven Other ChannelsPin numbers shown are for the DB, DBQ, DGV, DW, NS, PW, and RGY packages. Absolute Maximum Ratings(1)SN74LVCR2245AOCTAL BUS TRANSCEIVERWITH3-STATE OUTPUTSSCAS581M–NOVEMBER1996–REVISED MARCH2005LOGIC DIAGRAM(POSITIVE LOGIC)over operating free-air temperature range(unless otherwise noted)MIN MAX UNITV CC Supply voltage range–0.5 6.5VV I Input voltage range(2)–0.5 6.5VV O Voltage range applied to any output in the high-impedance or power-off state(2)–0.5 6.5VV O Voltage range applied to any output in the high or low state(2)(3)–0.5V CC+0.5VI IK Input clamp current V I<0–50mAI OK Output clamp current V O<0–50mAI O Continuous output current±50mAContinuous current through V CC or GND±100mADB package(4)70DBQ package(4)68DGV package(4)92DW package(4)58θJA Package thermal impedance°C/WGQN/ZQN package(4)78NS package(4)60PW package(4)83RGY package(5)37T stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD51-7.(5)The package thermal impedance is calculated in accordance with JESD51-5.Recommended Operating Conditions (1)SN74LVCR2245AOCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTSSCAS581M–NOVEMBER 1996–REVISED MARCH 2005MINMAX UNIT Operating1.65 3.6V CCSupply voltageVData retention only 1.5V CC =1.65V to 1.95V0.65×V CCV IHHigh-level input voltageV CC =2.3V to 2.7V 1.7VV CC =2.7V to 3.6V 2V CC =1.65V to 1.95V0.35×V CCV IL Low-level input voltage V CC =2.3V to 2.7V 0.7V V CC =2.7V to 3.6V0.8V I Input voltage 0 5.5V High or low state 0V CC V OOutput voltageV 3-state 0 5.5V CC =1.65V–2V CC =2.3V –4I OHHigh-level output currentmA V CC =2.7V –8V CC =3V –12V CC =1.65V2V CC =2.3V 4I OLLow-level output currentmA V CC =2.7V 8V CC =3V12∆t/∆v Input transition rise or fall rate 10ns/V T A Operating free-air temperature–4085°C (1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.Electrical CharacteristicsSwitching Characteristics Operating CharacteristicsSN74LVCR2245A OCTAL BUS TRANSCEIVERWITH3-STATE OUTPUTS SCAS581M–NOVEMBER1996–REVISED MARCH2005over recommended operating free-air temperature range(unless otherwise noted)PARAMETER TEST CONDITIONS V CC MIN TYP(1)MAX UNITI OH=–100µA 1.65V to3.6V V CC–0.2I OH=–2mA 1.65V 1.22.3V 1.7I OH=–4mAV OH 2.7V 2.2VI OH=–6mA3V 2.4I OH=–8mA 2.7V2I OH=–12mA3V2I OL=100µA 1.65V to3.6V0.2I OL=2mA 1.65V0.452.3V0.7I OL=4mAV OL 2.7V0.4VI OL=6mA3V0.55I OL=8mA 2.7V0.6I OL=12mA3V0.8I I Control inputs V I=0to5.5V 3.6V±5µA I off V I or V O=5.5V0±10µA I OZ(2)V O=0to5.5V 3.6V±10µAV I=V CC or GND10I CC I O=0 3.6VµA3.6V≤V I≤5.5V(3)10∆I CC One input at V CC–0.6V,Other inputs at V CC or GND 2.7V to3.6V500µA C i Control inputs V I=V CC or GND 3.3V4pFC io A or B ports V O=V CC or GND 3.3V 5.5pF(1)All typical values are at V CC=3.3V,T A=25°C.(2)For I/O ports,the parameter I OZ includes the input leakage current.(3)This applies in the disabled state only.over recommended operating free-air temperature range(unless otherwise noted)(see Figure1)V CC=1.8V V CC=2.5V V CC=3.3VV CC=2.7VFROM TO±0.15V±0.2V±0.3V PARAMETER UNIT (INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t pd A or B B or A(1)(1)(1)(1)7.3 1.5 6.3ns t en OE A or B(1)(1)(1)(1)9.5 1.58.2ns t dis OE A or B(1)(1)(1)(1)8.5 1.77.8ns t sk(o)1ns (1)This information was not available at the time of publication.TA=25°CV CC=1.8V V CC=2.5V V CC=3.3VTESTPARAMETER UNITCONDITIONS TYP TYP TYPOutputs enabled(1)(1)48 Power dissipation capacitanceC pd f=10MHz pFper transceiver Outputs disabled(1)(1)4(1)This information was not available at the time of publication.PARAMETER MEASUREMENT INFORMATIONFrom Output Under TestLOAD CIRCUITOpen Data InputTiming InputV I0 VV I0 V0 VInputVOLTAGE WAVEFORMS SETUP AND HOLD TIMESVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOLTAGE WAVEFORMS PULSE DURATIONV OHV OHV OLV OLV I0 V InputOutput Waveform 1S1 at V LOAD (see Note B)Output Waveform 2S1 at GND (see Note B)V OLV OH V LOAD /20 V≈0 VV IVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLINGOutputOutputt PLH /t PHL t PLZ /t PZL t PHZ /t PZHOpen V LOAD GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 Ω.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.All parameters and waveforms are not applicable to all devices.Output Control V I1.8 V ± 0.15 V2.5 V ± 0.2 V2.7 V3.3 V ± 0.3 V1 k Ω500 Ω500 Ω500 ΩV CC R L 2 × V CC 2 × V CC 6 V 6 VV LOAD C L 30 pF 30 pF 50 pF 50 pF0.15 V 0.15 V 0.3 V 0.3 VV ∆V CC V CC 2.7 V 2.7 VV I V CC /2V CC /21.5 V 1.5 VV M t r /t f ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 nsINPUTS SN74LVCR2245AOCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTSSCAS581M–NOVEMBER 1996–REVISED MARCH 2005Figure 1.Load Circuit and Voltage WaveformsPACKAGING INFORMATIONOrderable DeviceStatus (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)74LVCR2245ADBQRE4ACTIVE SSOP/QSOP DBQ 202500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR 74LVCR2245ADBQRG4ACTIVE SSOP/QSOP DBQ 202500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR 74LVCR2245ADGVRE4ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVCR2245ADGVRG4ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVCR2245ARGYRG4ACTIVE QFN RGY 201000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCR2245ADBLE OBSOLETE SSOP DB 20TBDCall TI Call TISN74LVCR2245ADBQR ACTIVE SSOP/QSOP DBQ 202500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCR2245ADBR ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADBRE4ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADBRG4ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADGVR ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADW ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADWE4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADWG4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADWR ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADWRE4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ADWRG4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245AGQNRNRNDBGA MI CROSTA R JUNI ORGQN201000TBDSNPBLevel-1-240C-UNLIMSN74LVCR2245ANSR ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ANSRE4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ANSRG4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APW ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWE4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWG4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWLEOBSOLETETSSOPPW20TBDCall TICall TI4-Jun-2007Orderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LVCR2245APWR ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWRE4ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWRG4ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWT ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWTE4ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245APWTG4ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCR2245ARGYR ACTIVE QFN RGY 201000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCR2245AZQNRACTIVEBGA MI CROSTA R JUNI ORZQN201000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die andleadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.4-Jun-2007TAPE AND REELINFORMATION19-May-2007DevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74LVCR2245ADBQR DBQ 20MLA 33016 6.59.0 2.1816Q1SN74LVCR2245ADBR DB 20MLA 330168.27.5 2.51216Q1SN74LVCR2245ADGVR DGV 20MLA 330127.0 5.6 1.6812Q1SN74LVCR2245ADWR DW 20MLA 3302410.813.0 2.71224Q1SN74LVCR2245AGQNR GQN 20HIJ 33012 3.3 4.3 1.5812Q1SN74LVCR2245ANSRNS 20MLA 330248.213.0 2.51224Q1SN74LVCR2245APWR PW 20MLA 33016 6.957.1 1.6816Q1SN74LVCR2245ARGYR RGY 20MLA 18012 3.8 4.8 1.6812Q1SN74LVCR2245AZQNRZQN20HIJ330123.34.31.5812Q1TAPE AND REEL BOX INFORMATIONDevicePackage Pins Site Length (mm)Width (mm)Height (mm)SN74LVCR2245ADBQR DBQ 20MLA 0.00.00.0SN74LVCR2245ADBR DB 20MLA 342.9336.628.58SN74LVCR2245ADGVR DGV 20MLA 338.1340.520.64SN74LVCR2245ADWR DW 20MLA 333.2333.231.75SN74LVCR2245AGQNR GQN 20HIJ 346.0346.029.0SN74LVCR2245ANSR NS 20MLA 333.2333.231.75SN74LVCR2245APWR PW 20MLA 342.9336.628.58SN74LVCR2245ARGYR RGY 20MLA 190.0212.731.75SN74LVCR2245AZQNRZQN20HIJ346.0346.029.019-May-2007PACKAGE MATERIALS INFORMATION19-May-2007元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements,and other changes to its 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